CN110413563A - A kind of micro controller unit - Google Patents
A kind of micro controller unit Download PDFInfo
- Publication number
- CN110413563A CN110413563A CN201810403982.7A CN201810403982A CN110413563A CN 110413563 A CN110413563 A CN 110413563A CN 201810403982 A CN201810403982 A CN 201810403982A CN 110413563 A CN110413563 A CN 110413563A
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- China
- Prior art keywords
- micro controller
- controller unit
- storage array
- nonvolatile storage
- present
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- 230000015654 memory Effects 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 238000010801 machine learning Methods 0.000 claims abstract description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 206010063385 Intellectualisation Diseases 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F2015/761—Indexing scheme relating to architectures of general purpose stored programme computers
- G06F2015/766—Flash EPROM
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
The invention discloses a kind of micro controller units, including 3D Nonvolatile storage array, and micro controller unit and 3D non-volatile memory cells are integrated on the same silicon substrate.Micro controller unit is realized below 3D Nonvolatile storage array or micro controller unit is realized in the side of 3D Nonvolatile storage array.Micro-control unit partially or fully storage unit by 3D Nonvolatile storage array.It reads the data being stored in 3D Nonvolatile storage array using micro controller unit to be handled, processing includes that machine learning and/or inquiry and/or duplicate removal etc. operate.On the one hand micro controller unit structure proposed by the present invention can solve memory capacity in conventional microcontroller smaller, the shortcomings that mass data cannot be stored, on the other hand solving mass storage may not apply to disadvantage in Internet of Things, therefore can be applied to calculating and the machine learning etc. of Internet of things node based on structure proposed by the present invention.
Description
Technical field
The present invention relates to micro-control unit field more particularly to a kind of micro-control units of integrated 3D memory, are used for object
AI application scenarios in networking.
Background technique
Micro controller unit (MCU) is mainly used in embedded system and Internet of Things, specific framework such as 1 institute of attached drawing
Show, specifically includes processing unit 1_1, storage unit 1_2, communication module 1_3 and A/D conversion module 1_4, the storage unit one
As be in-line memory, such as embedded flash memory.Traditional MCU is described to deposit since the data that handle and store are less
The capacity of storage unit is smaller, generally KB or MB rank.And as information-based, intellectualization times gradually develop, the biography of Internet of Things
The sensor node information to be stored is more and more, while doing data processing and machine learning increasingly in Internet of things node at present
Urgently, it is therefore necessary to have the memory of large capacity to store these information.
Current mass storage is generally free-standing memory, for example NAND-type flash memory, capacity are generally GB grades,
The number of plies of the especially development of 3D-NAND technology, stacking is more and more, and capacity is increasing, but current large capacity is independent
Formula memory can not be directly used in Internet of things node for storing data, although in current large capacity stand alone type memory
With a controller, but its function is fairly simple, is only intended to the reading write-in and corresponding erasing operation of array data.
Based on the above two o'clock, micro controller unit and mass storage are realized same the invention proposes a kind of
On silicon substrate, it can by mass storage be applied to Internet of things node, and then can use structure proposed by the present invention into
The ability of edge study is realized in the storage and processing of row Internet of things node mass data.
Summary of the invention
The present invention proposes a kind of micro controller unit, described specifically comprising microcontroller and 3D Nonvolatile storage array
Microcontroller and the 3D Nonvolatile storage array are realized on the same silicon substrate, specific as shown in Fig. 2, since 3D is non-
The memory capacity of volatile storage array is very big, therefore can store more data, and the microcontroller is read by metal wire
Write the data stored in the 3D Nonvolatile storage array, thus method proposed by the present invention it is relatively traditional using interface into
The framework of row read-write data has higher bandwidth, lower read-write delay and higher performance.Herein it should be noted that
Microcontroller of the present invention is not the contained processor of the 3D nonvolatile memory itself, and the 3D is non-volatile
Processor function in property memory is fairly simple, is served only for the reading, write-in and corresponding erasing operation of data, can not
Data processing and study for Internet of things node.
For current 3D Nonvolatile storage array, CuA (CMOS under Array) is mostly used
Framework, i.e., logic circuit is realized to the area for reducing below storage array 3D Nonvolatile storage array, therefore this
It invents in the structure proposed, the microcontroller also may be implemented under the 3D Nonvolatile storage array, specific such as attached drawing 3
It is shown to further decrease area and cost.The 3D Nonvolatile storage array includes N-1 layers of storage unit, respectively 3_1,
3_2 ..., 3_N-2 and 3_N-1, wherein N >=3.3_N is processor and the periphery read-write of 3D Nonvolatile storage array in figure
Circuit, such as decoding circuit, read/write circuit, control circuit and imput output circuit etc., the microcontroller implementation is in the 3D
Below the storage array of nonvolatile memory.
Preferably, micro controller unit of the present invention also may be implemented on the side of 3D Nonvolatile storage array,
The micro controller unit (generally 8-bit) that 3D Nonvolatile storage array can possess oneself is used to read and write erasing operation,
The read-write that can be responsible for storage array by micro controller unit of the present invention (16-bit, 32-bit, 64-bit or higher) is wiped
Except operation.
A kind of micro controller unit of the present invention, including 3D Nonvolatile storage array, and the microcontroller list
Member and 3D non-volatile memory cells are integrated on the same silicon substrate.Micro controller unit is realized in 3D non-volatile memories battle array
Below column or micro controller unit is realized in the side of 3D Nonvolatile storage array.The micro-control unit inner part
Or whole storage units are by 3D Nonvolatile storage array.3D Nonvolatile storage array includes 3D PCM and/or 3D NAND
And/or 3D RRAM.The data being stored in the 3D Nonvolatile storage array are read using the micro controller unit to carry out
Processing, the processing include that machine learning and/or inquiry and/or duplicate removal etc. operate.
On the one hand micro controller unit structure proposed by the present invention can solve memory capacity in conventional microcontroller smaller,
The shortcomings that mass data cannot be stored, on the other hand solving mass storage may not apply to disadvantage in Internet of Things.Cause
This can be applied to calculating and the machine learning etc. of Internet of things node based on structure proposed by the present invention.Passing through simultaneously will be described micro-
Controller unit and the 3D Nonvolatile storage array are integrated on the same substrate, realize memory array and microcontroller
Device is connected directly, and has not only saved area, while performance can be improved.
Detailed description of the invention
With reference to appended attached drawing, to be described more fully the present invention.However, appended attached drawing is merely to illustrate and illustrates, and
It is not meant to limit the scope of the invention.
Fig. 1 is traditional micro controller unit (MCU) architecture diagram；
Fig. 2 is the microcontroller based on same silicon substrate and three dimensional nonvolatile memory cabinet composition proposed by the present invention；
Fig. 3 is the architecture diagram of integrated microprocessor under three dimensional nonvolatile memory array proposed by the present invention；
Fig. 4 is that the present invention is based on the microcontrollers of same silicon substrate and three dimensional NAND architecture diagram；
Fig. 5 is the architecture diagram that microcontroller is integrated under three dimensional NAND storage array proposed by the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art without creative labor it is obtained it is all its
His embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
The present invention proposes a kind of micro controller unit structure, specifically include microcontroller and 3D Nonvolatile storage array,
The microcontroller is the embedded microcontroller of current Internet of things node, such as based on ARM, MIPS and Open-V instruction set
Microcontroller is not the processor in the 3D Nonvolatile storage array contained by itself.The 3D non-volatile memories
Array can be 3D-NAND, 3D-Xpoint and 3D-RRAM etc..Assuming that the microcontroller is based on ARM instruction in the present invention
Collection, the 3D Nonvolatile storage array are 3D-NAND, and from certain domestic fab, the microcontroller is not described
Processor in 3D-NAND contained by itself, it is specific as shown in Fig. 4, the micro controller unit and the 3D-NAND are realized
On same silicon substrate, to realize that Internet of things node has the ability and Internet of things node processing study energy of massive store
Power.
It preferably, can be specific such as attached drawing by the microcontroller implementation below the storage array of the 3D-NAND
Shown in 5.Assuming that the 3D-NAND has 32 layers of storage unit, respectively 5_1,5_2 ..., 5_32,5_33 is 3D- in figure
The peripheral read/write circuit of NAND.
Preferably, micro controller unit of the present invention also may be implemented on the side of 3D Nonvolatile storage array,
The micro controller unit (generally 8-bit) that 3D Nonvolatile storage array can possess oneself is used to read and write erasing operation,
The read-write that can be responsible for storage array by micro controller unit of the present invention (16-bit, 32-bit, 64-bit or higher) is wiped
Except operation.
The foregoing is merely preferred embodiments of the present invention, are not intended to limit embodiments of the present invention and protection model
It encloses, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Equivalent replacement and obviously change obtained scheme, should all be included within the scope of the present invention.
Claims (6)
1. a kind of micro controller unit, which is characterized in that including 3D Nonvolatile storage array, and the micro controller unit and
3D non-volatile memory cells are integrated on the same silicon substrate.
2. micro controller unit according to claim 1, which is characterized in that micro controller unit is realized non-volatile in 3D
Below storage array.
3. micro controller unit according to claim 1, which is characterized in that micro controller unit is realized non-volatile in 3D
The side of storage array.
4. micro controller unit according to claim 1 or 2 or 3, which is characterized in that the micro-control unit inner part or
Whole storage units are by 3D Nonvolatile storage array.
5. micro controller unit according to claim 1 or 2 or 3, which is characterized in that 3D Nonvolatile storage array includes
3D PCM and/or 3D NAND and/or 3D RRAM.
6. micro controller unit according to claim 1 or 2 or 3, which is characterized in that read using the micro controller unit
The data being stored in the 3D Nonvolatile storage array are taken to be handled, the processing includes machine learning and/or inquiry
And/or the operation such as duplicate removal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810403982.7A CN110413563A (en) | 2018-04-28 | 2018-04-28 | A kind of micro controller unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810403982.7A CN110413563A (en) | 2018-04-28 | 2018-04-28 | A kind of micro controller unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110413563A true CN110413563A (en) | 2019-11-05 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810403982.7A Pending CN110413563A (en) | 2018-04-28 | 2018-04-28 | A kind of micro controller unit |
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| Country | Link |
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| CN (1) | CN110413563A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104866246A (en) * | 2015-06-05 | 2015-08-26 | 上海新储集成电路有限公司 | Solid state hybrid drive |
| CN105390501A (en) * | 2015-11-25 | 2016-03-09 | 上海新储集成电路有限公司 | FPGA chip and manufacturing method thereof |
| CN105760931A (en) * | 2016-03-17 | 2016-07-13 | 上海新储集成电路有限公司 | Artificial neural network chip and robot with artificial neural network chip |
| CN105789139A (en) * | 2016-03-31 | 2016-07-20 | 上海新储集成电路有限公司 | Method for preparing neural network chip |
-
2018
- 2018-04-28 CN CN201810403982.7A patent/CN110413563A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104866246A (en) * | 2015-06-05 | 2015-08-26 | 上海新储集成电路有限公司 | Solid state hybrid drive |
| CN105390501A (en) * | 2015-11-25 | 2016-03-09 | 上海新储集成电路有限公司 | FPGA chip and manufacturing method thereof |
| CN105760931A (en) * | 2016-03-17 | 2016-07-13 | 上海新储集成电路有限公司 | Artificial neural network chip and robot with artificial neural network chip |
| CN105789139A (en) * | 2016-03-31 | 2016-07-20 | 上海新储集成电路有限公司 | Method for preparing neural network chip |
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Application publication date: 20191105 |