CN110413400B - CPU frequency adjusting method and system - Google Patents

CPU frequency adjusting method and system Download PDF

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Publication number
CN110413400B
CN110413400B CN201810398629.4A CN201810398629A CN110413400B CN 110413400 B CN110413400 B CN 110413400B CN 201810398629 A CN201810398629 A CN 201810398629A CN 110413400 B CN110413400 B CN 110413400B
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frequency
cpu
current
highest
frame rate
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CN110413400A (en
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叶友鑫
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Allwinner Technology Co Ltd
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Allwinner Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load

Abstract

The invention discloses a CPU frequency adjusting method and a system, wherein the method comprises the following steps: s1: respectively configuring CPU frequency adjustment strategies for different system scenes; s2: judging a current system scene; s3: and adjusting the frequency of the CPU according to the CPU frequency adjustment strategy corresponding to the current system scene. Step S1 includes the following steps: and setting a highest display frame rate threshold value corresponding to the highest frequency. Step S3 includes the following steps: judging whether the display frame rate of the current CPU is greater than the threshold value of the highest display frame rate; if so, adjusting the frequency of the current CPU to be the highest frequency; if not, the current CPU frequency adjustment strategy is kept. Under the condition that the current display frame rate does not exceed the highest display frame rate threshold value, adopting a default CPU frequency adjustment strategy to adjust the CPU; and under the condition that the current display frame rate exceeds the threshold value of the highest display frame rate, the frequency of the CPU is adjusted to the maximum frequency so as to ensure the flow of the CPU processing process as much as possible and improve the user experience.

Description

CPU frequency adjusting method and system
Technical Field
The invention relates to the technical field of computers, in particular to a method and a system for adjusting CPU frequency.
Background
Most frequency adjustment strategies of the system CPU are realized according to the load and the temperature of the CPU, but for products with high requirements on experience, such as vehicles, the frequency adjustment strategies are not enough only through CPU _ LOADING _ BALANCE and temperature processing. Especially for display frame rate and interrupt request, the frequency of CPU is not reasonably adjusted; when the display frame rate and the interrupt request amount are too high, the frequency of the CPU is not effectively adjusted, which greatly affects the smoothness of the experience.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a CPU frequency adjusting method and a system, wherein the method adopts a default CPU frequency adjusting strategy to adjust a CPU under the condition that the current display frame rate does not exceed a highest display frame rate threshold value; under the state that the current display frame rate exceeds the threshold value of the highest display frame rate, the frequency of the CPU is adjusted to the maximum frequency, and the problem that the traditional CPU frequency adjustment strategy is not adopted, and the CPU processing is not performed under the high display frame state, so that the user experience is influenced is solved. In addition, the method is additionally provided with an interrupt balance processing mechanism on the basis of the traditional CPU frequency adjustment strategy, and the mechanism is compatible with the standard frequency modulation strategy and can meet the adjustment mechanism required by the designed product.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a CPU frequency adjustment method comprises the following steps:
s1: respectively configuring CPU frequency adjustment strategies for different system scenes;
s2: judging a current system scene;
s3: adjusting the frequency of the CPU according to a CPU frequency adjustment strategy corresponding to the current system scene;
wherein, the step S1 includes the following steps:
s131: setting a highest display frame rate threshold value corresponding to the highest frequency;
step S3 includes the following steps:
s331: judging whether the display frame rate of the current CPU is greater than the threshold value of the highest display frame rate; if yes, go to step S332; if not, go to step S333;
s332: adjusting the frequency of the current CPU to the highest frequency;
s333: and keeping the current CPU frequency adjustment strategy.
Further, step S1 further includes the following steps:
s100: dividing a CPU frequency range into a plurality of frequency sections;
s120: setting an interruption request quantity threshold value and a frequency adjustment value corresponding to each frequency band;
step S333 includes the following steps:
s321: judging the frequency section of the current CPU frequency;
s322: collecting the interrupt requests responded by the current CPU, and calculating the number of the interrupt requests;
s323: and comparing the calculated quantity of the interrupt requests with an interrupt request quantity threshold value corresponding to the frequency segment, and if the calculated quantity of the interrupt requests exceeds the interrupt request quantity threshold value, adjusting the CPU frequency by using a frequency adjustment value corresponding to the frequency segment.
Further, step S322 specifically includes the following steps:
creating an interrupt hub;
interrupt requests currently responded by the CPU are collected through the interrupt hub, and the number of interrupt requests collected by the interrupt hub is calculated.
Further, step S1 further includes the following steps:
setting a high-priority interrupt request set corresponding to the highest frequency, wherein a plurality of high-priority interrupt requests are listed in the high-priority interrupt request set;
step S322 further includes the following steps:
s3221: judging whether a high-priority interrupt request exists in the currently collected interrupt requests; if yes, go to step S3222; if not, executing the step S323;
s3222: and adjusting the frequency of the current CPU to be the highest frequency.
Further, step S3222 specifically includes the following steps:
s32221: judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, the running core number of the current CPU is adjusted to be the highest.
Further, step S1 further includes the following steps:
s111: setting a load threshold value and a frequency adjustment value corresponding to each frequency band;
step S333 further includes the steps of:
s312: calculating the load value of the current CPU;
s313: and comparing the calculated load value with the load threshold value corresponding to the frequency segment, and if the calculated load value exceeds the load threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
Further, step S332 specifically includes the following steps:
s3321: judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, adjusting the running core number of the current CPU to be the highest.
Further, in step S331, the step of determining whether the current display frame rate is greater than the highest display frame rate threshold specifically includes: creating a HWC counter in the CPU regulator; counting and calculating the display times of HWC refreshing per second through an HWC counter; and judging whether the current display frequency of the HWC per second is larger than the threshold value of the highest display frame rate.
A CPU frequency adjustment method comprises the following steps:
s1: respectively configuring CPU frequency adjustment strategies for different system scenes;
s2: judging a current system scene;
s3: adjusting the frequency of the CPU according to a CPU frequency adjustment strategy corresponding to the current system scene;
wherein, the step S1 includes the following steps:
s100: dividing a CPU frequency range into a plurality of frequency sections;
s141: setting a display frame rate threshold value and a frequency adjustment value corresponding to each frequency segment;
step S3 includes the following steps:
s341: judging the frequency section of the current CPU frequency;
s342: calculating the display frame rate of the current CPU;
s343: comparing the calculated display frame rate with a display frame rate threshold value corresponding to the frequency segment, and if the calculated display frame rate exceeds the display frame rate threshold value, adjusting the CPU frequency by using a frequency adjustment value corresponding to the frequency segment;
step S1 further includes the steps of:
s100: dividing a CPU frequency range into a plurality of frequency sections;
s120: setting an interruption request quantity threshold value and a frequency adjustment value corresponding to each frequency band;
step S3 further includes the steps of:
s321: judging the frequency section of the current CPU frequency;
s322: collecting the interrupt requests responded by the current CPU, and calculating the number of the interrupt requests;
s323: comparing the calculated quantity of the interrupt requests with an interrupt request quantity threshold value corresponding to the frequency segment, and if the calculated quantity of the interrupt requests exceeds the interrupt request quantity threshold value, adjusting the CPU frequency by using a frequency adjustment value corresponding to the frequency segment;
step S1 further includes the steps of:
s111: setting a load threshold value and a frequency adjustment value corresponding to each frequency band;
step S3 further includes the steps of:
s312: calculating the load value of the current CPU;
s313: and comparing the calculated load value with the load threshold value corresponding to the frequency segment, and if the calculated load value exceeds the load threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
A CPU frequency scaling system comprising a memory, a processor and a computer program stored on said memory and executable on said processor; the computer program, when executed by the processor, implements the steps of the method of any of the above.
The invention has the beneficial effects that:
(1) in the method, when the current display frame rate does not exceed the highest display frame rate threshold value, a CPU is adjusted by adopting a system default CPU frequency adjustment strategy; and under the condition that the current display frame rate exceeds the threshold value of the highest display frame rate, the frequency of the CPU is adjusted to the maximum frequency so as to ensure that the CPU processing process flows as much as possible under the high display frame state and improve the user experience.
(2) The method adds a display frame rate collection mechanism and an interrupt balance processing mechanism on the basis of the traditional CPU frequency adjustment strategy, and the mechanism is compatible with the standard frequency modulation strategy and can meet the adjustment mechanism required by the designed product.
Drawings
FIG. 1 is a flow chart of a CPU frequency adjusting method according to the present invention.
Fig. 2 is a schematic flowchart of embodiment 1 of step S3 in fig. 1.
Fig. 3 is a schematic flowchart of embodiment 2 of step S3 in fig. 1.
Fig. 4 is a schematic flowchart of embodiment 3 of step S3 in fig. 1.
Fig. 5 is a flowchart of embodiment 4 of step S3 in fig. 1.
Detailed Description
The invention is further illustrated below with reference to the figures and examples.
As shown in fig. 1, a method for adjusting a CPU frequency includes the following steps:
step S1: respectively configuring CPU frequency adjustment strategies for different system scenes;
step S2: judging a current system scene;
step S3: and adjusting the frequency of the CPU according to the CPU frequency adjustment strategy corresponding to the current system scene.
Example 1:
in the present embodiment, the CPU frequency is adjusted according to the CPU load, and the system scenario may be divided according to the power consumption. When the system scenes are divided by using power consumption, for example, the system scenes can be divided into three types, the first type is a low-power-consumption system scene, the second type is a medium-power-consumption system scene, and the third type is a high-power-consumption system scene, wherein the low power consumption, the medium power consumption and the high power consumption can be divided according to actual requirements.
A low-power-consumption system scene uses a lower CPU frequency segment, and a high-power-consumption system scene uses a higher CPU frequency segment, so that a more conservative CPU frequency modulation strategy can be configured for the low-power-consumption system scene, for example, the frequency modulation times are less, and/or the amplitude is small; configuring a relatively moderate CPU frequency modulation strategy for a system scene with medium power consumption; and configuring a more active CPU frequency modulation strategy for a system scene with high power consumption, for example, the frequency modulation times are more, and/or the amplitude is large.
The CPU can meet the performance requirement when in high frequency, so the frequency raising speed can be relatively slowed down when in high frequency, the purposes that the low frequency is raised slightly fast and the higher frequency is raised and the frequency is relatively slowed down are achieved, and the purposes that the response is fast when in low frequency and the overall power consumption is low are achieved.
The step of configuring the CPU frequency adjustment policy for one or more system scenarios in step S1 includes: step S111 sets a load threshold value and a frequency adjustment value corresponding to each frequency bin.
In this case, the CPU frequency bands are set for various system scenarios according to a default manner, for example, if the maximum CPU frequency is 1.5G, the CPU frequency is divided into different frequency bands at an interval of 500M by default: namely 0 to 500M, 500M to 1G, 1G to 1.5G. In other embodiments, frequency bands may be set for various systems, and in this case, before step S11, step S100 is further included: the CPU frequency range is divided into a plurality of frequency bins, wherein the segmentation interval, and/or the number of frequency bins for various system scenarios may not be the same.
As shown in fig. 2, when the CPU frequency modulation strategy adopted by the current system scenario is determined in step S2, step S3 includes the following steps:
step S311: judging the frequency section of the current CPU frequency;
step S312: calculating the load value of the current CPU;
step S313: and comparing the calculated load value with the load threshold value corresponding to the frequency segment, and if the calculated load value exceeds the load threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
How to adjust the frequency section of the system scene is selected according to the power consumption of the system scene, so that a conservative frequency modulation strategy is configured for the system scene with low power consumption, and a more active frequency modulation strategy is configured for the system scene with high power consumption.
Example 2:
in this embodiment, the CPU frequency is adjusted according to the number of interrupt requests, and the system scenario may be divided according to the number of interrupt requests. When the system scenes are divided by the interrupt request volumes, for example, the system scenes can be divided into three types, the first type is the high interrupt request volume system scenes, the second type is the medium interrupt request volume system scenes, and the third type is the low interrupt request volume system scenes, wherein the high, medium and low interrupt request volumes can be divided according to actual demands.
The high interrupt request amount system scene uses a higher CPU frequency segment, and the low interrupt request amount system scene uses a lower CPU frequency segment; therefore, a more active CPU frequency modulation strategy can be configured for a high-interruption request quantity system scene, a more moderate CPU frequency modulation strategy can be configured for a medium-interruption request quantity system scene, and a more conservative CPU frequency modulation strategy can be configured for a low-interruption request quantity system scene.
The step of configuring the CPU frequency adjustment policy for one or more system scenarios in step S1 includes: step S121 sets an interrupt request amount threshold value and a frequency adjustment value corresponding to each frequency segment.
In this case, the CPU frequency bands are set for various system scenarios according to a default manner, for example, if the maximum CPU frequency is 1.5G, the CPU frequency is divided into different frequency bands at an interval of 500M by default: namely 0 to 500M, 500M to 1G, 1G to 1.5G. In other embodiments, frequency bands may be set for various systems, and in this case, before step S11, step S100 is further included: the CPU frequency range is divided into a plurality of frequency bins, wherein the segmentation interval, and/or the number of frequency bins for various system scenarios may not be the same.
As shown in fig. 3, when the CPU frequency modulation policy adopted by the current system scenario is determined in step S2, step S3 includes the following steps:
step S321: judging the frequency section of the current CPU frequency;
step S322: collecting the interrupt requests responded by the current CPU, and calculating the number of the interrupt requests;
step S323: and comparing the calculated quantity of the interrupt requests with an interrupt request quantity threshold value corresponding to the frequency segment, and if the calculated quantity of the interrupt requests exceeds the interrupt request quantity threshold value, adjusting the CPU frequency by using a frequency adjustment value corresponding to the frequency segment.
Step S322 specifically includes the following steps: creating an interrupt HUB (HUB); interrupt requests currently responded by the CPU are collected through the interrupt hub, and the number of interrupt requests collected by the interrupt hub is calculated.
According to the magnitude of the interrupt request quantity of the system scene, how to adjust the frequency section is selected, so that a conservative frequency modulation strategy is configured for the system scene with small interrupt request quantity, and a more active frequency modulation strategy is configured for the system scene with high interrupt request quantity.
In another embodiment, the CPU frequency is also adjusted according to the interrupt request priority or specific and critical applications, and statistical interrupt requests can be prioritized and system scenarios can be partitioned. When the system scenes are divided by using the priority of the interrupt request, for example, the system scenes can be divided into three types, the first type is a high-priority system scene, and the second type is a low-priority system scene, wherein the high priority and the low priority can be divided according to actual requirements.
The high-priority system scene uses a higher CPU frequency segment, and the low-priority system scene uses a lower CPU frequency segment, so that a more aggressive CPU frequency modulation strategy can be configured for the high-priority system scene, for example, a touch interrupt, a GPU interrupt, a display interrupt, and the like are set as the high-priority system scene, because the system cannot closely follow more or less during such interrupt request, the system is seriously stuck, slowed, and the like, and the user experience of the system is seriously affected by the situations. A more conservative CPU frequency tuning strategy may be configured for low priority system scenarios, e.g., some interrupt requests other than high priority interrupt requests that are less demanding on user experience. In dividing the system scenarios according to the priority of the interrupt requests, the system scenarios of one or more interrupt requests may be divided into a class.
For this purpose, the step of configuring the CPU frequency adjustment policy for one or more system scenarios in step S1 further includes: step S151 sets a high-priority interrupt request set corresponding to the highest frequency, where a plurality of high-priority interrupt requests are listed in the high-priority interrupt request set.
Specifically, step S322 further includes the following steps:
step S3221: judging whether a high-priority interrupt request exists in the currently collected interrupt requests; if yes, go to step S3222; if not, executing the step S323;
step S3222: and adjusting the frequency of the current CPU to be the highest frequency.
More specifically, step S3222 specifically includes the following steps:
step S32221: judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, the running core number of the current CPU is adjusted to be the highest.
In this embodiment, if no high-priority interrupt occurs, the CPU is adjusted by using a default CPU frequency adjustment policy of the system, for example, a policy of adjusting the CPU frequency according to the CPU load or the number of interrupt requests responded, or a policy of adjusting the CPU frequency by temperature sensing; if the interrupt with high priority occurs, the frequency of the CPU is adjusted to the maximum frequency so as to ensure the flow of the CPU processing process as much as possible and improve the user experience. In addition, when the CPU runs at the maximum frequency, the running conditions of other threads are monitored; under the condition that other threads are unchanged in work, the main thread keeps the CPU frequency value of the original running thread unchanged, and the thread frequency interacting with the high-priority interrupt is set to be running at full frequency; if the other threads work, the CPU frequency value requested by each thread is monitored, and the frequency values of the corresponding requests are distributed to the other threads under the condition that the frequency distribution value of the threads interacting with the high-priority interrupt is guaranteed to be normal.
Example 3:
in this embodiment, the CPU frequency is adjusted according to the display frame rate, and the system scene may be divided according to the display frame rate. When the display frame rate is used to divide the system scenes, for example, the system scenes may be divided into two types, where the first type is a high display frame rate system scene and the second type is a low display frame rate system scene, where the high and low display frame rates may be divided according to actual requirements.
The high display frame rate system scene uses a higher CPU frequency segment, and the low display frame rate system scene uses a lower CPU frequency segment; therefore, a more aggressive CPU frequency modulation strategy can be configured for a high display frame rate system scene, and a more conservative CPU frequency modulation strategy can be configured for a low display frame rate system scene.
The step of configuring the CPU frequency adjustment policy for one or more system scenarios in step S1 includes: step S131 sets a maximum display frame rate threshold corresponding to the maximum frequency.
As shown in fig. 4, step S3 includes the steps of:
step S331: judging whether the current display frame rate is greater than the threshold value of the highest display frame rate; if yes, go to step S332; if not, go to step S333;
step S332: adjusting the frequency of the current CPU to the highest frequency;
step S333: the current CPU frequency adjustment strategy is maintained, and execution returns to step S2.
In step S331, the step of determining whether the current display frame rate is greater than the maximum display frame rate threshold specifically includes:
creating a HWC counter in a CPU regulator (governor);
counting and calculating the display times of HWC refreshing per second through an HWC counter;
and judging whether the current display frequency of the HWC per second is larger than the threshold value of the highest display frame rate.
The HWC is a synthesis arbiter of the display frame, the display layer can be distributed in a display mode according to hardware resources after passing through the synthesis arbiter, and meanwhile, the display layer is given to a hardware display card for display. Since all displays need to be passed through the HWC and then given to the display driver for display, the number of HWC refreshes is the number of frames currently displayed.
More specifically, step S332 specifically includes the following steps:
step S3321: judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, adjusting the running core number of the current CPU to be the highest.
In this embodiment, if the current display frame rate does not exceed the highest display frame rate threshold, the CPU is adjusted by using a current default CPU frequency adjustment policy of the system, for example, the policy of adjusting the CPU frequency according to the CPU load or the policy of adjusting the CPU frequency by temperature sensing in embodiment 1 is used; if the current display frame rate exceeds the threshold value of the highest display frame rate, the frequency of the CPU is adjusted to the maximum frequency so as to ensure the process of the CPU processing process as possible and improve the user experience.
Example 4:
in this embodiment, the CPU frequency is adjusted according to the display frame rate, and the system scene may be divided according to the display frame rate. When the display frame rate is used to divide the system scenes, for example, the system scenes may be divided into three types, where the first type is a high display frame rate system scene, the second type is a medium display frame rate system scene, and the third type is a low display frame rate system scene, where the high, medium, and low display frame rates may be divided according to actual requirements.
The high display frame rate system scene uses a higher CPU frequency segment, and the low display frame rate system scene uses a lower CPU frequency segment; therefore, a more active CPU frequency modulation strategy can be configured for a high display frame rate system scene, a more moderate CPU frequency modulation strategy can be configured for a medium display frame rate system scene, and a more conservative CPU frequency modulation strategy can be configured for a low display frame rate system scene.
The step of configuring the CPU frequency adjustment policy for one or more system scenarios in step S1 includes: step S141 sets a display frame rate threshold value and a frequency adjustment value corresponding to each frequency segment.
In this case, the CPU frequency bands are set for various system scenarios according to a default manner, for example, if the maximum CPU frequency is 1.5G, the CPU frequency is divided into different frequency bands at an interval of 500M by default: namely 0 to 500M, 500M to 1G, 1G to 1.5G. In other embodiments, frequency bands may be set for various systems, and in this case, before step S11, step S100 is further included: the CPU frequency range is divided into a plurality of frequency bins, wherein the segmentation interval, and/or the number of frequency bins for various system scenarios may not be the same.
As shown in fig. 5, when the CPU frequency modulation strategy adopted by the current system scenario is determined in step S2, step S3 includes the following steps:
step S341: judging the frequency section of the current CPU frequency;
step S342: calculating the display frame rate of the current CPU;
step S343: and comparing the calculated display frame rate with the display frame rate threshold value corresponding to the frequency segment, and if the calculated display frame rate exceeds the display frame rate threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
Specifically, step S342 includes the following steps:
step S3421: creating a HWC counter in a CPU regulator (governor);
step S3422: and counting and calculating the display times of the HWC refreshing per second through the HWC counter.
Specifically, step S343 includes the steps of:
judging whether the current display frequency of the HWC per second is larger than a display frame rate threshold value;
and comparing the current display times per second of the HWC with the display frame rate threshold corresponding to the frequency segment, and if the current display times per second of the HWC exceed the display frame rate threshold, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
The HWC is a synthesis arbiter of the display frame, the display layer can be distributed in a display mode according to hardware resources after passing through the synthesis arbiter, and meanwhile, the display layer is given to a hardware display card for display. Since all displays need to be passed through the HWC and then given to the display driver for display, the number of HWC refreshes is the number of frames currently displayed.
How to adjust the frequency section of the system scene is selected according to the display frame rate of the system scene, so that a conservative frequency modulation strategy is configured for the system scene with a small display frame rate, and a more active frequency modulation strategy is configured for the system scene with a high display frame rate.
Example 5:
the present embodiment provides a CPU frequency adjustment system, including: a memory, a processor and a computer program stored on the memory and executable on the processor, the computer program, when executed by the processor, implementing the steps of any of the methods described above.
What has been described above is only a preferred embodiment of the present invention, and the present invention is not limited to the above examples. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the basic concept of the present invention are to be considered as included within the scope of the present invention.

Claims (7)

1. A CPU frequency adjusting method is characterized in that:
the method comprises the following steps:
respectively configuring CPU frequency adjustment strategies for different system scenes;
judging a current system scene;
adjusting the frequency of the CPU according to a CPU frequency adjustment strategy corresponding to the current system scene;
wherein, the step of configuring the CPU frequency adjustment strategy for different system scenes respectively comprises:
setting a highest display frame rate threshold value corresponding to the highest frequency;
the step of adjusting the frequency of the CPU according to the CPU frequency adjustment strategy corresponding to the current system scene comprises the following steps:
judging whether the display frame rate of the current CPU is greater than the threshold value of the highest display frame rate; if so, adjusting the frequency of the current CPU to be the highest frequency; if not, keeping the current CPU frequency adjustment strategy;
the step of configuring the CPU frequency adjustment policy for different system scenarios respectively further includes:
dividing a CPU frequency range into a plurality of frequency sections;
setting an interruption request quantity threshold value and a frequency adjustment value corresponding to each frequency band;
the step of maintaining the current CPU frequency adjustment policy includes:
judging the frequency section of the current CPU frequency;
collecting the interrupt requests responded by the current CPU, and calculating the number of the interrupt requests;
comparing the calculated quantity of the interrupt requests with an interrupt request quantity threshold value corresponding to the frequency segment, and if the calculated quantity of the interrupt requests exceeds the interrupt request quantity threshold value, adjusting the CPU frequency by using a frequency adjustment value corresponding to the frequency segment;
the step of adjusting the frequency of the current CPU to the highest frequency comprises:
setting a high-priority interrupt request set corresponding to the highest frequency, wherein a plurality of high-priority interrupt requests are listed in the high-priority interrupt request set;
judging whether a high-priority interrupt request exists in the currently collected interrupt requests; if so, adjusting the frequency of the current CPU to be the highest frequency; if not, executing the step of comparing the calculated interrupt request quantity with the interrupt request quantity threshold value corresponding to the frequency segment, and if the calculated interrupt request quantity exceeds the interrupt request quantity threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
2. The CPU frequency adjustment method according to claim 1, wherein:
the step of collecting the interrupt requests responded by the current CPU and calculating the number of the interrupt requests comprises the following steps:
creating an interrupt hub;
interrupt requests currently responded by the CPU are collected through the interrupt hub, and the number of interrupt requests collected by the interrupt hub is calculated.
3. The CPU frequency adjustment method according to claim 1, wherein:
the step of adjusting the current CPU frequency to the highest frequency specifically includes:
judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, the running core number of the current CPU is adjusted to be the highest.
4. The CPU frequency adjustment method according to claim 1, wherein:
setting a load threshold value and a frequency adjustment value corresponding to each frequency band;
the step of maintaining the current CPU frequency adjustment policy further comprises:
calculating the load value of the current CPU;
and comparing the calculated load value with the load threshold value corresponding to the frequency segment, and if the calculated load value exceeds the load threshold value, adjusting the CPU frequency by using the frequency adjustment value corresponding to the frequency segment.
5. The CPU frequency adjustment method according to claim 1, wherein:
judging whether the running core number of the current CPU is the highest; if yes, executing the step of adjusting the frequency of the current CPU to the highest frequency; if not, adjusting the running core number of the current CPU to be the highest.
6. The CPU frequency adjustment method according to claim 1, wherein:
the step of determining whether the current display frame rate is greater than the threshold of the highest display frame rate specifically includes: creating a HWC counter in the CPU regulator; counting and calculating the display times of HWC refreshing per second through an HWC counter; and judging whether the current display frequency of the HWC per second is larger than the threshold value of the highest display frame rate.
7. A CPU frequency adjustment system, characterized by:
comprising a memory, a processor, and a computer program stored on the memory and executable on the processor; the computer program, when executed by the processor, implementing the steps of the method of any one of claims 1 to 6.
CN201810398629.4A 2018-04-28 2018-04-28 CPU frequency adjusting method and system Active CN110413400B (en)

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Application Number Priority Date Filing Date Title
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103324270A (en) * 2013-06-25 2013-09-25 东莞宇龙通信科技有限公司 Mobile terminal and method for adjusting CPU (Central Processing Unit) frequency thereof
CN106095052A (en) * 2016-05-31 2016-11-09 广东欧珀移动通信有限公司 The method and device of control CPU power consumption
CN107463481A (en) * 2017-07-26 2017-12-12 努比亚技术有限公司 Data interactive method, mobile terminal and storage medium

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* Cited by examiner, † Cited by third party
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US20040205371A1 (en) * 2003-04-09 2004-10-14 Kun-Hung Huang Configuration for adjusting CPU speed and method thereof
US10444819B2 (en) * 2015-06-19 2019-10-15 Intel Corporation Techniques to control computational resources for an electronic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103324270A (en) * 2013-06-25 2013-09-25 东莞宇龙通信科技有限公司 Mobile terminal and method for adjusting CPU (Central Processing Unit) frequency thereof
CN106095052A (en) * 2016-05-31 2016-11-09 广东欧珀移动通信有限公司 The method and device of control CPU power consumption
CN107463481A (en) * 2017-07-26 2017-12-12 努比亚技术有限公司 Data interactive method, mobile terminal and storage medium

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