CN110411483B - Novel reading circuit of large-size sensing array and sensor array thereof - Google Patents

Novel reading circuit of large-size sensing array and sensor array thereof Download PDF

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CN110411483B
CN110411483B CN201910790765.2A CN201910790765A CN110411483B CN 110411483 B CN110411483 B CN 110411483B CN 201910790765 A CN201910790765 A CN 201910790765A CN 110411483 B CN110411483 B CN 110411483B
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differential
signal
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voltage signal
integration
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CN110411483A (en
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廖聪维
赵涵若
于天宝
邓联文
罗衡
黄生祥
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Central South University
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Central South University
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/24Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45264Complementary cross coupled types
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017509Interface arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017545Coupling arrangements; Impedance matching circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557Coupling arrangements; Impedance matching circuits
    • H03K19/018571Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS

Abstract

The invention discloses a novel reading circuit of a large-size sensor array, which comprises a plurality of parallel channels, wherein each parallel channel comprises a differential detection module, a signal cross-coupling module and a differential integration module which are sequentially connected in series; the differential detection module converts the charge signal output by the large-size sensing array into a first voltage signal and uploads the first voltage signal to the signal cross-coupling module; the signal cross coupling module converts the first voltage signal into a positive phase voltage signal and a negative phase voltage signal and uploads the positive phase voltage signal and the negative phase voltage signal to the differential integration module; and the differential integration module performs differential integration on the positive phase voltage signal and the negative phase voltage signal and outputs the positive phase voltage signal and the negative phase voltage signal to a subsequent peripheral signal processing circuit of the large-size sensing array. The invention also discloses a large-size sensing array comprising the reading circuit of the novel large-size sensing array. The invention greatly improves the strength of the read signal, so that the touch signal of the large-size sensing array is easier to identify; and the circuit is simple and reliable, and the cost is low.

Description

Novel reading circuit of large-size sensing array and sensor array thereof
Technical Field
The invention particularly relates to a novel reading circuit of a large-size sensor array and the sensor array.
Background
Array sensor technology plays an important role in modern electronic products and devices. In recent years, sensors such as array electromechanical coupling, micro electromechanical coupling, photoelectric coupling, acoustic-electric coupling and the like have made great progress. In particular, touch sensors, fingerprint sensors, acceleration sensors and image sensors based on photodiodes/triodes based on thin film capacitive arrays or Micro Electro Mechanical Systems (MEMS) capacitive arrays have been used in consumer electronics products such as mobile phones, tablets and smart cameras. Due to the ever-increasing control and sensing accuracy, the requirements of the readout circuit of the sensor array are increasing. In application scenarios of 5G Internet of things and Internet of vehicles, the array sensor can be widely applied. Due to the expansion of the size of the sensing array, the coupling strength between multiple physical fields is reduced, the interference and noise are increased, and the novel sensing array reading circuit design is required. Fig. 1 illustrates a driving circuit, a readout circuit and connection relationship thereof of the array sensor. Although the specific implementation of sensors, and even the sensing mechanism, varies widely, they all generally employ an array arrangement in which the drive and readout circuitry is substantially in communication.
Take capacitive touch array technology as an example. Touch screen technology makes human-computer interaction more convenient, and is widely applied to consumer electronics, industrial control equipment and automotive electronics. At present, capacitive touch is the most popular touch screen technology. Compared with resistive touch control or infrared touch control, capacitive touch control has the advantages of multi-point touch control support, strong noise resistance, high technical maturity, low preparation cost and the like. At present, in application occasions such as automobile electronics, electronic whiteboards, electronic conference systems and the like, a large-size high-resolution touch technology is an important development direction. FIG. 2 shows the driving circuit (TX), the readout circuit (RX) and their connections (TX1 TXn, Rx 1-Rxm) of the capacitive sensor array. Driving lines (TX) and sensing lines (RX) form a coupled array structure at two metal layers and vertically crossed; both TX and RX electrode materials are typically required to be both conductive and transparent, with Indium Tin Oxide (ITO) being a common choice. A plurality of diamond-shaped electrodes are arranged on each line, and mutual capacitance is generated between every two adjacent diamond-shaped electrodes. When a finger touches the screen, the electric field distribution at each intersection (i.e., mutual capacitance) is affected; since a part of the electric flux flows into the ground through the human body, this causes the mutual capacitance to become small and the amount of charge on the sense line to become small. Therefore, the change amount of the mutual capacitance is converted into the change amount of the voltage signal and read out, and the occurrence of the touch position can be located through the coordinate axes (TX, RX).
As the size of the touch screen increases, the lengths of the TX and RX lines increase, and thus, the parasitic resistance-capacitance (RC) values of the TX and RX lines also increase. The intensity of the output signal of the touch sensing circuit is reduced due to the charge/discharge loss on the driving line TX. Due to the increase of the size of the touch screen, the number of the corresponding driving channels TX and the number of the corresponding reading channels RX also increase. In order to ensure a certain refresh frequency, the detection time of each driving channel is reduced, the integration time of the readout channel is also reduced, and the readout strength of the signal is further reduced.
The principles of the photoelectric image sensing array and the capacitive touch array are similar. Fig. 3 illustrates a driving circuit (TX), a readout circuit (RX), a pixel circuit, and connection relationships thereof (TX1 to TXn, RX1 to Rxm) of the photoelectric sensor array. The difference of the photoelectric leakage current of the photodiode/triode is used for sensing the external environment and forming an image. Similar to the capacitive touch array, when the spatial resolution of an image is improved and the array scale is larger, the readout circuit of the photoelectric image sensing array also has problems of reduced integration time, reduced signal readout strength, and the like.
Conventional sensor array readout circuit designs are mature. The whole reading system comprises a driving signal generator, a capacitance change reading circuit, an analog-to-digital conversion circuit (ADC), a data processor and the like. The drive signal is generally square wave or other waveform, the sensing signal transmitted by the reading channel is adjusted by the reading circuit through a switching MOS tube, the half-cycle signal with the same phase is extracted for integration, and the signal is read by the ADC. However, the conventional readout circuit design cannot solve the problems of large RC delay and low signal strength faced by a large-size, high-resolution, high-refresh-rate sensor array.
Disclosure of Invention
One of the objectives of the present invention is to provide a novel readout circuit for a large-sized sensor array, which is suitable for a large-sized sensor array, and has high reliability and sensitive response.
It is a further object of the present invention to provide a large size sensor array including a readout circuit for the novel large size sensor array.
The novel reading circuit of the large-size sensor array comprises a plurality of parallel channels, wherein each parallel channel comprises a differential detection module, a signal cross coupling module and a differential integration module; the differential detection module, the signal cross coupling module and the differential integration module are sequentially connected in series; the input end of the differential detection module is connected with the output end of the large-size sensing array; the differential detection module is used for converting the charge signal output by the large-size sensing array into a first voltage signal, eliminating noise and then uploading the first voltage signal to the signal cross-coupling module; the signal cross-coupling module is used for converting the uploaded first voltage signal into a positive phase voltage signal and a negative phase voltage signal and uploading the positive phase voltage signal and the negative phase voltage signal to the differential integration module; and the differential integration module is used for performing differential integration on the uploaded positive phase voltage signal and negative phase voltage signal and outputting the integrated signals to a subsequent peripheral signal processing circuit of the large-size sensing array.
The differential detection module is composed of a differential operational amplifier circuit.
The differential detection module comprises a differential detection first input capacitor, a differential detection second input capacitor, a differential detection first input resistor, a differential detection second input resistor, a differential detection first filter capacitor, a differential detection second filter capacitor and a differential detection amplifier; two paths of signals output by the large-size sensing array are input to one end of an input end of a differential detection operational amplifier through a series-connected differential detection first input capacitor, and are input to the other end of the input end of the differential detection operational amplifier through a series-connected differential detection second input capacitor; the differential detection first filter capacitor is connected in parallel at two ends of the differential detection first input resistor, and the differential detection second filter capacitor is connected in parallel at two ends of the differential detection second input resistor; the output end of the differential detection amplifier is the output end of the differential detection module.
The differential integration module is a differential integration circuit formed by an operational amplifier.
The differential integration module comprises a differential integration first resistor, a differential integration second resistor, a differential integration first capacitor, a differential integration second capacitor and a differential integration operational amplifier; the input cathode of the differential integration operational amplifier is connected with a differential integration first input resistor in series; the input anode of the differential integration operational amplifier is connected with a differential integration second input resistor in series; a differential integration first capacitor is connected in series between the input negative electrode of the differential integration operational amplifier and the output end of the differential integration operational amplifier; a differential integration second capacitor is connected between the input anode of the differential integration operational amplifier and the ground in series; the negative phase voltage signal output by the signal cross coupling module is connected with the differential integration first resistor, and the positive phase voltage signal output by the signal cross coupling module is connected with the differential integration second resistor.
The signal cross coupling module comprises a signal cross first rectifying circuit, a signal cross second rectifying circuit and a signal cross reverse circuit; the first voltage signal output by the differential detection module is converted into a negative phase voltage signal after being rectified by a signal crossing first rectifying circuit and is output to the differential integration module; the first voltage signal output by the differential detection module is also reversed through the signal crossing reverse circuit, then is converted into a positive phase voltage signal after being rectified through the signal crossing second rectifying circuit, and is output to the differential integration circuit.
The signal crossing first rectifying circuit is a passive rectifying circuit formed by diodes.
The signal cross second rectifying circuit is a passive rectifying circuit formed by diodes.
The signal cross first rectification circuit is an active rectification circuit formed by a switch tube.
The signal cross second rectifying circuit is an active rectifying circuit formed by a switching tube.
The invention also discloses a large-size sensing array which comprises the novel reading circuit of the large-size sensing array.
According to the novel reading circuit of the large-size sensor array and the large-size sensor array, signals output by the large-size sensor array are subjected to cross coupling and differential output in the modes of differential detection, signal cross coupling and differential integration, so that the strength of the read signals is greatly improved, and the touch signals of the large-size sensor array are easier to identify; the circuit of the invention is simple and reliable, and the cost is low.
Drawings
FIG. 1 is a schematic diagram of a sensor array driving circuit, a readout circuit, and their connections.
Fig. 2 is a schematic diagram of the driving circuit (TX), the readout circuit (RX) and their connections (TX1 to TXn, RX1 to Rxm) of the capacitive sensor array.
Fig. 3 is a schematic diagram of a driving circuit (TX), a readout circuit (RX), a pixel circuit and their connections (TX1 to TXn, RX1 to Rxm) of the photo sensor array.
FIG. 4 is a schematic diagram showing the structure of two column readout circuits (RX [ n ] and RX [ n +1]) in close proximity to a conventional sensor array.
Fig. 5 is a schematic diagram showing a configuration of a column readout circuit of a neighborhood of a sensor array of the related art sampling technique.
Fig. 6 is a schematic diagram showing a configuration of a column readout circuit of a neighborhood of a sensor array of the related art sampling technique.
Fig. 7 is a schematic diagram of a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 8 is a schematic diagram of a coupling element implemented based on a capacitor in a column readout circuit of a sensor array for correlated sampling quadruple rate integration according to the present application.
Fig. 9 is a schematic diagram of a coupling link implemented based on a dual CMOS cross-coupled switch in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 10 is a schematic diagram of a first embodiment of cross-coupling elements in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 11 is a timing diagram of a first embodiment of a cross-coupling element in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 12 is a schematic diagram of a second embodiment of cross-coupling elements in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 13 is a timing diagram of a second embodiment of a cross-coupling element in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 14 is a schematic diagram of a third embodiment of a column readout circuit of a correlated sampling quadruple rate integrating sensor array of the present application.
FIG. 15 is a timing diagram illustrating a third embodiment of a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application.
Fig. 16 is a diagram showing simulation results of the readout circuit of the present application.
Fig. 17 is a schematic diagram showing an experimental result of the readout circuit of the present application.
Detailed Description
FIG. 4 is a schematic diagram of two column readout circuits (RX [ n ] and RX [ n +1]) adjacent to a conventional sensor array, wherein a single column readout circuit comprises an amplifying circuit (k times), an integrating circuit, and an ADC circuit; the drive circuit output signal (TX) is attenuated due to the parasitic resistance-capacitance (RC) on the wire; the intra-array noise causes perturbations to the signals of RX [ n ] and RX [ n +1 ]. The readout circuit of each column includes an amplifier circuit, an integrator circuit, an ADC circuit, and the like. The amplifying circuit may amplify the column readout signal by k times; the integrating circuit is used for inhibiting the noise quantity and enhancing the effective signal through the superposition of the signals in the time domain; the ADC circuit is used for digitizing the output analog quantity so as to be beneficial to further processing of subsequent circuits and systems. The read-out circuit of a classical sensor array of the kind illustrated in fig. 4 is widely used in cases where the array is small in size, low in resolution and low in refresh rate. However, as the size of the sensing array increases, the parasitic resistance-capacitance (RC) effect on the driver circuit output signal (TX) line will increase significantly. As shown in fig. 4, when the value of RC increases, the signal on the driving line TX is attenuated, and the driving waveform is severely distorted. For large scale sensing arrays, such as large-scale capacitive touch screens, this tends to result in large differences in sensor output at different locations (near and far ends in the driving line TX direction; near and far ends in the sense line RX direction). In particular, the amount of noise caused by the leakage current of the optical devices in the pixels increases significantly with the increase of the pixel cells on the RX [ n ] and RX [ n +1] lines in a large-sized sensing array, such as a large-sized photo-sensing array, and these noise currents may be comparable to the photocurrent. In summary, improving the sensing signal strength, reducing the readout signal non-uniformity, and reducing the readout channel noise signal are key issues for high performance sensing array design.
Fig. 5 illustrates a neighboring column readout circuit of a sensor array of a related sampling technique, in which two neighboring columns of readout pixels share an amplification circuit (k times), an integration circuit, and an ADC circuit. The starting point here is that the adjacent two columns of read-out channels of the sensor array sense equal noise signals, which assumption holds substantially for noise and interference signals caused by sensor array fabrication, driving methods, etc. The two adjacent columns of readout pixels share the amplifying circuit (k times), the integrating circuit and the ADC circuit, and the difference between the physical quantities of the sensing array is detected by subtracting the signals of the two adjacent columns of sensor signals, for example, the difference between the capacitances of two adjacent columns of pixel parts in the same row in a capacitive touch array. The sensing array reading structure can better solve the problem of reading noise quantity, but has no effect on the problem of reading signal uniformity caused by RC delay and the problem of weak reading signal strength.
FIG. 6 illustrates the architecture of a column readout circuit that is a close neighbor of a prior art correlated sampling technique sensor array, reducing the effect of RC delay by adding coupling links; the integrated strength is increased by an inverter feedback loop. The structure adds a coupling link between the sensing array and the readout circuit, and adds an inverter feedback loop at the front end of the integrator. By the coupling link and the synergistic effect of the CK and XCK two non-overlapping clock signals, the signal integration is respectively completed corresponding to the sensor output sampled by the rising edge and the falling edge of the TX signal. The sensing array reading structure plays a certain role in suppressing the amount of reading noise and improving the strength of a reading signal, but a new circuit design is needed for solving the problems of uniformity of the reading signal caused by RC delay and how to further improve the strength of the reading signal.
Fig. 7 illustrates a structure of a column readout circuit of a sensor array for correlated sampling quadruple rate integration according to the present application, where a new cross-coupling element respectively responds to a rising edge and a falling edge of a TX signal, so that the rising edge and the falling edge of the TX signal respectively realize 2-fold rate integration, and the quadruple rate integration output of the sensor array signal is realized in total. The structure is provided with a cross coupling link, through the time sequence matching of the coupling link and the cross coupling link, the 2-time integral is realized corresponding to the output of the sensor sampled by the rising edge of the TX signal, and the 2-time integral is also realized corresponding to the output of the sensor sampled by the falling edge of the TX signal, so that the quadruple-time integral output of the sensor array signal is realized totally.
Fig. 8 is a diagram illustrating an embodiment of a coupling element implemented based on capacitance in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present disclosure. The capacitive coupling has the advantages of simple structure, high capacitive coupling speed and capability of suppressing the problem of non-uniform read signals caused by RC delay to a certain extent. Capacitive coupling may be disadvantageous in that the overall reduction in signal amplitude; but the uniformity across the sensing array is higher for an overall reduction in signal amplitude.
Fig. 9 is a diagram illustrating an embodiment of a coupling element implemented based on a dual CMOS cross-coupled switch in a column readout circuit of a correlated sampling quadruple rate integration sensor array according to the present application. The CMOS cross-coupled switch can be matched with a TX signal, and the output value of the sensing array reading circuit is improved by turning the polarity of an input signal of the sensing array reading circuit.
Hereinafter, a specific implementation method of other links of the readout circuit will be specifically explained by taking a large-size capacitive touch array as an example.
FIG. 10 illustrates a first embodiment of a column readout circuit of a correlated sampling quadruple rate integrating sensor array of the present application. The novel reading circuit of the large-size sensor array comprises a plurality of parallel channels, wherein each parallel channel comprises a differential detection module, a signal cross coupling module and a differential integration module; the differential detection module, the signal cross coupling module and the differential integration module are sequentially connected in series; the input end of the differential detection module is connected with the output end of the large-size sensing array; the differential detection module is used for converting the charge signal output by the large-size sensing array into a first voltage signal, eliminating noise and then uploading the first voltage signal to the signal cross-coupling module; the signal cross-coupling module is used for converting the uploaded first voltage signal into a positive phase voltage signal and a negative phase voltage signal and uploading the positive phase voltage signal and the negative phase voltage signal to the differential integration module; and the differential integration module is used for performing differential integration on the uploaded positive phase voltage signal and negative phase voltage signal and outputting the integrated signals to a subsequent peripheral signal processing circuit of the large-size sensing array.
In specific implementation, the differential detection module may be composed of a differential operational amplifier circuit; the differential integration module is a differential integration circuit composed of an operational amplifier.
Fig. 10 is a schematic circuit diagram of a first embodiment of the readout circuit, which is based on clocked MOS switches: in this embodiment, the circuit in the figure includes four parts, namely, a leftmost touch screen equivalent circuit, a differential detection module circuit, a signal cross-coupling module circuit and a differential integration module circuit.
The touch screen equivalent circuit is used for simulating signals output by two reading channels after touch action exists on a screen, namely Vin1 and Vin 2.
The differential detection module comprises a differential detection first input capacitor C1, a differential detection second input capacitor C2, a differential detection first input resistor R1, a differential detection second input resistor R2, a differential detection first filter capacitor C3, a differential detection second filter capacitor C4 and a differential detection amplifier OP 1; two paths of signals output by the large-size sensing array, wherein one path (Vin1) is input to one end of an input end of a differential detection operational amplifier through a series-connected differential detection first input capacitor, the other path (Vin2) is input to the other end of the input end of the differential detection operational amplifier through a series-connected differential detection second input capacitor, a differential detection first input resistor is connected between one end of the input end of the differential detection amplifier and an output end of the differential detection amplifier, and a differential detection second input resistor is connected between the other end of the input end of the differential detection amplifier and the ground; the differential detection first filter capacitor is connected in parallel at two ends of the differential detection first input resistor, and the differential detection second filter capacitor is connected in parallel at two ends of the differential detection second input resistor; the output end of the differential detection amplifier is the output end of the differential detection module.
The differential integration module comprises a differential integration first resistor R5, a differential integration second resistor R6, a differential integration first capacitor C5, a differential integration second capacitor C6 and a differential integration operational amplifier OP 3; the input cathode of the differential integration operational amplifier is connected with a differential integration first input resistor in series; the input anode of the differential integration operational amplifier is connected with a differential integration second input resistor in series; a differential integration first capacitor is connected in series between the input negative electrode of the differential integration operational amplifier and the output end of the differential integration operational amplifier; a differential integration second capacitor is connected between the input anode of the differential integration operational amplifier and the ground in series; the negative phase voltage signal output by the signal cross coupling module is connected with the differential integration first resistor, and the positive phase voltage signal output by the signal cross coupling module is connected with the differential integration second resistor.
The signal cross-coupling module comprises a signal cross first rectifying circuit (comprising switch tubes T1 and T2 in the figure), a signal cross second rectifying circuit (comprising switch tubes T3 and T4 in the figure) and a signal cross reverse circuit (comprising an operational amplifier OP2 and resistors R3 and R4 in the figure); differential detectionA first voltage signal output by the module is converted into a negative phase voltage signal (a voltage signal at a point D in the figure) after being rectified by a signal crossing first rectifying circuit, and is output to a differential integration module; the first voltage signal output by the differential detection module is also inverted (amplified or reduced while inverted, specifically, the resistance values of R3 and R4 can be adjusted) by the signal cross inverting circuit, then rectified by the signal cross second rectifying circuit, converted into a positive phase voltage signal (voltage signal at point C in the figure), and output to the differential integrating circuit; in the figure
Figure BDA0002179476210000111
And
Figure BDA0002179476210000112
is the driving signal of the switching tube.
In this embodiment, the signal crossing first rectifying circuit and the signal crossing second rectifying circuit each employ an active rectifying circuit composed of a transistor.
Fig. 11 is a schematic diagram of the circuit timing principle of the first embodiment of the readout circuit of the present invention: when a touch action occurs on the sensing panel, the mutual capacitances cm1 and cm2 are not equal, the amplitudes of the two detection signals Vin1 and Vin2 are not equal, the two detection signals are subtracted by the operational amplifier OP1 and then amplified, and a touch signal is obtained at the node a (as shown in a in fig. 10). The touch signal is divided into two paths, and the other path passes through an inverting amplifying circuit composed of an operational amplifier OP2, and then an inverting signal is obtained at a node B, and the resistor R3 and the resistor R4 are set to be equal in size, so that the amplitudes of the inverting signals are also equal (as shown in B in FIG. 11). In a period when
Figure BDA0002179476210000114
At the high level of the voltage, the voltage is high,
Figure BDA0002179476210000113
when the voltage level is low, the positive spike signal of the node A is input to the node D through the switch tube T2, and the negative spike signal of the node B is input to the node C through the switch tube T3; when in use
Figure BDA0002179476210000115
At the low level of the voltage, the voltage is low,
Figure BDA0002179476210000116
when the voltage level is high, the negative spike at node a is input to node C through the switch tube T1, and the positive spike at node B is input to node D through the switch tube T4. Therefore, during a cycle, node C has two negative spikes input to the integrator, and node D has two positive spikes input to the integrator. After the touch signals are processed by the signal cross-coupling module, the number of the positive spike signals and the negative spike signals is increased to two times of the original number in the same time, and after differential integration, the integrated output value is increased to 4 times of the original value. In the same time, the scheme of increasing the integral signal quantity to increase the integral output value effectively solves the problem that the electric charge quantity of the large-size sensing array is reduced after the RC delay is increased, has higher sensitivity and is suitable for the large-size sensing array.
Fig. 12 is a schematic circuit diagram of a second embodiment of the readout circuit of the present invention, which is based on multi-diode control: the figure also includes a touch screen equivalent circuit, a differential detection module circuit, a signal cross-coupling module circuit and a differential integration module circuit which are the leftmost side. Also, the touch panel equivalent circuit, the differential detection block circuit, and the differential integration block circuit are the same as those in fig. 10.
The signal cross-coupling module comprises a signal cross first rectifying circuit (comprising diodes D1 and D2 in the figure), a signal cross second rectifying circuit (comprising diodes D3 and D4 in the figure) and a signal cross reverse circuit (comprising an operational amplifier OP2 and resistors R3 and R4 in the figure); the first voltage signal output by the differential detection module is rectified by a signal crossing first rectifying circuit and then converted into a negative phase voltage signal (voltage signal at a point D in the figure), and the negative phase voltage signal is output to the differential integration module; the first voltage signal output by the differential detection module is also inverted (amplified or reduced while inverted, specifically, the resistance values of R3 and R4 can be adjusted) through the signal cross inverting circuit, and then rectified by the signal cross second rectifying circuit and converted into the first voltage signalA positive phase voltage signal (voltage signal at point C in the figure) and output to the differential integration circuit; in the figure
Figure BDA0002179476210000122
And
Figure BDA0002179476210000121
is the driving signal of the switching tube.
In this embodiment, the signal crossing first rectifying circuit and the signal crossing second rectifying circuit both employ passive rectifying circuits formed by diodes.
Fig. 13 is a schematic diagram of the circuit timing principle of the second embodiment of the readout circuit of the present invention: when a trigger event occurs on the sensor array, the mutual capacitances cm1 and cm2 are not equal, the amplitudes of the two detection signals Vin1 and Vin2 are not equal, the two detection signals are subtracted by the operational amplifier OP1 and then amplified, and a touch signal is obtained at the node a (as shown in a in fig. 12). The touch signal is divided into two paths, and after the other path passes through an inverting amplification circuit composed of an operational amplifier OP2, an inverting signal is obtained at a node B, and the resistor R3 and the resistor R4 are set to be equal in size, so that the amplitudes of the inverting signals are also equal (as shown in B in FIG. 12). In one period, a positive spike of the node A is input to the node C through the diode D1, and a negative spike of the node B is input to the node D through the diode D4; the negative spike at node a is input to node D through diode D2, and the positive spike at node B is input to node C through diode D3. Therefore, during a cycle, node C has two negative spikes input to the integrator, and node D has two positive spikes input to the integrator. After the touch signals are processed by the signal cross-coupling module, the number of the positive spike signals and the negative spike signals is increased to two times of the original number in the same time, and after differential integration, the integrated output value is increased to 4 times of the original value. In the same time, the scheme of increasing the integral signal quantity to increase the integral output value effectively solves the problem that the electric charge quantity of the large-size sensing array is reduced after the RC delay is increased, has higher sensitivity and is suitable for the large-size high-resolution sensing array.
Fig. 14 is a schematic circuit diagram of a third embodiment of the readout circuit of the present invention: unlike the first embodiment of fig. 10, the driving signal (driving signal of the sensor array) of the embodiment in this figure is a sine wave.
Fig. 15 is a schematic diagram of the circuit timing principle of the third embodiment of the readout circuit of the present invention: when the sensing array has a triggering action, the mutual capacitances cm1 and cm2 are not equal, the amplitudes of the two detection signals Vin1 and Vin2 are not equal, the two detection signals are subtracted by the operational amplifier OP1 and then amplified, and a touch signal is obtained at the node a (as shown in a in fig. 14). The touch signal is divided into two paths, and the other path passes through an inverting amplifying circuit composed of an operational amplifier OP2, and then an inverting signal is obtained at a node B, and the resistor R3 and the resistor R4 are set to be equal in size, so that the amplitudes of the inverting signals are also equal (as shown in B in FIG. 14). In a period when
Figure BDA0002179476210000132
At the high level of the voltage, the voltage is high,
Figure BDA0002179476210000131
when the voltage level is low, the positive spike signal of the node A is input to the node D through the switch tube T2, and the negative spike signal of the node B is input to the node C through the switch tube T3; when in use
Figure BDA0002179476210000133
At the low level of the voltage, the voltage is low,
Figure BDA0002179476210000134
when the voltage level is high, the negative spike at node a is input to node C through the switch tube T1, and the positive spike at node B is input to node D through the switch tube T4. Therefore, during a cycle, node C has two negative spikes input to the integrator, and node D has two positive spikes input to the integrator. After the touch signals are processed by the signal cross-coupling module, the number of the positive spike signals and the negative spike signals is increased to two times of the original number in the same time, and after differential integration, the integrated output value is increased to 4 times of the original value.
The third embodiment of the invention has the following advantages:
1) through the cross coupling module, the integral output value of the reading circuit in the same time is effectively increased, so that the sensitivity of the large-size sensing array is higher, and the output intensity is higher.
2) By a sinusoidal signal driving method and the cooperation of the cross-coupling module, the problem of uneven read signal strength caused by RC delay on a large-size sensing array is suppressed. The effect of the RC delay on the TX and RX lines can be equivalently low-pass filtering. Because the TX square wave signal contains abundant spectrum information, it is easy to cause the difference of the sensing signals in different corners of the sensing array. In the sinusoidal signal driving method, the frequency spectrum received by the RX can be made pure, which is beneficial to reducing the non-uniformity of the sensing array.
3) In the conventional sensing array readout structure, as illustrated in FIG. 6, due to the sinusoidal signal and the non-overlapping sampling clock
Figure BDA0002179476210000142
And
Figure BDA0002179476210000141
the waveform distortion of the read signal is easily introduced. The cross-coupling module of the present embodiment, either for
Figure BDA0002179476210000143
Is the sampling phase of
Figure BDA0002179476210000144
The input signal and its inverted signal are synchronously input to the positive and negative input terminals of the integrator. The problem of distortion of the readout signal of the sensor array can then be overcome by the cancellation effect of the positive and negative inputs of the integrator, which is advantageous for reducing the non-uniformity of the sensor array.
FIG. 16 is a diagram showing simulation results of the readout circuit of the present invention: it can be seen that in the same time, the circuit provided by the invention integrates 2 times more than the traditional circuit, and the integral value is improved by 4 times, so that the problem of reduced electric charge amount of the large-size sensing array after RC delay is increased is effectively solved, the sensitivity is higher, and the circuit is suitable for the large-size high-resolution sensing array.
FIG. 17 shows a diagram of experimental results of the readout circuit of the present invention: it can be seen that the circuit provided by the invention has an integrated output in each half period, and the integrated output is integrated for 2 times more than that of the traditional circuit, which is consistent with the simulation result. The circuit effectively solves the problem that the electric charge quantity of the large-size sensing array is reduced after RC delay is increased, has high sensitivity and is suitable for the large-size high-resolution sensing array.

Claims (7)

1. A novel reading circuit of a large-size sensor array is characterized by comprising a plurality of parallel channels, wherein each parallel channel comprises a differential detection module, a signal cross coupling module and a differential integration module; the differential detection module, the signal cross coupling module and the differential integration module are sequentially connected in series; the input end of the differential detection module is connected with the output end of the large-size sensing array; the differential detection module is used for converting the charge signal output by the large-size sensing array into a first voltage signal, eliminating noise and then uploading the first voltage signal to the signal cross-coupling module; the signal cross-coupling module is used for converting the uploaded first voltage signal into a positive phase voltage signal and a negative phase voltage signal and uploading the positive phase voltage signal and the negative phase voltage signal to the differential integration module; the differential integration module is used for performing differential integration on the uploaded positive phase voltage signal and negative phase voltage signal and outputting the integrated positive phase voltage signal and negative phase voltage signal to a subsequent peripheral signal processing circuit of the large-size sensing array; the differential detection module is composed of a differential operational amplification circuit; the signal cross coupling module comprises a signal cross first rectifying circuit, a signal cross second rectifying circuit and a signal cross reverse circuit; the first voltage signal output by the differential detection module is converted into a negative phase voltage signal after being rectified by a signal crossing first rectifying circuit and is output to the differential integration module; the first voltage signal output by the differential detection module is also reversed through the signal crossing reverse circuit, then is converted into a positive phase voltage signal after being rectified through the signal crossing second rectifying circuit, and is output to the differential integration circuit.
2. The readout circuit of the novel large-sized sensor array according to claim 1, wherein the differential detection module comprises a differential detection first input capacitor, a differential detection second input capacitor, a differential detection first input resistor, a differential detection second input resistor, a differential detection first filter capacitor, a differential detection second filter capacitor and a differential detection amplifier; two paths of signals output by the large-size sensing array are input to one end of an input end of a differential detection operational amplifier through a series-connected differential detection first input capacitor, and are input to the other end of the input end of the differential detection operational amplifier through a series-connected differential detection second input capacitor; the differential detection first filter capacitor is connected in parallel at two ends of the differential detection first input resistor, and the differential detection second filter capacitor is connected in parallel at two ends of the differential detection second input resistor; the output end of the differential detection amplifier is the output end of the differential detection module.
3. The readout circuit of claim 1, wherein the differential integration module is a differential integration circuit comprising an operational amplifier.
4. The readout circuit of the novel large-size sensor array according to claim 3, wherein the differential integration module comprises a differential integration first resistor, a differential integration second resistor, a differential integration first capacitor, a differential integration second capacitor and a differential integration operational amplifier; the input cathode of the differential integration operational amplifier is connected with a differential integration first input resistor in series; the input anode of the differential integration operational amplifier is connected with a differential integration second input resistor in series; a differential integration first capacitor is connected in series between the input negative electrode of the differential integration operational amplifier and the output end of the differential integration operational amplifier; a differential integration second capacitor is connected between the input anode of the differential integration operational amplifier and the ground in series; the negative phase voltage signal output by the signal cross coupling module is connected with the differential integration first resistor, and the positive phase voltage signal output by the signal cross coupling module is connected with the differential integration second resistor.
5. The sensing circuit of a new large sensor array according to claim 1, wherein said signal crossing first rectifying circuit is a passive rectifying circuit comprising diodes; the signal cross second rectifying circuit is a passive rectifying circuit formed by diodes.
6. The sensing circuit of a novel large-size sensing array according to claim 1, wherein the signal crossing first rectifying circuit is an active rectifying circuit formed by a switching tube; the signal cross second rectifying circuit is an active rectifying circuit formed by a switching tube.
7. A large-size sensor array, comprising a readout circuit of the novel large-size sensor array as claimed in any one of claims 1 to 6.
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