CN110401510B - Demodulator suitable for carrier rate and modulation coding mode variable frame by frame - Google Patents
Demodulator suitable for carrier rate and modulation coding mode variable frame by frame Download PDFInfo
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- CN110401510B CN110401510B CN201910663777.9A CN201910663777A CN110401510B CN 110401510 B CN110401510 B CN 110401510B CN 201910663777 A CN201910663777 A CN 201910663777A CN 110401510 B CN110401510 B CN 110401510B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
- H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
Abstract
The invention relates to a demodulator suitable for carrier rate and modulation coding mode frame by frame variable, which comprises an AD sampling module, a CIC module, a matched filtering module, a frame header searching module, a data conversion module, a data combining module, a timing recovery module, a carrier recovery module, a de-spreading module, a de-mapping module, a decoding module and a signaling analysis module. The invention firstly carries out AD sampling on baseband signals by adopting integral multiple clocks of symbol species, then carries out clock matching by CIC extraction of different multiples, and carries out matched filtering and frame header searching respectively. After the 24Msps frame header is searched, the 24Msps data is converted into a 48Msps data mode, timing recovery, carrier recovery, despreading, demapping and decoding are carried out together with 48Msps in a burst mode, and adaptive demodulation of different data modes by a demodulator can be realized through signaling analysis. The invention has the characteristics of processing flexibility, strong applicability and wide applicable station types, and is suitable for communication among large communication traffic, various service types and different station types in the field of satellite communication.
Description
Technical Field
The invention relates to the field of demodulator design, in particular to a demodulator which is suitable for variable carrier rate and modulation coding mode frame by frame, is particularly suitable for a transmission system with large transmission information amount, multiple platforms and multiple service data types in a satellite communication system, and improves the utilization rate and transmission efficiency of channel transmission.
Background
In order to ensure the reliability of information transmission, the satellite communication system is designed according to poor channel conditions and adopts a fixed signal transmission mode when link budget is made. As the demand for services increases, in order to maximize the use of channel capacity, transmit multiple types of fused information data at high speed on limited spectrum resources, and improve the spectrum utilization of the system in a fading channel, it is necessary to make the transmission rate vary with the change of channel capacity. The requirements for the transmitted signal format are: transmitting according to a frame structure; the frame structure is flexible and variable, and the carrier rate, modulation and coding modes are variable frame by frame. The demodulator needs to perform adaptive demodulation for this frame structure to ensure correct reception of all traffic data.
Disclosure of Invention
The technical problem to be solved by the invention is to design a demodulator which is applicable to carrier wave rate and modulation coding mode and can change frame by frame, and the demodulator can demodulate service data of different carrier wave rates and different modulation coding modes frame by frame.
The technical scheme adopted by the invention is as follows:
a demodulator adapted to provide frame-by-frame variation of carrier rate and modulation coding scheme, comprising: the device comprises an AD sampling module, a first CIC module, a second CIC module, a first matched filtering module, a second matched filtering module, a 24M frame header searching processing module, a 48M frame header searching processing module, a data conversion module, a data combining module, a timing recovery module, a carrier recovery module, a de-spreading module, a de-mapping module, a decoding module and a signaling analysis module;
the AD sampling module performs high-power sampling on a received baseband signal in a mode of 8-path signal parallel processing, and the sampled signals are respectively output to the first CIC module and the second CIC module;
the first CIC module extracts the received signals into 8 paths of parallel signals with a sampling clock of 24MHz, and outputs the signals to the first matched filtering module;
the second CIC module extracts the received signals into 8 paths of parallel signals with a sampling clock of 48MHz, and outputs the signals to the second matched filtering module;
the first matched filtering module carries out filtering processing on 8 paths of parallel signals with a sampling clock of 24MHz and outputs the signals to the 24Msps frame header searching processing module;
the second matched filtering module carries out filtering processing on 8 paths of parallel signals with a sampling clock of 48MHz and outputs the signals to the 48Msps frame header searching processing module;
the 24Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of the 24MHz 8-channel parallel signal frame header by utilizing the relevant characteristics of a PN sequence according to the 1024 prior symbol information of the 24Msps frame header with the carrier rate, searching the 24Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data conversion module;
the 48Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of an 8-channel parallel signal frame header of 48MHz by utilizing the relevant characteristics of a PN sequence according to 1024 prior symbol information of a 48Msps frame header with a carrier rate, searching the 48Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data combining module;
the data transformation module converts the 24Msps continuous data into 48Msps burst data and outputs the burst data to the data combining module;
the data combining module is used for combining the data converted by the 24Msps and the 48Msps data and outputting the combined data to the timing recovery module;
the timing recovery module carries out clock recovery on the received data, estimates the square timing error of 4096 data, interpolates an optimal sampling point, and outputs the optimal sampling point data to the carrier recovery module;
the carrier recovery module estimates phases at the optimal sampling point data frame part by using 128 pilot frequency parts at two ends of data in a frame, completes real-time carrier phase compensation of the data frame between two pilot frequencies, and sends data after carrier recovery to the de-spreading module;
the de-spreading module performs de-spreading processing on the spread spectrum data contained in the frame of the data after carrier recovery, and outputs the data after de-spreading processing to the de-mapping module;
the de-mapping module performs soft de-mapping on code blocks of different modulation modes in de-spread data frame by frame, and outputs the data after soft de-mapping to the decoding module;
the decoding module decodes the data after soft demapping frame by frame and outputs the data;
the signaling analysis module analyzes the signaling information obtained after decoding, stores each frame of signaling into ram one by one, and sets parameters of the de-spreading module, the de-mapping module and the decoding module so as to adapt to data demodulation of different spreading ratios and different modulation and coding modes.
Compared with the background technology, the invention has the following advantages:
(1) the demodulated information rate is 3Mbps-155Mbps, the application range is wide, and the communication capacity is large;
(2) the demodulation of the combined data frame structure supporting the multi-carrier rate and various modulation and coding modes is suitable for different application scenes and channel conditions, and the availability and the transmission efficiency of a transmission link are improved.
Drawings
Fig. 1 is a schematic diagram of a frame structure of a service data frame format designed by the present invention.
Fig. 2 is a schematic diagram of the demodulator design of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
The service data frame structure with reference to fig. 1 includes a frame header, signaling, protection, and various carrier data. The frame header and the signaling are subjected to 8 times of spread spectrum, so that the demodulator can normally receive the signals when the channel condition is poor. The signaling is used to indicate the signal format and intra-frame location of each carrier. The carrier rate includes both 24Msps and 48 Msps. The pilot signal of 128 symbols is inserted every 8064 symbols in the whole frame.
Referring to fig. 2, the present invention provides a demodulator with variable carrier rate and modulation and coding scheme from frame to frame, comprising: the device comprises an AD sampling module 1, a first CIC module 2, a second CIC module 3, a first matched filtering module 4, a second matched filtering module 5, a 24Msps frame header searching processing module 6, a 48Msps frame header searching processing module 7, a data transformation module 8, a data combining module 9, a timing recovery module 10, a carrier recovery module 11, a despreading module 12, a demapping module 13, a decoding module 14 and a signaling analysis module 15;
the AD sampling module 1 samples the received baseband signals, a sampling clock is 1152MHz, 8 paths of parallel processing are adopted in the FPGA, and each path of clock is 144 MHz. The sampled signals respectively pass through the first CIC module 2 and the second CIC module 3 to extract clocks with different multiples and different carrier wave rates for clock matching, respectively pass through the first matched filtering module 4 and the second matched filtering module 5, and respectively pass through the search 24Msps frame header processing module 6 and the search 48Msps frame header processing module 7. After the 24Msps frame header is searched, the 24Msps data is changed into a 48Msps data mode in a burst mode through a data transformation module 8. And then the data and 48Msps carrier data are processed by a data combining module 9, and subsequent demodulation processing is carried out according to the 48Msps data. After passing through the timing recovery module 10, the carrier recovery module 11, the despreading module 12, the demapping module 13 and the decoding module 14, and finally the signaling analysis module 15.
The specific treatment process is as follows:
the AD sampling module 1 is used for sampling the received baseband signals in a mode of parallel processing of 8 paths of signals, and the sampled signals are respectively output to the first CIC module and the second CIC module;
the first CIC module 2 extracts the received signals into 8 paths of parallel signals with a sampling clock of 24MHz, and outputs the signals to the first matched filtering module;
the second CIC module 3 extracts the received signals into 8 paths of parallel signals with a sampling clock of 48MHz, and outputs the signals to the second matched filtering module;
the first matched filtering module 4 carries out filtering processing on 8 paths of parallel signals with a sampling clock of 24MHz and outputs the signals to a 24Msps frame header searching processing module;
the second matched filtering module 5 carries out filtering processing on 8 paths of parallel signals with a sampling clock of 48MHz and outputs the signals to the 48Msps frame header searching processing module;
the 24Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of the 24MHz 8-channel parallel signal frame header by utilizing the relevant characteristics of a PN sequence according to the 1024 prior symbol information of the 24Msps frame header with the carrier rate, searching the 24Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data conversion module;
the 48Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of an 8-channel parallel signal frame header of 48MHz by utilizing the relevant characteristics of a PN sequence according to 1024 prior symbol information of a 48Msps frame header with a carrier rate, searching the 48Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data combining module;
the data transformation module 8 converts the 24Msps continuous data into 48Msps burst data and outputs the burst data to the data combining module;
the data combining module 9 is used for combining the data converted by the 24Msps and the 48Msps data and outputting the combined data to the timing recovery module;
the timing recovery module 10 performs clock recovery on the received data, estimates the square timing error of 4096 data, interpolates the optimal sampling point, and outputs the optimal sampling point data to the carrier recovery module;
the carrier recovery module 11 estimates the phase at the data frame part of the optimal sampling point by using the 128 pilot frequency parts at the two ends of the data in the frame, completes the real-time carrier phase compensation of the data frame between the two pilot frequencies, and sends the data after carrier recovery to the de-spreading module;
the despreading module 12 despreads spread data contained in a frame and outputs the despread data to the demapping module;
the demapping module 13 is used for performing soft demapping on code blocks of different modulation modes in despread data frame by frame, and outputting the data subjected to soft demapping to the output shaft decoding module; can support a plurality of modulation modes of BPSK \ QPSK \8PSK \16 APSK;
the decoding module 14 is used for decoding and outputting the data after soft demapping frame by frame; the code length of the LDPC decoding is 8064, and the code rate is 1/2, 3/4 and 7/8.
The signaling analysis module 15 is used for analyzing the signaling information obtained after decoding, storing each frame of signaling into ram one by one, and setting parameters of the de-spreading module, the de-mapping module and the decoding module when next frame of data is demodulated so as to adapt to data demodulation of different spreading ratios, different modulation and coding modes.
The demodulator of the invention supports the information rate of 3Mbps-155Mbps, simultaneously demodulates the carrier rates of 24 Mbps and 48 Mbps, demodulates spread spectrum data with the spread spectrum ratios of 1, 2, 4 and 8, supports multiple modulation modes of BPSK \ QPSK \8PSK \16APSK, supports the LDPC decoding code length of 8064 and has the code rates of 1/2, 3/4 and 7/8. The demodulator supports the demodulation of the data mode of any one or more of the carrier rate and modulation coding mode combinations in one frame, and the data mode is variable from frame to frame.
Claims (1)
1. A demodulator adapted to provide frame-by-frame variation of carrier rate and modulation coding scheme, comprising: the device comprises an AD sampling module, a first CIC module, a second CIC module, a first matched filtering module, a second matched filtering module, a 24M frame header searching processing module, a 48M frame header searching processing module, a data conversion module, a data combining module, a timing recovery module, a carrier recovery module, a de-spreading module, a de-mapping module, a decoding module and a signaling analysis module;
the AD sampling module performs high-power sampling on a received baseband signal in a mode of 8-path signal parallel processing, and the sampled signals are respectively output to the first CIC module and the second CIC module;
the first CIC module extracts the received signals into 8 paths of parallel signals with a sampling clock of 24MHz, and outputs the signals to the first matched filtering module;
the second CIC module extracts the received signals into 8 paths of parallel signals with a sampling clock of 48MHz, and outputs the signals to the second matched filtering module;
the first matched filtering module carries out filtering processing on 8 paths of parallel signals with a sampling clock of 24MHz and outputs the signals to the 24Msps frame header searching processing module;
the second matched filtering module carries out filtering processing on 8 paths of parallel signals with a sampling clock of 48MHz and outputs the signals to the 48Msps frame header searching processing module;
the 24Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of the 24MHz 8-channel parallel signal frame header by utilizing the relevant characteristics of a PN sequence according to the 1024 prior symbol information of the 24Msps frame header with the carrier rate, searching the 24Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data conversion module;
the 48Msps frame header searching processing module is used for respectively carrying out relevant accumulation on 1024 prior symbol information of an 8-channel parallel signal frame header of 48MHz by utilizing the relevant characteristics of a PN sequence according to 1024 prior symbol information of a 48Msps frame header with a carrier rate, searching the 48Msps frame header when the accumulated value is larger than a threshold value, and outputting the parallel data marked with the frame header to the data combining module;
the data transformation module converts the 24Msps continuous data into 48Msps burst data and outputs the burst data to the data combining module;
the data combining module is used for combining the data converted by the 24Msps and the 48Msps data and outputting the combined data to the timing recovery module;
the timing recovery module carries out clock recovery on the received data, estimates the square timing error of 4096 data, interpolates an optimal sampling point, and outputs the optimal sampling point data to the carrier recovery module;
the carrier recovery module estimates phases at the optimal sampling point data frame part by using 128 pilot frequency parts at two ends of data in a frame, completes real-time carrier phase compensation of the data frame between two pilot frequencies, and sends data after carrier recovery to the de-spreading module;
the de-spreading module performs de-spreading processing on the spread spectrum data contained in the frame of the data after carrier recovery, and outputs the data after de-spreading processing to the de-mapping module;
the de-mapping module performs soft de-mapping on code blocks of different modulation modes in de-spread data frame by frame, and outputs the data after soft de-mapping to the decoding module;
the decoding module decodes the data after soft demapping frame by frame and outputs the data;
the signaling analysis module analyzes the signaling information obtained after decoding, stores each frame of signaling into ram one by one, and sets parameters of the de-spreading module, the de-mapping module and the decoding module so as to adapt to data demodulation of different spreading ratios and different modulation and coding modes.
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CN111600823B (en) * | 2020-05-12 | 2022-03-01 | 中国电子科技集团公司第五十四研究所 | Parallel OQPSK offset quadriphase shift keying demodulator |
CN111917679B (en) * | 2020-08-12 | 2021-04-06 | 雅泰歌思(上海)通讯科技有限公司 | Method for downloading timing synchronization of carrier and symbol under low signal-to-noise ratio condition |
CN114844553B (en) * | 2022-03-29 | 2023-03-10 | 北京航空航天大学 | Single code element rate sampling method based on prior filtering and applied to high-speed transmission |
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