CN110389869A - A kind of method for detecting abnormality, device, electronic equipment and readable storage medium storing program for executing - Google Patents

A kind of method for detecting abnormality, device, electronic equipment and readable storage medium storing program for executing Download PDF

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Publication number
CN110389869A
CN110389869A CN201910657506.2A CN201910657506A CN110389869A CN 110389869 A CN110389869 A CN 110389869A CN 201910657506 A CN201910657506 A CN 201910657506A CN 110389869 A CN110389869 A CN 110389869A
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CN
China
Prior art keywords
cpld
abnormal
access
exception
ancillary equipment
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CN201910657506.2A
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Chinese (zh)
Inventor
朱绍霞
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Suzhou Wave Intelligent Technology Co Ltd
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Suzhou Wave Intelligent Technology Co Ltd
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Priority to CN201910657506.2A priority Critical patent/CN110389869A/en
Publication of CN110389869A publication Critical patent/CN110389869A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

Whether this application discloses a kind of method for detecting abnormality, by initiating access to CPLD and ancillary equipment simultaneously, occurred on low speed bus extremely with the access result referring concurrently to CPLD and ancillary equipment to determine first;The reason of if only initiating to access to CPLD by low speed bus, failing even if accessing, can not also determining access failure, be easy to cause erroneous judgement;If CPLD access failure, ancillary equipment access successfully; a possibility that low speed bus is abnormal can then be excluded; by initiating to access again after executing reset operation, it is able to belong to temporarily abnormal or firmware exception according to the exception that the access result accessed again specifically determines CPLD.Through the above scheme, the concrete reason generated extremely is determined more accurately.The application further simultaneously discloses a kind of abnormal detector, electronic equipment and computer readable storage medium, has above-mentioned beneficial effect.

Description

A kind of method for detecting abnormality, device, electronic equipment and readable storage medium storing program for executing
Technical field
This application involves technical field of memory, in particular to a kind of method for detecting abnormality, device, electronic equipment and computer Readable storage medium storing program for executing.
Background technique
With the development of Information technology, the application demand of storage system is increasing, and increasingly increased portfolio is to storage More stringent requirements are proposed for the stability of system, reliability, safety etc..
It operates normally, for controlling hardware single board as the CPLD (Complex of bridge between software and hardware Programmable Logic Device, Complex Programmable Logic Devices) it is a very important first device in storage system Part.If exception occurs in CPLD, it may result in and consequence very serious occur, therefore it is different accurately to determine whether CPLD occurs Often, occur which kind of exception be those skilled in the art be ensure storage system continue, the important research direction of stable operation.
Summary of the invention
This application provides a kind of method for detecting abnormality, device, electronic equipment and computer readable storage mediums, it is intended to quasi- True detects whether CPLD is currently in abnormality, in which kind of abnormality.
To achieve the above object, the application provides a kind of method for detecting abnormality, this method comprises:
Access is initiated to CPLD and ancillary equipment respectively by low speed bus;
If the CPLD and the ancillary equipment access failure, determine that the low speed bus is abnormal;
If the only described ancillary equipment accesses successfully, determine that the CPLD is abnormal;
Abnormal CPLD is executed and resets operation, and the CPLD after resetting is accessed by the low speed bus again;
If the CPLD after resetting, which is accessed, successfully determines that the exception of the CPLD is interim abnormal;
If the CPLD after resetting still accesses failure, determine that the CPLD's is abnormal for firmware exception.
Optionally, access is initiated to CPLD and ancillary equipment respectively by low speed bus, comprising:
Access is initiated to the CPLD and the ancillary equipment respectively by IIC.
Optionally, abnormal CPLD is executed and resets operation, comprising:
Abnormal CPLD is executed by GPIO and resets operation.
Optionally, before the exception for determining the CPLD is firmware exception, further includes:
Judge whether the reset number of operations executed to abnormal CPLD is equal to preset threshold;
If the preset threshold is less than to the abnormal CPLD reset number of operations executed, again to abnormal CPLD It executes and resets operation, and current reset number of operations is increased by 1, until current reset number of operations is equal to the default threshold Value.
Optionally, after executing reset operation to abnormal CPLD, further includes:
By correct firmware again programming into the CPLD of firmware exception;
Self-test is carried out to the CPLD that the correct firmware again programming is completed.
To achieve the above object, present invention also provides a kind of abnormal detector, which includes:
Unit is initiated in access, for initiating access to CPLD and ancillary equipment respectively by low speed bus;
Bus abnormality determination unit is used to access when failing as the CPLD and the ancillary equipment, determine described low Fast bus is abnormal;
CPLD exception preliminary judgement unit, for determining that the CPLD is different when the only described ancillary equipment accesses successfully Often;
Abnormal CPLD reset and again access unit reset operation for executing to abnormal CPLD, and pass through described low Fast bus accesses the CPLD after resetting again;
Interim abnormality determination unit when accessing successfully for the CPLD after reset, determines that the exception of the CPLD is to face Shi Yichang;
Firmware abnormality determination unit when still accessing unsuccessfully for the CPLD after reset, determines that the exception of the CPLD is Firmware is abnormal.
Optionally, the access initiation unit includes:
Subelement is initiated in IIC access, for initiating access to the CPLD and the ancillary equipment respectively by IIC.
Optionally, the exception CPLD resets and access unit includes: again
GPIO resets subelement, resets operation for executing by GPIO to abnormal CPLD.
Optionally, the abnormal detector further include:
Number of operations judging unit is resetted, for judging to different before the exception for determining the CPLD is firmware exception Whether the reset number of operations that normal CPLD is executed is equal to preset threshold;
Operation execution unit again is resetted, for described pre- when being less than to the reset number of operations of abnormal CPLD execution If when threshold value, being executed to abnormal CPLD reset operation again, and current reset number of operations is increased by 1, until current It resets number of operations and is equal to the preset threshold.
Optionally, the abnormal detector further include:
Firmware programming unit again, for determine the CPLD it is abnormal for firmware exception after, by correct firmware weight New programming is into the CPLD of firmware exception;
Self-test unit after programming, the CPLD for completing to the correct firmware again programming carry out self-test.
To achieve the above object, present invention also provides a kind of electronic equipment, which includes:
Memory, for storing computer program;
Processor realizes the method for detecting abnormality as described in above content when for executing the computer program.
To achieve the above object, described computer-readable to deposit present invention also provides a kind of computer readable storage medium It is stored with computer program on storage media, is realized when the computer program is executed by processor different as described in above content Normal detection method.
This application provides a kind of method for detecting abnormality, comprising: is sent out respectively to CPLD and ancillary equipment by low speed bus Play access;If the CPLD and the ancillary equipment access failure, determine that the low speed bus is abnormal;If only described auxiliary It helps equipment to access successfully, then determines that the CPLD is abnormal;Abnormal CPLD is executed and resets operation, and passes through the low speed bus CPLD after access resets again;If the CPLD after resetting, which is accessed, successfully determines that the exception of the CPLD is interim abnormal;If CPLD after reset still accesses failure, then determines that the CPLD's is abnormal for firmware exception.
Obviously, the application is by initiating access to CPLD and ancillary equipment simultaneously, referring concurrently to CPLD and ancillary equipment Access result determine abnormal whether occur on low speed bus first.If only initiating to access to CPLD by low speed bus, Even if access failure, can not also determine the reason of access fails, be easy to cause erroneous judgement.If CPLD access failure, ancillary equipment are visited It asks success, then can exclude a possibility that low speed bus is abnormal, by initiating to access again after executing reset operation, be able to basis It is abnormal that the exception that the access result accessed again specifically determines CPLD belongs to interim abnormal or firmware.Through the above scheme, Extremely the concrete reason generated is more accurately determined.
The application additionally provides a kind of abnormal detector, electronic equipment and computer readable storage medium simultaneously, has Above-mentioned beneficial effect, details are not described herein.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this The embodiment of application for those of ordinary skill in the art without creative efforts, can also basis The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of flow chart of method for detecting abnormality provided by the embodiments of the present application;
Fig. 2 is the topological schematic diagram between a kind of abnormality detection originating end corresponding with Fig. 1 and CPLD and ancillary equipment;
Fig. 3 is a kind of structural block diagram of abnormal detector provided by the embodiments of the present application.
Specific embodiment
This application provides a kind of method for detecting abnormality, device, electronic equipment and computer readable storage mediums, it is intended to quasi- True detects whether CPLD is currently in abnormality, in which kind of abnormality.
To keep the purposes, technical schemes and advantages of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application In attached drawing, the technical scheme in the embodiment of the application is clearly and completely described, it is clear that described embodiment is Some embodiments of the present application, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art All other embodiment obtained without making creative work, shall fall in the protection scope of this application.
Referring to Figure 1, Fig. 1 is a kind of flow chart of method for detecting abnormality provided by the embodiments of the present application, each shown in Fig. 1 The executing subject of step is detection originating end, the detection originating end according to the difference of practical application scene, can be it is any can The function component for serving as this identity, is not specifically limited herein.
The be shown with following steps of Fig. 1:
S101: access is initiated to CPLD and ancillary equipment respectively by low speed bus;
This step is intended to by initiating access to state CPLD to be detected and ancillary equipment, to be sentenced according to access result It is disconnected specifically to be generated by whom with the presence or absence of exception, and exception.Wherein, the effect of ancillary equipment to provide another access as a result, For comparing with the access result of CPLD, which can be the Functional Unit device for being arbitrarily able to respond the access of initiation Part, such as various sensor, computing element etc..It should be noted that the virtual condition of ancillary equipment should be known, to prevent It is judged by accident caused by only not known because of auxiliary device status.
Low speed bus is a kind of general designation of bus relative to high-speed bus, including IIC (Inter-Integrated Circuit, IC bus), SM Bus (System Management Bus, System Management Bus) etc., be mainly used for low The data of rate are transmitted.
Can be found in topological schematic diagram as shown in Figure 2, in Fig. 2, detection originating end by low speed bus respectively with CPLD and Ancillary equipment foundation has data connection, to initiate access to CPLD and ancillary equipment.
Specifically, this step can also be especially by the mode of continuous poll to be persistently monitored to the state of CPLD It carries out, or is carried out every preset time primary etc..
S102: when CPLD and ancillary equipment access failure, determine that low speed bus is abnormal;
This step is that S101 initiates a kind of situation after access, i.e. detection originating end is initiated to CPLD and ancillary equipment respectively Access fail, due to the application setting ancillary equipment should be able to respond access, if low speed bus is without exception, to The access that the ancillary equipment is initiated should not fail.Based on this, clearly it can judge that CPLD and ancillary equipment are accessed The reason of failure, goes out on low speed bus.
S103: when only ancillary equipment accesses successfully, determine that CPLD is abnormal;
This step be S101 initiate access after another situation, i.e. CPLD access failure, ancillary equipment access successfully, by The reason of accessing successfully in ancillary equipment, illustrate that low speed bus does not occur exception, therefore leading to CPLD access failure can only It is CPLD itself, this step determines CPLD exception in the case.
S104: abnormal CPLD is executed and resets operation, and the CPLD after resetting is accessed by low speed bus again;
This step, which is established, has determined that CPLD there are on the basis of exception, loses due to may cause CPLD access in S103 For the abnormal cause lost there are a variety of, it is abnormal to be simply divided into interim abnormal and firmware, it is interim it is abnormal can pass through to execute reset operation Later view is eliminated, and including some interim problems, fluctuation problem, CPLD Caton etc., therefore can operate (class by resetting It is similar to restarting for PC machine) eliminate these exceptions.And since CPLD firmware data itself goes wrong, no matter reset how many times It is unable to get reparation, because referred to herein as firmware is abnormal.
Reset operation specifically, can execute in several ways to abnormal CPLD, for example, by low speed bus (including IIC, SM BUS), it can also be using GPIO (General-purpose input/output, the universal input/output more insured Interface) mode resetted, certainly, is also not excluded for the new reset mode occurred with the development of technology, do not do herein It is specific to limit.
S105: when the CPLD after reset is accessed successfully, determine that the exception of CPLD is interim abnormal;
This step executes a kind of situation resetted after operating and accessing again for S104, i.e., after having executed reset operation The result accessed again is to access successfully, is illustrated after resetting operation, abnormal disappearance, therefore, it is determined that belonging to interim exception.
S106: when the CPLD after reset is still accessed unsuccessfully, determine that CPLD's is abnormal for firmware exception.
This step executes another situation resetted after operating and accessing again for S104, i.e., after having executed reset operation The result accessed again still be access failure, illustrate reset operation can not repair cause access fail exception, therefore will Determine that it belongs to firmware exception.
It further,, also deliberately will be correct to eliminate firmware exception after the exception for determining CPLD is firmware exception Again programming and carries out self-test to the CPLD that correct firmware again programming is completed into the CPLD of firmware exception to firmware, to pass through The mode of firmware replacement corrects firmware error, ensures the stable operation of storage system.
It further,, sometimes also can not be only by once multiple even interim abnormal due to complicated actual conditions Bit manipulation is just eliminated, therefore can also be previously provided with threshold value, in the case where for still failing after primary reset operation, Execute resets operation more several times, still fails until resetting after number of operations reaches threshold value, illustrates to be not belonging to grasp by resetting really Make eliminable interim exception.
A kind of concrete implementation mode are as follows:
Before the exception for determining CPLD is firmware exception, whether the reset number of operations executed to abnormal CPLD is judged Equal to preset threshold;
When the reset number of operations executed to abnormal CPLD is less than preset threshold, abnormal CPLD is executed again Operation is resetted, and current reset number of operations is increased by 1, until current reset number of operations is equal to preset threshold.Wherein, The size of the preset threshold can be with sets itself.
Based on the above-mentioned technical proposal, the application is by initiating access to CPLD and ancillary equipment simultaneously, with referring concurrently to Whether the access result of CPLD and ancillary equipment occurs on low speed bus extremely to determine first.If only right by low speed bus CPLD initiates access, even if access failure, can not also determine the reason of accessing failure, be easy to cause erroneous judgement.If CPLD access is lost Lose, ancillary equipment accesses successfully, then can exclude a possibility that low speed bus is abnormal, by execute reset operation after initiate again Access is able to belong to interim exception according to the exception that the access result accessed again specifically determines CPLD or firmware is abnormal. Through the above scheme, the concrete reason generated extremely is determined more accurately.
Fig. 3 is referred to below, and Fig. 3 is a kind of structural block diagram of abnormal detector provided by the embodiments of the present application, the dress It sets and may include:
Unit 100 is initiated in access, for initiating access to CPLD and ancillary equipment respectively by low speed bus;
Bus abnormality determination unit 200 is used to access when failing as CPLD and ancillary equipment, determines that low speed bus is different Often;
CPLD exception preliminary judgement unit 300, for when only ancillary equipment accesses successfully, determining that CPLD is abnormal;
Abnormal CPLD reset and again access unit 400, reset operation for executing to abnormal CPLD, and pass through low speed Bus accesses the CPLD after resetting again;
Interim abnormality determination unit 500, when accessing successfully for the CPLD after reset, determines that the exception of CPLD is interim It is abnormal;
Firmware abnormality determination unit 600 when still accessing unsuccessfully for the CPLD after reset, determines that the exception of CPLD is solid Part is abnormal.
Wherein, access initiation unit 100 may include:
Subelement is initiated in IIC access, for initiating access to CPLD and ancillary equipment respectively by IIC.
Wherein, exception CPLD resets and access unit 400 may include: again
GPIO resets subelement, resets operation for executing by GPIO to abnormal CPLD.
Further, which can also include:
Number of operations judging unit is resetted, for judging to exception before the exception for determining CPLD is firmware exception Whether the reset number of operations that CPLD is executed is equal to preset threshold;
Operation execution unit again is resetted, for being less than default threshold when the reset number of operations executed to abnormal CPLD When value, abnormal CPLD is executed reset operation again, and current reset number of operations is increased by 1, until current reset Number of operations is equal to preset threshold.
Further, which can also include:
Firmware programming unit again, for determine CPLD it is abnormal for firmware exception after, correct firmware is burnt again It writes into the CPLD of firmware exception;
Self-test unit after programming, the CPLD for completing to correct firmware again programming carry out self-test.
The present embodiment exists as an Installation practice for corresponding to embodiment of the method, the whole with embodiment of the method Beneficial effect no longer repeats one by one herein.
Based on the above embodiment, present invention also provides a kind of electronic equipment, the electronic equipment may include memory and Processor, wherein there is computer program in the memory, it, can when which calls the computer program in the memory To realize step provided by above-described embodiment.Certainly, which can also include various necessary network interfaces, power supply And other components etc..
Present invention also provides a kind of computer readable storage mediums, have computer program thereon, the computer program Step provided by above-described embodiment may be implemented when being performed terminal or processor execution.The storage medium may include: U Disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), the various media that can store program code such as magnetic or disk.
Each embodiment is described in a progressive manner in specification, the highlights of each of the examples are with other realities The difference of example is applied, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment Speech, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is referring to method part illustration ?.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered Think beyond scope of the present application.
Specific examples are used herein to illustrate the principle and implementation manner of the present application, and above embodiments are said It is bright to be merely used to help understand the present processes and its core concept.For those skilled in the art, Under the premise of not departing from the application principle, can also to the application, some improvement and modification can also be carried out, these improvement and modification It falls into the protection scope of the claim of this application.
It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning Covering non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes that A little elements, but also other elements including being not explicitly listed, or further include for this process, method, article or The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged Except there is also other identical elements in the process, method, article or equipment for including element.

Claims (10)

1. a kind of method for detecting abnormality characterized by comprising
Access is initiated to CPLD and ancillary equipment respectively by low speed bus;
If the CPLD and the ancillary equipment access failure, determine that the low speed bus is abnormal;
If the only described ancillary equipment accesses successfully, determine that the CPLD is abnormal;
Abnormal CPLD is executed and resets operation, and the CPLD after resetting is accessed by the low speed bus again;
If the CPLD after resetting, which is accessed, successfully determines that the exception of the CPLD is interim abnormal;
If the CPLD after resetting still accesses failure, determine that the CPLD's is abnormal for firmware exception.
2. method for detecting abnormality according to claim 1, which is characterized in that by low speed bus respectively to CPLD and auxiliary Equipment initiates access, comprising:
Access is initiated to the CPLD and the ancillary equipment respectively by IIC.
3. method for detecting abnormality according to claim 1, which is characterized in that abnormal CPLD is executed and resets operation, packet It includes:
Abnormal CPLD is executed by GPIO and resets operation.
4. method for detecting abnormality according to claim 1, which is characterized in that different for firmware in the exception for determining the CPLD Before often, further includes:
Judge whether the reset number of operations executed to abnormal CPLD is equal to preset threshold;
If being less than the preset threshold to the abnormal CPLD reset number of operations executed, abnormal CPLD is executed again Operation is resetted, and current reset number of operations is increased by 1, until current reset number of operations is equal to the preset threshold.
5. method for detecting abnormality according to any one of claims 1 to 4, which is characterized in that executed to abnormal CPLD It resets after operating, further includes:
By correct firmware again programming into the CPLD of firmware exception;
Self-test is carried out to the CPLD that the correct firmware again programming is completed.
6. a kind of abnormal detector characterized by comprising
Unit is initiated in access, for initiating access to CPLD and ancillary equipment respectively by low speed bus;
Bus abnormality determination unit is used to access when failing as the CPLD and the ancillary equipment, determines that the low speed is total Line is abnormal;
CPLD exception preliminary judgement unit, for when the only described ancillary equipment accesses successfully, determining that the CPLD is abnormal;
Abnormal CPLD reset and again access unit reset operation for executing to abnormal CPLD, and it is total to pass through the low speed Line accesses the CPLD after resetting again;
Interim abnormality determination unit when accessing successfully for the CPLD after reset, determines that the exception of the CPLD is interim different Often;
Firmware abnormality determination unit when still accessing unsuccessfully for the CPLD after reset, determines that the CPLD's is abnormal for firmware It is abnormal.
7. abnormal detector according to claim 6, which is characterized in that the access initiates unit and includes:
Subelement is initiated in IIC access, for initiating access to the CPLD and the ancillary equipment respectively by IIC.
8. abnormal detector according to claim 6, which is characterized in that the exception CPLD is resetted and accessed again single Member includes:
GPIO resets subelement, resets operation for executing by GPIO to abnormal CPLD.
9. a kind of electronic equipment characterized by comprising
Memory, for storing computer program;
Processor realizes such as abnormality detection side described in any one of claim 1 to 5 when for executing the computer program Method.
10. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium Program realizes such as method for detecting abnormality described in any one of claim 1 to 5 when the computer program is executed by processor.
CN201910657506.2A 2019-07-19 2019-07-19 A kind of method for detecting abnormality, device, electronic equipment and readable storage medium storing program for executing Withdrawn CN110389869A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113722166A (en) * 2021-08-27 2021-11-30 苏州浪潮智能科技有限公司 Out-of-band data access optimization method, system, device and storage medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113722166A (en) * 2021-08-27 2021-11-30 苏州浪潮智能科技有限公司 Out-of-band data access optimization method, system, device and storage medium
CN113722166B (en) * 2021-08-27 2023-07-14 苏州浪潮智能科技有限公司 Out-of-band data access optimization method, system, device and storage medium

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