CN110380721A - A kind of CC pin circuitry of USB Type-C - Google Patents
A kind of CC pin circuitry of USB Type-C Download PDFInfo
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- CN110380721A CN110380721A CN201910752387.9A CN201910752387A CN110380721A CN 110380721 A CN110380721 A CN 110380721A CN 201910752387 A CN201910752387 A CN 201910752387A CN 110380721 A CN110380721 A CN 110380721A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00307—Modifications for increasing the reliability for protection in bipolar transistor circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
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Abstract
The present invention provides the CC pin circuitry of USB Type-C a kind of.In Type-C interface circuit, introduces high pressure NMOS and do voltage isolation, generate the first low-pressure area.Pull-up resistor circuit, CC connection detection circuit, PD telecommunication circuit etc. are placed on the first low-pressure area and realize high voltage protective.Pull down resistor circuit is connected directly between on CC pin so that Type-C interface be in DRP perhaps SNK mode without electric (Dead Battery) state when access SRC or other DRP can normally realize CC connection.It is divided into first resistor and second resistance two parts to connect the resistance in pull down resistor circuit, and does voltage clamping in intermediate series connection node, generate the second low-pressure area.The enabled control switch and second resistance of pull down resistor circuit are placed on the second low-pressure area and realize high voltage protective.First resistor is placed on higher-pressure region, and plays metering function in voltage clamp circuit work.Pressure-resistant design method of the invention and circuit structure can be applied to solve the problems, such as the pressure-resistant of CC pin in the Type-C interface circuit of all modes.
Description
Technical field
The present invention relates to USB Type-C interface circuit technical fields, are specifically related to the CC pin of USB Type-C a kind of
Circuit.
Background technique
With making rapid progress for electronic technology development, using mobile phone, plate and laptop as the portable electronic of representative
Product widely affects daily life.Novel USB Type-C interface supports front and back sides insertion, solves
The global problem of " the eternal inaccurate plug of USB ".In addition, the relatively traditional USB interface of Type-C interface also has lighter weight,
More slim design, smaller size, and the features such as expanding function is stronger, be very suitable to be applied to portable electronic production
With product.Since Type-C interface emerges, several years have only been used, have just been obtained widely universal.
The rise of USB rapid nitriding, so that the voltage that VBUS is transmitted in USB interface is no longer fixed 5V, but
The voltage range of 3V to 20V can be covered.Then, either to all suffer from high pressure bring many for charger or charging equipment
Integrity problem.The CC pin of Type-C interface nestles up VBUS pin, and distance between the two is very small, inserts in cable
Cable during pulling out or in connection shakes, and CC pin is all easy to be shorted together with VBUS pin, so that
The voltage of VBUS is directly got on CC pin.Therefore, carrying out high pressure resistant design to the CC pin of Type-C interface circuit is very
It is necessary.
According to the power supply of USB port or by electric situation, port is divided into SRC (only powering), SNK (only by the Type-C of USB
Take electricity), the power modes such as DRP (can power or take electricity).Wherein, DRP can be divided into SRC connected state (power supply) and connect with SNK
State (takes electricity).Currently, the CC pin pressure resistance of existing Type-C designs circuit, it is simply to make in CC pin concatenation high pressure NMOS
For voltage isolation, all circuits on CC pin are all then placed on the low-pressure area that high pressure NMOS isolation generates.This method energy
It is enough advantageously applied in SRC mode as similar adapter.But when this method is applied to DRP SNK mode,
As shown in FIG. 1, FIG. 1 is the CC pin circuitry of existing Type-C SNK connected state schematic diagram.CC pin IV concatenates high pressure
NMOS III is isolated as voltage, forms higher-pressure region I and low-pressure area II, CC pin IV and high pressure NMOS III are in higher-pressure region I, by upper
The pull down resistor electricity that pull-up resistor circuit, pull down resistor Ⅹ and the switch Ⅸ that pull-up resistor VI and switch VII are composed in series are composed in series
Road, CC connection detection circuit VIII and PD telecommunication circuit Ⅸ are placed in low-pressure area II.Type-C interface enters without electricity (Dead
Battery) after state, internal electric source VDD is 0, and high pressure NMOS III turns off.Access SRC or other DRP can not the company of being formed at this time
The drop-down access for connecing CC pin, when the Rp_SRC resistance V of other end Type-C interface occurs, the voltage of CC pin IV is drawn in meeting
Height arrives the power vd DSRC of other end Type-C interface, so cannot achieve CC connection, other end Type-C interface will not be exported
VBUS causes not activating always without electric (Dead Battery) state.Such case often cannot in practical application
Receive.
Summary of the invention
The object of the present invention is to provide the CC pin circuitries of USB Type-C a kind of, can be applied to all modes
In Type-C interface circuit, the pressure-resistant of CC pin is solved the problems, such as.
To achieve the goals above, the CC pin circuitry of USB Type-C provided by the invention includes high pressure NMOS, pull-up
Resistance circuit, CC connection detection circuit, PD telecommunication circuit, pull down resistor circuit and voltage clamp circuit, the grid of high pressure NMOS
Internal electric source VDD is connected, one end of pull-up resistor circuit, CC connection detection circuit and PD telecommunication circuit is connected to high pressure NMOS
Source electrode, the drain electrode of high pressure NMOS is connected with pull down resistor circuit, and the drain electrode of high pressure NMOS is connected to the first end of CC pin, under
Pull-up resistor circuit includes first resistor circuit and second resistance circuit, and voltage clamp circuit is connected to first resistor circuit and second
Between the series connection node and ground of resistance circuit.
By above scheme as it can be seen that the present invention passes through the design to high pressure NMOS and pull down resistor circuit, integrated circuit structure
It is divided into three higher-pressure region, the first low-pressure area and the second low-pressure area regions.High pressure NMOS, first resistor circuit and CC pin are in
Higher-pressure region, pull-up resistor circuit, CC connection detection circuit and PD telecommunication circuit are in the first low-pressure area, second resistance circuit and electricity
Pressure clamp circuit is in the second low-pressure area.Wherein, high pressure NMOS can realize the effect of isolation high pressure.When Type-C is normally connected
When, high pressure NMOS shows as the transmitting switch of a low resistance, enables voltage signal in high pressure NMOS source node and CC
It is transmitted without loss between pin.CC connection detection circuit is, it can be achieved that the identification of Type-C connection status judges.PD telecommunication circuit
The communication of USB power transmission protocol can be showed.Voltage clamp circuit can realize pressure resistance protection by voltage clamping.The circuit structure energy
Enough it is applied in the Type-C interface circuit of all modes, even at DRP SNK mode without electric (Dead Battery)
State, access SRC or other DRP also can normally realize CC connection.Meanwhile realizing the high voltage protective of CC pin, solve CC
The pressure-resistant problem of pin.
Further embodiment is that high pressure NMOS is the NMOS of ceiling voltage of the pressure voltage greater than Type-C interface VBUS.
Therefore when CC pin and VBUS pin are shorted together, in the CC pin circuitry of the USB Type-C
High pressure NMOS can work normally, and avoid breakdown.
Further scheme is, pull-up resistor circuit includes impedance device, the first enabled control switch, impedance device and
First enabled control switch is connected in series, and one end of source electrode of the pull-up resistor circuit far from high pressure NMOS connects internal electric source VDD.
Further scheme is that impedance device is resistance or current source.
Further scheme is that the first enabled control switch is PMOS, NMOS, PNP or NPN device.
Therefore the pull-up resistor circuit of the CC pin circuitry of the USB Type-C can be realized to high pressure NMOS source electrode section
The pull-up effect of point signal.
Further scheme is that first resistor circuit includes first resistor.
Further scheme is that second resistance circuit includes second resistance, the second enabled control switch, the second enabled control
System switch is serially connected between first resistor and second resistance, the other end ground connection of second resistance.
Further scheme is that the second enabled control switch is PMOS or PNP device.
Therefore by the way that the second enabled control switch to be serially connected between first resistor and second resistance, CC can avoid
Second to enable control switch breakdown when high pressure occurs in pin, in addition compared to the second enabled control switch is serially connected in second resistance
Connection method between ground can reduce conduction threshold loss.When high pressure occurs in CC pin 13, first resistor 12 can play limit
Stream effect.Meanwhile when, without electric (Dead Battery) state, passing through the second enabled control switch in DRP SNK mode
Conducting the voltage of CC pin can be achieved be in the voltage range of connected state, and activate without electricity (Dead Battery) state.
Detailed description of the invention
Schematic diagram of the CC pin circuitry in SNK connected state that Fig. 1 is existing Type-C.
Fig. 2 is a kind of schematic diagram of the CC pin circuitry structure of USB Type-C of the present invention.
Fig. 3 is the electrical block diagram that the present invention is applied to Type-C DRP pattern Example.
Fig. 4 is the schematic diagram with Type-C DRP embodiment of the invention in SRC connected state.
Fig. 5 is the schematic diagram with Type-C DRP embodiment of the invention in SNK connected state.
Fig. 6 is the electrical block diagram that the present invention is applied to Type-C SRC pattern Example.
Fig. 7 is the electrical block diagram that the present invention is applied to Type-C SNK mode first embodiment.
Fig. 8 is the electrical block diagram that the present invention is applied to Type-C SNK mode second embodiment.
Specific embodiment
Referring to fig. 2, Fig. 2 is a kind of schematic diagram of the CC pin circuitry structure of USB Type-C of the present invention.The CC pin electricity
Road includes high pressure NMOS 11, pull-up resistor circuit, CC connection detection circuit 23, PD telecommunication circuit 24, pull down resistor circuit and electricity
Clamp circuit is pressed, the grid of high pressure NMOS 11 connects internal electric source VDD, pull-up resistor circuit, CC connection detection circuit 23 and PD
One end of telecommunication circuit 24 is connected to the source electrode of high pressure NMOS, and the drain electrode of high pressure NMOS 11 is connected with pull down resistor circuit, high
The drain electrode of pressure NMOS11 is connected to the first end of CC pin, and pull down resistor circuit includes first resistor circuit and second resistance electricity
Road, voltage clamp circuit are connected between first resistor circuit and the series connection node and ground of second resistance circuit.Wherein, pull-up electricity
Resistance circuit includes impedance device 21, the first enabled control switch 22, and impedance device 21 and the first enabled series connection of control switch 22 connect
It connects, one end of source electrode of the pull-up resistor circuit far from high pressure NMOS 11 connects internal electric source VDD.First resistor circuit includes first
Resistance 12, second resistance circuit include second resistance 32, the second enabled control switch 31, and the second enabled control switch 31 is serially connected in
Between first resistor 12 and second resistance 32, the other end of second resistance 32 is grounded.
Specifically, integrated circuit structure is divided into 3 three higher-pressure region 1, the first low-pressure area 2 and the second low-pressure area regions.It is high
Pressure NMOS11, first resistor circuit and CC pin 13 are in higher-pressure region 1, pull-up resistor circuit, CC connection detection circuit 23 and PD
Telecommunication circuit 24 is in the first low-pressure area 2, and second resistance circuit and voltage clamp circuit are in the second low-pressure area 3.Wherein, internal
Power vd D is usually no more than 5.5V, and high pressure NMOS is able to bear the ceiling voltage of the VBUS of Type-C interface.Due to high pressure
The grid of NMOS11 connects internal electric source VDD, and NMOS11 transmission high voltage has threshold value loss, so when CC pin occurs
When high pressure, the voltage for being poured into 11 source node of high pressure NMOS is not above internal electric source VDD.Therefore, high pressure NMOS 11 can be realized
The effect of high pressure is isolated.When Type-C is normally connected, the voltage of 11 source node of high pressure NMOS and CC pin 13 is far below interior
Portion power vd D, therefore high pressure NMOS 11 shows as the transmitting switch of a low resistance, enables voltage signal in high pressure
It is transmitted without loss between NMOS11 source node and CC pin 13.CC connection detection circuit 23 realizes Type-C connection status
Identification judgement, it may include comparator, reference voltage and logic circuit etc..PD telecommunication circuit 24 realizes USB power transmission protocol
Communication, it may include the circuits such as TX and RX.In pull down resistor circuit, first resistor 12 is connect with one end of CC pin 13, and second
Enabled control switch 31 is serially connected between first resistor 12 and second resistance 32, and second makes when high pressure occurs in avoidable CC pin 13
It can control that switch 31 is breakdown, in addition compared to the second enabled control switch is serially connected in the connection method between second resistance and ground
Conduction threshold loss can be reduced.Meanwhile the clamp voltage of voltage clamp circuit is lower than safe voltage, when high pressure occurs in CC pin 13
When, the series connection node voltage of first resistor circuit and second resistance circuit is higher than clamp voltage, and voltage clamp circuit can be connected simultaneously
Flow away electric current, is depressured the string so that first resistor circuit and second resistance circuit by the IR pressure drop (IRdrop) of first resistor 12
The voltage of interlink point is no more than safe voltage.Structure design based on the pull down resistor circuit, can solve the pressure resistance of CC pin 13
Problem.
In following specific embodiments, impedance device 21 be current source, the first enabled control switch 22 be PMOS (P1), second
Enabled control switch 31 is PMOS (P2), and voltage clamp circuit uses Zener diode 33 to realize.
It is the electrical block diagram that the present invention is applied to Type-C DRP pattern Example referring to Fig. 3, Fig. 3.In this reality
It applies in example, Type-C DRP default switches between two kinds of disconnected states of SRC and SNK.When being switched to SRC mode, first
Enabled control switch 22 (P1) conducting, the second enabled control switch 31 (P2) shutdown.11 source node of high pressure NMOS is essentially pulled up to
Internal electric source VDD.Since the grid of high pressure NMOS 11 meets internal electric source VDD, high pressure NMOS 11 transmits vdd voltage and has threshold value damage
It loses, so the voltage on CC pin 13 shows as the threshold voltage that internal electric source VDD subtracts high pressure NMOS 11 at this time.CC connection inspection
What slowdown monitoring circuit 23 detected is the voltage of 11 source node of high pressure NMOS, so the disconnected state of SRC can be accurately identified.When cutting
When changing to SNK mode, the first enabled control switch 22 (P1) shutdown, the second enabled control switch 31 (P2) conducting.CC pin 13
It pulled down to ground by pull down resistor circuit.The low-voltage of CC pin 13 can be nondestructively transmitted to height by high pressure NMOS 11 at this time
NMOS11 source node is pressed, CC connection detection circuit 23 can accurately identify the disconnected state of SNK.
Referring to fig. 4, Fig. 4 is the schematic diagram with Type-C DRP embodiment of the invention in SRC connected state.In this state
In, the first enabled control switch 22 (P1) conducting, the second enabled control switch 31 (P2) shutdown, i.e., the first enabled control switch 22
(P1) grid of grounded-grid, the second enabled control switch 31 (P2) meets internal electric source VDD.The electric current Ip that current source 21 provides
Flow through the first enabled control switch 22 (P1), high pressure NMOS 11, CC pin 13, cable 14 and other end Type-C interface Rd_
SNK resistance 15 arrives ground.Voltage when in connected state on CC pin 13 is Ip × Rd_SNK, generally below 2.6V；PD communication electricity
The voltage of CC pin 13 is generally below 1.2V when road 24 works normally.Therefore, high pressure NMOS 11 can be in 11 source electrode of high pressure NMOS
Nondestructively transfer overvoltage signal between node and CC pin 13.When high pressure occurs in CC pin 13, high pressure NMOS can be high pressure
The voltage of NMOS11 source node is controlled in a threshold voltage lower than internal electric source VDD, it can be achieved that protecting the first low-pressure area 2
Pressure-resistant safety；The conducting of 33 reverse breakdown of Zener diode, cocurrent walk electric current, the IR of first resistor 12 are then flowed through by the electric current
Pressure drop (IRdrop) controls the voltage of first resistor circuit and the series connection node of second resistance circuit in Zener diode 33
Clamp voltage is hereinafter, to guarantee that the pressure resistance of the second low-pressure area 3 is safe.
Referring to Fig. 5, Fig. 5 is the schematic diagram with Type-C DRP embodiment of the invention in SNK connected state.In this state
In, the first enabled control switch 22 (P1) shutdown, the second enabled control switch 31 (P2) conducting, i.e., the first enabled control switch 22
(P1) grid connects internal electric source VDD, the grounded-grid of the second enabled control switch 31 (P2).The voltage of CC pin 13 is by another
The Rp_SRC resistance 16 for holding Type-C interface, with the first resistor 12 (R1) of this Type-C interface and point of second resistance 32 (R2)
Pressure generates, as (VDDSRC × (R1+R2))/((Rp_SRC+R1+R2)), generally below 2.6V；The normal work of PD telecommunication circuit 24
The voltage of CC pin 13 is generally below 1.2V when making.Therefore, high pressure NMOS 11 can draw in 11 source node of high pressure NMOS and CC
Nondestructively transfer overvoltage signal between foot 13.Meanwhile when there is high pressure in CC pin 13, high pressure NMOS 11 and Zener diode 33
Also it can guarantee the pressure resistance safety of the first low-pressure area 2 and the second low-pressure area 3.
When Type-C DRP embodiment is in without electric (Dead Battery) state, corresponding internal electric source vdd voltage
It is 0, the grid voltage of the first enabled control switch 22 (P1), the second enabled control switch 31 (P2) and high pressure NMOS 11 is defaulted as
Low potential, high pressure NMOS 11 are held off.At this point, the Rp_SRC resistance 16 when other end Type-C interface occurs, CC can be drawn
The voltage high of foot 13, while when the voltage of first resistor circuit and the series connection node of second resistance circuit is higher than the second enabled control
After the threshold voltage for making switch 31 (P2), the second enabled control switch 31 (P2) can be connected and the voltage of CC pin 13 is in
The voltage range of connected state.Then, after other end Type-C interface recognizes the voltage of CC pin 13, simultaneously into SRC connected state
VBUS is brought, activate this Type-C interface without electric (Dead Battery) state.It is different from Fig. 1, Fig. 1 is existing
The CC pin circuitry of Type-C is in the schematic diagram of SNK connected state, and when the circuit is applied to DRP SNK mode, Type-C is connect
Mouth enters without after electric (Dead Battery) state, and internal electric source VDD is 0, high pressure NMOS shutdown.At this time access SRC or its
His DRP can not form the drop-down access of connection CC pin 13, and the voltage of CC pin 13 is pulled high to other end Type-C interface
Power vd DSRC, so cannot achieve CC connection, other end Type-C interface will not export VBUS, cause without electricity (Dead
Battery) state can not activate always.
It is the electrical block diagram that the present invention is applied to Type-C SRC pattern Example referring to Fig. 6, Fig. 6.In this reality
It applies in example, integrated circuit structure is divided into higher-pressure region 1, the first low-pressure area 2.High pressure NMOS 11 and CC pin 13 are in higher-pressure region 1,
Pull-up resistor circuit, CC connection detection circuit 23 and PD telecommunication circuit 24 are in the first low-pressure area 2.Specifically, if do not supported
On-off control to pull-up resistor circuit, can not use the first enabled control switch 22 (P1).The course of work of the present embodiment
It is consistent with SRC connected state with the disconnected state of SRC of Type-C DRP pattern Example, it is not repeated to describe herein.
It is the electrical block diagram that the present invention is applied to Type-C SNK mode first embodiment referring to Fig. 7, Fig. 7.?
In the present embodiment, integrated circuit structure is divided into higher-pressure region 1, the first low-pressure area 2, the second low-pressure area 3.High pressure NMOS 11, first
Resistance circuit and CC pin 13 are in higher-pressure region 1, and CC connection detection circuit 23 and PD telecommunication circuit 24 are in the first low-pressure area 2.
Second resistance circuit and voltage clamp circuit are in the second low-pressure area 3.If not supporting the on-off control to pull down resistor circuit,
The second enabled control switch 31 (P2) and Zener diode 33 can not be used, then first resistor 12 and second resistance 32 can be with
The pull down resistor for being merged into about 5.1k Ω is placed on higher-pressure region 1, specific as shown in Figure 8.The course of work of the present embodiment is with Type-C
The disconnected state of the SNK of DRP pattern Example is consistent with SNK connected state, is not repeated to describe herein.
To sum up, a kind of CC pin circuitry of USB Type-C of the present invention passes through exquisite circuit structure design, integrated circuit
Structure is divided into three higher-pressure region, the first low-pressure area and the second low-pressure area regions, can solve the problems, such as the pressure-resistant of CC pin.Meanwhile
By the way that pull down resistor circuit to be connected directly between on CC pin, may make when Type-C interface is in the nothing of DRP SNK mode
Drop-down access is formed when electric (Dead Battery) state, access SRC or other DRP can normally realize CC connection, thus
Activation realizes the voltage signal of effectively transmission CC pin without electric (Dead Battery) state.
Finally it is emphasized that the above description is only a preferred embodiment of the present invention, it is not intended to restrict the invention, it is right
For those skilled in the art, the present invention can have various change and change, all within the spirits and principles of the present invention,
Any modification, equivalent substitution, improvement and etc. done, should all be included in the protection scope of the present invention.
Claims (8)
1. a kind of CC pin circuitry of USB Type-C, including high pressure NMOS, pull-up resistor circuit, CC connection detection circuit, PD
Telecommunication circuit, pull down resistor circuit and voltage clamp circuit, the grid of the high pressure NMOS connect internal electric source VDD, it is described on
One end of pull-up resistor circuit, the CC connection detection circuit and the PD telecommunication circuit is connected to the source electrode of high pressure NMOS, institute
The drain electrode for stating high pressure NMOS is connected to the first end of the pull down resistor circuit and CC pin；
It is characterized by:
The pull down resistor circuit includes the first resistor circuit and second resistance circuit being connected in series, the voltage clamp circuit
It is connected between the first resistor circuit and the series connection node and ground of the second resistance circuit.
2. the CC pin circuitry of USB Type-C according to claim 1, it is characterised in that: the high pressure NMOS is pressure resistance
The NMOS of ceiling voltage of the value greater than Type-C interface VBUS.
3. the CC pin circuitry of USB Type-C according to claim 1, it is characterised in that: the pull-up resistor circuit packet
Include impedance device, the first enabled control switch, the impedance device and the first enabled control switch are connected in series, it is described on
One end of source electrode of the pull-up resistor circuit far from the high pressure NMOS connects internal electric source VDD.
4. the CC pin circuitry of USB Type-C according to claim 3, it is characterised in that: the impedance device is resistance
Or current source.
5. the CC pin circuitry of USB Type-C according to any one of claims 1 to 4, it is characterised in that: described first
Enabled control switch is PMOS, NMOS, PNP or NPN device.
6. the CC pin circuitry of USB Type-C according to claim 1, it is characterised in that: the first resistor circuit packet
Include first resistor.
7. the CC pin circuitry of USB Type-C according to claim 1, it is characterised in that: the second resistance circuit packet
Second resistance, the second enabled control switch are included, the second enabled control switch is serially connected in the first resistor and described second
Between resistance, the other end of the second resistance is grounded.
8. the CC pin circuitry of USB Type-C according to claim 6 or 7, it is characterised in that: the described second enabled control
System switch is PMOS or PNP device.
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| CN201910752387.9A CN110380721A (en) | 2019-08-15 | 2019-08-15 | A kind of CC pin circuitry of USB Type-C |
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| CN201910752387.9A CN110380721A (en) | 2019-08-15 | 2019-08-15 | A kind of CC pin circuitry of USB Type-C |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111209237A (en) * | 2019-12-20 | 2020-05-29 | 深圳宝龙达信息技术股份有限公司 | Type-C of optional power supply direction changes Type-C connecting wire |
| CN111509815A (en) * | 2020-05-29 | 2020-08-07 | 维沃移动通信有限公司 | Data line and charging equipment |
| CN116049067A (en) * | 2023-02-10 | 2023-05-02 | 芯动微电子科技(武汉)有限公司 | Dead battery circuit and universal serial bus Type-C equipment |
| CN116633328A (en) * | 2023-07-25 | 2023-08-22 | 电子科技大学 | First-stage integrator voltage clamping circuit |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120023344A1 (en) * | 2009-10-02 | 2012-01-26 | Rohm Co., Ltd. | Semiconductor apparatus |
| US20170155214A1 (en) * | 2015-11-26 | 2017-06-01 | International Green Chip (Tianjin) Co., Ltd. | Method of and device for protecting usb type-c interface chip when cc pins thereof being at high voltage |
| US20170344098A1 (en) * | 2016-05-26 | 2017-11-30 | Silicon Laboratories Inc. | Vconn Pull-Down Circuits And Related Methods For USB Type-C Connections |
| JP2018013932A (en) * | 2016-07-20 | 2018-01-25 | キヤノン株式会社 | Electronic apparatus |
| CN107870883A (en) * | 2016-09-27 | 2018-04-03 | 恩智浦有限公司 | The dutycycle randomization of c-type USB double actions port is not attached |
| US20180183248A1 (en) * | 2016-12-22 | 2018-06-28 | Asustek Computer Inc. | Charge-discharge device and control method of the same |
| CN108233130A (en) * | 2017-08-01 | 2018-06-29 | 珠海市魅族科技有限公司 | USB cable, USB interface and adapter |
| CN109155630A (en) * | 2016-05-26 | 2019-01-04 | 高通股份有限公司 | Overvoltage protection system and method |
| US10381787B1 (en) * | 2018-05-21 | 2019-08-13 | Cypress Semiconductor Corporation | Voltage protection for universal serial bus type-C (USB-C) connector systems |
| CN210431388U (en) * | 2019-08-15 | 2020-04-28 | 珠海智融科技有限公司 | USB Type-C's CC pin circuit |
-
2019
- 2019-08-15 CN CN201910752387.9A patent/CN110380721A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120023344A1 (en) * | 2009-10-02 | 2012-01-26 | Rohm Co., Ltd. | Semiconductor apparatus |
| US20170155214A1 (en) * | 2015-11-26 | 2017-06-01 | International Green Chip (Tianjin) Co., Ltd. | Method of and device for protecting usb type-c interface chip when cc pins thereof being at high voltage |
| US20170344098A1 (en) * | 2016-05-26 | 2017-11-30 | Silicon Laboratories Inc. | Vconn Pull-Down Circuits And Related Methods For USB Type-C Connections |
| CN109155630A (en) * | 2016-05-26 | 2019-01-04 | 高通股份有限公司 | Overvoltage protection system and method |
| JP2018013932A (en) * | 2016-07-20 | 2018-01-25 | キヤノン株式会社 | Electronic apparatus |
| CN107870883A (en) * | 2016-09-27 | 2018-04-03 | 恩智浦有限公司 | The dutycycle randomization of c-type USB double actions port is not attached |
| US20180183248A1 (en) * | 2016-12-22 | 2018-06-28 | Asustek Computer Inc. | Charge-discharge device and control method of the same |
| CN108233130A (en) * | 2017-08-01 | 2018-06-29 | 珠海市魅族科技有限公司 | USB cable, USB interface and adapter |
| US10381787B1 (en) * | 2018-05-21 | 2019-08-13 | Cypress Semiconductor Corporation | Voltage protection for universal serial bus type-C (USB-C) connector systems |
| CN210431388U (en) * | 2019-08-15 | 2020-04-28 | 珠海智融科技有限公司 | USB Type-C's CC pin circuit |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111209237A (en) * | 2019-12-20 | 2020-05-29 | 深圳宝龙达信息技术股份有限公司 | Type-C of optional power supply direction changes Type-C connecting wire |
| CN111209237B (en) * | 2019-12-20 | 2023-02-28 | 深圳宝龙达信息技术股份有限公司 | Type-C of optional power supply direction changes Type-C connecting wire |
| CN111509815A (en) * | 2020-05-29 | 2020-08-07 | 维沃移动通信有限公司 | Data line and charging equipment |
| CN116049067A (en) * | 2023-02-10 | 2023-05-02 | 芯动微电子科技(武汉)有限公司 | Dead battery circuit and universal serial bus Type-C equipment |
| CN116049067B (en) * | 2023-02-10 | 2023-08-15 | 芯动微电子科技(武汉)有限公司 | Dead battery circuit and universal serial bus Type-C equipment |
| CN116633328A (en) * | 2023-07-25 | 2023-08-22 | 电子科技大学 | First-stage integrator voltage clamping circuit |
| CN116633328B (en) * | 2023-07-25 | 2023-09-19 | 电子科技大学 | First-stage integrator voltage clamping circuit |
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