CN110377446A - A kind of isomery mixing memory system abnormal restoring method and device - Google Patents

A kind of isomery mixing memory system abnormal restoring method and device Download PDF

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Publication number
CN110377446A
CN110377446A CN201910631633.5A CN201910631633A CN110377446A CN 110377446 A CN110377446 A CN 110377446A CN 201910631633 A CN201910631633 A CN 201910631633A CN 110377446 A CN110377446 A CN 110377446A
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China
Prior art keywords
isomery mixing
fpga
mixing memory
bios
memory system
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CN201910631633.5A
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王龙飞
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Suzhou Wave Intelligent Technology Co Ltd
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Suzhou Wave Intelligent Technology Co Ltd
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Priority to CN201910631633.5A priority Critical patent/CN110377446A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A kind of isomery mixing memory system abnormal restoring method provided herein, comprising: when IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA is started;It sends and removes abnormal data order to NVM, and construct isomery mixing memory using the DRAM memory information and NVM memory information of the first FPGA after abnormal data removing;Control the start-up operation that BIOS executes the corresponding isomery mixing memory system of isomery mixing memory.In this method when IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA is started, and constructs isomery mixing memory using the DRAM memory information and NVM memory information of the first FPGA after abnormal data removing.As it can be seen that this method avoid by being limited on hardware or correlation BIOS limitation in logic, can reduce the development cost of isomery mixing memory system abnormal restoring in the related technology.The application also provides a kind of isomery mixing memory system abnormal restoring device, equipment and computer readable storage medium.

Description

A kind of isomery mixing memory system abnormal restoring method and device
Technical field
This application involves isomery mixing memory system abnormal restoring field, in particular to a kind of isomery mixing memory system is different Normal restoration methods, device, equipment and computer readable storage medium.
Background technique
Isomery mixing memory system needs to control before power-off NVM (Non-Volatile Memory, non-volatile memories Device) completion data write back before power-off, protect the data in memory.If being abnormal power down, need at special program Process is managed to carry out abnormal restoring.Currently, by BIOS carry out control guidance entirely restart process, due on hardware limitation or The limitation of person's correlation BIOS (Basic Input Output System, basic input output system) in logic, is controlled by BIOS Abnormal restoring process processed is difficult to realize sometimes or corresponding development cost is very high.
Therefore, how to reduce the development cost of isomery mixing memory system abnormal restoring is that those skilled in the art need to solve Certainly the technical issues of.
Summary of the invention
The purpose of the application is to provide a kind of isomery mixing memory system abnormal restoring method, device, equipment and computer Readable storage medium storing program for executing can reduce the development cost of isomery mixing memory system abnormal restoring.
In order to solve the above technical problems, the application provides a kind of isomery mixing memory system abnormal restoring method, comprising:
When IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA is started;
It sends and removes abnormal data order to NVM, and in the DRAM after abnormal data removing using the first FPGA Deposit information and NVM memory information building isomery mixing memory;
Control the start-up operation that the BIOS executes the corresponding isomery mixing memory system of the isomery mixing memory.
Preferably, described when IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA Started, comprising:
When the IPMI detects the isomery mixing memory system powered-off fault, it is slow to control the BIOS execution QPI Fast start-up operation;
It receives the BIOS and completes the Restart Signal sent after QPI slow start, and it is quick to control the BIOS execution QPI Start-up operation;
It controls tide FPGA and executes start-up operation.
Preferably, the transmission removes abnormal data order to NVM, and utilizes described first after abnormal data removing The DRAM memory information and NVM memory information of FPGA constructs isomery mixing memory, comprising:
The DRAM memory information is obtained from CPU and is sent to China Tech FPGA, and obtains the NVM from the China Tech FPGA Memory information is sent to the BIOS;
The isomery mixing memory is constructed using the DRAM memory information and the NVM memory information.
Preferably, the control BIOS executes opening for the corresponding isomery mixing memory system of isomery mixing memory Before dynamic operation, further includes:
The China Tech FPGA is configured, and judges whether the China Tech FPGA configures completion;
If the China Tech FPGA configuration is completed, it is corresponding to execute the control BIOS execution isomery mixing memory Isomery mixing memory system start-up operation the step of.
The application also provides a kind of isomery mixing memory system abnormal restoring device, comprising:
Start control module, for when IPMI detects isomery mixing memory system powered-off fault, control BIOS and the One FPGA is started;
Isomery mixing memory constructs module, for transmission removing abnormal data order to NVM, and after abnormal data removing Isomery mixing memory is constructed using the DRAM memory information and NVM memory information of the first FPGA;
Start-up operation execution module executes in the corresponding isomery mixing of the isomery mixing memory for controlling the BIOS The start-up operation of deposit system.
Preferably, the starting control module, comprising:
QPI slow start control unit, for detecting the isomery mixing memory system powered-off fault as the IPMI When, it controls the BIOS and executes QPI slow start operation;
QPI quick start control unit completes the Restart Signal sent after QPI slow start for receiving the BIOS, And it controls the BIOS and executes QPI rapid start-up operation;
FPGA starts control unit, executes start-up operation for controlling tide FPGA.
Preferably, the isomery mixing memory constructs module, comprising:
Memory information interactive unit, for obtaining the DRAM memory information from CPU and being sent to China Tech FPGA, and from institute It states the China Tech FPGA acquisition NVM memory information and is sent to the BIOS;
Isomery mixing memory construction unit, for constructing institute using the DRAM memory information and the NVM memory information State isomery mixing memory.
Preferably, the isomery mixing memory system abnormal restoring device further include:
FPGA configuration module for configuring the China Tech FPGA, and judges whether the China Tech FPGA configures completion;
The start-up operation execution module is specially to work as the China Tech FPGA configuration to complete, then controls the BIOS and execute institute State the module of the start-up operation of the corresponding isomery mixing memory system of isomery mixing memory.
The application also provides a kind of equipment, comprising:
Memory and processor;Wherein, the memory is for storing computer program, and the processor is for executing institute The step of isomery mixing memory system abnormal restoring method described above is realized when stating computer program.
The application also provides a kind of computer readable storage medium, and the computer-readable recording medium storage has computer Program, the computer program realize isomery mixing memory system abnormal restoring method described above when being executed by processor Step.
A kind of isomery mixing memory system abnormal restoring method provided herein, comprising: when IPMI detects isomery When mixing memory system powered-off fault, control BIOS and the first FPGA is started;It sends and removes abnormal data order to NVM, And using in DRAM memory information and NVM memory information the building isomery mixing of the first FPGA after abnormal data removing It deposits;Control the start-up operation that the BIOS executes the corresponding isomery mixing memory system of the isomery mixing memory.
In this method when IPMI detects isomery mixing memory system powered-off fault, controls BIOS and the first FPGA and carry out Starting retransmits and removes abnormal data order to NVM, and the DRAM memory of the first FPGA is utilized after abnormal data removing Information and NVM memory information construct isomery mixing memory, and it is corresponding finally to control the BIOS execution isomery mixing memory The start-up operation of isomery mixing memory system.As it can be seen that this method avoid in the related technology by being limited on hardware or correlation The limitation of BIOS in logic can reduce the development cost of isomery mixing memory system abnormal restoring.The application also provides one kind Isomery mixing memory system abnormal restoring device, equipment and computer readable storage medium, all have above-mentioned beneficial effect, herein It repeats no more.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this The embodiment of application for those of ordinary skill in the art without creative efforts, can also basis The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of flow chart of isomery mixing memory system abnormal restoring method provided by the embodiment of the present application;
Fig. 2 is a kind of structural block diagram of isomery mixing memory system abnormal restoring device provided by the embodiment of the present application.
Specific embodiment
The core of the application is to provide a kind of isomery mixing memory system abnormal restoring method, can reduce in isomery mixing The development cost of deposit system abnormal restoring.Another core of the application is to provide a kind of isomery mixing memory system abnormal restoring dress It sets, equipment and computer readable storage medium.
To keep the purposes, technical schemes and advantages of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application In attached drawing, the technical scheme in the embodiment of the application is clearly and completely described, it is clear that described embodiment is Some embodiments of the present application, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art Every other embodiment obtained without making creative work, shall fall in the protection scope of this application.
Isomery mixing memory system, which needs to control before power-off NVM, to be completed data before power-off and writes back, and is protected in memory Data.If being abnormal power down, special program process flow is needed to carry out abnormal restoring.Currently, by BIOS into Row control guidance entirely restarts process, due to the limitation of limitation or correlation BIOS in logic on hardware, is controlled by BIOS Abnormal restoring process is difficult to realize sometimes or corresponding development cost is very high.A kind of isomery mixing memory system provided by the present application System abnormal restoring method, can reduce the development cost of isomery mixing memory system abnormal restoring.Specifically referring to FIG. 1, Fig. 1 is A kind of flow chart of isomery mixing memory system abnormal restoring method provided by the embodiment of the present application, the isomery mixing memory system System abnormal restoring method specifically includes:
S101, when IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA opened It is dynamic;
IPMI is intelligent platform management interface (Intelligent Platform Management Interface) Abbreviation is a kind of industrial standard for managing the use of peripheral equipment used in the business system based on Intel structure, the standard It is formulated by companies such as Intel, Hewlett-Packard, NEC, Dell computer and SuperMicro.IPMI can provide standard commands and OEM order management control system and hardware device, such as temperature, voltage, fan operating state, power supply status, when needing to machine It is easy to use when large batch of machine is operated in room.BMC (Baseboard Management Controller, substrate pipe Reason controller) be IPMI a kind of specific implementation form.
The appearance of isomery mixing memory have benefited from NVM appearance and modem computer systems for large capacity memory need It asks.Nonvolatile memory is a kind of novel storage medium, with currently used SRAM (Static Random Access Memory, Static RAM) and DRAM (Dynamic Random Access Memory, dynamic RAM) phase Than with data after step-by-step access capability, power-off are not lost, storage density is big, quiescent dissipation is low, dynamic power consumption is high, can be expanded The advantages that malleability is strong;But usually having similar read latency again compared to DRAM, NVM, slow one or several orders of magnitude are write Delay, and write-in number limitation etc., only use NVM and are obviously unable to satisfy the real-time of current computer systems as Installed System Memory Property demand.Based on this, DRAM and NVM can be connected on system bus by isomery mixing memory together, be combined with reasonable manner Isomery memory have many advantages, such as large capacity, high-performance and non-volatile.
Isomery mixing memory system can provide sufficient memory for computer, but when system is abnormal power down (as suddenly Have a power failure or be forced to shut down) when, the data in isomery memory are not written at this time protects back into row, this will will lead to the system and exist It can not normal use after booting next time.By step S101 it is found that when IPMI detects isomery mixing memory system powered-off fault, Control BIOS and the first FPGA is started, and the first FPGA is not especially limited herein, should be by those skilled in the art's root Corresponding setting is made according to actual conditions.
Further, above-mentioned when IPMI detects isomery mixing memory system powered-off fault, control BIOS and first FPGA is started, comprising:
When IPMI detects isomery mixing memory system powered-off fault, control BIOS executes QPI slow start operation;
It receives BIOS and completes the Restart Signal sent after QPI slow start, and control BIOS and execute QPI quick start behaviour Make;
It controls tide FPGA and executes start-up operation.
Specifically, IPMI controls BIOS and carries out QPI slow start, sends after BIOS completion QPI slow start to IPMI heavy Open signal;After IPMI receives the Restart Signal of BIOS triggering, control BIOS carries out QPI quick start;BIOS QPI is quickly opened After the completion of dynamic, control tide FPGA is started, and is connected to CPU and the channel tide FPGA.
S102, transmission removing abnormal data order to NVM, and in the DRAM after abnormal data removing using the first FPGA Deposit information and NVM memory information building isomery mixing memory;
Further, above-mentioned transmission removes abnormal data order to NVM, and utilizes the first FPGA after abnormal data removing DRAM memory information and NVM memory information construct isomery mixing memory, comprising:
DRAM memory information is obtained from CPU and is sent to China Tech FPGA, and is obtained NVM memory information from China Tech FPGA and sent To BIOS;
Isomery mixing memory is constructed using DRAM memory information and NVM memory information.
Specifically, IPMI sends empty litter data command to NVM, and after the completion of junk data empties, IPMI will be obtained from CPU The memory information of the DRAM got is sent to China Tech FPGA, then obtains NVM information from China Tech FPGA again and is sent to BIOS, completes Memory information interaction.
S103, control BIOS execute the start-up operation of the corresponding isomery mixing memory system of isomery mixing memory.
Further, control BIOS execute the corresponding isomery mixing memory system of isomery mixing memory start-up operation it Before, further includes:
China Tech FPGA is configured, and judges whether China Tech FPGA configures completion;
If China Tech FPGA configuration is completed, executes control BIOS and execute the corresponding isomery mixing memory system of isomery mixing memory The step of start-up operation of system.
Specifically, China Tech FPGA is configured, and guides BIOS to complete entire start-up course, operation after having configured China Tech FPGA System will be run to login interface.So far, mixing isomery memory system is completed abnormal restoring and can be used normally.
In this method when IPMI detects isomery mixing memory system powered-off fault, controls BIOS and the first FPGA and carry out Starting retransmits and removes abnormal data order to NVM, and the DRAM memory of the first FPGA is utilized after abnormal data removing Information and NVM memory information construct isomery mixing memory, and it is corresponding finally to control the BIOS execution isomery mixing memory The start-up operation of isomery mixing memory system.As it can be seen that this method avoid in the related technology by being limited on hardware or correlation The limitation of BIOS in logic can reduce the development cost of isomery mixing memory system abnormal restoring.The present invention is complete by IPMI At entire mixing isomery memory system because of system exception recovery operation caused by unexpected power down, a kind of new mixed isomery is provided The abnormal restoring scheme of memory system, while being also convenient for being monitored management for mixing memory using BMC.
Specifically, IPMI detects system exception power down, notifies user to execute system exception recovery operation when being switched on next time, The operation guides BIOS to complete QPI starting first, then configures tide FPGA module, then sends to NVM and removes abnormal data The respective memory information of DRAM and NVM is passed to other side after the completion of removing and constitutes isomery mixing memory by order, junk data, most After configured China Tech FPGA module and guide system to normal boot-strap.
Below to a kind of isomery mixing memory system abnormal restoring device provided by the embodiments of the present application, equipment and computer Readable storage medium storing program for executing is introduced, isomery mixing memory system abnormal restoring device described below, equipment and computer-readable Storage medium can correspond to each other reference with above-described isomery mixing memory system abnormal restoring method.
Referring to FIG. 2, Fig. 2 is a kind of isomery mixing memory system abnormal restoring device provided by the embodiment of the present application Structural block diagram;The isomery mixing memory system abnormal restoring device includes:
Start control module 201, for when IPMI detects isomery mixing memory system powered-off fault, control BIOS with First FPGA is started;
Isomery mixing memory constructs module 202, removes abnormal data order to NVM for sending, and clear in abnormal data Isomery mixing memory is constructed using the DRAM memory information of the first FPGA and NVM memory information after removing;
Start-up operation execution module 203 executes the corresponding isomery mixing memory system of isomery mixing memory for controlling BIOS The start-up operation of system.
Based on the above embodiment, start control module 201 in the present embodiment, comprising:
QPI slow start control unit, for controlling when IPMI detects isomery mixing memory system powered-off fault BIOS executes QPI slow start operation;
QPI quick start control unit is completed the Restart Signal sent after QPI slow start for receiving BIOS, and is controlled BIOS processed executes QPI rapid start-up operation;
FPGA starts control unit, executes start-up operation for controlling tide FPGA.
Based on the above embodiment, isomery mixing memory constructs module 202 in the present embodiment, comprising:
Memory information interactive unit, for obtaining DRAM memory information from CPU and being sent to China Tech FPGA, and from China Tech FPGA obtains NVM memory information and is sent to BIOS;
Isomery mixing memory construction unit, for using in DRAM memory information and the building isomery mixing of NVM memory information It deposits.
Based on the above embodiment, isomery mixing memory system abnormal restoring device in the present embodiment further include:
FPGA configuration module for configuring China Tech FPGA, and judges whether China Tech FPGA configures completion;
Start-up operation execution module is specially to work as China Tech FPGA configuration to complete, then controls BIOS and execute isomery mixing memory pair The module of the start-up operation for the isomery mixing memory system answered.
The application also provides a kind of equipment, comprising:
Memory and processor;Wherein, memory is for storing computer program, and processor is for executing computer program The step of isomery mixing memory system abnormal restoring method of the above-mentioned any embodiment of Shi Shixian.
The application also provides a kind of computer readable storage medium, and computer-readable recording medium storage has computer journey Sequence realizes the isomery mixing memory system abnormal restoring method of above-mentioned any embodiment when computer program is executed by processor Step.
The computer readable storage medium may include: USB flash disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic or disk etc. is various to deposit Store up the medium of program code.
Each embodiment is described in a progressive manner in specification, the highlights of each of the examples are with other realities The difference of example is applied, the same or similar parts in each embodiment may refer to each other.For embodiment provide system and Speech, since it is corresponding with the method that embodiment provides, so being described relatively simple, related place is referring to method part illustration ?.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered Think beyond the scope of this invention.
The step of method described in conjunction with the examples disclosed in this document or algorithm, can directly be held with hardware, processor The combination of capable software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only deposit Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technology In any other form of storage medium well known in field.
Above to a kind of isomery mixing memory system abnormal restoring method, device, equipment and calculating provided herein Machine readable storage medium storing program for executing is described in detail.Specific case used herein carries out the principle and embodiment of the application It illustrates, the description of the example is only used to help understand the method for the present application and its core ideas.It should be pointed out that for For those skilled in the art, under the premise of not departing from the application principle, if can also be carried out to the application Dry improvement and modification, these improvement and modification are also fallen into the protection scope of the claim of this application.

Claims (10)

1. a kind of isomery mixing memory system abnormal restoring method characterized by comprising
When IPMI detects isomery mixing memory system powered-off fault, control BIOS and the first FPGA is started;
It sends and removes abnormal data order to NVM, and believed after abnormal data removing using the DRAM memory of the first FPGA Breath and NVM memory information construct isomery mixing memory;
Control the start-up operation that the BIOS executes the corresponding isomery mixing memory system of the isomery mixing memory.
2. isomery mixing memory system abnormal restoring method according to claim 1, which is characterized in that described when IPMI is examined When measuring isomery mixing memory system powered-off fault, control BIOS and the first FPGA is started, comprising:
When the IPMI detects the isomery mixing memory system powered-off fault, controls the BIOS execution QPI and open at a slow speed Dynamic operation;
It receives the BIOS and completes the Restart Signal sent after QPI slow start, and control the BIOS and execute QPI quick start Operation;
It controls tide FPGA and executes start-up operation.
3. isomery mixing memory system abnormal restoring method according to claim 2, which is characterized in that the transmission is removed Abnormal data order is believed to NVM, and after abnormal data removing using the DRAM memory information and NVM memory of the first FPGA Breath building isomery mixing memory, comprising:
The DRAM memory information is obtained from CPU and is sent to China Tech FPGA, and obtains the NVM memory from the China Tech FPGA Information is sent to the BIOS;
The isomery mixing memory is constructed using the DRAM memory information and the NVM memory information.
4. isomery mixing memory system abnormal restoring method according to claim 3, which is characterized in that described in the control BIOS is executed before the start-up operation of the corresponding isomery mixing memory system of the isomery mixing memory, further includes:
The China Tech FPGA is configured, and judges whether the China Tech FPGA configures completion;
If the China Tech FPGA configuration is completed, it is corresponding different to execute the control BIOS execution isomery mixing memory The step of start-up operation of structure mixing memory system.
5. a kind of isomery mixing memory system abnormal restoring device characterized by comprising
Start control module, for controlling BIOS and first when IPMI detects isomery mixing memory system powered-off fault FPGA is started;
Isomery mixing memory constructs module, utilizes for transmission removing abnormal data order to NVM, and after abnormal data removing The DRAM memory information and NVM memory information of first FPGA constructs isomery mixing memory;
Start-up operation execution module executes the corresponding isomery mixing memory system of the isomery mixing memory for controlling the BIOS The start-up operation of system.
6. isomery mixing memory system abnormal restoring device according to claim 5, which is characterized in that the starting control Module, comprising:
QPI slow start control unit, for controlling when the IPMI detects the isomery mixing memory system powered-off fault It makes the BIOS and executes QPI slow start operation;
QPI quick start control unit is completed the Restart Signal sent after QPI slow start for receiving the BIOS, and is controlled It makes the BIOS and executes QPI rapid start-up operation;
FPGA starts control unit, executes start-up operation for controlling tide FPGA.
7. isomery mixing memory system abnormal restoring device according to claim 6, which is characterized in that the isomery mixing Memory constructs module, comprising:
Memory information interactive unit, for obtaining the DRAM memory information from CPU and being sent to China Tech FPGA, and from the China Section FPGA obtains the NVM memory information and is sent to the BIOS;
Isomery mixing memory construction unit, it is described different for being constructed using the DRAM memory information and the NVM memory information Structure mixing memory.
8. isomery mixing memory system abnormal restoring device according to claim 7, which is characterized in that further include:
FPGA configuration module for configuring the China Tech FPGA, and judges whether the China Tech FPGA configures completion;
The start-up operation execution module is specially to work as the China Tech FPGA configuration to complete, then it is described different to control the BIOS execution The module of the start-up operation of the corresponding isomery mixing memory system of structure mixing memory.
9. a kind of equipment characterized by comprising
Memory and processor;Wherein, the memory is for storing computer program, the processor by execute it is described based on The step of isomery mixing memory system abnormal restoring methods as described in any item such as Claims 1-4 are realized when calculation machine program.
10. a kind of computer readable storage medium, which is characterized in that the computer-readable recording medium storage has computer journey Sequence realizes such as Claims 1-4 described in any item isomery mixing memory systems when the computer program is executed by processor The step of abnormal restoring method.
CN201910631633.5A 2019-07-12 2019-07-12 A kind of isomery mixing memory system abnormal restoring method and device Withdrawn CN110377446A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114911650A (en) * 2022-07-19 2022-08-16 浩鲸云计算科技股份有限公司 Method and system for retrogradable security reinforcement based on RAMOS system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114911650A (en) * 2022-07-19 2022-08-16 浩鲸云计算科技股份有限公司 Method and system for retrogradable security reinforcement based on RAMOS system
CN114911650B (en) * 2022-07-19 2022-10-18 浩鲸云计算科技股份有限公司 Method and system for retrogradable security reinforcement based on RAMOS

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Application publication date: 20191025

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