CN110376811A - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN110376811A CN110376811A CN201910509010.0A CN201910509010A CN110376811A CN 110376811 A CN110376811 A CN 110376811A CN 201910509010 A CN201910509010 A CN 201910509010A CN 110376811 A CN110376811 A CN 110376811A
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- 239000000758 substrate Substances 0.000 title claims abstract description 95
- 239000011159 matrix material Substances 0.000 claims abstract description 60
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- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000010410 layer Substances 0.000 description 237
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- 239000000463 material Substances 0.000 description 7
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- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 1
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- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- OQNXPQOQCWVVHP-UHFFFAOYSA-N [Si].O=[Ge] Chemical compound [Si].O=[Ge] OQNXPQOQCWVVHP-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an array substrate and a display device. The array substrate comprises a substrate; the black matrix layer is arranged on one surface of the substrate base plate, and a bulge is arranged on one side of the black matrix layer, which is far away from the substrate base plate; the first insulating layer is arranged on one side, away from the substrate base plate, of the black matrix layer and is jacked up by the bulges to form a first protruding part; and the first conducting layer and the second conducting layer are positioned on one side of the first insulating layer, which is deviated from the black matrix layer, and are respectively positioned on two sides of the first protruding part. The technical scheme of the invention can avoid short circuit and ensure normal display of the picture.
Description
Technical field
The present invention relates to field of display technology, in particular to the display of a kind of array substrate and the application array substrate fills
It sets.
Background technique
In traditional display panel, in the case that aperture opening ratio is more demanding, spacing very little between different conductive electrodes, from
And be easy to cause in exposure and expose not open, and conductive electrode is made to link together, short circuit phenomenon is formed, and then it is different to generate picture
Often.
Above content is only used to facilitate the understanding of the technical scheme, and is not represented and is recognized that above content is existing skill
Art.
Summary of the invention
The main object of the present invention is to provide a kind of array substrate, it is intended to can avoid the occurrence of short circuit, it is ensured that picture is shown
Normally.
To achieve the above object, array substrate proposed by the present invention, comprising:
Underlay substrate；
Black-matrix layer, the black-matrix layer are set to a surface of the underlay substrate, and the black-matrix layer deviates from
The side of the underlay substrate is equipped with protrusion；
First insulating layer, first insulating layer are set to the side that the black-matrix layer deviates from the underlay substrate, and
First protruding portion is formed by the protrusion jacking；And
First conductive layer and the second conductive layer, first conductive layer and second conductive layer are located at first insulation
Layer deviates from the side of the black-matrix layer, and is located at the two sides of first protruding portion.
Optionally, the black-matrix layer includes body layer, and the protrusion is convexly equipped in the body layer；
The Xray films of the protrusion are formed with sequentially connected first linkage section, the second linkage section is connected with third
Section, first linkage section, the third linkage section are connected to the body layer, and set between the body layer in angle
It sets, second linkage section is parallel to horizontal plane setting.
Optionally, first linkage section and the third linkage section are symmetrically disposed on the two sides of second linkage section.
Optionally, first insulating layer have upper and lower surfaces setting up and down, the upper surface and it is described under
The distance between surface is identical.
Optionally, first conductive layer is source layer, and second conductive layer is drain electrode layer；
The array substrate further includes metal layer and semiconductor layer, the metal layer be set to the black-matrix layer with it is described
It between first insulating layer, and is jacked by the protrusion and forms the second protruding portion, the semiconductor layer is set to first insulation
Layer deviates from the side of the metal layer, and is jacked by the protrusion and form third protruding portion, the source layer, the drain electrode layer
It is located at the two sides of the third protruding portion.
Optionally, the semiconductor layer includes doped layer and active layer, and the doped layer is located at the top of the active layer,
The active layer is adjacent to first insulating layer.
Optionally, the source layer and the drain electrode layer cover matcoveredn.
Optionally, first conductive layer is pixel electrode layer, and second conductive layer is common electrode layer；
The array substrate further includes second insulating layer, and the second insulating layer is set to first insulating layer away from described
The side of underlay substrate, and jacked by the protrusion and form the 4th protruding portion, the pixel electrode layer, the common electrode layer
It is located at the two sides of the 4th protruding portion.
Optionally, underlay substrate；
Black-matrix layer, the black-matrix layer are set to a surface of the underlay substrate, and the black-matrix layer deviates from
The side of the underlay substrate is equipped with protrusion；
First insulating layer, first insulating layer are set to the side that the black-matrix layer deviates from the underlay substrate, and
First protruding portion is formed by the protrusion jacking；And
First conductive layer and the second conductive layer, first conductive layer and second conductive layer are located at first insulation
Layer deviates from the side of the black-matrix layer, and is located at the two sides of first protruding portion；
The black-matrix layer includes body layer, and the protrusion is convexly equipped in the body layer；
The Xray films of the protrusion are formed with sequentially connected first linkage section, the second linkage section is connected with third
Section, first linkage section, second linkage section are connected to the body layer, and set between the body layer in angle
It sets, second linkage section is parallel to horizontal plane setting；
First insulating layer has upper and lower surfaces setting up and down, between the upper surface and the lower surface
Distance it is identical.
The present invention also proposes a kind of display device, including display panel and the backlight module being connect with the display panel,
The display panel includes array substrate and the color membrane substrates that are oppositely arranged with the array substrate, and the array substrate includes:
Underlay substrate；
Black-matrix layer, the black-matrix layer are set to a surface of the underlay substrate, and the black-matrix layer deviates from
The side of the underlay substrate is equipped with protrusion；
First insulating layer, first insulating layer are set to the side that the black-matrix layer deviates from the underlay substrate, and
First protruding portion is formed by the protrusion jacking；And
First conductive layer and the second conductive layer, first conductive layer and second conductive layer are located at first insulation
Layer deviates from the side of the black-matrix layer, and is located at the two sides of first protruding portion.
In technical solution of the present invention, set on underlay substrate black-matrix layer away from underlay substrate side be equipped with it is convex
It rises, to make to be jacked away from the first insulating layer of underlay substrate side by the protrusion set on black-matrix layer, it is prominent to form first
Portion, so that being located at the first conductive layer and the second conductive layer that the first insulating layer deviates from black-matrix layer side, by the first protruding portion
It is spaced apart, and is located at the two sides of the first protruding portion, and then make the current-carrying part of the first conductive layer and the formation of the second conductive layer alone
And it is mutually interference-free, it effectively avoids and short circuit phenomenon occurs, it is ensured that show the normal of picture.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the overlooking structure diagram of one embodiment part of array substrate of the present invention；
Fig. 2 is the schematic cross-section in the direction A-A in Fig. 1；
Fig. 3 is the schematic cross-section of another embodiment of array substrate of the present invention；
Fig. 4 is the schematic cross-section of the another embodiment of array substrate of the present invention；
Fig. 5 is the schematic cross-section of array substrate another embodiment of the present invention.
Drawing reference numeral explanation:
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall within the protection scope of the present invention.
It is to be appreciated that the directional instruction (such as up, down, left, right, before and after ...) of institute is only used in the embodiment of the present invention
In explaining in relative positional relationship, the motion conditions etc. under a certain particular pose (as shown in the picture) between each component, if should
When particular pose changes, then directionality instruction also correspondingly changes correspondingly.
In the present invention unless specifically defined or limited otherwise, term " connection ", " fixation " etc. shall be understood in a broad sense,
For example, " fixation " may be a fixed connection, it may be a detachable connection, or integral；It can be mechanical connection, be also possible to
Electrical connection；It can be directly connected, the connection inside two elements or two can also be can be indirectly connected through an intermediary
The interaction relationship of a element, unless otherwise restricted clearly.It for the ordinary skill in the art, can basis
Concrete condition understands the concrete meaning of above-mentioned term in the present invention.
In addition, the description for being such as related to " first ", " second " in the present invention is used for description purposes only, and should not be understood as
Its relative importance of indication or suggestion or the quantity for implicitly indicating indicated technical characteristic.Define as a result, " first ",
The feature of " second " can explicitly or implicitly include at least one of the features.In addition, the technical side between each embodiment
Case can be combined with each other, but must be based on can be realized by those of ordinary skill in the art, when the combination of technical solution
Conflicting or cannot achieve when occur will be understood that the combination of this technical solution is not present, also not the present invention claims guarantor
Within the scope of shield.
Referring to Fig.1, Fig. 2, the present invention propose a kind of array substrate.
In embodiments of the present invention, the array substrate include: underlay substrate 10, black-matrix layer 20, the first insulating layer 30,
First conductive layer 41 and the second conductive layer 42.
Wherein, black-matrix layer 20 is set to a surface of underlay substrate 10, and black-matrix layer 20 is away from underlay substrate 10
Side is equipped with protrusion 21；First insulating layer 30 is set to the side that black-matrix layer 20 deviates from underlay substrate 10, and is pushed up by protrusion 21
It rises and forms the first protruding portion 31；First conductive layer 41 and the second conductive layer 42 are located at the first insulating layer 30 away from black-matrix layer
20 side, and it is located at the two sides of the first protruding portion 31.
In the present embodiment, the material of underlay substrate 10 can be transparency glass plate, not influence passing through for backlight, to provide
The carrier on basis, and underlay substrate 10 is non-conductive.Black-matrix layer 20 can be chromium based material or resin based material, by graphical
The mode of processing is formed on underlay substrate 10；Protrusion 21 can be the part for being thickened by black-matrix layer 20 and being formed, that is, convex
Playing 21 can formed as an integrated structure with black-matrix layer 20.Specifically, array substrate further includes being set to black-matrix layer 20
Color blocking layer (not shown), black-matrix layer 20 and color blocking layer be all by the way that photoresist raw material is coated on 10 surface of underlay substrate,
Through overexposure, development, drying and etc. formation, color blocking layer is corresponded in black-matrix layer 20 needs position to be shown, makes light transmission
Area, other not corresponding positions then form alternatively non-transparent district, and the light source that thus backlight module issues can pass through transparent area and show.
Nonconducting resin material production can be used in first insulating layer 30, since the first protruding portion 31 is the first insulating layer 30
It is arched upward and formed by 21 jacking of protrusion, that is, the profile of 30 longitudinal section of the first insulating layer forms "Ji" type, so by the first conduction
Layer 41 and the second conductive layer 42 are spaced and open.
Therefore, technical solution of the present invention is by deviating from underlay substrate 10 in the black-matrix layer 20 for being set to underlay substrate 10
Side setting protrusion 21, thus make be set to black-matrix layer 20 away from 10 side of underlay substrate the first insulating layer 30 it is convex by this
21 jackings are played, the first protruding portion 31 is formed, so that be located at the first insulating layer 30 away from 20 side of black-matrix layer first is conductive
Layer 41 and the second conductive layer 42, are spaced apart by the first protruding portion 31, and are located at the two sides of the first protruding portion 31, and then make first to lead
Electric layer 41 and the second conductive layer 42 form current-carrying part alone and mutually interference-free, effectively avoid and short circuit phenomenon occur,
Ensure to show the normal of picture.
Referring to Fig. 2, in one embodiment of this invention, the black-matrix layer 20 includes body layer 22, raised 21 projections
In body layer 22；The Xray films of protrusion 21 are formed with sequentially connected first linkage section, 211 second linkage section 212 and third
Linkage section 213, the first linkage section 211, third linkage section 213 are connected to body layer 22, and set between body layer 22 in angle
It sets, the second linkage section 212 is parallel to horizontal plane setting.In practical applications, the first conductive layer 41 and the second conductive layer are being made
It is the metallic diaphragm by monolith by exposure-processed when 42, exposes open form into 42 two parts of the first conductive layer 41 and the second conductive layer,
And in exposure process, it is smaller due to exposing the gap between the first conductive layer 41 and the second conductive layer 42 opened, make the first conduction
Layer 41 and the second phenomenon " separated but still in each other's thoughts " easy to form between conductive layer 42 and generate short circuit.In the present embodiment, protrusion 21 is indulged
Cross section profile be it is wide at the top and narrow at the bottom trapezoidal, therefore, by setting protrusion 21, metallic diaphragm is made to correspond to the inclined part of protrusion 21
Film quality it is more loose, that is, the first linkage section 211 of the protrusion 21 and corresponding 50 film quality of metal layer of third linkage section 213 compared with
Pine is easy to open loose membranous exposure, the first conductive layer 41 and second is so effectively avoided to lead when by exposure-processed
" separated but still in each other's thoughts " phenomenon is formed between electric layer 42 and causes short circuit, and it is normal to guarantee that picture is shown.
Further, since the second linkage section 212 is prominent and is parallel to horizontal plane, that is, it is higher that the second linkage section 212 is in topography
Position, therefore, when exposure has metallic fine particle, the metallic fine particle positioned at the second linkage section 212 of prominent position is easy
It in development and etching process, is etched away by developer solution or etching solution, it is conductive to greatly reduce the first conductive layer 41 and second
Metallic fine particle between layer 42 reduces the risk of short circuit.
Optionally, the first linkage section 211 and third linkage section 213 are symmetrically disposed on the two sides of the second linkage section 212.That is,
The Xray films of protrusion 21 are isosceles trapezoid, so that the first linkage section 211 and the corresponding metal film of third linkage section 213
Porousness is suitable, in exposure process, easily can expose 21 two side portions of protrusion and open, guarantee that the two sides that exposure is formed are conductive
Part does not interfere with each other influence, further decreases short-circuit risks.
With continued reference to Fig. 2, in one embodiment of this invention, the first insulating layer 30 has upper surface 301 setting up and down
With lower surface 302, upper surface 301 is identical as the distance between lower surface 302, that is, the first insulating layer 30 is prominent in formation first
The thickness at 31 position of portion is identical as the thickness at not formed first protruding portion, 31 position, in this way, protrusion is arranged in black-matrix layer 20
In the case where 21, the first insulating layer 30 of guarantee is flat layered structures, is avoided because each section thickness of the first insulating layer 30 is different, and
Influence the characteristic of thin film transistor (TFT) (Thin Film Transistor, TFT).Simultaneously as 30 upper surface 301 of the first insulating layer
The distance between lower surface 302 is identical, but also the first conductive layer 41 and the second conductive layer 42 and black-matrix layer 20 and
Distance having the same between other TFT components, therefore it is identical to guarantee that the first conductive layer 41 and the second conductive layer 42 have
Electric conductivity, TFT characteristic and picture display effect are more preferable.
In one embodiment of the invention, the first conductive layer 41 is source layer, and the second conductive layer 42 is drain electrode layer；Array substrate is also
Including metal layer 50 and semiconductor layer 60, metal layer 50 is set between black-matrix layer 20 and the first insulating layer 30, and raised
21 jack and form the second protruding portion 51, and semiconductor layer 60 is set to the side that the first insulating layer 30 deviates from metal layer 50, and convex
It plays 21 jackings and forms third protruding portion 61, the source layer, the drain electrode layer are located at the two sides of third protruding portion 61.
In the present embodiment, metal layer 50 can be gate electrode, and the first insulating layer 30 is gate insulating layer, be formed in the grid
10 upper surface 301 of electrode and underlay substrate, covering grid electrode, gate insulating layer plays insulating effect.First insulating layer 30 can be with
Using silicon nitride films such as SiNx, but oxide-insulator can also be used as insulating film, i.e., oxide-insulator is used as grid
Insulating layer.In the case, the dielectric constant of oxide insulating film is bigger, is more conducive to the work of thin film transistor (TFT).In addition, absolutely
Edge is the bigger the better.Semiconductor layer 60 is formed in the gate insulating layer upper surface 301, and is located above the gate electrode, institute
Semiconductor layer 60 is stated to be formed by silicon germanium oxide (SixGeyOz).
It is appreciated that since protrusion 21 is arranged in black-matrix layer 20, so that being sequentially arranged in black-matrix layer 20 1
The metal layer 50 of side, the first insulating layer 30 and semiconductor layer 60 are arched upward by jacking and are protruded, that is, protrusion 21 pushes up metal layer 50
Rise formed the second protruding portion 51, the second protruding portion 51 arch upward the first insulating layer 30 formed the first protruding portion 31, the first protruding portion 31
The semiconductor layer 60 that arches upward forms third protruding portion 61, and source layer and drain electrode layer are spaced and are opened by third protruding portions 61, so exist
In the case where not influencing TFT characteristic, effectively avoids and occur short circuit between source layer and drain electrode layer, it is ensured that show picture just
Often.
Specifically, referring to figure 3., semiconductor layer 60 includes doped layer 601 and active layer 602, and doped layer 601 is located at active
The top of layer 602, active layer 602 is adjacent to the first insulating layer 30.Specifically, N-shaped can be adulterated in doped layer 601 partly to lead
Body, for example, DOPOS doped polycrystalline silicon；Active layer 602 is luminous zone, with a thickness of 0.1~0.2 μm or so.In display panel, such as liquid
LCD panel is the control by electric field to liquid crystal molecule direction of rotation, changes the polarization state of light, with this by polarizer reality
Penetrating and stopping for existing optical path, realizes the purpose of display.And compared to amorphous silicon, by using polysilicon in doped layer 601,
The electron mobility in semiconductor layer 60 can be improved, display effect is more preferable.
In one embodiment of the invention, referring to figure 4., the source layer and the drain electrode layer cover matcoveredn 80.Wherein,
Protective layer 80 can use material identical with the first insulating layer 30, have insulating properties, be covered in source layer and drain electrode layer, protect
Source layer and drain electrode layer are mutually interference-free, it is ensured that picture is shown normally.
In an other embodiment of the invention, referring to Fig. 5, the first conductive layer 41 is pixel electrode layer, the second conductive layer 42
For common electrode layer；Array substrate further includes second insulating layer 70, and second insulating layer 70 is set to the first insulating layer 30 and deviates from substrate
The side of substrate 10, and the 4th protruding portion 71 is formed by 21 jacking of protrusion, pixel electrode layer, common electrode layer are located at the
The two sides of four protruding portions 71.Wherein, second insulating layer 70 is for will be in pixel electrode layer and common electrode layer and thin film transistor (TFT)
Data line etc. be isolated.In the present embodiment, protrusion 21 in black-matrix layer 20 jacking of first insulating layer 30 is arched upward and
The first protruding portion 31 is formed, second insulating layer 70 is then arched upward by the jacking of the first protruding portion 31 and is formed with the 4th protruding portion 71.?
In display panel, when aperture opening ratio is more demanding, the distance between pixel electrode layer and common electrode layer are relatively close, thus pass through by
Pixel electrode layer and public electrode are placed on the two sides of the 4th protruding portion 71, so that pixel electrode layer and common electrode layer are spaced
It comes, prevents the conductive layer short circuit between unlike signal, guarantee that picture is normally shown.
The present invention also proposes a kind of display device (not shown), which includes display panel and backlight module, with
And it is located in the liquid crystal layer between array substrate and color membrane substrates, array substrate and color membrane substrates and sealing sky is formed by sealing frame
Between, liquid crystal layer is located in the sealing space.The display panel includes color membrane substrates and the array base being oppositely arranged with color membrane substrates
Plate, the specific structure of the array substrate is referring to above-described embodiment, since this display device uses the complete of above-mentioned all embodiments
Portion's technical solution, therefore at least all beneficial effects brought by the technical solution with above-described embodiment, herein no longer one by one
Repeat, wherein display device can be liquid crystal display, specifically, can for television display, computer monitor or other
The display screen of medicine, engineering science detecting instrument can also be mobile phone display screen or the display screen of wearable device.
Color membrane substrates are made of glass substrate, light shield layer, color layer, protective film and conductive film.In TFT LCD
In, glass substrate need to use alkali-free glass.Light shield layer is the black matrix" for making antireflection on the glass substrate, is prevented between picture element
Light leakage, and increase color contrast, the material of light shield layer uses Resin materials more at present.Color layer is mainly with chromatic photoresist
As filter membranous layer, ingredient includes the polymer electrolyte resinae bonding agent and dyestuff or pigment class of high transparency and high-fire resistance
Colorant, make transparent macromolecule resin have color, need to generally have fast light, heat resistance is good, color saturation it is high with penetrate
The features such as property is good.Protective film is to protect chromatic filter layer and increase the flatness on surface.Conductive film is public electrode,
For forming potential difference with the pixel electrode layer of array substrate, to be driven to liquid crystal molecule.
Backlight module is mainly used for providing the uniform and preferable light source of brightness for display device.Backlight module has generally comprised
Light source, light guide sheet, reflector plate and optical diaphragm, reflector plate can be the reflectance coating coated in light guide plate surface.Light guide sheet
Light source can be converted to uniform area source by point light source, the setting of reflector plate can prevent the light for injecting light guide plate from deviating from
The side of exit facet is projected, and is reflected back toward in light guide plate, can be prevented the waste of luminous energy, be effectively improved the utilization of light
Rate.Backlight is provided by above-mentioned backlight module, display device can be made to obtain better display effect.
The above description is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all at this
Under the inventive concept of invention, using equivalent structure transformation made by description of the invention and accompanying drawing content, or directly/use indirectly
It is included in other related technical areas in scope of patent protection of the invention.
Claims (10)
1. a kind of array substrate, which is characterized in that the array substrate includes:
Underlay substrate；
Black-matrix layer, the black-matrix layer are set to a surface of the underlay substrate, and the black-matrix layer is away from described
The side of underlay substrate is equipped with protrusion；
First insulating layer, first insulating layer are set to the side that the black-matrix layer deviates from the underlay substrate, and by institute
It states protrusion jacking and forms the first protruding portion；And
First conductive layer and the second conductive layer, first conductive layer and second conductive layer are located at first insulating layer back
Side from the black-matrix layer, and it is located at the two sides of first protruding portion.
2. array substrate as described in claim 1, which is characterized in that the black-matrix layer includes body layer, the protrusion
It is convexly equipped in the body layer；
The Xray films of the protrusion are formed with sequentially connected first linkage section, the second linkage section and third linkage section, institute
State the first linkage section, the third linkage section is connected to the body layer, and between the body layer in angle be arranged, it is described
Second linkage section is parallel to horizontal plane setting.
3. array substrate as claimed in claim 2, which is characterized in that first linkage section and the third linkage section are symmetrical
It is set to the two sides of second linkage section.
4. array substrate as described in claim 1, which is characterized in that first insulating layer has upper surface setting up and down
And lower surface, the upper surface are identical as the distance between the lower surface.
5. such as the described in any item array substrates of Claims 1-4, which is characterized in that first conductive layer is source layer, institute
Stating the second conductive layer is drain electrode layer；
The array substrate further includes metal layer and semiconductor layer, and the metal layer is set to the black-matrix layer and described first
It between insulating layer, and is jacked by the protrusion and forms the second protruding portion, the semiconductor layer is carried on the back set on first insulating layer
Side from the metal layer, and jacked by the protrusion and form third protruding portion, the source layer, drain electrode layer difference
Positioned at the two sides of the third protruding portion.
6. array substrate as claimed in claim 5, which is characterized in that the semiconductor layer includes doped layer and active layer, described
Doped layer is located at the top of the active layer, and the active layer is adjacent to first insulating layer.
7. array substrate as claimed in claim 5, which is characterized in that the source layer and the drain electrode layer cover matcoveredn.
8. such as the described in any item array substrates of Claims 1-4, which is characterized in that first conductive layer is pixel electrode
Layer, second conductive layer are common electrode layer；
The array substrate further includes second insulating layer, and the second insulating layer is set to first insulating layer and deviates from the substrate
The side of substrate, and jacked by the protrusion and form the 4th protruding portion, the pixel electrode layer, common electrode layer difference
Positioned at the two sides of the 4th protruding portion.
9. a kind of array substrate, which is characterized in that the array substrate includes:
Underlay substrate；
Black-matrix layer, the black-matrix layer are set to a surface of the underlay substrate, and the black-matrix layer is away from described
The side of underlay substrate is equipped with protrusion；
First insulating layer, first insulating layer are set to the side that the black-matrix layer deviates from the underlay substrate, and by institute
It states protrusion jacking and forms the first protruding portion；And
First conductive layer and the second conductive layer, first conductive layer and second conductive layer are located at first insulating layer back
Side from the black-matrix layer, and it is located at the two sides of first protruding portion；
The black-matrix layer includes body layer, and the protrusion is convexly equipped in the body layer；
The Xray films of the protrusion are formed with sequentially connected first linkage section, the second linkage section and third linkage section, institute
State the first linkage section, second linkage section is connected to the body layer, and between the body layer in angle be arranged, it is described
Second linkage section is parallel to horizontal plane setting；
First insulating layer have upper and lower surfaces setting up and down, between the upper surface and the lower surface away from
From identical.
10. a kind of display device, which is characterized in that including display panel and the backlight module being connect with the display panel, institute
Stating display panel includes array substrate as described in any in claim 1 to 9 and the coloured silk being oppositely arranged with the array substrate
Ilm substrate.
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| CN201910509010.0A CN110376811A (en) | 2019-06-11 | 2019-06-11 | Array substrate and display device |
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| CN201910509010.0A CN110376811A (en) | 2019-06-11 | 2019-06-11 | Array substrate and display device |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030058214A (en) * | 2001-12-29 | 2003-07-07 | 엘지.필립스 엘시디 주식회사 | A Black Matrix on Array type Liquid Crystal Display Device using A Back Face Exposure and Method of Fabricating the same |
| CN101676779A (en) * | 2005-06-30 | 2010-03-24 | 株式会社半导体能源研究所 | Liquid crystal display device and method for manufacturing the same |
| CN101825815A (en) * | 2009-03-06 | 2010-09-08 | 北京京东方光电科技有限公司 | TFT (Thin Film Transistor)-LCD (Liquid Crystal Display) array baseplate and manufacturing method thereof |
| CN103268855A (en) * | 2012-12-19 | 2013-08-28 | 上海天马微电子有限公司 | Polycrystalline silicon forming method, TFT array substrate manufacturing method and display device |
| CN104360529A (en) * | 2014-11-26 | 2015-02-18 | 深圳市华星光电技术有限公司 | TFT (thin film transistor) substrate and manufacturing method thereof |
| CN104765186A (en) * | 2015-03-24 | 2015-07-08 | 深圳市华星光电技术有限公司 | Display panel and display device |
| CN106353944A (en) * | 2016-11-04 | 2017-01-25 | 京东方科技集团股份有限公司 | Array base plate, manufacturing method of array base plate, display panel and display device |
-
2019
- 2019-06-11 CN CN201910509010.0A patent/CN110376811A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030058214A (en) * | 2001-12-29 | 2003-07-07 | 엘지.필립스 엘시디 주식회사 | A Black Matrix on Array type Liquid Crystal Display Device using A Back Face Exposure and Method of Fabricating the same |
| CN101676779A (en) * | 2005-06-30 | 2010-03-24 | 株式会社半导体能源研究所 | Liquid crystal display device and method for manufacturing the same |
| CN101825815A (en) * | 2009-03-06 | 2010-09-08 | 北京京东方光电科技有限公司 | TFT (Thin Film Transistor)-LCD (Liquid Crystal Display) array baseplate and manufacturing method thereof |
| CN103268855A (en) * | 2012-12-19 | 2013-08-28 | 上海天马微电子有限公司 | Polycrystalline silicon forming method, TFT array substrate manufacturing method and display device |
| CN104360529A (en) * | 2014-11-26 | 2015-02-18 | 深圳市华星光电技术有限公司 | TFT (thin film transistor) substrate and manufacturing method thereof |
| CN104765186A (en) * | 2015-03-24 | 2015-07-08 | 深圳市华星光电技术有限公司 | Display panel and display device |
| CN106353944A (en) * | 2016-11-04 | 2017-01-25 | 京东方科技集团股份有限公司 | Array base plate, manufacturing method of array base plate, display panel and display device |
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