CN110348250A - The hardware spending optimization method and system of multichain formula Hash stack - Google Patents
The hardware spending optimization method and system of multichain formula Hash stack Download PDFInfo
- Publication number
- CN110348250A CN110348250A CN201910559199.4A CN201910559199A CN110348250A CN 110348250 A CN110348250 A CN 110348250A CN 201910559199 A CN201910559199 A CN 201910559199A CN 110348250 A CN110348250 A CN 110348250A
- Authority
- CN
- China
- Prior art keywords
- hash
- project
- queue
- stack
- multichain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
Abstract
The embodiment of the present invention provides the hardware spending optimization method and system of a kind of multichain formula Hash stack, this method comprises: the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple projects, and one chain type Hash stack of each sports representative, each chain type Hash stack is for storing the input and output of a Hash operation；When corresponding project in transmitting queue is sent into the input of Hash operation, which is set to and is lined up calculating state；After hash module terminates calculating state, whether there is also in the project for being lined up calculating state in inquiry transmitting queue；If it exists, then hash module calculates the Hash operation in next project according to Queue sequence.The embodiment of the present invention is middle compared with the prior art to reduce hardware spending using the technical solution of N times of hash module, plays the acceleration effect of multichain and shadow cache.
Description
Technical field
The present invention relates to field of computer technology, optimize more particularly, to a kind of hardware spending of multichain formula Hash stack
Method and system.
Background technique
Chain type Hash stack is a kind of mean of defense of novel protection Function return addresses.It is added to two on hardware
Register top and salt, for top for saving cryptographic Hash, salt is used to save the key of hash function.When calling subfunction,
Cryptographic Hash and return address are successively pressed into stack.Then Hash operation, operation are done in key, cryptographic Hash and return address together
As a result it is used to update the value of top register.When function returns, cryptographic Hash and return address are popped up stack together, and do Hash
Operation.Operation result is compared with the value in top register.If it is different, then exception of dishing out；If identical, stack is used
In cryptographic Hash update top register, back in father's function.
The safety of chain type Hash stack is high, though attacker can any read/write memory address space, can not also bypass this
Kind defense mechanism.However, its performance loss can be increased sharp when the execution cycle of hash function increases.For example, when one
When secondary Hash operation needs 80 clock cycle, its performance loss is about 20%, limits its practicability.
In order to reduce performance loss, the prior art proposes the technical solution of multichain optimization, specifically, multichain prioritization scheme
N times of hash module and top/salt register are used on hardware.Whenever encountering Hash operation, by turns use the 1st, 2 ... N
A hash module.And the top value input of hash module, then the depth according to the function in function call stack is resulting divided by N
Remainder m selects the value of m-th of top register.This multichain implementation can be to avoid the longer initiation of Hash operation period
Pipeline stall problem reduces performance loss.But in order to realize that the prioritization scheme of N chain needs to increase N-1 times of hash module
With top/salt register and control logic, this can cause biggish expense to hardware.
Summary of the invention
To solve the above-mentioned problems, the embodiment of the present invention provides one kind and overcomes the above problem or at least be partially solved
State the hardware spending optimization method and system of the multichain formula Hash stack of problem.
According to a first aspect of the embodiments of the present invention, a kind of hardware spending optimization method of multichain formula Hash stack is provided, it should
Method includes: the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple projects, each project
A chain type Hash stack is represented, each chain type Hash stack is used to store the input and output of a Hash operation；When Hash is transported
When corresponding project in transmitting queue is sent into the input of calculation, project is set to and is lined up calculating state；When hash module terminates to calculate
After state, whether there is also in the project for being lined up calculating state in inquiry transmitting queue；If it exists, then hash module according to row
Team's sequence calculates the Hash operation in next project.
Second aspect according to embodiments of the present invention provides a kind of hardware spending optimization system of multichain formula Hash stack, should
System includes: adding module, for the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple items
Mesh, one chain type Hash stack of each sports representative, each chain type Hash stack be used for store a Hash operation input and
Output；Queue module, for when corresponding project in transmitting queue is sent into the input of Hash operation, project to be set to queuing meter
Calculation state；Enquiry module, for after hash module terminates calculating state, whether there is also in queuing in inquiry transmitting queue
The project of calculating state；If it exists, then hash module calculates the Hash operation in next project according to Queue sequence.
According to a third aspect of the embodiments of the present invention, a kind of electronic equipment, including memory, processor and storage are provided
On a memory and the computer program that can run on a processor, processor is realized various such as first aspect when executing program
The hardware spending optimization method of multichain formula Hash stack provided by any possible implementation in possible implementation.
According to a fourth aspect of the embodiments of the present invention, a kind of non-transient computer readable storage medium is provided, is deposited thereon
Computer program is contained, is realized in the various possible implementations such as first aspect when which is executed by processor
The hardware spending optimization method of multichain formula Hash stack provided by any possible implementation.
The hardware spending optimization method and system of multichain formula Hash stack provided in an embodiment of the present invention, by adding on hardware
Add transmitting queue, and only use a hash module, when hash module is in calculating state, the Hash operation of subsequent acquisition is just
It is medium to be calculated that transmitting queue can be added to；Use a hash module successively to each item in transmitting queue so as to realize
Purpose Hash operation is calculated, without pause assembly line, compared with the prior art in using N times of hash module technical side
On the basis of case reduces hardware spending, the acceleration effect of multichain and shadow cache is played.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described.It should be evident that the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Other attached drawings are obtained according to these figures.
Fig. 1 is the flow diagram of the hardware spending optimization method of multichain formula Hash stack provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of transmitting queue provided in an embodiment of the present invention；
Fig. 3 is the state change schematic diagram of finite state machine provided in an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of the hardware spending optimization system of multichain formula Hash stack provided in an embodiment of the present invention；
Fig. 5 is the entity structure schematic diagram of electronic equipment provided in an embodiment of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical solution in the embodiment of the present invention is explicitly described, it is clear that described embodiment is the present invention
A part of the embodiment, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not having
Every other embodiment obtained under the premise of creative work is made, shall fall within the protection scope of the present invention.
The embodiment of the present invention provides a kind of hardware spending optimization method of multichain formula Hash stack, and referring to Fig. 1, this method includes
But it is not limited to following steps:
Step 101, the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple projects, each
One chain type Hash stack of a sports representative, each chain type Hash stack are used to store the input and output of a Hash operation.
Specifically, due to using N times of hash module and top/salt register in the multichain prioritization scheme of the prior art,
Resulting in hardware, there are biggish expenses.Therefore, a hash module is only used in the embodiment of the present invention, but is added on hardware
One transmitting queue.The transmitting queue includes multiple projects, and referring to fig. 2, each project is a line therein, each
Mesh represents a chain, for saving the input and output of Hash operation.
Step 102, when Hash operation input be sent into transmitting queue in corresponding project when, by project be set to queuing calculate
State.
Specifically, after being added to transmitting queue in a step 101, even if an individual hash module, which is in, calculates shape
State, as long as transmitting queue is not full, the Hash operation of subsequent new acquisition will be added to transmitting medium (the i.e. item to be calculated of queue
Mesh, which enters, is lined up calculating state), without pause assembly line.
Step 103, after hash module terminates calculating state, inquiry transmitting queue in whether there is also in be lined up calculate
The project of state；If it exists, then hash module calculates the Hash operation in next project according to Queue sequence.
Specifically, after hash module each time terminates a Hash operation, can whether also continue in inquiry transmitting queue
There are the calculating (i.e. in the project for being lined up calculating state) in queuing, if so, then hash module continues to calculate next item
Hash operation in mesh；If it is not, hash module can stop calculating.
Wherein, it may further be enriched with limit state machine before step 103 to control the calculating process of transmitting queue.Finite state machine
State change can be found in attached drawing 3, state machine inquiry or calculates only there are two state.When state machine is in inquiry state, if
In the presence of etc. transmitting item to be calculated (i.e. in the project for being lined up calculating state), then enter calculating state.After the completion of calculating, state
Machine returns to inquiry state, according to whether selection continues with waiting meter there is also the project for being lined up calculating state is in
The item of calculation is maintained at inquiry state.
The hardware spending optimization method of multichain formula Hash stack provided in an embodiment of the present invention is emitted by adding on hardware
Queue, and a hash module is only used, when hash module is in calculating state, the Hash operation of subsequent acquisition will be added
It is medium to be calculated to transmitting queue；So as to realize the Kazakhstan for using a hash module successively to each project in transmitting queue
Uncommon operation is calculated, and without pause assembly line, the middle technical solution using N times of hash module is reduced compared with the prior art
On the basis of hardware spending, the acceleration effect of multichain and shadow cache is played.
Content based on the above embodiment, as a kind of alternative embodiment, referring to fig. 2, each project includes: queue
Position, callret, ret_addr, old_hash and new_hash；
Wherein, queue are used to indicate whether project is in queuing calculating state；Queue is a bit, queue
Different assignment can represent whether project is in queuing calculating state in position.
Wherein, the callret types for being used to indicate Hash operation in project, the type of Hash operation include cryptographic Hash more
New operation or cryptographic Hash verify operation；Callret are a bit, and different assignment can represent not in callret
Same Hash operation type；Such as when callret=1, indicate that the cryptographic Hash when stacking of return address updates operation；callret
When=0, cryptographic Hash verification operation when return address is popped is indicated.
Wherein, ret_addr are used to store return address.
Wherein, old_hash are used to store original cryptographic Hash.
Wherein, new_hash carry out the new Hash obtained after cryptographic Hash update operation to original cryptographic Hash for storing
Value.
Content based on the above embodiment, as a kind of alternative embodiment, emit queue include: head pointer and
Calculating pointer；
Wherein, head pointer is for being directed toward the project to be stored of Hash operation next time；When function call, head
Pointer+1；When function returns, head pointer -1.In other words, head is used to refer to refer to the position to be stored of Hash operation next time
To corresponding chain type Hash stack.
Wherein, calculating pointer is used to be directed toward a project for currently carrying out Hash operation.
Content based on the above embodiment provides a kind of when the input of Hash operation is sent into as a kind of alternative embodiment
When emitting corresponding project in queue, project is set to the method for being lined up calculating state, including but not limited to following steps:
Step 1, the input that the cryptographic Hash on function head is updated to operation are sent into a project in transmitting queue, and will
The position queue of project is that project is in the value for being lined up calculating state, and the assembly line that do not stop continues to execute.
Specifically, before emitting queue full, after input is sent to transmitting queue by the cryptographic Hash update operation on function head,
It is 1 by the position queue of the project, the assembly line that do not stop continues to execute.
Step 2, cryptographic Hash update operation after, the new cryptographic Hash of acquisition is saved into new_hash.
Content based on the above embodiment is also wrapped on hardware after addition transmitting queue as a kind of alternative embodiment
It includes:
When the cryptographic Hash that hash module carries out function tail portion verifies operation, if callret directory entries carry out Hash
The type of operation is that cryptographic Hash updates operation, then matches in chain type Hash stack and store in return address and cryptographic Hash and transmitting queue
Input it is whether identical；
If they are the same, then the position queue is not to the value for being lined up calculating state for directory entry, is not lined up computational item
Value in old_hash is assigned to new_hash by mesh；If it is different, then throw exception.
Specifically, when the cryptographic Hash that hash module encounters function tail portion verifies operation, if callret are 1, directly
It is whether identical (using the side of shadow cache to connect the input stored in return address and cryptographic Hash and transmitting queue in matching stack
Formula, the embodiment of the present invention are not construed as limiting this).If identical, the position queue of this is 0, is no longer lined up and calculates, and will
The value of old_hash is assigned to new_hash；If it is different, then throw exception.If callret are 0, by Kazakhstan to be verified
It is 1 by the position queue of this, do not stop assembly line when corresponding project in the transmitting queue is sent into the input of uncommon operation
It continues to execute.After the cryptographic Hash verifies operation, compared with the new_hash of the project, if identical,
New_hash is updated with the old_hash of the project, the position queue is 0；If it is different, then reporting an error.
The position queue is then indication item if they are the same as a kind of alternative embodiment by content based on the above embodiment
Mesh is not at the value for being lined up calculating state, is not lined up calculating project, the value in old_hash is assigned to new_hash, also
If including: that hash module calculates project, the calculating of hash module is terminated.
Content based on the above embodiment is also wrapped on hardware after addition transmitting queue as a kind of alternative embodiment
It includes:
If the type of the Hash operation of whole projects is that cryptographic Hash updates operation, or the Hash operation of whole projects
Type be cryptographic Hash verify operation, then subsequent Hash operation identical with the type of Hash operation need to wait for earliest enter be lined up
Enter transmitting queue after the completion of the Hash operation of project；And/or
If hash module is carrying out cryptographic Hash verification operation, and the type of subsequent Hash operation is that cryptographic Hash updates fortune
It calculates, then subsequent Hash operation needs to wait for entering transmitting queue after cryptographic Hash verification operation.
In particular it is required that, there are above-mentioned two situations in the case where pause assembly line.For the first above-mentioned situation, when all items
The position queue when being 1, show at this time to be entirely that cryptographic Hash updates or entirely cryptographic Hash verification calculates, at this time together
The operation of sample, which needs waiting to calculate a certain Xiang Houcai, can enter transmitting queue.For above-mentioned second situation, when being breathed out
When the verification operation of uncommon value, if encountering next cryptographic Hash at this time updates operation, ability after cryptographic Hash verification is needed to wait for
Into transmitting queue.
Content based on the above embodiment, the embodiment of the invention provides a kind of optimizations of the hardware spending of multichain formula Hash stack
System, the hardware spending optimization system of the multichain formula Hash stack are used to execute the multichain formula Hash stack in above method embodiment
Hardware spending optimization method.Referring to fig. 4, which includes: adding module 301, queue module 302 and enquiry module 303；Its
In, adding module 301, for the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple projects,
One chain type Hash stack of each sports representative, each chain type Hash stack are used to store the input an of Hash operation and defeated
Out；Queue module 302, for when corresponding project in transmitting queue is sent into the input of Hash operation, project to be set to queuing
Calculating state；Enquiry module 303, for after hash module terminates calculating state, whether there is also places in inquiry transmitting queue
In the project for being lined up calculating state；If it exists, then hash module calculates the Hash operation in next project according to Queue sequence.
Specifically, a hash module is only used in the embodiment of the present invention, but adding module 301 is added to one on hardware
A transmitting queue.The transmitting queue includes multiple projects, and referring to fig. 2, each project is a line therein, each project generation
One chain of table, for saving the input and output of Hash operation.Even if an individual hash module is in calculating state, as long as
It is not full to emit queue, the Hash operation of subsequent new acquisition will be queued module 302 and be added to waiting meter in transmitting queue
(i.e. project, which enters, is lined up calculating state) is calculated, without pause assembly line.Terminate a Hash operation in hash module each time
Afterwards, enquiry module 303 can continue in inquiry transmitting queue whether there is also the calculating in queuing (i.e. in queuing calculating state
Project), if so, then hash module continues to calculate the Hash operation in next project；If it is not, hash module can stop
Only calculate.
The hardware spending optimization system of multichain formula Hash stack provided in an embodiment of the present invention is emitted by adding on hardware
Queue, and a hash module is only used, when hash module is in calculating state, the Hash operation of subsequent acquisition will be added
It is medium to be calculated to transmitting queue；So as to realize the Kazakhstan for using a hash module successively to each project in transmitting queue
Uncommon operation is calculated, and without pause assembly line, the middle technical solution using N times of hash module is reduced compared with the prior art
On the basis of hardware spending, while playing the acceleration effect of multichain and shadow cache.
The embodiment of the invention provides a kind of electronic equipment, as shown in figure 5, the equipment includes: processor (processor)
501, communication interface (Communications Interface) 502, memory (memory) 503 and communication bus 504,
In, processor 501, communication interface 502, memory 503 completes mutual communication by communication bus 504.Processor 501 can
To call the computer program that can be run on memory 503 and on processor 501, to execute the more of the various embodiments described above offer
The hardware spending optimization method of chain type Hash stack, for example, the addition transmitting queue on hardware；Wherein, emitting queue includes
Tactic multiple projects, one chain type Hash stack of each sports representative, each chain type Hash stack are primary for storing
The input and output of Hash operation；When corresponding project in transmitting queue is sent into the input of Hash operation, project is set to row
Team calculates state；After hash module terminates calculating state, whether there is also in queuing calculating state in inquiry transmitting queue
Project；If it exists, then hash module calculates the Hash operation in next project according to Queue sequence.
In addition, the logical order in above-mentioned memory 503 can be realized by way of SFU software functional unit and conduct
Independent product when selling or using, can store in a computer readable storage medium.Based on this understanding, originally
Substantially the part of the part that contributes to existing technology or the technical solution can be in other words for the technical solution of invention
The form of software product embodies, which is stored in a storage medium, including some instructions to
So that a computer equipment (can be personal computer, server or the network equipment etc.) executes each implementation of the present invention
The all or part of the steps of example method.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory (ROM, Read-
Only Memory), random access memory (RAM, Random Access Memory), magnetic or disk etc. are various can be with
Store the medium of program code.
The embodiment of the present invention also provides a kind of non-transient computer readable storage medium, is stored thereon with computer program,
The computer program is implemented to carry out the hardware spending of the multichain formula Hash stack of the various embodiments described above offer when being executed by processor
Optimization method, for example, the addition transmitting queue on hardware；Wherein, transmitting queue includes tactic multiple projects, often
One sports representative, one chain type Hash stack, each chain type Hash stack are used to store the input and output of a Hash operation；
When corresponding project in transmitting queue is sent into the input of Hash operation, project is set to and is lined up calculating state；Work as hash module
After terminating calculating state, whether there is also in the project for being lined up calculating state in inquiry transmitting queue；If it exists, then Hash mould
Root tuber calculates the Hash operation in next project according to Queue sequence.
The embodiments such as electronic equipment described above are only schematical, wherein unit as illustrated by the separation member
It may or may not be physically separated, component shown as a unit may or may not be physics list
Member, it can it is in one place, or may be distributed over multiple network units.It can be selected according to the actual needs
In some or all of the modules achieve the purpose of the solution of this embodiment.Those of ordinary skill in the art are not paying creativeness
Labour in the case where, it can understand and implement.
Through the above description of the embodiments, those skilled in the art can be understood that each embodiment can
It realizes by means of software and necessary general hardware platform, naturally it is also possible to pass through hardware.Based on this understanding, on
Stating technical solution, substantially the part that contributes to existing technology can be embodied in the form of software products in other words, should
Computer software product may be stored in a computer readable storage medium, such as ROM/RAM, magnetic disk, CD, including several fingers
It enables and using so that a computer equipment (can be personal computer, server or the network equipment etc.) executes each implementation
Certain Part Methods of example or embodiment.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features；
And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and
Range.
Claims (10)
1. a kind of hardware spending optimization method of multichain formula Hash stack characterized by comprising
The addition transmitting queue on hardware；Wherein, the transmitting queue includes tactic multiple projects, each described item
Mesh represents a chain type Hash stack, and chain type Hash stack described in each is used to store the input and output of a Hash operation；
When the corresponding project in the transmitting queue is sent into the input of Hash operation, the project is set to queuing and is calculated
State；
After hash module terminates the calculating state, inquire in the transmitting queue whether there is also calculate in the queuing
The project of state；If it exists, then the hash module calculates the Kazakhstan in next project according to Queue sequence
Uncommon operation.
2. the hardware spending optimization method of multichain formula Hash stack according to claim 1, which is characterized in that described in each
Project includes: queue, callret, ret_addr, old_hash and new_hash；
Described queue is used to indicate whether the project is in the queuing calculating state；
Described callret is used to indicate the type of Hash operation described in the project, and the type of the Hash operation includes
Cryptographic Hash updates operation or cryptographic Hash verifies operation；
Described ret_addr for storing return address；
Described old_hash for storing original cryptographic Hash；
Described new_hash for store to the original cryptographic Hash carry out the cryptographic Hash update obtain after operation newly
Cryptographic Hash.
3. the hardware spending optimization method of multichain formula Hash stack according to claim 1, which is characterized in that the transmitting team
Column include: head pointer and calculating pointer；
The head pointer is for being directed toward the project to be stored of the Hash operation next time；It is described
Calculating pointer is used to be directed toward a project for currently carrying out the Hash operation.
4. the hardware spending optimization method of multichain formula Hash stack according to claim 2, which is characterized in that described to work as Hash
When the corresponding project in the transmitting queue is sent into the input of operation, the project is set to and is lined up calculating state, comprising:
The input that the cryptographic Hash on function head updates operation is sent into a project in the transmitting queue, and
It is that the project is in the value for being lined up calculating state by the position queue of the project, the assembly line that do not stop continues to execute；
After the cryptographic Hash updates operation, the new cryptographic Hash of acquisition is saved in new_hash described.
5. the hardware spending optimization method of multichain formula Hash stack according to claim 2, which is characterized in that described in hardware
After upper addition transmitting queue, further includes:
When the cryptographic Hash that the hash module carries out function tail portion verifies operation, if described in the callret instruction
The type that project carries out Hash operation is that the cryptographic Hash updates operation, then matches return address described in the chain type Hash stack
And whether the input stored in cryptographic Hash and the transmitting queue is identical；
If they are the same, then by the position queue it is that the instruction project is not at the value for being lined up calculating state, is not lined up
Calculate the project, will be old_hash described in value be assigned to it is new_hash described；If it is different, then throw exception；
It, will be to if the type that the callret instruction project carries out Hash operation is that the cryptographic Hash verifies operation
When the corresponding project in the transmitting queue is sent into the input of the Hash operation of verification, the project is set to queuing and is calculated
State, comprising:
The input of the cryptographic Hash verification operation of function tail portion is sent into a project in the transmitting queue, and
It is that the project is in the value for being lined up calculating state by the position queue of the project, the assembly line that do not stop continues to execute；
It after the cryptographic Hash verifies operation, is compared with the new_hash of the project, if identical, described in
The old_hash of project updates new_hash, is 0 by the position queue of the project；If it is different, then reporting an error.
6. the hardware spending optimization method of multichain formula Hash stack according to claim 5, which is characterized in that if the phase
Together, then by the position queue it is that the instruction project is not at the value for being lined up calculating state, is not lined up described in calculating
Project, will be old_hash described in value be assigned to it is new_hash described, further includes:
If the hash module calculates the project, the calculating of the hash module is terminated.
7. the hardware spending optimization method of multichain formula Hash stack according to claim 2, which is characterized in that described in hardware
After upper addition transmitting queue, further includes:
If the type of the Hash operation of whole projects is that cryptographic Hash updates operation, or the Hash of whole projects
The type of operation is that cryptographic Hash verifies operation, then subsequent Hash operation identical with the type of the Hash operation needs to wait for earliest
Enter the transmitting queue after the completion of into the Hash operation of queue discipline；And/or
If the hash module is carrying out the cryptographic Hash verification operation, and the type of the subsequent Hash operation is cryptographic Hash
Operation is updated, then the subsequent Hash operation needs to wait for entering the transmitting queue after the cryptographic Hash verification operation.
8. a kind of hardware spending optimization system of multichain formula Hash stack characterized by comprising
Adding module, for the addition transmitting queue on hardware；Wherein, the transmitting queue includes tactic multiple items
Mesh, one chain type Hash stack of each described sports representative, chain type Hash stack described in each is for storing a Hash operation
Input and output；
Queue module, for when the corresponding project in the transmitting queue is sent into the input of Hash operation, by the item
Mesh, which is set to, is lined up calculating state；
Enquiry module, for after hash module terminates the calculating state, inquiring in the transmitting queue, whether there is also places
In the project for being lined up calculating state；If it exists, then the hash module is next described according to Queue sequence calculating
The Hash operation in project.
9. a kind of electronic equipment including memory, processor and stores the calculating that can be run on a memory and on a processor
Machine program, which is characterized in that the processor realizes the multichain formula as described in any one of claim 1 to 7 when executing described program
The step of hardware spending optimization method of Hash stack.
10. a kind of non-transient computer readable storage medium, is stored thereon with computer program, which is characterized in that the computer
The hardware spending optimization method of the multichain formula Hash stack as described in any one of claim 1 to 7 is realized when program is executed by processor
The step of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910559199.4A CN110348250B (en) | 2019-06-26 | 2019-06-26 | Hardware overhead optimization method and system of multi-chain hash stack |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910559199.4A CN110348250B (en) | 2019-06-26 | 2019-06-26 | Hardware overhead optimization method and system of multi-chain hash stack |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110348250A true CN110348250A (en) | 2019-10-18 |
| CN110348250B CN110348250B (en) | 2020-12-29 |
Family
ID=68183090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910559199.4A Active CN110348250B (en) | 2019-06-26 | 2019-06-26 | Hardware overhead optimization method and system of multi-chain hash stack |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110348250B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1521982A (en) * | 2003-01-28 | 2004-08-18 | 华为技术有限公司 | Method for raising operational speed of key-hashing method |
| US7290253B1 (en) * | 2003-09-30 | 2007-10-30 | Vmware, Inc. | Prediction mechanism for subroutine returns in binary translation sub-systems of computers |
| CN101427213A (en) * | 2006-05-04 | 2009-05-06 | 国际商业机器公司 | Methods and apparatus for implementing polymorphic branch predictors |
| US20090144309A1 (en) * | 2007-11-30 | 2009-06-04 | Cabrera Escandell Marco A | Method and apparatus for verifying a suspect return pointer in a stack |
| US20180341767A1 (en) * | 2017-05-25 | 2018-11-29 | Intel Corporation | Techniques for control flow protection |
| CN109508539A (en) * | 2018-09-21 | 2019-03-22 | 中国科学院信息工程研究所 | The chained stack structure that return address is tampered in detection storehouse |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8964539B2 (en) * | 2009-03-20 | 2015-02-24 | Telefonaktiebolaget L M Ericsson (Publ) | Active queue management for wireless communication network uplink |
| CN107992577B (en) * | 2017-12-04 | 2020-08-11 | 奇安信科技集团股份有限公司 | Hash table data conflict processing method and device |
| CN109889449B (en) * | 2019-02-03 | 2020-06-19 | 清华大学 | Packet forwarding method and system with low storage overhead |
-
2019
- 2019-06-26 CN CN201910559199.4A patent/CN110348250B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1521982A (en) * | 2003-01-28 | 2004-08-18 | 华为技术有限公司 | Method for raising operational speed of key-hashing method |
| US7290253B1 (en) * | 2003-09-30 | 2007-10-30 | Vmware, Inc. | Prediction mechanism for subroutine returns in binary translation sub-systems of computers |
| CN101427213A (en) * | 2006-05-04 | 2009-05-06 | 国际商业机器公司 | Methods and apparatus for implementing polymorphic branch predictors |
| US20090144309A1 (en) * | 2007-11-30 | 2009-06-04 | Cabrera Escandell Marco A | Method and apparatus for verifying a suspect return pointer in a stack |
| US20180341767A1 (en) * | 2017-05-25 | 2018-11-29 | Intel Corporation | Techniques for control flow protection |
| CN109508539A (en) * | 2018-09-21 | 2019-03-22 | 中国科学院信息工程研究所 | The chained stack structure that return address is tampered in detection storehouse |
Non-Patent Citations (2)
| Title |
|---|
| GIORGI MAISURADZE 等: "ret2spec: Speculative Execution Using Return Stack Buffers", 《CCS "18: PROCEEDINGS OF THE 2018 ACM SIGSAC CONFERENCE ON COMPUTER AND COMMUNICATIONS SECURITY》 * |
| 刘臻 等: ""稀疏队列中的动态发射机制及电路实现"", 《高技术通讯》 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110348250B (en) | 2020-12-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109377232B (en) | DAG-based block chain transaction sequencing method and device | |
| CN102047305A (en) | File input/output scheduler | |
| CN104820580A (en) | Improved return stack buffer | |
| KR101857510B1 (en) | Sorting | |
| CN109799956B (en) | Memory controller and IO request processing method | |
| TW202209152A (en) | Neural network structure search method and apparatus | |
| CN101604261B (en) | Task scheduling method for supercomputer | |
| US10649781B2 (en) | Enhanced performance-aware instruction scheduling | |
| CN109101276A (en) | The method executed instruction in CPU | |
| CN108280227A (en) | Data information processing method based on caching and device | |
| CN106406820B (en) | A kind of multi-emitting parallel instructions processing method and processing device of network processor micro-engine | |
| CN109643237A (en) | Branch target buffer compression | |
| CN110363006B (en) | Multi-chain Hash stack structure and method for detecting function return address being tampered | |
| CN106708749B (en) | A kind of data search method | |
| CN110784336A (en) | Multi-device intelligent timing delay scene setting method and system based on Internet of things | |
| CN109165201B (en) | Log merging method and terminal equipment | |
| CN110377339A (en) | Long-latency instruction processing unit, method and equipment, readable storage medium storing program for executing | |
| CN103744624B (en) | A kind of system architecture for realizing the data cached selectivity upgradings of storage system SSD | |
| CN110348250A (en) | The hardware spending optimization method and system of multichain formula Hash stack | |
| US10380111B2 (en) | System and method for searching data | |
| CN110362503B (en) | Optimization method and optimization system of chain hash stack | |
| CN109375965A (en) | State machine processing method and device, readable storage medium storing program for executing | |
| CN108304218A (en) | A kind of write method of assembly code, device, system and readable storage medium storing program for executing | |
| CN106445968A (en) | Data merging method and device | |
| KR102153814B1 (en) | Stochastic Routing Algorithm for Load-balancing Interconnection Network System |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |