CN110347625B - Method, device and equipment for switching GPU topology through wireless cable - Google Patents

Method, device and equipment for switching GPU topology through wireless cable Download PDF

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CN110347625B
CN110347625B CN201910843172.8A CN201910843172A CN110347625B CN 110347625 B CN110347625 B CN 110347625B CN 201910843172 A CN201910843172 A CN 201910843172A CN 110347625 B CN110347625 B CN 110347625B
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gpio
current state
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CN110347625A (en
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刘建成
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Shenzhen Tong Yi Yi Information Technology Co Ltd
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Shenzhen Tong Yi Yi Information Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

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Abstract

The invention discloses a method, a device and equipment for switching GPU topology by a wireless cable, wherein the method for switching GPU topology by the wireless cable is provided with a corresponding operating system, the operating system is correspondingly associated with a PCH, the PCH is provided with a corresponding GPIO, and the method comprises the following steps: powering up the operating system and completing initialization; changing the state of GPIO of the PCH according to a preset mode; storing the state information of the PCH after the GPIO is changed; and resetting the system to complete the switching of the GPU topological structure. The free combination of GPU topology is realized by setting different states of GPIO of PCH. The switching of common applications can be realized without any change operation of a user on hardware, so that the universality of the GPU server is improved. Meanwhile, the hardware can save the stock aiming at different hardware with different topological structures, reduce the material stock types and save the fund.

Description

Method, device and equipment for switching GPU topology through wireless cable
Technical Field
The present invention relates to the field of servers, and in particular, to a method, an apparatus, and a device for switching a GPU topology over a wireless cable.
Background
The current information datamation and various artificial intelligence applications replace manual work in various industries to carry out intelligent analysis on various complex data. GPU (Graphics Processing Unit) servers have been widely used in various industries for high-performance computing, artificial intelligence, deep learning, various intelligent identification, and reasoning applications; a GPU server is generally a general server with a plurality of GPU cards; in practical applications, a high-level GPU server is usually equipped with 8 or more GPU cards; the GPU server has three different topological structures according to different application requirements; for example, a common mode is adopted in which a plurality of PCIe (Peripheral Component Interconnect express, high speed serial computer expansion bus standard) root ports are expanded via a PCIe Switch (PCIe Switch) on the same CPU; a cascade mode that a PCIe root port is adopted on the same CPU and then is expanded through a PCIe Switch is adopted; a balance mode that one PCIe root Port is adopted on each CPU and then is expanded through a PCIe Switch is adopted; the three modes have advantages and disadvantages In application, and can provide different characteristics such as high IO (input and output) bandwidth, high GPU data interaction delay and low CPU/GPU interaction delay for different applications.
In the current industry, several different approaches are taken to meet the application of different GPU servers. The first method is to implement different applications of the GPU server by matching different boards for different applications. The second method is to adopt a cable expansion mode, and adopt different wiring modes to match different board cards for different applications. Both of the two implementations can meet the actual requirements of different customers; however, in practical applications, due to inconsistency of industrial requirements, design, production and stock needs to be performed for different applications from development to production, that is, the current GPU server has poor universality, so that development and production investment is increased substantially.
Disclosure of Invention
The invention mainly aims to provide a method for switching GPU topology through a wireless cable, and aims to solve the technical problem that the universality of the current GPU server is poor.
The invention provides a method for switching GPU topology by a wireless cable, which is provided with a corresponding operating system, wherein the operating system is correspondingly associated with a PCH, and the PCH is provided with a corresponding GPIO, and the method comprises the following steps:
powering up the operating system and completing initialization;
changing the state of GPIO of the PCH according to a preset mode;
storing the state information of the PCH after the GPIO is changed;
and resetting the system to complete the switching of the GPU topological structure.
Preferably, the operating system includes a BIOS, the BIOS has a corresponding first configuration space, the first configuration space has first preset state information of the GPIO in advance, and the step of changing the state of the GPIO of the PCH in a preset manner includes:
judging whether the starting is started for the first time;
if not, reading first current state information of the GPIO, and reading first preset state information of the GPIO prestored in the first configuration space;
judging whether the first current state information is consistent with the first preset state information or not;
if not, the output level of the GPIO is set according to the first preset state information, and instruction information for resetting the system is generated.
Preferably, the operating system further includes a BMC, the BMC has a corresponding second configuration space, the second configuration space stores second preset state information of a GPIO generated by the user through operation of the BMC, the BIOS has a corresponding KCS interface, the KCS interface is in communication connection with the BMC, and after the step of determining whether the operating system is started for the first time, the method includes:
if yes, the BIOS sets a second current state of the GPIO;
the BIOS stores the second current state information into the first configuration space;
the BIOS performs power-on self-test;
the BIOS judges whether marking bit information from the BMC is read through a KCS interface or not, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO;
if so, the BIOS changes the GPIO from the second current state to a second preset state, and sets the output level of the GPIO according to the second preset state information.
Preferably, before the step of determining whether the BIOS reads the flag bit information from the BMC through the KCS interface, the method includes:
reading the third current state information of the GPIO by the BMC;
the BMC stores the third current state information to a second configuration space;
the BMC judges whether first operation instruction information is received, wherein the first operation instruction information is operation instruction information for changing the current state of the GPIO;
if so, the BMC changes the current state of the GPIO to generate fourth current state information;
the BMC judges whether the third current state information is consistent with the fourth current state information;
and if not, generating a marking bit at the specified position of the second configuration space.
Preferably, after the step of determining whether the BIOS reads the flag bit information from the BMC through the KCS interface, the method includes:
if not, the BIOS judges whether second operation instruction information is received or not, wherein the second operation instruction information is operation instruction information for changing the current state of the GPIO;
and if so, changing the GPIO from the second preset state to a fifth current state, and setting the output level of the GPIO according to the fifth current state information.
The invention also provides a device for switching the GPU topology by the wireless cable, which comprises:
the initialization module is used for electrifying the operating system and completing initialization;
the changing module is used for changing the state of the GPIO of the PCH according to a preset mode;
the storage module is used for storing the state information of the PCH after the GPIO is changed;
and the reset module is used for resetting the system and completing the switching of the GPU topological structure.
Preferably, the changing module includes:
the first judgment submodule is used for judging whether the starting is started for the first time;
the first execution sub-module is used for reading the first current state information of the GPIO and reading the first preset state information of the GPIO prestored in the first configuration space if the GPIO is not in the first configuration space;
the second judgment submodule is used for judging whether the first current state information is consistent with the first preset state information or not;
and the second execution submodule is used for setting the output level of the GPIO according to the first preset state information and generating instruction information for resetting the system if the first preset state information is not the preset state information.
Preferably, the change module further comprises:
the third execution submodule is used for setting a second current state of the GPIO by the BIOS if the third execution submodule is in the positive state;
the first storage submodule is used for storing the second current state information into the first configuration space by the BIOS;
the first self-checking module is used for the BIOS to carry out power-on self-checking;
the third judgment sub-module is used for judging whether marking bit information from the BMC is read through a KCS interface or not by the BIOS, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO;
and the fourth execution sub-module is used for changing the GPIO from the second current state to a second preset state by the BIOS if the GPIO is in the second current state, and setting the output level of the GPIO according to the second preset state information.
Preferably, the change module further comprises:
the fifth execution submodule is used for reading the third current state information of the GPIO by the BMC;
the second storage submodule is used for storing the third current state information into a second configuration space by the BMC;
the fourth judgment submodule is used for the BMC to judge whether the first operation instruction information is received, wherein the first operation instruction information is operation instruction information for changing the current state of the GPIO;
the fifth execution submodule is used for changing the current state of the GPIO by the BMC and generating fourth current state information if the current state of the GPIO is the same as the current state of the GPIO;
the fifth judgment submodule is used for judging whether the third current state information is consistent with the fourth current state information by the BMC;
and the sixth execution submodule is used for generating a marking bit at the specified position of the second configuration space if the second configuration space is not the first configuration space.
The invention also provides equipment for switching the GPU topology by the wireless cable, which is used for executing the method for switching the GPU topology by the wireless cable.
The invention has the beneficial effects that: the free combination of GPU topology is realized by setting different states of GPIO of PCH. The switching of common applications can be realized without any change operation of a user on hardware, so that the universality of the GPU server is improved. Meanwhile, the hardware can save the stock aiming at different hardware with different topological structures, reduce the material stock types and save the fund.
Drawings
FIG. 1 is a schematic flowchart of a first embodiment of a method for switching GPU topology over a cable according to the present invention;
FIG. 2 is a schematic structural diagram of a first embodiment of an apparatus for cable-switched GPU topology according to the present invention;
FIG. 3 is a schematic structural diagram of a first embodiment of an apparatus for switching GPU topology over wireless cable according to the present invention;
fig. 4 is a schematic structural diagram of a device for switching GPU topology over cable according to a second embodiment of the present invention.
Description of reference numerals:
1. initializing a module; 2. A change module; 3. A storage module; 4. A reset module; 5. A first CPU; 6. A second CPU; 7. A PCH module; 8. A BMC module; 9. A first MUX module; 10. A second MUX module; 11. A third MUX module; 12. A first PCIe Switch module; 13. A second PCIe Switch module; 14. PCIe expansion slot modules.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, the present invention provides a method for switching GPU topology by using a wireless cable, which has a corresponding operating system, wherein the operating system is associated with a PCH, and the PCH has a corresponding GPIO, and the method includes:
s1: powering up the operating system and completing initialization;
s2: changing the state of GPIO of the PCH according to a preset mode;
s3: storing the state information of the PCH after the GPIO is changed;
s4: and resetting the system to complete the switching of the GPU topological structure.
In the embodiment of the invention, the GPU server has three common modes, namely a general mode, a balanced mode and a cascade mode. The operating System includes BIOS (Basic Input Output System), BMC (Baseboard Management Controller), PCH (Platform Controller Hub, integrated south bridge), and GPIO (General-purpose Input/Output). The operating system is powered on and the initialization of the operating system module is completed. And changing the state of the GPIO of the PCH according to a preset mode, wherein the preset mode comprises the step of directly changing the state of the GPIO of the PCH through the BIOS, and the step of receiving information for modifying the state of the GPIO of the PCH from the BMC by the BIOS so as to change the state of the GPIO of the PCH. Specifically, to implement the relevant control logic, the main control signal is extended by the GPIO of the PCH to output a control level signal. To realize three different modes, 2 GPIO signals are used for control. GPIO signals of the PCH are isolated by a triode and then are respectively connected with a control Pin of a PCIe MUX; one of the two modes is used for realizing the switching of the cascade mode, and the other one is used for switching the balance mode and the general mode; the GPIO selected by the PCH is powered by a standby power supply, namely the GPIO can keep the current state in the normal shutdown state. In order that the BMC can acquire the current topology state, 2 GPIOs are also used. And the GPIOs are respectively connected with the PCH and used for acquiring the state of the current PCH GPIO control output. The state confirmation and the operation management in the remote management are convenient. In the embodiment of the invention, the logical relationship between the GPIO state and the GPU application topology is as follows: when the GPIO1 and the GPIO2 are both at low level, the GPU topology is in a general mode; when the GPIO1 is at a high level and the GPIO2 is at a low level, the GPU topology is in a balanced mode; when the GPIO2 is high, the GPU topology is in the cascade mode regardless of the GPIO1 level state. The operating system stores the state information of the PCH after the GPIO is changed, and the storage space comprises but is not limited to a memory, an EPROM and a Flash which can be accessed by the BMC. And the operating system resets the system and restarts the operating system, thereby completing the switching of the GPU topological structure. When the system is reset, the platform devices of the system are completely initialized, and the selected GPIO state is not the reset attribute of a platform reset (PLTRST _ N) signal, so that the state can still keep the set state before reset, the state is ensured to be consistent with the required state when each device is reset, and the abnormality caused by uncertain setting of partial devices after topology change is avoided. After the BIOS is reset, the BIOS operating system re-executes the BIOS power-on and logic flow to ensure the state is correct. The free combination of GPU topology is realized by setting different states of GPIO of PCH. The switching of three common applications (a general mode, a balanced mode and a cascade mode) can be realized without any change operation of a user on hardware, so that the universality of the GPU server is improved. Meanwhile, the hardware can save the stock aiming at different hardware with different topological structures, reduce the material stock types and save the fund.
Further, the step S2, in which the operating system includes a BIOS, the BIOS has a corresponding first configuration space, the first configuration space prestores first preset state information of the GPIO, and the state of the GPIO of the PCH is changed according to a preset manner, includes:
s21: judging whether the starting is started for the first time;
s22: if not, reading first current state information of the GPIO, and reading first preset state information of the GPIO prestored in the first configuration space;
s23: judging whether the first current state information is consistent with the first preset state information or not;
s24: if not, the output level of the GPIO is set according to the first preset state information, and instruction information for resetting the system is generated.
In the embodiment of the invention, after the operating system is electrified and initialized, the BIOS judges whether the system is started for the first time, namely, the BIOS is electrified for the first time. If the BIOS is not powered on for the first time, the NVRAM (Non-Volatile Random Access Memory), that is, the configuration setting of the GPIO stored in the first configuration space, that is, the first preset state information of the GPIO, is automatically read. The GPIO state can be changed in other modes (such as the GPIO state is modified by BMC), and the GPIO state can be stored into the NVRAM again after being changed, so that a new first preset state is generated. And judging whether the first current state information is consistent with the first preset state information, namely judging whether a parameter value corresponding to the first current state of the GPIO is consistent with a parameter value corresponding to the first preset state of the GPIO, if the parameter values are not consistent, indicating that the state of the GPIO in the NVRAM is updated and needs to be changed. For example, if the first current state of the GPIO is the balanced mode, the first preset state of the GPIO is the cascade mode. And the BIOS operating system judges that the first current state of the GPIO is inconsistent with the first preset state, and modifies the state of the GPIO from a balanced mode to a cascade mode. And setting the GPIO output level according to the first preset state information, namely the state requirement of the GPIO read out from the NVRAM, so that the topology structure of the GPU server is switched by the wireless cable. Through the setting, the BIOS can independently complete the setting of the GPIO state of the PCH, so that the topology structure of the GPU server switched by the wireless cable is completed.
Further, the operating system further includes a BMC, the BMC has a corresponding second configuration space, the second configuration space stores second preset state information of the GPIO generated by the user through operation of the BMC, the BIOS has a corresponding KCS interface, the KCS interface is in communication connection with the BMC, and after the step S21 of determining whether the operation is started for the first time, the method includes:
s211: if yes, the BIOS sets a second current state of the GPIO;
s212: the BIOS stores the second current state information into the first configuration space;
s213: the BIOS performs power-on self-test;
s214: the BIOS judges whether marking bit information from the BMC is read through a KCS interface or not, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO;
s215: if so, the BIOS changes the GPIO from the second current state to a second preset state, and sets the output level of the GPIO according to the second preset state information.
In the embodiment of the invention, if the BIOS is started for the first time, the BIOS is powered on for the first time. The BIOS sets a second current state of the GPIO, namely the BIOS sets and configures the GPIO of the PCH according to default definition. The BIOS stores the second current state information into the first configuration space, that is, the BIOS stores the default definition into the NVRAM as the state identifier of the GPIO, and the GPIO is in the default setting state in the process, so the state does not need to be changed, the PCIe MUX (PCIe Multiplexer, PCIe data selector) data flow does not have any change, and the data link from the CPU to the PCIe Switch does not have any action. The BIOS performs power-on self-test and is responsible for completing the test of the CPU, the mainboard, the memory, the soft and hard disk subsystem, the display subsystem (including the display cache), the serial-parallel interface, the keyboard, the CD-ROM drive and the like. The purpose is to mainly check the quality of hardware. The KCS is a designated system interface of the BIOS. The BIOS judges whether marking bit information from the BMC is read through a KCS interface or not, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO; if so, the KCS reads the changed state value (second preset state information) of the GPIO stored by the BMC, and sets the GPIO state, namely the BIOS changes the GPIO from the second current state to the second preset state; and meanwhile, the changed state of the GPIO is stored in an NVRAM, and the output level of the GPIO is set according to second preset state information. Through the setting, a user can modify the state of the GPIO through the BIOS and the BMC, and the modification mode is more flexible.
Further, before the step S214 of determining whether the BIOS reads the flag bit information from the BMC through the KCS interface, the method includes:
S21A: reading the third current state information of the GPIO by the BMC;
S21B: the BMC stores the third current state information to a second configuration space;
S21C: the BMC judges whether first operation instruction information is received, wherein the first operation instruction information is operation instruction information for changing the current state of the GPIO;
S21D: if so, changing the current state of the GPIO to generate fourth current state information;
S21E: the BMC judges whether the third current state information is consistent with the fourth current state information;
S21F: and if not, generating a marking bit at the specified position of the second configuration space.
In the embodiment of the invention, the BMC reads the third current state information of the GPIO and stores the third current state information into the second configuration space. The BMC provides a graphically selectable interface in the web management interface for a user to view a current topology mode and select a topology mode. And the user sends first operation instruction information to the BMC through the web management interface, wherein the first operation instruction information is the operation instruction information for changing the current state of the GPIO. And after receiving the first operation instruction information, the BMC changes the current state of the GPIO and generates fourth current state information. The BMC judges whether the third current state information is consistent with the fourth current state information, namely if the changed state of the GPIO is inconsistent with the current state of the GPIO, the BMC sets an identification bit at a specified position of a KCS configuration space interacted with the BIOS; meanwhile, the changed state (i.e. the fourth current state information) of the GPIO is required to be updated to the specified position of the specified configuration space and the KCS configuration space interacting with the BIOS, so that the BIOS can acquire the set changed state information (i.e. the fourth current state information) of the GPIO.
Further, after the step S214 of determining whether the BIOS reads the flag bit information from the BMC through the KCS interface, the method includes:
S214A: if not, the BIOS judges whether second operation instruction information is received or not, wherein the second operation instruction information is operation instruction information for changing the current state of the GPIO;
S214B: and if so, changing the GPIO from the second preset state to a fifth current state, and setting the output level of the GPIO according to the fifth current state information.
In the embodiment of the invention, the BIOS has a corresponding BIOS Setup interface. Like a conventional PC, after completing BIOS power-on self-test, pressing a designated key, such as a Del key, into a BIOS Setup interface may configure various settings. In the embodiment of the invention, the GPU topology setting column is directly and newly added in the BIOS setup setting project, and the general mode, the balance mode and the cascade mode of the GPU server corresponding to three options are provided. And the user enters a BIOS Setup interface by pressing a hot key, selects a mode to be set under a GPU topology setting column, and generates second operation instruction information. The BIOS judges whether second operation instruction information is received or not; and if the BIOS operating system receives the second operating instruction information, the BIOS operating system changes the GPIO from the second preset state to a fifth current state, and sets the output level of the GPIO according to the fifth current state information, so that the topological structure of the GPU server is modified, and the GPU server mode switching is completed. The BIOS operating system stores the modified value into NVRAM before saving exit, and modifies the state of the GPIO. After the saving and the setting are finished, a system reset command is sent through the command to restart the BIOS operating system. When the system is reset, the platform devices of the system are completely initialized, and the selected GPIO state is not the reset attribute of a platform reset (PLTRST _ N) signal, so that the state can still keep the set state before reset, the state is ensured to be consistent with the required state when each device is reset, and the abnormality caused by uncertain setting of partial devices after topology change is avoided. After the BIOS is reset, the BIOS operating system re-executes the BIOS power-on and logic flow to ensure the state is correct. Through the setting, the BIOS Setup interface can directly modify the current state of the GPIO, so that the GPU server mode switching is completed, the operation is simple and easy to learn, and the user can learn and operate conveniently.
Referring to fig. 2, the present invention further provides a device for switching GPU topology over a cable, including:
the initialization module 1 is used for electrifying an operating system and completing initialization;
the changing module 2 is used for changing the state of the GPIO of the PCH according to a preset mode;
the storage module 3 is used for storing the state information of the PCH after the GPIO is changed;
and the reset module 4 is used for resetting the system and completing the switching of the GPU topological structure.
In the embodiment of the invention, the GPU server has three common modes, namely a general mode, a balanced mode and a cascade mode. The operating System includes BIOS (Basic Input Output System), BMC (Baseboard Management Controller), PCH (Platform Controller Hub, integrated south bridge), and GPIO (General-purpose Input/Output). The operating system is powered on and the initialization of the operating system module is completed. And changing the state of the GPIO of the PCH according to a preset mode, wherein the preset mode comprises the step of directly changing the state of the GPIO of the PCH through the BIOS, and the step of receiving information for modifying the state of the GPIO of the PCH from the BMC by the BIOS so as to change the state of the GPIO of the PCH. Specifically, to implement the relevant control logic, the main control signal is extended by the GPIO of the PCH to output a control level signal. To realize three different modes, 2 GPIO signals are used for control. GPIO signals of the PCH are isolated by a triode and then are respectively connected with a control Pin of a PCIe MUX; one of the two modes is used for realizing the switching of the cascade mode, and the other one is used for switching the balance mode and the general mode; the GPIO selected by the PCH is powered by a standby power supply, namely the GPIO can keep the current state in the normal shutdown state. In order that the BMC can acquire the current topology state, 2 GPIOs are also used. And the GPIOs are respectively connected with the PCH and used for acquiring the state of the current PCH GPIO control output. The state confirmation and the operation management in the remote management are convenient. In the embodiment of the invention, the logical relationship between the GPIO state and the GPU application topology is as follows: when the GPIO1 and the GPIO2 are both at low level, the GPU topology is in a general mode; when the GPIO1 is at a high level and the GPIO2 is at a low level, the GPU topology is in a balanced mode; when the GPIO2 is high, the GPU topology is in the cascade mode regardless of the GPIO1 level state. The operating system stores the state information of the PCH after the GPIO is changed, and the storage space comprises but is not limited to a memory, an EPROM and a Flash which can be accessed by the BMC. And the operating system resets the system and restarts the operating system, thereby completing the switching of the GPU topological structure. When the system is reset, the platform devices of the system are completely initialized, and the selected GPIO state is not the reset attribute of a platform reset (PLTRST _ N) signal, so that the state can still keep the set state before reset, the state is ensured to be consistent with the required state when each device is reset, and the abnormality caused by uncertain setting of partial devices after topology change is avoided. After the BIOS is reset, the BIOS operating system re-executes the BIOS power-on and logic flow to ensure the state is correct. The free combination of GPU topology is realized by setting different states of GPIO of PCH. The switching of three common applications (a general mode, a balanced mode and a cascade mode) can be realized without any change operation of a user on hardware, so that the universality of the GPU server is improved. Meanwhile, the hardware can save the stock aiming at different hardware with different topological structures, reduce the material stock types and save the fund.
Further, the changing module 2 includes a first determining submodule, a first executing submodule, a second determining submodule, and a second executing submodule.
The first judgment submodule is used for judging whether the starting is started for the first time;
the first execution sub-module is used for reading the first current state information of the GPIO and reading the first preset state information of the GPIO prestored in the first configuration space if the GPIO is not in the first configuration space;
the second judgment submodule is used for judging whether the first current state information is consistent with the first preset state information or not;
and the second execution submodule is used for setting the output level of the GPIO according to the first preset state information and generating instruction information for resetting the system if the first preset state information is not the preset state information.
In the embodiment of the invention, after the operating system is electrified and initialized, the BIOS judges whether the system is started for the first time, namely, the BIOS is electrified for the first time. If the BIOS is not powered on for the first time, the NVRAM (Non-Volatile Random Access Memory), that is, the configuration setting of the GPIO stored in the first configuration space, that is, the first preset state information of the GPIO, is automatically read. The GPIO state can be changed in other modes (such as the GPIO state is modified by BMC), and the GPIO state can be stored into the NVRAM again after being changed, so that a new first preset state is generated. And judging whether the first current state information is consistent with the first preset state information, namely judging whether a parameter value corresponding to the first current state of the GPIO is consistent with a parameter value corresponding to the first preset state of the GPIO, if the parameter values are not consistent, indicating that the state of the GPIO in the NVRAM is updated and needs to be changed. For example, if the first current state of the GPIO is the balanced mode, the first preset state of the GPIO is the cascade mode. And the BIOS operating system judges that the first current state of the GPIO is inconsistent with the first preset state, and modifies the state of the GPIO from a balanced mode to a cascade mode. And setting the GPIO output level according to the first preset state information, namely the state requirement of the GPIO read out from the NVRAM, so that the topology structure of the GPU server is switched by the wireless cable. Through the setting, the BIOS can independently complete the setting of the GPIO state of the PCH, so that the topology structure of the GPU server switched by the wireless cable is completed.
Further, the changing module 2 further includes a third execution submodule, a first storage submodule, a first self-checking module, a third judgment submodule, and a fourth execution submodule.
The third execution submodule is used for setting a second current state of the GPIO by the BIOS if the third execution submodule is in the positive state;
the first storage submodule is used for storing the second current state information into the first configuration space by the BIOS;
the first self-checking module is used for the BIOS to carry out power-on self-checking;
the third judgment sub-module is used for judging whether the BIOS reads the marking bit information from the BMC through the KCS interface or not by the BIOS, wherein the marking bit information is correspondingly associated with the second preset state information of the GPIO;
and the fourth execution sub-module is used for changing the GPIO from the second current state to a second preset state by the BIOS if the GPIO is in the second current state, and setting the output level of the GPIO according to the second preset state information.
In the embodiment of the invention, if the BIOS is started for the first time, the BIOS is powered on for the first time. The BIOS sets a second current state of the GPIO, namely the BIOS sets and configures the GPIO of the PCH according to default definition. The BIOS stores the second current state information into the first configuration space, that is, the BIOS stores the default definition into the NVRAM as the state identifier of the GPIO, and the GPIO is in the default setting state in the process, so the state does not need to be changed, the PCIe MUX (PCIe Multiplexer, PCIe data selector) data flow does not have any change, and the data link from the CPU to the PCIe Switch does not have any action. The BIOS performs power-on self-test and is responsible for completing the test of the CPU, the mainboard, the memory, the soft and hard disk subsystem, the display subsystem (including the display cache), the serial-parallel interface, the keyboard, the CD-ROM drive and the like. The purpose is to mainly check the quality of hardware. The KCS is a designated system interface of the BIOS. The BIOS judges whether marking bit information from the BMC is read through a KCS interface or not, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO; if so, the KCS reads the changed state value (second preset state information) of the GPIO stored by the BMC, and sets the GPIO state, namely the BIOS changes the GPIO from the second current state to the second preset state; and meanwhile, the changed state of the GPIO is stored in an NVRAM, and the output level of the GPIO is set according to second preset state information. Through the setting, a user can modify the state of the GPIO through the BIOS and the BMC, and the modification mode is more flexible.
Further, the changing module 2 further includes a fifth execution sub-module, a second storage sub-module, a fourth judgment sub-module, a fifth execution sub-module, a fifth judgment sub-module, and a sixth execution sub-module.
The fifth execution submodule is used for reading the third current state information of the GPIO by the BMC;
the second storage submodule is used for storing the third current state information into a second configuration space by the BMC;
the fourth judgment submodule is used for the BMC to judge whether the first operation instruction information is received, wherein the first operation instruction information is operation instruction information for changing the current state of the GPIO;
the fifth execution submodule is used for changing the current state of the GPIO by the BMC and generating fourth current state information if the current state of the GPIO is the same as the current state of the GPIO;
the fifth judgment submodule is used for judging whether the third current state information is consistent with the fourth current state information by the BMC;
and the sixth execution submodule is used for generating a marking bit at the specified position of the second configuration space by the BMC if the second configuration space is not the first configuration space.
In the embodiment of the invention, the BMC reads the third current state information of the GPIO and stores the third current state information into the second configuration space. The BMC provides a graphically selectable interface in the web management interface for a user to view a current topology mode and select a topology mode. And the user sends first operation instruction information to the BMC through the web management interface, wherein the first operation instruction information is the operation instruction information for changing the current state of the GPIO. And after receiving the first operation instruction information, the BMC changes the current state of the GPIO and generates fourth current state information. The BMC judges whether the third current state information is consistent with the fourth current state information, namely if the changed state of the GPIO is inconsistent with the current state of the GPIO, the BMC sets an identification bit at a specified position of a KCS configuration space interacted with the BIOS; meanwhile, the changed state (i.e. the fourth current state information) of the GPIO is required to be updated to the specified position of the specified configuration space and the KCS configuration space interacting with the BIOS, so that the BIOS can acquire the set changed state information (i.e. the fourth current state information) of the GPIO.
Further, the changing module 2 further includes a sixth determining sub-module and a seventh executing sub-module.
A sixth judging submodule, configured to judge whether second operation instruction information is received by the BIOS if the GPIO is not received, where the second operation instruction information is operation instruction information for changing a current state of the GPIO;
and the seventh execution sub-module is used for changing the GPIO from the second preset state to a fifth current state if the GPIO is in the fifth preset state, and setting the output level of the GPIO according to the fifth current state information.
In the embodiment of the invention, the BIOS has a corresponding BIOS Setup interface. Like a conventional PC, after completing BIOS power-on self-test, pressing a designated key, such as a Del key, into a BIOS Setup interface may configure various settings. In the embodiment of the invention, the GPU topology setting column is directly and newly added in the BIOS setup setting project, and the general mode, the balance mode and the cascade mode of the GPU server corresponding to three options are provided. And the user enters a BIOS Setup interface by pressing a hot key, selects a mode to be set under a GPU topology setting column, and generates second operation instruction information. The BIOS judges whether second operation instruction information is received or not; and if the BIOS operating system receives the second operating instruction information, the BIOS operating system changes the GPIO from the second preset state to a fifth current state, and sets the output level of the GPIO according to the fifth current state information, so that the topological structure of the GPU server is modified, and the GPU server mode switching is completed. The BIOS operating system stores the modified value into NVRAM before saving exit, and modifies the state of the GPIO. After the saving and the setting are finished, a system reset command is sent through the command to restart the BIOS operating system. When the system is reset, the platform devices of the system are completely initialized, and the selected GPIO state is not the reset attribute of a platform reset (PLTRST _ N) signal, so that the state can still keep the set state before reset, the state is ensured to be consistent with the required state when each device is reset, and the abnormality caused by uncertain setting of partial devices after topology change is avoided. After the BIOS is reset, the BIOS operating system re-executes the BIOS power-on and logic flow to ensure the state is correct. Through the setting, the BIOS Setup interface can directly modify the current state of the GPIO, so that the GPU server mode switching is completed, the operation is simple and easy to learn, and the user can learn and operate conveniently.
Referring to fig. 3 and 4, the present invention further provides a device for switching GPU topology over cable, which is used to execute the method for switching GPU topology over cable.
In the embodiment of the present invention, the device for switching GPU topology by wireless cable includes a first CPU5, a second CPU6, a PCH module 7, a BMC module 8, a first MUX module 9, a second MUX module 10, a third MUX module 11, a first PCIe Switch module 12, a second PCIe Switch module 13, and a PCIe expansion slot 14. The PCIe signals are respectively extended by different PCIe port of the first CPU5 and the second CPU6, and the PCIe Switch expands multiple PCIe slots to realize the PCIe expansion requirement of multiple GPU cards. PCIe switch is a 96 Lane IC, the IC model is PEX8796, 6 PCIe x16 ports can be provided, and the functions of an upstream Port and a downstream Port can be defined. The MUX modules used in the present invention are all PCIe muxes commonly used in the industry, such as CBTL04083BBS of NXP, but are not limited to be used only with the current model. Specifically, referring to fig. 3, the PCIe expansion slot module 12 sequentially includes a first expansion slot and a second expansion slot from right to left. The first PCIe root Port (Port A) of the first CPU5 is directly connected to the upstream interface (Port A) of the first PCIe Switch module 12; another PCIe root Port (Port B) of the first CPU5 is connected to Port B of the first MUX module, and PCIe root Port (Port A) of the second CPU6 is connected to Port C of the first MUX module and to Port A of the upstream interface of the second PCIe Switch module 13 via Port A of the first MUX module 9. The PCIe Port of the first PCIe Switch module 12 is defined as a fixed mode, the Port a of the first PCIe Switch module 12 is connected to the PCIe Port a of the first CPU5, the Port B/C/D/E/F of the first PCIe Switch module 12 are all downlink interfaces, and the Port B/C/D/E of the first PCIe Switch module 12 is connected to the first expansion slot, the second expansion slot, the third expansion slot, and the fourth expansion slot, respectively. Port F of the first PCIe Switch module 12 is connected to Port B of the third MUX module 11, and is connected to the fifth expansion slot via Port B and Port A of the third MUX module 11. Port C of the third MUX module 11 is connected to Port C of the second MUX module 10. Port B of the second MUX module 10 is connected to a sixth PCIe expansion slot. Port A of the second MUX module 10 is connected to Port B of the second PCIe Switch module 13, which is an upstream/downstream configurable Port. The second PCIe Switch module 13 is defined as a variable mode, where four ports C/D/E/F of the second PCIe Switch module 13 are fixed downstream interfaces, and the four interfaces are connected to the seventh expansion slot, the eighth expansion slot, the ninth expansion slot, and the tenth expansion slot respectively. The Port a/B of the second PCIe Switch module 13 is an upstream/downstream configurable Port, and the two interfaces can be configured according to the Uplink Strap state to define one of the ports as an upstream Port and the other Port as a downstream Port. Port A of the second PCIe Switch module 13 is connected to Port A of the first MUX module 9, and Port B is connected to Port B of the second MUX module 10. In the embodiment of the invention, when the GPU topology is in the general mode and the balanced mode, the downlink interfaces of the first PCIe Switch module 12 and the second PCIe Switch module 13 are both a/B paths, so that the PCIe expansion slots are expanded to the maximum, and 10 PCIe expansion slots can be expanded. When the GPU topology is in the cascade mode, the GPIO signal is changed to the high level, and the downlink interface Port F signal of the first PCIe Switch module 12 is switched to the a/C path due to the channel of the third MUX module 11, so that the fifth expansion slot is in the disconnected state and cannot be used; meanwhile, after the second PCIe Switch module 13 determines that Srtap Pin is at a high level, Port B is changed to an uplink interface, and the second MUX module 10 is switched to an a/C path, so that signal cascade of the first PCIe Switch module 12 and the second PCIe Switch module 13 is realized, and meanwhile, the sixth expansion slot is in a disconnected state and cannot be used, so that only 8 effective PCIe expansion slots can be provided in a cascade mode.
Referring to fig. 4, another hardware embodiment of an apparatus for switching GPU topology for a wireless cable.
In an embodiment of the present invention, a first PCIe root Port (Port A) of the first CPU5 is directly connected to the upstream interface Port A of the first PCIeSlwitch module 12. PCIe root Port (Port B) of the first CPU5 and PCIe root Port (Port A) of the second CPU6 are connected to Port B and Port C of the first MUX module 9, respectively, and to Port B of the second MUX module 10 via Port A of the first MUX module 9; port a of the second MUX module 10 is connected to Port a of the upstream interface of the second pci eswitch module 13; port C of the second MUX module 10 is connected to Port A of the second PCIe Switch module 13. Port A and Port B of the third MUX module 11 are connected to Port F and the fifth expansion slot of the first PCIe Switch module 12, respectively. The PCIe Port of the first PCIe Switch module 12 is defined as a fixed mode, where Port a is an uplink interface and is connected to Port a of the first CPU 5; the other five interfaces portB/C/D/E/F of the first PCIe Switch module 12 are downlink interfaces, and the Port B/C/D/E in the downlink interfaces are respectively connected with the first expansion slot, the second expansion slot, the third expansion slot and the fourth expansion slot. Port F of the first PCIe Switch module 12 is connected to Port A of the third MUX module 11, and is connected to the fifth expansion slot via Port B of the third MUX module 11, while Port C of the third MUX module 11 is connected to Port C of the second MUX module 10. Port A of the second MUX module 10 is connected to Port A of the second PCIeSwitch module 13, and Port B of the second MUX module 10 is connected to Port A of the first MUX module 9. The second PCIe Switch module 13 is defined as a fixed mode, where a Port a of the second PCIe Switch module 13 is an uplink interface, is connected to a Port a of the second MUX module 10, and respectively accesses different uplink signals via a Port B/C of the second MUX module 10, and five ports B/C/D/E/F of the second PCIe Switch module 13 are fixed downlink interfaces, and are respectively connected to the sixth expansion slot, the seventh expansion slot, the eighth expansion slot, the ninth expansion slot, and the tenth expansion slot. In the embodiment of the present invention, when the GPU topology is in the general mode and the balanced mode, the downlink interfaces of the first PCIe Switch module 12 and the second PCIe Switch module 13 are both a/B paths, so that the PCIe expansion slots are expanded to the maximum, and 10 PCIe expansion slots can be expanded. When the GPU topology is in the cascade mode, the downlink interface Port F signal of the first PCIe Switch module 12 is switched to the a/C path due to the channel of the third MUX module 11, so that the fifth expansion slot is in a disconnected state and cannot be used. The second MUX module 10 is switched to the a/C path, which realizes the signal cascade of the first PCIe Switch module 12 and the second PCIe Switch module 13. The downlink interface of the second PCIe Switch module 13 is not changed in configuration, and still maintains 5 expansion slots, so that the GPU topology can expand 9 PCIe expansion slots in the cascade mode.
To implement the device-related control logic of the cable-switched GPU topology of fig. 3 and 4, the main control signal is extended by the GPIO of the PCH module 7 to output a control level signal. In the embodiment of the present invention, the PCIe Switch module 10 used is a PEX8796 commonly used in the industry, but is not limited to only the current model. The MUX module used in the present invention is a PCIe MUX commonly used in the industry, such as CBTL04083BBS of NXP, but is not limited to use only the current model. The PCH module 7 referred to in the present invention is a universal bridge for Intel C62x bridge, and the BMC module 8 is a universal chip for AST2500 bridge, and the logic and methods are not limited to be used under the current conditions. To implement three different modes, 2 GPIO signals are used for control, corresponding to the GPIO1 and GPIO2 signals shown in fig. 3 or fig. 4. Before initialization, the default state of the GPIO of the PCH module 7 is defined by external pull-up and pull-down resistors, and after initialization, the default state is defined by software control; meanwhile, the GPIO Pin of the PCH module 7 has three types of signals of RSMRST _ N signal reset, platform reset signal PLTRST _ N signal reset and chip complete power-down reset in the aspect of state reset; the GPIO of the PCH module 7 selected by the invention adopts a non-platform reset type signal powered by a standby power supply, namely the GPIO can keep the current state under the normal shutdown state. In order that the BMC can also acquire the current topology state, 2 GPIOs Pin are also used. Respectively connected to GPIO1 and GPIO2 of PCH module 7, and configured to obtain a state of a GPIO control output of the current PCH module 7, which facilitates state confirmation and operation management during remote management. After being isolated by a triode, the GPIO of the PCH module 7 is directly connected with the upper port strap Pin of the first MUX module 9 and the upper port strap Pin of the second PCIeSlwitch module 13 respectively or directly; the GPIO1 signal is used for switching between a balanced mode and a general-purpose mode, and the GPIO2 signal is used for realizing switching between a cascade mode; the default state of the GPIO and the corresponding GPU application topology in the actual application may be defined according to actual needs. The selected MUX module is PCIe MUX IC, when SEL of the PCIe MUX IC is low, the channel A is communicated with the channel B; when SEL is high, the channel A is communicated with the channel C, so that the logical relationship between the GPIO state and the GPU application topology during implementation is as follows: when the GPIO1 and the GPIO2 are both in low level, the GPU topological structure is in a general mode; when the GPIO1 is high level and the GPIO2 is low level, the GPU topology structure is in a balanced mode, and when the GPIO2 is high level, the GPU topology structure is in a cascade mode regardless of the GPIO1 level state.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (5)

1. A method for switching GPU topology over a cable, having a corresponding operating system comprising a BIOS and a BMC, the operating system being associated with a PCH, the PCH having a corresponding GPIO, comprising:
the operating system is powered on and completes initialization;
changing the state of the GPIO of the PCH according to a preset mode;
storing the changed state information of the GPIO of the PCH;
resetting a system, and completing the switching of a GPU topological structure, wherein the GPU topological structure comprises a general mode, a balance mode and a cascade mode;
wherein the content of the first and second substances,
the BIOS has a corresponding first configuration space, the first configuration space has first preset state information of the GPIO prestored therein, and the step of changing the state of the GPIO of the PCH in a preset manner includes:
judging whether the starting is started for the first time;
if not, reading first current state information of the GPIO, and reading first preset state information of the GPIO prestored in the first configuration space;
judging whether the first current state information is consistent with the first preset state information or not;
if not, setting the output level of the GPIO according to the first preset state information, and generating instruction information for resetting the system;
the BMC is provided with a corresponding second configuration space, the second configuration space stores second preset state information of the GPIO generated by a user through BMC operation, the BIOS is provided with a corresponding KCS interface, the KCS interface is in communication connection with the BMC, and the judging step of whether the starting is carried out for the first time includes the following steps:
if yes, the BIOS sets a second current state of the GPIO;
the BIOS stores the second current state information to the first configuration space;
the BIOS performs power-on self-test;
the BIOS judges whether marking bit information from the BMC is read through the KCS interface or not, wherein the marking bit information is correspondingly associated with second preset state information of the GPIO;
if so, the BIOS changes the GPIO from the second current state to the second preset state, and sets the output level of the GPIO according to the second preset state information;
wherein the content of the first and second substances,
the method comprises the following steps of adding a GPU topology setting column in a BIOS setup setting project, providing a general mode, a balance mode and a cascade mode of a GPU server corresponding to three options, and judging whether the BIOS reads marking bit information from the BMC through the KCS interface, wherein the steps comprise:
if not, the BIOS judges whether second operation instruction information is received or not, wherein the second operation instruction information is the operation instruction information for changing the current state of the GPIO;
and if so, changing the GPIO from the second preset state to a fifth current state, and setting the output level of the GPIO according to fifth current state information.
2. The method for switching GPU topology via cable according to claim 1, wherein said step of determining whether said BIOS reads flag bit information from said BMC via said KCS interface comprises:
the BMC reads third current state information of the GPIO;
the BMC stores the third current state information to the second configuration space;
the BMC judges whether first operation instruction information is received, wherein the first operation instruction information is operation instruction information for changing the current state of the GPIO;
if so, the BMC changes the current state of the GPIO to generate fourth current state information;
the BMC judges whether the third current state information is consistent with the fourth current state information;
and if not, generating a marking bit at the specified position of the second configuration space.
3. An apparatus for a cable-switched GPU topology, comprising:
the initialization module is used for electrifying the operating system and completing initialization;
the changing module is used for changing the state of the GPIO of the PCH according to a preset mode;
the storage module is used for storing the state information of the PCH after the GPIO is changed;
the system comprises a reset module, a switching module and a switching module, wherein the reset module is used for resetting a system and completing the switching of a GPU topological structure, and the GPU topological structure comprises a general mode, a balance mode and a cascade mode;
wherein the content of the first and second substances,
the change module includes:
the first judgment submodule is used for judging whether the starting is started for the first time;
the first execution sub-module is used for reading the first current state information of the GPIO and reading the first preset state information of the GPIO prestored in the first configuration space if the GPIO is not in the first configuration space;
the second judgment submodule is used for judging whether the first current state information is consistent with the first preset state information or not;
the second execution submodule is used for setting the output level of the GPIO according to the first preset state information and generating instruction information for resetting the system if the GPIO is not in the preset state;
wherein the content of the first and second substances,
the change module further comprises:
the third execution submodule is used for judging that the BIOS is started for the first time, and the BIOS sets a second current state of the GPIO;
the first storage submodule is used for storing the second current state information into the first configuration space by the BIOS;
the first self-checking module is used for performing power-on self-checking on the BIOS;
a third judging submodule, configured to judge, by the BIOS, whether the BIOS reads flag bit information from the BMC through a KCS interface, where the flag bit information is associated with second preset state information of the GPIO correspondingly;
a fourth execution sub-module, configured to, if yes, change the GPIO from the second current state to the second preset state by the BIOS, and set an output level of the GPIO according to the second preset state information;
wherein the content of the first and second substances,
the change module also comprises a sixth judgment submodule and a seventh execution submodule;
a sixth judging submodule, configured to judge whether second operation instruction information is received by the BIOS if the GPIO is not received, where the second operation instruction information is operation instruction information for changing a current state of the GPIO;
and the seventh execution sub-module is used for changing the GPIO from the second preset state to a fifth current state if the GPIO is in the fifth preset state, and setting the output level of the GPIO according to the fifth current state information.
4. The apparatus for cableless switching of GPU topology according to claim 3, wherein said altering module further comprises:
a fifth execution submodule, configured to read, by the BMC, third current state information of the GPIO;
the second storage submodule is used for storing the third current state information into a second configuration space by the BMC;
a fourth judging submodule, configured to judge, by the BMC, whether first operation instruction information is received, where the first operation instruction information is operation instruction information for changing the current state of the GPIO;
a fifth execution submodule, configured to, if yes, change the current state of the GPIO by the BMC, and generate fourth current state information;
a fifth judging submodule, configured to judge, by the BMC, whether the third current state information is consistent with the fourth current state information;
and the sixth execution submodule is used for generating a marking bit at the appointed position of the second configuration space by the BMC if the second configuration space is not the first configuration space.
5. A device for switching GPU topology over cable, characterized in that it is configured to perform the method of switching GPU topology over cable according to any of claims 1 to 2.
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