CN110322832B - AMOLED pixel driving circuit and time sequence control method - Google Patents
AMOLED pixel driving circuit and time sequence control method Download PDFInfo
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- CN110322832B CN110322832B CN201810266191.4A CN201810266191A CN110322832B CN 110322832 B CN110322832 B CN 110322832B CN 201810266191 A CN201810266191 A CN 201810266191A CN 110322832 B CN110322832 B CN 110322832B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The invention relates to the technical field of display, and discloses an AMOLED pixel driving circuit and a time sequence control method, wherein the pixel driving circuit comprises: the pixel driving circuit comprises a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a capacitor and an organic light emitting diode, and further comprises a seventh thin film transistor arranged between the second end of the first thin film transistor and a first node, and a sixth thin film transistor arranged between the second end of the first thin film transistor and the third thin film transistor, wherein the second thin film transistor and the sixth thin film transistor are symmetrically arranged, the threshold values of the second thin film transistor and the sixth thin film transistor are equal, the threshold voltage of the driving thin film transistor can be compensated, and the wiring in a panel can be reduced to adapt to a small-size pixel space.
Description
Technical Field
The invention relates to the technical field of display, in particular to an AMOLED pixel driving circuit and a time sequence control method.
Background
As shown in fig. 1, the conventional AMOLED pixel driving circuit has a structure of 7T1C, that is, a structure of seven thin film transistors plus one capacitor, and includes a first thin film transistor T10, a second thin film transistor T20, a third thin film transistor T30, a fourth thin film transistor T40, a fifth thin film transistor T50, a sixth thin film transistor T60, a seventh thin film transistor T70, and a capacitor C10, wherein a gate of the first thin film transistor T10 is electrically connected to a second scan control signal line S2, a first end of the first thin film transistor T10 is electrically connected to a DATA signal line DATA, and a second end of the first thin film transistor T20 and a first end of the fourth thin film transistor T40 are electrically connected via a first node N10; a gate of the second thin film transistor T20 is electrically connected to the second node N20, a first terminal is electrically connected to the first node N10, and a second terminal is electrically connected to the third node N30; a gate of the third tft T30 is electrically connected to the second scan control signal line S2, a first terminal of the third tft T30 is electrically connected to the third node N30, and a second terminal of the third tft T30 is electrically connected to the second node N20 and the first terminal of the sixth tft T60; a gate of the fourth thin film transistor T40 is electrically connected to the light emitting signal line En, a first terminal of the fourth thin film transistor T40 is electrically connected to the first node N10, and a second terminal of the fourth thin film transistor T40 is electrically connected to the power voltage ELVDD; a gate of the fifth thin film transistor T50 is electrically connected to the light emitting signal line En, a first terminal of the fifth thin film transistor T50 is electrically connected to the third node N30, and a second terminal of the fifth thin film transistor T50 is electrically connected to the anode of the organic light emitting diode D10 and the second terminal of the seventh thin film transistor T70; a gate of the sixth thin film transistor T60 is electrically connected to the first scan control signal line S1, a first end of the sixth thin film transistor T60 is electrically connected to the second end of the third thin film transistor T30, and a second end of the sixth thin film transistor T60 is electrically connected to the first end of the seventh thin film transistor T70 and the reference voltage signal line VINT; a gate of the seventh thin film transistor T70 is connected to the second scan control signal line S2, a first end of the seventh thin film transistor T70 is electrically connected to the second end of the sixth thin film transistor T60 and the reference voltage signal line VINT, and a second end of the seventh thin film transistor T70 is electrically connected to the second end of the fifth thin film transistor T50 and the anode of the organic light emitting diode D10; a first end of the capacitor C10 is electrically connected to the second node N20, and the other end is connected to the power voltage ELVDD; the anode of the organic light emitting diode D10 is electrically connected to the second terminal of the fifth tft T50 and the second terminal of the seventh tft T70, and the cathode is grounded.
The AMOLED pixel driving circuit includes a plurality of signal lines, such as a first scan control signal line S1, two second scan control signal lines S2, and a reference voltage signal line VINT, and has complicated wiring and cannot satisfy a small pixel size.
Disclosure of Invention
The invention provides an AMOLED pixel driving circuit and a time sequence control method.
In order to achieve the above object, the present invention provides an AMOLED pixel driving circuit, which includes a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a capacitor, and an organic light emitting diode;
the grid electrode of the first thin film transistor is electrically connected with the scanning control signal line, the first end of the first thin film transistor is electrically connected with the data signal line, and the second end of the first thin film transistor is electrically connected with the first node;
the grid electrode of the second thin film transistor is electrically connected to the second node, the first end of the second thin film transistor is electrically connected to the first node, and the second end of the second thin film transistor is electrically connected to the third node;
the grid electrode of the third thin film transistor is electrically connected to the scanning control signal line, the first end of the third thin film transistor is electrically connected to the second node, and the second end of the third thin film transistor is electrically connected to the third node;
a gate of the fourth thin film transistor is electrically connected to the first light-emitting signal line, a first end of the fourth thin film transistor is electrically connected to a power supply voltage, and a second end of the fourth thin film transistor is electrically connected to the first node;
a gate of the fifth thin film transistor is electrically connected to the second light emitting signal line, a first end of the fifth thin film transistor is electrically connected to the third node, and a second end of the fifth thin film transistor is electrically connected to an anode of the organic light emitting diode;
the first end of the capacitor is electrically connected to the second node; the second end is electrically connected to the power voltage;
the anode of the organic light emitting diode is electrically connected to the second end of the fifth thin film transistor, and the cathode of the organic light emitting diode is grounded;
the second thin film transistor is a driving thin film transistor.
The AMOLED pixel driving circuit adopts a 5T1C structure, the threshold voltage of the driving thin film transistor is compensated through the third thin film transistor, and the AMOLED pixel driving circuit reduces scanning signal lines and reference voltage signal lines and reduces wiring inside a panel so as to adapt to small-size pixel space.
The AMOLED pixel driving circuit further includes:
the seventh thin film transistor is arranged between the second end of the first thin film transistor and the first node, the grid electrode of the seventh thin film transistor is electrically connected to the second node, the first end is electrically connected to the second end of the first thin film transistor, and the second end is electrically connected to the first node;
and the grid electrode of the sixth thin film transistor is electrically connected to the second node and the first end of the capacitor and shares the grid electrode with the second thin film transistor, the first end is electrically connected to the second end of the first thin film transistor, and the second end is electrically connected to the second end and the third node of the third thin film transistor.
The AMOLED pixel driving circuit adopts a 7T1C structure, and realizes the function of compensating the threshold voltage of the driving thin film transistor by symmetrically arranging a sixth thin film transistor and a second thin film transistor with equal threshold voltages, so that the current flowing through the organic light emitting diode is unrelated to the threshold voltage of the second thin film transistor, namely the driving transistor; the AMOLED pixel driving circuit reduces scanning signal lines and reference voltage signal lines and reduces wiring inside a panel to adapt to a small-sized pixel space.
Preferably, the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor and the seventh thin film transistor are all low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.
Preferably, the sixth thin film transistor and the second thin film transistor are symmetrically arranged, and the channel widths of the sixth thin film transistor and the second thin film transistor are the same.
Preferably, the input terminal of the scan control signal line, the input terminal of the first light emitting signal line, and the input terminal of the second light emitting signal line are provided with connection terminals for connection with an external timing controller.
The invention also provides a time sequence control method of the AMOLED pixel driving circuit in the technical scheme, which comprises the following steps:
entering an initialization stage, wherein a power supply voltage provides a high potential, a first light-emitting signal line provides the high potential, a fourth thin film transistor is closed, a second light-emitting signal line provides a low potential, a fifth thin film transistor is opened, the voltage of a third node is equal to the voltage of the anode of the organic light-emitting diode, a scanning control signal line provides the low potential, the first thin film transistor and the third thin film transistor are opened, the voltage of the second node is equal to the voltage of the anode of the organic light-emitting diode, the second thin film transistor is opened, the fourth thin film transistor is in a closed state, a data signal line is in a closed state or provides the low potential so that no current passes through the organic light-emitting diode, and the organic light-emitting diode;
entering an adjusting stage, wherein when the adjusting stage is finished, the power supply voltage provides a high potential, the first light-emitting signal line provides the high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides the high potential, the fifth thin film transistor is closed, the organic light-emitting diode does not emit light, the scanning control signal line provides the high potential, the first thin film transistor and the third thin film transistor are closed, the voltage of a second node is kept equal to the voltage of the anode of the organic light-emitting diode, and the second thin film transistor is opened;
entering a data writing stage, wherein a power supply voltage provides a high potential, a light emitting signal line provides the high potential, a fourth thin film transistor is closed, a second light emitting signal line provides the high potential, a fifth thin film transistor is closed, the organic light emitting diode does not emit light at the moment, a first scanning control signal line provides a low potential, a first thin film transistor and a third thin film transistor are opened, a data signal line provides the high potential, a second node writes a voltage provided by the data signal line, and the second thin film transistor is closed;
entering a holding stage, wherein the power supply voltage provides a high potential, the first light-emitting signal line provides the high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides the high potential, the fifth thin film transistor is closed, the organic light-emitting diode does not emit light, the scanning control signal line provides the high potential, the first thin film transistor and the third thin film transistor are closed, the second node holds the voltage provided by the data signal line written in the data writing stage, and the second thin film transistor is closed;
and entering a driving stage, wherein the scanning control signal line provides a high potential, the first thin film transistor and the third thin film transistor are closed, the power supply voltage provides the high potential, the first light-emitting signal line provides a low potential, the fourth thin film transistor is opened, the second light-emitting signal line provides a low potential, the fifth thin film transistor is opened, the second thin film transistor is in an open state, and the organic light-emitting diode emits light.
Preferably, the adjusting stage comprises:
in the first adjustment stage, the power voltage provides a high potential, the first light-emitting signal line provides a high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides a low potential, the fifth thin film transistor is opened, the scanning control signal line provides a high potential, the first thin film transistor and the third thin film transistor are closed, the voltage of the second node is kept equal to the voltage of the anode of the organic light-emitting diode, the second thin film transistor is opened, and the organic light-emitting diode does not emit light at the moment;
in the second adjustment stage, the power voltage provides a high potential, the first light-emitting signal line provides the high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides the high potential, the fifth thin film transistor is closed, the organic light-emitting diode does not emit light, the scanning control signal line provides the high potential, the first thin film transistor and the third thin film transistor are closed, the voltage of the second node is kept equal to the voltage of the anode of the organic light-emitting diode, and the second thin film transistor is opened.
When the AMOLED pixel driving circuit includes the sixth thin film transistor and the seventh thin film transistor:
in the initialization stage, the power supply voltage provides a high potential, the first light-emitting signal line provides a high potential, the fourth thin film transistor is turned off, the second light-emitting signal line provides a low potential, the fifth thin film transistor is turned on, the voltage of the third node is equal to the voltage of the anode of the organic light-emitting diode, the scanning control signal line provides a low potential, the first thin film transistor and the third thin film transistor are turned on, the voltage of the second node is equal to the voltage of the anode of the organic light-emitting diode, the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are turned on, the fourth thin film transistor is in a turned-off state, the data signal line is in a turned-off state or provides a low potential so that no current passes through the organic light-emitting diode;
in the adjusting stage, when the adjusting stage is finished, the power supply voltage provides a high potential, the first light-emitting signal line provides a high potential, the fourth thin film transistor is turned off, the second light-emitting signal line provides a high potential, the fifth thin film transistor is turned off, the organic light-emitting diode does not emit light, the scanning control signal line provides a high potential, the first thin film transistor and the third thin film transistor are turned off, the voltage of the second node is kept equal to the voltage of the anode of the organic light-emitting diode, and the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are turned on;
in the data writing stage, the power voltage provides a high potential, the first light-emitting signal line provides a high potential, the fourth thin film transistor is turned off, the second light-emitting signal line provides a high potential, the fifth thin film transistor is turned off, the organic light-emitting diode does not emit light at the moment, the scanning control signal line provides a low potential, the first thin film transistor and the third thin film transistor are turned on, the data signal line provides a high potential, the sixth thin film transistor is firstly turned on, the voltage provided by the data signal line is written into the second node through the first thin film transistor, the sixth thin film transistor and the third thin film transistor, and the sixth thin film transistor is turned off, the second thin film transistor and the seventh thin film transistor are turned off after the second node is Vdata- | Vth6|, wherein Vth6 is the threshold voltage of the sixth thin film transistor, and Vdata is the voltage provided by the data signal;
in the holding stage, the power supply voltage provides a high potential, the first light-emitting signal line provides the high potential, the fourth thin film transistor is turned off, the second light-emitting signal line provides the high potential, the fifth thin film transistor is turned off, the organic light-emitting diode does not emit light, the scanning control signal line provides the high potential, the first thin film transistor and the third thin film transistor are turned off, the second node holds the voltage provided by the data signal line written in the data writing stage, and the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are in an off state;
in the driving stage, the scan control signal line provides a high potential, the first thin film transistor and the third thin film transistor are turned off, the power supply voltage provides a high potential, the first light emitting signal line provides a low potential, the fourth thin film transistor is turned on, the second light emitting signal line provides a low potential, the fifth thin film transistor is turned on, the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are in an on state, and the organic light emitting diode emits light.
Preferably, when the AMOLED pixel driving circuit includes the sixth thin film transistor and the seventh thin film transistor:
the adjusting stage comprises:
in the first adjustment stage, the power voltage provides a high potential, the first light-emitting signal line provides a high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides a low potential, the fifth thin film transistor is opened, the scanning control signal line provides a high potential, the first thin film transistor and the third thin film transistor are closed, the voltage of the second node is kept equal to the voltage of the anode of the organic light-emitting diode, the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are opened, and the organic light-emitting diode does not emit light at the moment;
in the second adjustment stage, the power voltage provides a high potential, the first light-emitting signal line provides the high potential, the fourth thin film transistor is closed, the second light-emitting signal line provides the high potential, the fifth thin film transistor is closed, the organic light-emitting diode does not emit light, the scanning control signal line provides the high potential, the first thin film transistor and the third thin film transistor are closed, the voltage of the second node is kept equal to the voltage of the anode of the organic light-emitting diode, and the second thin film transistor, the sixth thin film transistor and the seventh thin film transistor are opened.
Preferably, the scanning control signal line has a signal of two pulses or more, including at least one pulse of the same time for all rows and one pulse of progressive scanning.
Drawings
FIG. 1 is an AMOLED pixel driving circuit;
fig. 2 is a first AMOLED pixel driving circuit provided in the present invention;
fig. 3 is a second AMOLED pixel driving circuit provided in the present invention;
FIG. 4 is a timing diagram of the AMOLED pixel driving circuit shown in FIG. 3;
FIG. 5 is a circuit diagram of the AMOLED pixel driving circuit shown in FIG. 3 at an initialization stage;
FIG. 6 is a circuit diagram of the AMOLED pixel driving circuit shown in FIG. 3 at a first adjustment stage;
FIG. 7 is a circuit diagram of the AMOLED pixel driving circuit shown in FIG. 3 at a second adjustment stage;
FIG. 8 is a circuit diagram of the AMOLED pixel driving circuit shown in FIG. 3 during a data writing phase;
FIG. 9 is a circuit diagram of the AMOLED pixel driving circuit shown in FIG. 3 during a hold phase;
fig. 10 is a circuit diagram of the AMOLED pixel driving circuit shown in fig. 3 in a driving stage.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2, the present invention provides an AMOLED pixel driving circuit, which includes a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a fifth thin film transistor T5, a capacitor C1, and an organic light emitting diode D1;
a gate of the first thin film transistor T1 is electrically connected to the scan control signal line Sn, a first end is electrically connected to the Data signal line Data, and a second end is electrically connected to the first node N1;
a gate of the second thin film transistor T2 is electrically connected to the second node N2, a first terminal is electrically connected to the first node N1, and a second terminal is electrically connected to the third node N3;
a gate of the third tft T3 is electrically connected to the scan control signal line Sn, a first terminal of the third tft T3 is electrically connected to the second node N2, and a second terminal of the third tft T3 is electrically connected to the third node N3;
a gate of the fourth thin film transistor T4 is electrically connected to the first light-emitting signal line En1, a first terminal of the fourth thin film transistor T4 is electrically connected to the power voltage ELVDD, and a second terminal of the fourth thin film transistor T4 is electrically connected to the first node N1;
a gate of the fifth thin film transistor T5 is electrically connected to the second light emitting signal line En2, a first terminal of the fifth thin film transistor T5 is electrically connected to the third node N3, and a second terminal of the fifth thin film transistor T5 is electrically connected to the anode of the organic light emitting diode D1;
a first end of the capacitor C1 is electrically connected to the second node N2; the second end is electrically connected to the power voltage ELVDD;
the anode of the organic light emitting diode D1 is electrically connected to the second end of the fifth thin film transistor T5, and the cathode is grounded;
the second thin film transistor T2 is a driving thin film transistor.
The AMOLED pixel driving circuit adopts a 5T1C structure, the threshold voltage of the driving thin film transistor is compensated through the third thin film transistor, and the AMOLED pixel driving circuit reduces scanning signal lines and reference voltage signal lines and reduces wiring inside a panel so as to adapt to small-size pixel space.
Referring to fig. 3, the AMOLED pixel driving circuit further includes:
a seventh tft T7 disposed between the second end of the first tft T1 and the first node N1, wherein a gate of the seventh tft T7 is electrically connected to the second node N2, a first end of the seventh tft T7 is electrically connected to the second end of the first tft T1, and a second end of the seventh tft T7 is electrically connected to the first node N1;
a sixth tft T6 disposed between the second end of the first tft T1 and the third tft T3, wherein a gate of the sixth tft T6 is electrically connected to the second node N2 and the first end of the capacitor C1, and shares a gate with the second tft T2, the first end is electrically connected to the second end of the first tft T1, and the second end is electrically connected to the second end of the third tft T3 and the third node N3.
The AMOLED pixel driving circuit adopts a 7T1C structure, and realizes the function of compensating the threshold voltage of the driving thin film transistor by symmetrically arranging a sixth thin film transistor and a second thin film transistor with equal threshold voltages, so that the current flowing through the organic light emitting diode is unrelated to the threshold voltage of the second thin film transistor, namely the driving transistor; the AMOLED pixel driving circuit reduces scanning signal lines and reference voltage signal lines and reduces wiring inside a panel to adapt to a small-sized pixel space.
Specifically, in the AMOLED pixel driving circuit, the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, the fifth thin film transistor T5, the sixth thin film transistor T6, and the seventh thin film transistor T7 are all low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
The sixth tft T6 and the second tft T2 are symmetrically disposed and have the same channel width, so that the threshold voltages of the sixth tft T6 and the second tft T2 are equal, and the threshold voltage of the sixth tft T6 can compensate the threshold voltage of the second tft T2, i.e., the driving tft, so that the current flowing through the organic light emitting diode is independent of the threshold voltage of the second tft T2. The two tfts T2 are driving tfts, and the sixth tft T6 is a mirror image tft.
Specifically, an input terminal of the scan control signal line Sn, an input terminal of the first light emitting signal line En1, and an input terminal of the second light emitting signal line En2 are provided with connection terminals for connection with an external timing controller. The scan control signal line Sn and the light emitting signal line En are provided through an external sequential circuit.
The invention also provides a time sequence control method of the AMOLED pixel driving circuit in the technical scheme, which comprises the following steps:
entering an initialization stage 1, when the power voltage ELVDD is in an off state, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is off, the second light emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is on, the voltage of the third node N3 is equal to the voltage of the anode of the organic light emitting diode D1, the scan control signal line Sn provides a low voltage, the first thin film transistor T1 and the third thin film transistor T3 are on, the voltage of the second node N2 is equal to the voltage of the anode of the organic light emitting diode D1, the second thin film transistor T2 is on, and the fourth thin film transistor is in an off state, so that no conduction loop exists between the power voltage ELVDD and the organic light emitting diode D1, the Data signal line Data is in an off state or a low voltage is provided, no current flows through the organic light emitting diode D1, and the organic light emitting diode D1;
entering the first adjustment phase 2, the power voltage ELVDD provides a high voltage, the first light-emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light-emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is turned on, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the voltage of the second node N2 is kept equal to the voltage of the anode of the organic light-emitting diode D1, the second thin film transistor T2 is turned on, since the fourth thin film transistor is in an off state, there is no conduction loop between the power voltage ELVDD and the organic light-emitting diode D1, the power voltage cannot provide a voltage for the light-emitting diode, and the first thin film transistor T1 and the third thin film transistor T3 are in an off state, at this time, the organic light-emitting diode D1 does not emit;
entering the second adjustment phase 3, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a high voltage, the fifth thin film transistor T5 is turned off, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 has no conduction path and does not emit light, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the voltage of the second node N2 is maintained to be equal to the voltage of the anode of the organic light emitting diode D1, and the second thin film transistor T2 is turned on;
entering the Data writing phase 4, the power voltage ELVDD provides a high potential, the first light emitting signal line En1 provides a high potential, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a high potential, the fifth thin film transistor T5 is turned off, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 does not emit light without a conduction path, the scan control signal line Sn provides a low potential, the first thin film transistor T1 and the third thin film transistor T3 are turned on, the Data signal line Data provides a high potential, the second node N2 writes the voltage provided by the Data signal line Data, and the second thin film transistor T2 is turned off;
entering the hold stage 5, the power supply voltage ELVDD supplies a high potential, the first light emitting signal line En1 supplies a high potential, the fourth thin film transistor is turned off, the second light emitting signal line En2 supplies a high potential, the fifth thin film transistor T5 is turned off, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 does not have a conduction path and does not emit light, the scan control signal line Sn supplies a high potential, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the second node N2 holds a voltage supplied from the Data signal line Data written in the Data write stage, and the second thin film transistor T2 is turned off;
in the driving phase 6, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a low voltage, the fourth thin film transistor is turned on, the second light emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is turned on, the second thin film transistor T2 is turned on, and the organic light emitting diode D1 emits light.
When the AMOLED pixel driving circuit includes the sixth thin film transistor T6 and the seventh thin film transistor T7, the timing control method provided by the present invention includes the following steps:
referring to fig. 4 and 5, in the initialization phase 1, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is turned on, the voltage of the third node N3 is equal to the voltage of the anode of the organic light emitting diode D1, the scan control signal line Sn provides a low voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned on, the voltage of the second node N2 is equal to the voltage of the anode of the organic light emitting diode D1, the second thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 are turned on, the fourth thin film transistor is turned off such that there is no conduction loop between the power voltage ELVDD and the organic light emitting diode D1, the power voltage cannot provide a voltage to the light emitting diode, the Data signal line Data is turned off or provides a low voltage, at this time, no current passes through the organic light emitting diode D1, and the organic light emitting diode D1 does not emit light;
referring to fig. 4 and 6, in the first adjustment phase 2, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is turned on, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the voltage of the second node N2 is maintained to be equal to the voltage of the anode of the organic light emitting diode D1, the second thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 are turned on, since the fourth tft is in the off state, there is no conductive loop between the power voltage ELVDD and the organic light emitting diode D1, the power voltage cannot supply a voltage to the light emitting diode, the first thin film transistor T1 and the third thin film transistor T3 are in an off state, and the organic light emitting diode D1 does not emit light;
referring to fig. 4 and 7, in the second adjustment phase 3, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a high voltage, the fifth thin film transistor T5 is turned off, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 does not emit light, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the voltage of the second node N2 is kept equal to the voltage of the anode of the organic light emitting diode D1, and the second thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 are turned on;
referring to fig. 4 and 8, in the Data writing phase 4, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 provides a high voltage, the fifth thin film transistor T5 is turned off, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 does not emit light, the scan control signal line Sn provides a low voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned on, the Data signal line Data provides a high voltage, the sixth thin film transistor T6 is first turned on, the voltage provided by the Data signal line Data is written into the second node N Vth2 through the first thin film transistor T1, the sixth thin film transistor T6, and the third thin film transistor T3, the sixth thin film transistor T6 is turned off, the second thin film transistor T2 and the seventh thin film transistor T7 are turned off after the second node N2 is Vdata- | 6, wherein Vth6 is a threshold voltage of the sixth thin film transistor T6, and Vdata is a voltage provided by the Data signal Data;
referring to fig. 4 and 9, in the hold phase 5, the power voltage ELVDD is supplied with a high voltage, the first light emitting signal line En1 is supplied with a high voltage, the fourth thin film transistor is turned off, the second light emitting signal line En2 is supplied with a high voltage, the fifth thin film transistor T5 is turned off so that the organic light emitting diode D1 does not emit light, the scan control signal line Sn is supplied with a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the second node N2 holds the voltage supplied by the Data signal line Data written in the Data writing phase, and the second thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 are turned off;
referring to fig. 4 and 10, in the driving phase 6, the scan control signal line Sn provides a high voltage, the first thin film transistor T1 and the third thin film transistor T3 are turned off, the power voltage ELVDD provides a high voltage, the first light emitting signal line En1 provides a low voltage, the fourth thin film transistor is turned on, the second light emitting signal line En2 provides a low voltage, the fifth thin film transistor T5 is turned on, the second thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 are turned on, and the organic light emitting diode D1 emits light.
At this time, the voltage of the second node N2 is maintained at Vdata- | Vth6|, and the current flowing through the organic light emitting diode D1 is:
IOLED＝1/2μCoxW/LVELVDD-Vdata+Vth6－Vth2^ 2
t6 and T2 are common gate mirror image relationships, and Vth6 can be designed to be as equal to Vth2 as possible, namely: vth 6-Vth 2 ═ 0;
wherein IOLEDIs a current flowing through the organic light emitting diode D1, μ is a carrier mobility of the driving thin film transistor, W and L are a width and a length of a channel of the driving thin film transistor, Vth6 is a threshold voltage of the sixth thin film transistor T6, Vth2 is a threshold voltage of the second thin film transistor T2, and Vdata is a voltage provided by the Data signal Data, respectively; vELVDDIs the supply voltage.
As can be known from the above analysis and calculation, the threshold voltage of the sixth thin film transistor T6 compensates the threshold voltage of the second thin film transistor T2, i.e., the driving thin film transistor, so that the current flowing through the organic light emitting diode D1 is unrelated to the threshold voltage of the second thin film transistor T2.
And the AMOLED pixel driving circuit reduces scanning signal lines and reference voltage signal lines and reduces the wiring inside the panel to adapt to the small-sized pixel space.
Specifically, the scanning control signal line Sn has a signal of two pulses or more, including at least one pulse of the same time for all rows and one pulse of progressive scanning.
It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. An AMOLED pixel driving circuit is characterized by comprising a first thin film transistor (T1), a second thin film transistor (T2), a third thin film transistor (T3), a fourth thin film transistor (T4), a fifth thin film transistor (T5), a capacitor (C1) and an organic light emitting diode (D1);
a gate of the first thin film transistor (T1) is electrically connected to the scan control signal line (Sn), a first end is electrically connected to the Data signal line (Data), and a second end is electrically connected to the first node (N1);
a gate of the second thin film transistor (T2) is electrically connected to the second node (N2), a first terminal is electrically connected to the first node (N1), and a second terminal is electrically connected to the third node (N3);
a gate of the third thin film transistor (T3) is electrically connected to the scan control signal line (Sn), a first terminal is electrically connected to the second node (N2), and a second terminal is electrically connected to the third node (N3);
a gate of the fourth thin film transistor (T4) is electrically connected to the first light emitting signal line (En1), a first terminal is electrically connected to the power voltage (ELVDD), and a second terminal is electrically connected to the first node (N1);
a gate of the fifth thin film transistor (T5) is electrically connected to the second light emitting signal line (En2), a first terminal of the fifth thin film transistor is electrically connected to the third node (N3), and a second terminal of the fifth thin film transistor is electrically connected to an anode of the organic light emitting diode (D1);
a first end of the capacitor (C1) is electrically connected to a second node (N2); the second end is electrically connected to the power voltage (ELVDD);
the anode of the organic light emitting diode (D1) is electrically connected to the second end of the fifth thin film transistor (T5), and the cathode of the organic light emitting diode (D1) is grounded;
the second thin film transistor (T2) is a driving thin film transistor;
further comprising:
a seventh thin film transistor (T7) disposed between the second end of the first thin film transistor (T1) and the first node (N1), wherein a gate of the seventh thin film transistor (T7) is electrically connected to the second node (N2), a first end of the seventh thin film transistor is electrically connected to the second end of the first thin film transistor (T1), and a second end of the seventh thin film transistor is electrically connected to the first node (N1);
and a sixth thin film transistor (T6) disposed between the second end of the first thin film transistor (T1) and the third thin film transistor (T3), wherein a gate of the sixth thin film transistor (T6) is electrically connected to the second node (N2) and the first end of the capacitor (C1), and shares a gate with the second thin film transistor (T2), the first end is electrically connected to the second end of the first thin film transistor (T1), and the second end is electrically connected to the second end of the third thin film transistor (T3) and the third node (N3).
2. The AMOLED pixel driving circuit as claimed in claim 1, wherein the first thin film transistor (T1), the second thin film transistor (T2), the third thin film transistor (T3), the fourth thin film transistor (T4), the fifth thin film transistor (T5), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.
3. The AMOLED pixel driving circuit as claimed in claim 1, wherein the sixth thin film transistor (T6) and the second thin film transistor (T2) are symmetrically arranged and have the same channel width.
4. An AMOLED pixel driving circuit according to claim 1, wherein the input terminal of the scan control signal line (Sn), the input terminal of the first light emitting signal line (En1) and the input terminal of the second light emitting signal line (En2) are provided with connection terminals for connection with an external timing controller.
5. A method of timing control for an AMOLED pixel drive circuit as claimed in any one of claims 1 to 4, comprising:
entering an initialization stage, the power supply voltage (ELVDD) provides a high potential, the first light emitting signal line (En1) provides a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a low potential, the fifth thin film transistor (T5) is turned on, the voltage of the third node (N3) is equal to the voltage of the anode of the organic light emitting diode (D1), the scan control signal line (Sn) provides a low potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned on, the voltage of the second node (N2) is equal to the voltage of the anode of the organic light emitting diode (D1), the second thin film transistor (T2) is turned on, and the fourth thin film transistor (T4) is in an off state, the Data signal line (Data) is in an off state or a low potential is supplied so that no current passes through the organic light emitting diode (D1) and the organic light emitting diode (D1) does not emit light;
entering a trim phase, when the trim phase is finished, the power supply voltage (ELVDD) provides a high potential, the first light emitting signal line (En1) provides a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) provides a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), and the second thin film transistor (T2) is turned on;
entering a Data writing phase, the power supply voltage (ELVDD) provides a high potential, the first light emitting signal line (En1) provides a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) provides a low potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned on, the Data signal line (Data) provides a high potential, the second node (N2) writes a voltage provided by the Data signal line (Data), and the second thin film transistor (T2) is turned off;
entering a hold phase, the power supply voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) supplies a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the second node (N2) holds a voltage supplied from the Data signal line (Data) written in the Data write phase, and the second thin film transistor (T2) is turned off;
in the driving phase, the scan control signal line (Sn) provides a high voltage, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the power supply voltage (ELVDD) provides a high voltage, the first light emitting signal line (En1) provides a low voltage, the fourth thin film transistor (T4) is turned on, the second light emitting signal line (En2) provides a low voltage, the fifth thin film transistor (T5) is turned on, the second thin film transistor (T2) is in an on state, and the organic light emitting diode (D1) emits light.
6. The timing control method according to claim 5,
the adjusting stage comprises:
in a first adjustment phase, the power voltage (ELVDD) provides a high voltage, the first light emitting signal line (En1) provides a high voltage, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a low voltage, the fifth thin film transistor (T5) is turned on, the scan control signal line (Sn) provides a high voltage, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), the second thin film transistor (T2) is turned on, and the organic light emitting diode (D1) does not emit light;
in the second adjustment phase, the power voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) supplies a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), and the second thin film transistor (T2) is turned on.
7. The timing control method according to claim 5, wherein when the AMOLED pixel driving circuit includes a sixth thin film transistor (T6) and a seventh thin film transistor (T7):
in the initialization stage, the power supply voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a low potential, the fifth thin film transistor (T5) is turned on, the voltage of the third node (N3) is equal to the voltage of the anode of the organic light emitting diode (D1), the scan control signal line (Sn) supplies a low potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned on, the voltage of the second node (N2) is equal to the voltage of the anode of the organic light emitting diode (D1), the second none thin film transistor (T2), the sixth thin film transistor (T6), and the seventh thin film transistor (T7) are turned on, the fourth thin film transistor (T4) is in an off state, the Data signal line (Data) is in an off state, or a low potential is supplied so that a current passes through the organic light emitting diode (D1), the organic light emitting diode (D1) does not emit light;
in the above-mentioned trim phase, at the end of the trim phase, the power supply voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) supplies a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), and the second thin film transistor (T2), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are turned on;
in the Data writing phase, the power voltage (ELVDD) provides a high potential, the first light emitting signal line (En1) provides a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) provides a low potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned on, the Data signal line (Data) provides a high potential, the sixth thin film transistor (T6) is first turned on, the voltage provided by the Data signal line (Data) is written into the second node (N2) through the first thin film transistor (T1), the sixth thin film transistor (T6) and the third thin film transistor (T3), and the sixth thin film transistor (T6) is turned off after the second node (N2) is Vdata- | 6|, The second thin film transistor (T2) and the seventh thin film transistor (T7) are turned off, where Vth6 is a threshold voltage of the sixth thin film transistor (T6), and Vdata is a voltage supplied by the Data signal (Data);
in the holding period, the power supply voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) supplies a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the second node (N2) holds a voltage supplied from the Data signal line (Data) written in the Data writing period, and the second thin film transistor (T2), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are in an off state;
in the driving phase, the scan control signal line (Sn) provides a high voltage, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the power supply voltage (ELVDD) provides a high voltage, the first light emitting signal line (En1) provides a low voltage, the fourth thin film transistor (T4) is turned on, the second light emitting signal line (En2) provides a low voltage, the fifth thin film transistor (T5) is turned on, the second thin film transistor (T2), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are turned on, and the organic light emitting diode (D1) emits light.
8. The timing control method according to claim 7, wherein when the AMOLED pixel driving circuit includes a sixth thin film transistor (T6) and a seventh thin film transistor (T7):
the adjusting stage comprises:
in a first adjustment phase, the power supply voltage (ELVDD) provides a high voltage, the first light emitting signal line (En1) provides a high voltage, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) provides a low voltage, the fifth thin film transistor (T5) is turned on, the scan control signal line (Sn) provides a high voltage, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), the second thin film transistor (T2), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are turned on, and the organic light emitting diode (D1) does not emit light;
in the second trim phase, the power voltage (ELVDD) supplies a high potential, the first light emitting signal line (En1) supplies a high potential, the fourth thin film transistor (T4) is turned off, the second light emitting signal line (En2) supplies a high potential, the fifth thin film transistor (T5) is turned off, the organic light emitting diode (D1) does not emit light, the scan control signal line (Sn) supplies a high potential, the first thin film transistor (T1) and the third thin film transistor (T3) are turned off, the voltage of the second node (N2) is maintained to be equal to the voltage of the anode of the organic light emitting diode (D1), and the second thin film transistor (T2), the sixth thin film transistor (T6) and the seventh thin film transistor (T7) are turned on.
9. The timing control method according to claim 5, wherein the scan control signal line (Sn) has a signal of two pulses or more, including at least one pulse of the same time for all rows and one pulse of progressive scanning.
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