CN110321266B - CPU multi-core utilization rate optimization processing method and device for single server - Google Patents

CPU multi-core utilization rate optimization processing method and device for single server Download PDF

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CN110321266B
CN110321266B CN201910488700.2A CN201910488700A CN110321266B CN 110321266 B CN110321266 B CN 110321266B CN 201910488700 A CN201910488700 A CN 201910488700A CN 110321266 B CN110321266 B CN 110321266B
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value
cpu
core
utilization rate
alarm
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CN110321266A (en
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赵子青
吴峰
郭伟
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Shanghai Chelun Internet Services Co ltd
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Shanghai Yidianshikong Network Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment

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Abstract

The application discloses a CPU multi-core utilization rate optimization processing method and device for a single server. The method comprises the steps of collecting the utilization rate of each CPU core within a preset time interval; calculating a CPU multi-core utilization rate range value according to the CPU core utilization rate; obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate range value; and judging whether to alarm or not according to the pre-alarm value. The method and the device solve the technical problem that the performance of the server cannot be optimal or the utilization rate is maximized. The method and the device have the advantages that the reasonable and maximized utilization rate among the multiple cores of the CPU of the server is realized, and the comprehensive use cost is reduced.

Description

CPU multi-core utilization rate optimization processing method and device for single server
Technical Field
The present invention relates to the field of server optimization, and in particular, to a method and an apparatus for optimizing a CPU multi-core utilization rate for a single server.
Background
The single server is provided with multi-core CPUs, and the number of CPU cores is from 1 to 32.
The inventor finds that the number of processes or threads started when a program is started is far lower than that of multiple cores of a CPU on a single server due to the lack of understanding of the server environment, so that the multiple cores of the CPU cannot be fully utilized.
Aiming at the problem that the performance of the server in the related art cannot reach the optimum or the utilization rate is maximized, an effective solution is not provided at present.
Disclosure of Invention
The main objective of the present application is to provide a method and an apparatus for optimizing the utilization rate of multiple cores of a CPU for a single server, so as to solve the problem that the performance of the server is not optimal or the utilization rate is maximized.
In order to achieve the above object, according to an aspect of the present application, there is provided a CPU multi-core usage rate optimization processing method for a single server.
The CPU multi-core utilization rate optimization processing method for the single server comprises the following steps: collecting the utilization rate of each CPU core within a preset time interval; calculating a CPU multi-core utilization rate range value according to the CPU core utilization rate; obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate range value; and judging whether to alarm or not according to the pre-alarm value.
Further, obtaining a total value of the advance warning according to the CPU multi-core utilization rate variance value includes:
calculating an early warning value according to the CPU multi-core utilization rate range value;
calculating an early warning value according to the early warning value;
and calculating a forecast alarm accumulated value according to the early alarm value.
Further, according to the accumulated value of the advance warning, judging whether to alarm or not comprises:
determining a standard alarm value;
and comparing the pre-alarm value with the standard alarm value, and judging to alarm if the pre-alarm value is not less than the standard alarm value.
Further, according to the CPU core utilization, calculating a CPU multi-core utilization tolerance value includes:
calculating a CPU multi-core utilization rate extreme difference value through the CPU multi-core difference value;
obtaining a pre-alarm accumulated value according to the CPU multi-core utilization rate range value comprises the following steps:
and comparing the CPU multi-core utilization rate range difference value with a preset range standard value between CPU multi-cores, and when the CPU multi-core utilization rate range difference value is larger than the preset range standard value between the CPU multi-cores, giving an early warning value of + 1.
Further, when obtaining the pre-alarm accumulated value according to the CPU multi-core utilization rate range, the method further includes:
and when the early warning value has a value greater than zero, accumulating the early warning by + 1.
In order to achieve the above object, according to another aspect of the present application, there is provided a CPU multicore usage optimization processing apparatus for a single server.
The CPU multi-core utilization rate optimization processing device for the single server comprises: the acquisition module is used for acquiring the utilization rate of each CPU core within a preset time interval; the first calculation module is used for calculating a CPU multi-core utilization rate range value according to the CPU core utilization rate; the second calculation module is used for obtaining a forecast alarm accumulated value according to the CPU multi-core utilization rate range value; and the judging module is used for judging whether to alarm or not according to the pre-alarm value.
Further, the first calculation module includes:
the early warning value unit is used for calculating an early warning value according to the CPU multi-core utilization rate range value;
the early warning value unit is used for calculating an early warning value according to the early warning value;
and the pre-alarm accumulated value unit is used for calculating a pre-alarm accumulated value according to the pre-alarm value.
Further, the judging module comprises:
the determining unit is used for determining a standard alarm value;
and the judging unit is used for comparing the pre-alarm value with the standard alarm value, and judging to alarm if the pre-alarm value is not less than the standard alarm value.
Further, the first calculation module includes:
the utilization rate range difference value unit is used for calculating the CPU multi-core utilization rate range difference value through the CPU multi-core difference value;
the second calculation module includes:
and the comparison unit is used for comparing the CPU multi-core utilization rate range value with a preset range standard value between the CPU multi-cores, and when the CPU multi-core utilization rate range value is larger than the preset range standard value between the CPU multi-cores, giving an early warning value of + 1.
Further, the second calculating module is further configured to, when a value greater than zero occurs in the early warning value, add up to +1 in the early warning.
In the method and the device for the CPU multi-core utilization rate optimization processing of the single server in the embodiment of the application, the mode of collecting the utilization rate of each CPU core within a preset time interval is adopted, and the CPU multi-core utilization rate range value is calculated according to the CPU core utilization rate, so that the purpose of obtaining the warning accumulated value according to the CPU multi-core utilization rate range value is achieved, the technical effect of judging whether to give an alarm according to the warning value is achieved, and the technical problem that the performance of the server cannot be optimal or the utilization rate is maximized is solved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, serve to provide a further understanding of the application and to enable other features, objects, and advantages of the application to be more apparent. The drawings and their description illustrate the embodiments of the invention and do not limit it. In the drawings:
FIG. 1 is a flowchart illustrating a CPU multi-core usage optimization processing method for a single server according to a first embodiment of the present application;
FIG. 2 is a flowchart illustrating a CPU multi-core usage optimization processing method for a single server according to a second embodiment of the present application;
FIG. 3 is a flowchart illustrating a CPU multi-core usage optimization processing method for a single server according to a third embodiment of the present application;
FIG. 4 is a flowchart illustrating a CPU multi-core usage optimization processing method for a single server according to a fourth embodiment of the present disclosure;
FIG. 5 is a flowchart illustrating a CPU multi-core usage optimization processing method for a single server according to a fifth embodiment of the present application;
FIG. 6 is a schematic structural diagram of a CPU multi-core utilization rate optimization processing apparatus for a single server according to a first embodiment of the present application;
FIG. 7 is a schematic structural diagram of a CPU multi-core utilization rate optimization processing apparatus for a single server according to an embodiment of the present application;
FIG. 8 is a schematic structural diagram of a CPU multi-core utilization rate optimization processing apparatus for a single server according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of a CPU multi-core utilization rate optimization processing apparatus for a single server according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation.
Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
Furthermore, the terms "mounted," "disposed," "provided," "connected," and "sleeved" are to be construed broadly. For example, it may be a fixed connection, a removable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
According to the method, in order to achieve the optimal CPU core utilization rate in the multi-core state of the server CPU, the condition that the CPU utilization rates in the server are not balanced can be found. And the unbalanced condition in the CPU utilization rate is synchronized with background developers in time, so that the reasonable and maximized utilization rate among the multiple cores of the CPU of the server is achieved, and the comprehensive use cost is reduced.
As shown in fig. 1, the method includes steps S102 to S108 as follows:
step S102, collecting the utilization rate of each CPU core within a preset time interval;
and acquiring data within a preset time interval, and acquiring the CPU core utilization rate of each CPU.
Specifically, by selecting one time node and taking minutes as granularity, the utilization rate condition of each CPU core of a plurality of time nodes is continuously collected.
Step S104, calculating a CPU multi-core utilization rate range value according to the CPU core utilization rate;
and calculating the CPU multi-core utilization rate range value according to the CPU core utilization rate. Through long-term server real-time research and observation, the condition of uneven utilization rate of the CPU multi-core can be efficiently and simply found through setting and judging the utilization rate range value among the CPU multi-core.
Specifically, two-by-two subtraction calculation and absolute value are carried out between the CPU cores, and the extreme difference absolute value of the CPU multi-core utilization rate is obtained.
Step S106, obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate range value;
and comparing the CPU multi-core utilization rate range value with a preset threshold value, when the CPU multi-core utilization rate range value is larger than the preset threshold value, indicating that the utilization rate of the current CPU core is larger than that of the CPU core, and increasing a CPU forecast alarm accumulated value.
It should be noted that the initial value of the total pre-alarm value is 0, and those skilled in the art can configure the calculation.
And S108, judging whether to alarm or not according to the pre-alarm value.
And judging whether the sum of the forewarning alarms is not less than a standard alarm threshold value or not according to the sum of the forewarning alarms, and if so, judging that the alarms need to be carried out.
From the above description, it can be seen that the following technical effects are achieved by the present application:
in the embodiment of the application, the utilization rate of each CPU core is acquired within a preset time interval, and the purpose of obtaining the warning accumulated value according to the CPU multi-core utilization rate range value is achieved by calculating the CPU multi-core utilization rate range value according to the CPU multi-core utilization rate range value, so that the technical effect of judging whether to give an alarm according to the warning value is achieved, and the technical problem that the performance of a server cannot reach the optimum or the utilization rate is maximized is solved.
According to the embodiment of the present application, as a preferable example in the embodiment, as shown in fig. 2, obtaining the pre-alarm cumulative value according to the CPU multi-core utilization rate variance value includes:
step S202, calculating an early warning value according to the CPU multi-core utilization rate range value;
step S204, calculating an early warning value according to the early warning value;
and step S206, calculating a forewarning accumulated value according to the forewarning value.
Specifically, after the CPU core utilization rate is acquired by each time node, the calculation of the CPU multi-core range value and the early warning value is started;
the following values are set first:
standard range values between CPU multiple cores: max is 20 percent,
early warning value: n is 0, and N is 0,
the early warning value Y is 0,
the CPU multi-core utilization rate conditions collected by the time node t0 are as follows: (00:00 in minutes)
TABLE 1
time t0 cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
cpu utilization rate 90％ 85％ 60％ 59％ 61％ 63％ 58％ 57％
Selecting any CPU core as a deduction and carrying out subtraction calculation between the deduction and the other CPU cores and taking an absolute value to obtain a group of numerical values, then sequentially comparing the group of numerical values with Max (20%), and when the numerical value is larger than Max (20%), indicating that the CPU core and the other CPU cores have large difference in the utilization rate, wherein the value N is increased by 1(N is N + 1); the details are shown in Table 2.
And continuing to calculate the early warning value Y, and when one of the values in N is greater than 0, indicating that the CPU multi-core utilization is uneven at the time node, wherein Y is 1.
TABLE 2
Difference of cpu multinuclear cpu range absolute value CPU multiple core difference cpu range absolute value CPU multiple core difference cpu range absolute value
cpu0-cpu1 |90-85|％＝5％ cpu1-cpu0 |85-90|％＝5％ ... ... cpu7-cpu0 |57-90|％＝30％
cpu0-cpu2 |90-60|％＝30％ cpu1-cpu2 |85-60|％＝25％ ... ... cpu7-cpu1 |57-85|％＝25％
cpu0-cpu3 |90-59|％＝31％ cpu1-cpu3 |85-59|％＝26％ ... ... cpu7-cpu3 |57-59|％＝1％
cpu0-cpu4 |90-61|％＝29％ cpu1-cpu4 |85-61|％＝24％ ... ... cpu7-cpu4 |57-61|％＝1％
cpu0-cpu5 |90-63|％＝27％ cpu1-cpu5 |85-63|％＝22％ ... ... cpu7-cpu5 |57-63|％＝3％
cpu0-cpu6 |90-58|％＝32％ cpu1-cpu6 |85-58|％＝27％ ... ... cpu7-cpu6 |60-58|％＝2％
cpu0-cpu7 |90-57|％＝33％ cpu1-cpu7 |85-57|％＝28％ ... ... cpu7-cpu7 |60-57|％＝3％
Value of N N0＝6 Value of N N1＝6 ... ... Value of N N7＝2
According to the embodiment of the present application, as a preferable example in the embodiment, as shown in fig. 3, the determining whether to perform an alarm according to the pre-alarm accumulated value includes:
step S302, determining a standard alarm value;
step S304, comparing the pre-alarm value with the standard alarm value, and judging to alarm if the pre-alarm value is not less than the standard alarm value.
Specifically, a standard alarm value a ═ 5 is set, where the selection of 0 ═ a ═ 6A values is within 6 acquired time node integer values.
Specifically, the pre-alarm cumulative value is set: and Z is 0, and as shown in Table 2, the data of t1-t5 are collected continuously according to time nodes, and the calculation is repeated every time the data of one node is collected. A group of values is finally obtained, namely 6 values of Y0 ═ 1, Y1 ═ 1, Y2 ═ 1, Y3 ═ 1, Y4 ═ 1 and Y5 ═ 1; when Y0-Y5, Z is increased by 1(Z ═ Z +1) as long as Y is >0, and then Z is 6. By comparing the pre-alarm accumulated value Z with the standard alarm value A, when Z is larger than or equal to A, Z > -A indicates that the condition of uneven use of CPU multiple cores occurs within a period of time, and alarms through calling interfaces of mails and short messages to give to background personnel, informs the background personnel, and logs in a server in time to check reasons and subsequent optimization.
According to the embodiment of the present application, as shown in fig. 4, as a preferable option in the embodiment, calculating the CPU multi-core utilization difference value according to the CPU core utilization includes:
step S402, calculating a CPU multi-core utilization rate range value through a CPU multi-core difference value;
obtaining a pre-alarm accumulated value according to the CPU multi-core utilization rate range value comprises the following steps:
and S404, comparing the CPU multi-core utilization rate range difference value with a preset range standard value between CPU multi-cores, and when the CPU multi-core utilization rate range difference value is larger than the preset range standard value between the CPU multi-cores, giving an early warning value of + 1.
Specifically, one time node is selected, and the usage rate of each CPU core of 6 time nodes is continuously collected with 5 minutes as granularity, as shown in table 3.
TABLE 3
time t0 CPU utilization t1 time point CPU utilization time t5 CPU utilization time t5 CPU utilization
t0-cpu0 t0_x0＝90％ t1-cpu0 t1-x0＝80％ .. .. t5-cpu0 t5-x0＝60％ t5-cpu0 t5-x0＝60％
t0-cpu1 t0-x1＝85％ t1-cpu1 t1-x1＝75％ .. .. t5-cpu1 t5-x1＝0％ t5-cpu1 t5-x1＝0％
t0-cpu2 t0-x2＝60％ t1-cpu2 t1-x2＝50％ .. .. t5-cpu2 t5-x2＝0％ t5-cpu2 t5-x2＝0％
t0-cpu3 t0-x3＝59％ t1-cpu3 t1-x3＝45％ .. .. t5-cpu3 t5-x3＝0％ t5-cpu3 t5-x3＝0％
t0-cpu4 t0-x4＝61％ t1-cpu4 t1-x4＝48％ .. .. t5-cpu4 t5-x4＝0％ t5-cpu4 t5-x4＝0％
t0-cpu5 t0-x5＝63％ t1-cpu5 t1-x5＝47％ .. .. t5-cpu5 t5-x5＝0％ t5-cpu5 t5-x5＝0％
t0-cpu6 t0-x6＝58％ t1-cpu6 t1-x6＝51％ .. .. t5-cpu6 t5-x6＝0％ t5-cpu6 t5-x6＝0％
t0-cpu7 t0-x7＝57％ t1-cpu7 t1-x7＝49％ .. .. t5-cpu7 t5-x7＝0％ t5-cpu7 t5-x7＝0％
And calculating a CPU multi-core utilization rate range value through the CPU multi-core difference value, comparing the CPU multi-core utilization rate range value with a preset range standard value between CPU multi-cores, and when the CPU multi-core utilization rate range value is larger than the preset range standard value between the CPU multi-cores, giving an early warning value of + 1.
Specifically, any CPU core is selected as a deduction and subtracted from other CPU cores, subtraction calculation is carried out, an absolute value is taken, a group of numerical values is obtained, the numerical values are sequentially compared with Max (20%), when the numerical value is larger than Max (20%), a large difference occurs between the CPU core and the other CPU cores in the utilization rate, and the N value is increased by 1(N is N + 1).
According to the embodiment of the present application, as shown in fig. 5, when obtaining the advance warning integrated value according to the CPU multi-core utilization rate variance value, the method further includes:
step S502, when the value greater than zero appears in the early warning value, the early warning is accumulated to + 1.
When the early warning value is calculated, if one of the early warning values is greater than 0, it is indicated that uneven use among the CPU cores occurs at the time node, and the early warning value is equal to 1.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order different than presented herein.
According to an embodiment of the present application, there is also provided a CPU multi-core utilization rate optimization processing apparatus for a single server, for implementing the foregoing method, as shown in fig. 6, the apparatus includes: the acquisition module 10 is used for acquiring the utilization rate of each CPU core within a preset time interval; the first calculating module 20 is configured to calculate a CPU multi-core utilization rate range value according to the CPU core utilization rate; the second calculation module 30 is configured to obtain a warning accumulated value according to the CPU multi-core utilization rate range value; and the judging module 40 is used for judging whether to alarm or not according to the pre-alarm value.
In the acquisition module 10 of the embodiment of the present application, data acquisition is performed within a preset time interval, and the CPU core utilization rate of each CPU is acquired.
Specifically, by selecting one time node and taking minutes as granularity, the utilization rate condition of each CPU core of a plurality of time nodes is continuously collected.
In the first calculating module 20 of the embodiment of the present application, the CPU multi-core utilization rate range value is calculated according to the CPU core utilization rate. Through long-term server real-time research and observation, the condition of uneven utilization rate of the CPU multi-core can be efficiently and simply found through setting and judging the utilization rate range value among the CPU multi-core.
Specifically, two-by-two subtraction calculation and absolute value are carried out between the CPU cores, and the extreme difference absolute value of the CPU multi-core utilization rate is obtained.
In the second calculation module 30 of the embodiment of the present application, the CPU multi-core utilization rate difference value is compared with a preset threshold, and when the CPU multi-core utilization rate difference value is greater than the preset threshold, it indicates that a large difference occurs between the current CPU core and the CPU core in the utilization rate, and increases a CPU advance warning accumulated value.
It should be noted that the initial value of the total pre-alarm value is 0, and those skilled in the art can configure the calculation.
The judgment module 40 in the embodiment of the present application judges whether the pre-alarm accumulated value is not less than a standard alarm threshold value, and if so, judges that an alarm needs to be performed.
According to the embodiment of the present application, as a preferred feature of the embodiment, as shown in fig. 7, the first calculating module 20 includes: an early warning value unit 201, configured to calculate an early warning value according to the CPU multi-core utilization rate threshold value; an early warning value unit 202, configured to calculate an early warning value according to the early warning value; and a forewarning accumulated value unit 203, configured to calculate a forewarning accumulated value according to the forewarning alarm value.
Specifically, after each time node acquires the CPU core utilization rate, CPU multi-core range value and early warning value calculation are started;
the following values are set first:
standard range values between CPU multiple cores: max is 20 percent,
early warning value: n is 0, and N is 0,
the early warning value Y is 0,
the CPU multi-core utilization rate conditions collected by the time node t0 are as follows: (00:00 in minutes)
TABLE 1
time t0 cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
cpu utilization rate 90％ 85％ 60％ 59％ 61％ 63％ 58％ 57％
Selecting any CPU core as a deduction and carrying out subtraction calculation between the deduction and the other CPU cores and taking an absolute value to obtain a group of numerical values, then sequentially comparing the group of numerical values with Max (20%), and when the numerical value is larger than Max (20%), indicating that the CPU core and the other CPU cores have large difference in the utilization rate, wherein the value N is increased by 1(N is N + 1); the details are shown in Table 2.
And continuing to calculate the early warning value Y, and when one of the values in N is greater than 0, indicating that the CPU multi-core utilization is uneven at the time node, wherein Y is 1.
TABLE 2
Difference of cpu multinuclear cpu range absolute value CPU multiple core difference cpu range absolute value CPU multiple core difference cpu range absolute value
cpu0-cpu1 |90-85|％＝5％ cpu1-cpu0 |85-90|％＝5％ ... ... cpu7-cpu0 |57-90|％＝30％
cpu0-cpu2 |90-60|％＝30％ cpu1-cpu2 |85-60|％＝25％ ... ... cpu7-cpu1 |57-85|％＝25％
cpu0-cpu3 |90-59|％＝31％ cpu1-cpu3 |85-59|％＝26％ ... ... cpu7-cpu3 |57-59|％＝1％
cpu0-cpu4 |90-61|％＝29％ cpu1-cpu4 |85-61|％＝24％ ... ... cpu7-cpu4 |57-61|％＝1％
cpu0-cpu5 |90-63|％＝27％ cpu1-cpu5 |85-63|％＝22％ ... ... cpu7-cpu5 |57-63|％＝3％
cpu0-cpu6 |90-58|％＝32％ cpu1-cpu6 |85-58|％＝27％ ... ... cpu7-cpu6 |60-58|％＝2％
cpu0-cpu7 |90-57|％＝33％ cpu1-cpu7 |85-57|％＝28％ ... ... cpu7-cpu7 |60-57|％＝3％
Value of N N0＝6 Value of N N1＝6 ... ... Value of N N7＝2
According to the embodiment of the present application, as shown in fig. 8, as a preferable option in the embodiment, the determining module 40 includes: a determining unit 401, configured to determine a standard alarm value; a determining unit 402, configured to compare the pre-alarm value with the standard alarm value, and determine to alarm if the pre-alarm value is not smaller than the standard alarm value.
In an embodiment of the present application, specifically, a standard alarm value a ═ 5 is set, where the selection of 0< ═ a < ═ 6A values is within 6 collected time node integer values.
Specifically, the pre-alarm cumulative value is set: and Z is 0, and as shown in Table 2, the data of t1-t5 are collected continuously according to time nodes, and the calculation is repeated every time the data of one node is collected. A group of values is finally obtained, namely 6 values of Y0 ═ 1, Y1 ═ 1, Y2 ═ 1, Y3 ═ 1, Y4 ═ 1 and Y5 ═ 1; when Y0-Y5, Z is increased by 1(Z ═ Z +1) as long as Y is >0, and then Z is 6. By comparing the pre-alarm accumulated value Z with the standard alarm value A, when Z is larger than or equal to A, Z > -A indicates that the condition of uneven use of CPU multiple cores occurs within a period of time, and alarms through calling interfaces of mails and short messages to give to background personnel, informs the background personnel, and logs in a server in time to check reasons and subsequent optimization.
According to the embodiment of the present application, as a preference in the embodiment, as shown in fig. 9, the first calculation module 20 includes: a utilization rate pole difference value unit 204, configured to calculate a CPU multi-core utilization rate pole difference value by using the CPU multi-core difference value; the second calculation module 30 includes: a comparison unit 301, configured to compare the CPU multi-core usage range value with a preset range standard value between CPU multi-cores, and when the CPU multi-core usage range value is greater than the preset range standard value between CPU multi-cores, perform an early warning value of + 1.
Specifically, in the embodiment of the present application, one time node is selected, and the usage rate of each CPU core of 6 time nodes is continuously collected with 5 minutes as a granularity interval, as shown in table 3.
TABLE 3
time t0 CPU utilization t1 time point CPU utilization time t5 CPU utilization time t5 CPU utilization
t0-cpu0 t0_x0＝90％ t1-cpu0 t1-x0＝80％ .. .. t5-cpu0 t5-x0＝60％ t5-cpu0 t5-x0＝60％
t0-cpu1 t0-x1＝85％ t1-cpu1 t1-x1＝75％ .. .. t5-cpu1 t5-x1＝0％ t5-cpu1 t5-x1＝0％
t0-cpu2 t0-x2＝60％ t1-cpu2 t1-x2＝50％ .. .. t5-cpu2 t5-x2＝0％ t5-cpu2 t5-x2＝0％
t0-cpu3 t0-x3＝59％ t1-cpu3 t1-x3＝45％ .. .. t5-cpu3 t5-x3＝0％ t5-cpu3 t5-x3＝0％
t0-cpu4 t0-x4＝61％ t1-cpu4 t1-x4＝48％ .. .. t5-cpu4 t5-x4＝0％ t5-cpu4 t5-x4＝0％
t0-cpu5 t0-x5＝63％ t1-cpu5 t1-x5＝47％ .. .. t5-cpu5 t5-x5＝0％ t5-cpu5 t5-x5＝0％
t0-cpu6 t0-x6＝58％ t1-cpu6 t1-x6＝51％ .. .. t5-cpu6 t5-x6＝0％ t5-cpu6 t5-x6＝0％
t0-cpu7 t0-x7＝57％ t1-cpu7 t1-x7＝49％ .. .. t5-cpu7 t5-x7＝0％ t5-cpu7 t5-x7＝0％
And calculating a CPU multi-core utilization rate range value through the CPU multi-core difference value, comparing the CPU multi-core utilization rate range value with a preset range standard value between CPU multi-cores, and when the CPU multi-core utilization rate range value is larger than the preset range standard value between the CPU multi-cores, giving an early warning value of + 1.
Specifically, any CPU core is selected as a deduction and subtracted from other CPU cores, subtraction calculation is carried out, an absolute value is taken, a group of numerical values is obtained, the numerical values are sequentially compared with Max (20%), when the numerical value is larger than Max (20%), a large difference occurs between the CPU core and the other CPU cores in the utilization rate, and the N value is increased by 1(N is N + 1).
According to the embodiment of the present application, as a preferred choice in the embodiment, the second calculation module is further configured to accumulate +1 the pre-warning when a value greater than zero occurs in the pre-warning alarm values.
Specifically, in the embodiment of the application, during the calculation of the early warning value, when one of the early warning values is greater than 0, it is described that uneven use occurs between the CPU cores at this time node, and the early warning value is equal to 1 at this time.
It will be apparent to those skilled in the art that the modules or steps of the present application described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and they may alternatively be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, or fabricated separately as individual integrated circuit modules, or fabricated as a single integrated circuit module from multiple modules or steps. Thus, the present application is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (4)

1. A CPU multi-core utilization rate optimization processing method for a single server is characterized by comprising the following steps:
collecting the utilization rate of each CPU core within a preset time interval;
calculating the difference value of the utilization rates of the two CPU multi-core cores according to the utilization rates of the CPU cores;
obtaining a warning accumulated value according to the CPU multi-core utilization rate difference value;
judging whether to alarm or not according to the pre-alarm value;
obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate difference value comprises the following steps:
calculating an early warning value according to the CPU multi-core utilization rate difference value;
calculating an early warning value according to the early warning value;
calculating a pre-warning accumulated value according to the pre-warning value;
judging whether to alarm or not according to the forecast alarm accumulated value comprises the following steps:
determining a standard alarm value;
comparing the pre-alarm value with the standard alarm value, and judging to alarm if the pre-alarm value is not less than the standard alarm value;
calculating the difference value of the utilization rates of the two CPU cores according to the utilization rates of the CPU cores comprises the following steps:
calculating the difference value of the utilization rates of every two CPUs of the CPU multi-core through the difference value of the CPU multi-core;
obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate difference value comprises the following steps:
and comparing the CPU multi-core utilization rate difference value with a preset difference standard value between the CPU multi-cores, and when the CPU multi-core utilization rate difference value is larger than the preset difference standard value between the CPU multi-cores, giving an early warning value of + 1.
2. The method as claimed in claim 1, wherein when obtaining a predicted alarm cumulative value according to the CPU multi-core utilization difference, the method further comprises:
and when the early warning value has a value greater than zero, accumulating the early warning by + 1.
3. A CPU multi-core utilization rate optimization processing device for a single server is characterized by comprising the following components:
the acquisition module is used for acquiring the utilization rate of each CPU core within a preset time interval;
the first calculation module is used for calculating the difference value of the utilization rates of the two CPU multi-core cores according to the utilization rates of the CPU cores;
the second calculation module is used for obtaining a pre-warning accumulated value according to the CPU multi-core utilization rate difference value;
the judging module is used for judging whether to alarm or not according to the pre-alarm value;
the first computing module includes:
the early warning value unit is used for calculating an early warning value according to the CPU multi-core utilization rate difference value;
the early warning value unit is used for calculating an early warning value according to the early warning value;
the early warning accumulated value unit is used for calculating an early warning accumulated value according to the early warning value;
the judging module comprises:
the determining unit is used for determining a standard alarm value;
the judging unit is used for comparing the pre-alarm value with the standard alarm value, and judging to alarm if the pre-alarm value is not less than the standard alarm value;
the first calculation module includes:
the utilization rate difference unit is used for calculating the difference value of the utilization rates of every two CPUs of the CPU multi-core through the CPU multi-core difference value;
the second calculation module includes:
and the comparison unit is used for comparing the CPU multi-core utilization rate difference value with a preset difference standard value between the CPU multi-cores, and when the CPU multi-core utilization rate difference value is greater than the preset difference standard value between the CPU multi-cores, giving an early warning value of + 1.
4. The CPU multi-core usage optimization processing device according to claim 3, wherein the second computing module is further configured to,
and when the early warning value has a value greater than zero, accumulating the early warning by + 1.
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