CN110287142A - Multi-functional spaceborne supercomputer device and satellite - Google Patents
Multi-functional spaceborne supercomputer device and satellite Download PDFInfo
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- CN110287142A CN110287142A CN201910575626.8A CN201910575626A CN110287142A CN 110287142 A CN110287142 A CN 110287142A CN 201910575626 A CN201910575626 A CN 201910575626A CN 110287142 A CN110287142 A CN 110287142A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application provides the multi-functional spaceborne supercomputer device of one kind and satellite, device include: main control unit, algorithm accelerator module and configuration unit；Main control unit is connect with configuration unit, and configuration unit is connect with algorithm accelerator module；Main control unit receives the first observing and controlling instruction that Star Service platform is sent, and it is instructed according to the first observing and controlling, target injection file corresponding with the first observing and controlling instruction is found out from pre-stored multiple injection files, and the logic configuration that target injects file is carried out to algorithm accelerator module by configuration unit；After the completion of logic configuration, algorithm accelerator module carries out algorithm acceleration to the corresponding operation content of target injection file, instructs corresponding function with the first observing and controlling of quick execution.The application can carry out different injection file configurations, and the observing and controlling is rapidly completed by algorithm accelerator module and instructs corresponding task function, realize the multifunction of load for the different observing and controlling instructions under different scenes.
Description
Technical field
This application involves fields of communication technology, more particularly to a kind of multi-functional spaceborne supercomputer device and satellite.
Background technique
Satellite load is a kind of instrument, equipment or subsystem for directly executing particular satellite task, and satellite load is generally all
Need two kinds of interfaces: one is the communication interfaces of connection network, carry the transmission-receiving function of data；Another kind is connection supply network
Power interface, a bus power supply is obtained from satellite power supply.The two is the indispensable element of satellite load, indispensable.And
Each satellite load at least needs a power supply interface and multiple communication interfaces on Space-borne, and satellite load type is numerous
It is more, so that wiring environment is intricate between load and load between satellite task platform and satellite load, cable and connector
Weight be stepped up so that the development cost of satellite is more and more expensive.
It is nervous to be limited to power supply and interface resource on satellite, satellite and load are designed according to initial mission planning is " on-demand "
's.After the completion of design of satellites, function is substantially stationary, it is desirable to extend the function other than initial designs, need to change the confession of satellite
The design such as distribution design, interface, and for running satellite in the space environment, this is nearly impossible.Therefore, existing
Satellite and load distribution according to need, function is substantially stationary, and Scalable Performance is poor.
Apply for content
In view of this, the embodiment of the present application provides the multi-functional spaceborne supercomputer device of one kind and satellite, different fields can be directed to
Different observing and controlling instructions under scape, carry out different injection file configurations, and the observing and controlling is rapidly completed by algorithm accelerator module
Corresponding task function is instructed, realizes the multifunction of load.
According to the one aspect of the application, a kind of multi-functional spaceborne supercomputer device is provided, described device includes: master control list
Member, algorithm accelerator module and configuration unit；The main control unit is connect with the configuration unit, the configuration unit and the calculation
The connection of method accelerator module；The main control unit receives the first observing and controlling instruction that Star Service platform is sent, and according to first observing and controlling
Instruction finds out target injection file corresponding with the first observing and controlling instruction from pre-stored multiple injection files, and
The logic configuration that the target injects file is carried out to the algorithm accelerator module by the configuration unit；Match in the logic
After the completion of setting, the algorithm accelerator module carries out algorithm acceleration to the corresponding operation content of target injection file, with quick
It executes first observing and controlling and instructs corresponding function.
In some embodiments, described device further include: the port POE being connect with the main control unit；The master control list
Member carries out network data communication by the port POE and the Star Service platform or other load；The main control unit is also logical
It crosses the port POE and obtains power supply from power supply unit.
In some embodiments, the main control unit is also connected with the first data storage device；The main control unit receives
The second observing and controlling instruction that the Star Service platform is sent, and framing and verification are carried out to the command frame in second observing and controlling instruction,
After verifying successfully, the injection file generated according to described instruction frame is stored to first data storage device.
In some embodiments, the algorithm accelerator module is also connected with the second data storage device；Second data
Storage device is for storing configuration data of the algorithm accelerator module in the logic configuration process.
In some embodiments, the algorithm accelerator module includes: FPGA array；The port of the FPGA array is configured with
Driver.
In some embodiments, the main control unit and the algorithm accelerator module also pass through PCIe bus and/or UART
Asynchronous serial port connection；The main control unit carries out high speed data transfer by the PCIe bus and the algorithm accelerator module；
The main control unit carries out slow data transmission by the UART asynchronous serial port and the algorithm accelerator module.
In some embodiments, the configuration unit includes anti-fuse FPGA.
In some embodiments, the main control unit is also connected with the first data buffer storage device；First data buffer storage
Device is used for exented memory.
In some embodiments, the algorithm accelerator module is also connected with the second data buffer storage device；Second data
Buffer storage is used for data buffer storage.
According to the another aspect of the application, a kind of satellite is provided, which is characterized in that the satellite includes: satellite body；Institute
It states and multi-functional spaceborne supercomputer device described in Star Service platform and one side as above is installed on satellite body；The Star Service platform with
The multi-functional spaceborne supercomputer device communication connection.
Include: main control unit, algorithm accelerator module in multi-functional spaceborne supercomputer device provided by the embodiments of the present application and matches
Set unit；Wherein, main control unit is connect with configuration unit, and configuration unit is connect with algorithm accelerator module.Main control unit receives star
Be engaged in the first observing and controlling instruction that platform sends, a kind of corresponding specific task function of observing and controlling instruction, main control unit according to this first
Observing and controlling instruction finds out target injection file corresponding with the first observing and controlling instruction from pre-stored multiple injection files, and
The logic configuration that the target injects file is carried out to algorithm accelerator module by configuration unit；After the completion of logic configuration, algorithm
Accelerator module carries out algorithm acceleration to the corresponding operation content of target injection file, is instructed with the first observing and controlling of quick execution corresponding
Function.The device can carry out different injection file configurations, and pass through calculation for the different observing and controlling instructions under different scenes
Method accelerator module is rapidly completed the observing and controlling and instructs corresponding task function.
To enable the above objects, features, and advantages of the embodiment of the present application to be clearer and more comprehensible, below in conjunction with embodiment, and
Cooperate appended attached drawing, elaborates.
Detailed description of the invention
Technical solution in ord to more clearly illustrate embodiments of the present application, below will be to needed in the embodiment attached
Figure is briefly described, it should be understood that the following drawings illustrates only some embodiments of the application, therefore is not construed as pair
The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other relevant attached drawings.
Fig. 1 has gone out the block diagram of the multi-functional spaceborne supercomputer device of one kind provided by the embodiment of the present application；
Fig. 2 has gone out the block diagram of the multi-functional spaceborne supercomputer device of another kind provided by the embodiment of the present application；
Fig. 3 has gone out the configuration of algorithm accelerator module in the multi-functional spaceborne supercomputer device of one kind provided by the embodiment of the present application
Timing diagram；
Fig. 4 shows logic configuration flow figure in the multi-functional spaceborne supercomputer device of one kind provided by the embodiment of the present application；
Fig. 5 shows a kind of schematic diagram of satellite provided by the embodiment of the present application.
Specific embodiment
To keep the purposes, technical schemes and advantages of the embodiment of the present application clearer, below in conjunction with attached drawing to the application
Technical solution be clearly and completely described, it is clear that described embodiment is some embodiments of the present application, rather than
Whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making creative work premise
Under every other embodiment obtained, shall fall in the protection scope of this application.
Current existing satellite and load distribution according to need, function is substantially stationary, and Scalable Performance is poor.Based on this, this Shen
Please the embodiment multi-functional spaceborne supercomputer device of one kind and satellite that provide, can refer to for the different observing and controlling under different scenes
It enables, carries out different injection file configurations, and the observing and controlling is rapidly completed by algorithm accelerator module and instructs corresponding task function,
Realize the multifunction of load.
For convenient for understanding the present embodiment, spaceborne supercomputer multi-functional to one kind disclosed in the embodiment of the present application first
Device describes in detail.
Fig. 1 shows the block diagram of the multi-functional spaceborne supercomputer device of one kind provided by the embodiments of the present application, this is multi-functional spaceborne
Supercomputer device can be installed on satellite body, as a kind of satellite load, be realized not according to different scenes and observing and controlling instruction
Same task function.The multi-functional spaceborne supercomputer device includes: main control unit 101, algorithm accelerator module 102 and configuration unit
103。
Wherein, main control unit 101 is connect with configuration unit 103, and configuration unit 103 is connect with algorithm accelerator module 102；It is main
It controls unit 101 and receives the first observing and controlling instruction that Star Service platform is sent, and instructed according to the first observing and controlling, from pre-stored multiple notes
Enter and find out target injection file corresponding with the first observing and controlling instruction in file, and list is accelerated to algorithm by configuration unit 103
Member 102 carries out the logic configuration of target injection file；After the completion of logic configuration, algorithm accelerator module 102 injects text to target
The corresponding operation content of part carries out algorithm acceleration, instructs corresponding function with the first observing and controlling of quick execution.
In specific implementation, the inside of above-mentioned multi-functional spaceborne supercomputer device uses main control unit 101 and algorithm accelerator module
The logical architecture of 102 collaboration processing.Wherein, CPU/DSP array can be used to realize that algorithm accelerator module 102 can for main control unit 101
It is realized by FPGA array, a configuration unit 103 is provided between main control unit 101 and algorithm accelerator module 102, for realizing
The in-orbit reconfigurable function of multi-functional spaceborne supercomputer device completes 101 output configuration of main control unit and algorithm accelerator module
Conversion between 102 configuration data stream.It is reliable to improve due to the anti-fuse FPGA not influence vulnerable to high-intensitive cosmic radiation
Property, above-mentioned configuration unit 103 is realized by the higher anti-fuse FPGA of reliability.
Star Service platform sends the first observing and controlling instruction to main control unit 101 first, is equivalent to telecommand, carries for controlling
Lotus, i.e., the multi-functional spaceborne hypervelocity device in the embodiment of the present application execute certain tasks, realize certain functions.First observing and controlling refers to
The mark of injection file is carried in order can be according to the first observing and controlling after main control unit 101 receives above-mentioned first observing and controlling instruction
The mark of the injection file carried in instruction, is searched from pre-stored multiple injection files, is determined and the injection
The corresponding target of file identification injects file, then further carries out the mesh to algorithm accelerator module 102 using configuration unit 103
Mark the logic configuration into file.After configuration successful, algorithm accelerator module 102 can inject the corresponding operation of file to target
Content carries out algorithm acceleration, instructs corresponding function with the first observing and controlling of quick execution.
It can be based on pre-stored multiple injection files through the above way, selected by different task scenes different
Injection file reconfigures algorithm accelerating module, completes the in-orbit reconstruct of function under different task scene, realizes spaceborne
The diversification of functions of modules.Such as the pre-stored injection file A of main control unit 101 can be used for realizing Objective extraction function, note
Data compression function can be realized by entering file B, and under target following task scene, file A is to algorithm for the selection injection of main control unit 101
Accelerating module carries out logic configuration, and multi-functional spaceborne supercomputer device can performance objective detection and tracking function；In acquisition data
Under scene, the selection of main control unit 101 injection file B carries out logic configuration to algorithm accelerating module, and spaceborne supercomputer module is multi-functional
Data compression function can be completed in spaceborne supercomputer device, to image data carry out compression and under pass.
Existing satellite load generally requires two kinds of interfaces: a kind of communication interface to connect network carries the receipts of data
Send out function；Another kind is the power interface of connection supply network, and a bus power supply is obtained from satellite power supply.And Star Service platform
Upper each load at least needs a power supply interface, multiple communication interfaces, and load is many kinds of on satellite, so that Star Service
Between platform and load, wiring environment is intricate between load and load, and the weight of cable and connector is stepped up, satellite
Development cost it is more and more expensive.Cumbersome in view of above-mentioned cable complexity, the situation of design cost valuableness, the embodiment of the present application also mentions
For a kind of multi-functional spaceborne supercomputer device, as shown in Fig. 2, the device is in addition to including the main control unit similar with a upper embodiment
201, outside algorithm accelerator module 202 and configuration unit 203, further includes: the port POE 204 connected to the main control unit.
Wherein, main control unit 201 carries out network data communication by the port POE 204 and Star Service platform or other load；
Main control unit 201 also obtains power supply from power supply unit by the port POE 204.
In the embodiment of the present application, pass through POE (Power over Ethernet, the Ethernet connecting with main control unit 201
Power supply technique) port externally provides network interface, while PoE (Power over Ethernet) Power over Ethernet can be used
Technology obtains DC power supply from feeder ear.Specifically, on the one hand, multi-functional spaceborne supercomputer device can be used as power receiving equipment
(Powered Device, PD) is received at power supply unit (Power Source Equipment, PSE) by ethernet cable
Power supply implements power programming by power supply unit and management, POE power supply technique IEEE802.3bt standard can be multi-functional supercomputer mould
Block provides the power for being up to 74.55W, meets the power consumption demand of multi-functional spaceborne supercomputer device；On the other hand, multi-functional spaceborne super
Device is calculated by the network data communication of ethernet cable realization and Star Service or other load, passes through the port POE 204, more function
The spaceborne supercomputer device of energy receives the observing and controlling instruction of Star Service platform forwarding, and returns to corresponding observing and controlling response.The port POE 204 can
To realize data communication and supply port " being combined into one ", the cable complexity and quality of spaceborne intermodule are alleviated, is reduced
Development cost.Furthermore as long as the multi-functional spaceborne supercomputer device with the port POE 204 is set by a cable access power supply
Standby, such as spaceborne switching equipment can be used, and not have to change original power supply interface, spaceborne switching equipment can be according to multi-functional spaceborne super
The state for calculating device implements power programming and management, improves the scalability of system, keeps multi-functional spaceborne supercomputer device real
It can accomplish plug and play.
In order to promote the task execution rate of multi-functional spaceborne supercomputer device, main control unit 201 is also connected with the first data
Storage device 205；First data storage device 205 is previously stored with the corresponding injection file of multiple tasks function, specifically,
Main control unit 201 is carried out by receiving the second observing and controlling instruction that Star Service platform is sent, and to the command frame in the second observing and controlling instruction
Framing and verification store the injection file generated according to command frame to the first data storage device 205 after verifying successfully,
To facilitate the subsequent extraction and configuration for carrying out injection file.
In addition, algorithm accelerator module 202 is also connected with the second data storage device 206；Second data storage device 206 is used
In configuration data of the storage algorithm accelerator module 202 in logic configuration process.
In the specific implementation, it in order to guarantee the integrality and correctness of data, completes to inject by ground observing and controlling system first
Injection file is decomposed into multiple instruction frame by the decomposition of file, and main control unit 201 is receiving the second observing and controlling instruction, that is,
When the injection instruction of file, framing and verification are carried out to multiple instruction frame, will be generated based on multiple instruction frame after verifying successfully
File storage is injected into above-mentioned first data storage device 205, wait transfer and apply.Above-mentioned injection file is namely to calculation
Method accelerator module 202 carries out logical file when logic configuration.
After main control unit 201 receives the first observing and controlling instruction that above-mentioned Star Service platform is sent, from above-mentioned multiple injection texts
The first observing and controlling is searched in part and instructs corresponding injection file, is carried out the logic configuration of algorithm accelerator module 202, was specifically configured
Journey is as follows:
Control register, data register and the status register for configuring operation, root are provided in configuration unit 203
According to specified modularization design, the modularization design figure of algorithm accelerator module 202 as shown in Figure 3, main control unit 201 is by configuration
Effective controlling value is written to initiate to configure in the control register of unit 203, is written with by the data register of configuration unit 203
The configuration data of effect realizes transmitting configuration data, passes through read status register and obtains configuration progress and state.Configuration unit
203 function is exactly to realize to turn the read-write operation of 201 pairs of control registers of main control unit, data register and status register
It is changed to modularization design figure as shown in Figure 3.The following table shows the configuration signal hypothesis of algorithm accelerator module 202 in the embodiment of the present application
It is bright:
Table 1
Based on main control unit 201, supplemented by configuration unit 203, shown in configuration flow Fig. 4 of initiation:
Firstly, PROG_B signal is set to effectively (1 be invalid, 0 is effective) by main control unit 201, lasting general after 300ns
PROG_B signal is set in vain, then continues to monitor the level value of INIT_B signal, as INIT_B be it is invalid (1 be it is invalid, 0 is
After effectively), it is continuously written into configuration data, each configuration data and configurable clock generator rising edge alignment, continues 1 clock cycle
It is received by algorithm control unit.After writing all configuration datas, main control unit 201 continues detection algorithm by configuration unit 203
Whether the DONE signal of control unit output becomes effectively (1 be effective, 0 is invalid), is successfully configured with if becoming effective
State algorithm accelerator module 202.
After configuration successful, algorithm accelerator module 202 can inject the corresponding operation content of file to target and carry out algorithm
Accelerate, corresponding function is instructed with the first observing and controlling of quick execution.
Calculation in order to which the demand of a variety of input and output I/O interfaces can be adapted to, in multi-functional spaceborne supercomputer device shown in Fig. 2
Method accelerator module 202 is come real by Field Programmable Logic Array (Field Programmed Gate Array, abbreviation FPGA)
Existing, which realizes the transmitting-receiving to external data simultaneously.A plurality of types of input/output interface data can be adapted to and be embodied in two sides
Face:
It on the one hand is interface level.Algorithm accelerator module FPGA can externally provide interface resource and plurality of level mark abundant
Standard, such as I2C (Inter Integrated Circuit), SMBUS (System Management Bus), HSTL (High-
Speed Transceiver Logic), LVDS (Low Voltage Differential Signaling) etc..And for calculating
The level standard that method accelerator module FPGA is not supported has been adapted to a variety of drivers 207 at the port algorithm accelerator module FPGA, with
Realize the support to other interface levels, these drivers include CAN (Controller Area Network) bus driver dress
It sets, RS232 driving device etc..
It on the other hand is communications protocol.A variety of bus protocols, including CAN are realized inside algorithm accelerator module FPGA
Bus protocol, UART (Universal Asynchronous Receiver/Transmitter) bus protocol,
SPI (Serial Peripheral Interface) bus protocol, serial data turn simultaneously, data and turn string etc..
By the level of algorithm accelerator module FPGA corresponding ports and the support of communications protocol, so that multi-functional spaceborne supercomputer
Device can be adapted to different input/output interface data, be adapted to more load data interfaces, meet connecing for more multitask scene
Mouth demand.
If task scenario A need to receive the I2C data of certain load transmission, then by the electricity of algorithm accelerator module FPGA corresponding ports
Flat to be configured to I2C mode, the communications protocol of inside corresponding with port is configured to I2C communications protocol, can be realized to I2C bus
The transmitting-receiving of data.Task scenario B need to receive the LVDS image data of certain camera transmission, then by algorithm accelerator module FPGA corresponding end
The level of mouth is configured to LVDS mode, is internally configured as serial data and turns simultaneously interpretive model, can be realized to LVDS image data
It receives.
For energy-efficient consideration, main control unit 201 and algorithm accelerator module 202 also by PCIe bus 208 and/or
UART asynchronous serial port 209 connects；Wherein, main control unit 201 carries out high speed by PCIe bus 208 and algorithm accelerator module 202
Data transmission；Main control unit 201 carries out slow data transmission by UART asynchronous serial port 209 and algorithm accelerator module 202.
Specifically, there is 2 kinds of data exchange channels between main control unit 201 and algorithm accelerator module 202: one kind passing through PCIe
(Peripheral component interconnect express) bus realizes high speed data transfer, in processing real-time
It is required that the channel can be used to realize main control unit 201 and algorithm accelerator module 202 in the case that very high and transmitted data amount is very big
Between data interaction.As algorithm accelerator module 202 can be sent out the image data after Denoising disposal by PCIe transmission channel
It send to main control unit 201；Another kind passes through universal asynchronous serial (Universal Asynchronous Receiver/
Transmitter slow data transmission) is realized, it, can in the lesser situation of and transmitted data amount of less demanding in processing real-time
The data interaction between main control unit 201 and algorithm accelerator module 202 is realized using the channel, as main control unit 201 can will be calculated
The algorithm parameter information that method accelerator module 202 uses is transmitted to algorithm accelerator module 202 by universal asynchronous serial, and algorithm accelerates
Unit 202 can be by the target information of image procossing, and the data such as average gray, classification, position and coordinate information including target are logical
It crosses universal asynchronous serial and is sent to main control unit 201.
In addition, above-mentioned main control unit 201 is also connected with the first data buffer storage device 210 for exented memory；Algorithm adds
Fast unit 202 is also connected with the second data buffer storage device 211 for data buffer storage.
Multi-functional spaceborne supercomputer device provided by the embodiments of the present application, externally provides network interface, is supplied using POE Ethernet
Power technology can also obtain DC power supply while transmitting data-signal by Ethernet, realize mould under existing wiring technique
The plug and play of module unit largely reduces the complexity of cable between star upper module, securely and reliably, while energy saving
It reduces costs, enhances the scalability of spaceborne module；Interface signal processing is carried out using FPGA, can flexibly be matched according to demand
Inputoutput data interface level is set, a variety of inputoutput data interfaces can be adapted to；Accelerated using main control unit 201 and algorithm single
The logical architecture of 202 collaboration processing of member increases parallel processing mechanism, mentions compared to the computing module of only main control unit 201
High processing capacity, accelerates data processing speed；It is different according to different task scene configurations using in-orbit Reconfiguration Technologies
Function, realize the function diversification of supercomputer module.
Multi-functional spaceborne supercomputer device provided by the embodiments of the present application has the advantage that
1, the port POE is externally used, which is also crucial data transmission path while taking electricity, is on the one hand reduced
The complexity that cable connects between load, reduces costs while energy saving；On the other hand the function of load plug and play is realized
Can, the stationarity of traditional load design is broken through, the scalability of load design is enhanced.
2, a variety of input and output I/O interface requirements can be adapted to.It is more by the support to multiple interfaces level and communications protocol
The spaceborne supercomputer device of function can be communicated with the load of distinct interface, adapt to different task scenes.
3, using the logical architecture of main control unit and algorithm accelerator module, interface process resource is enriched, improves processing
Speed.
4, support is in-orbit restructural, according to the different function of different task scene configurations, realizes multi-functional spaceborne supercomputer
The function diversification of device.
Based on above-mentioned multi-functional spaceborne supercomputer device, the embodiment of the present application also provides a kind of schematic diagram of satellite, such as Fig. 5 institute
Show, which includes: satellite body 501；Star Service platform 502 is installed and such as above-mentioned any embodiment on the satellite body 501
The multi-functional spaceborne supercomputer device 503；The Star Service platform 502 and the multi-functional spaceborne supercomputer device 503 communicate to connect.
When it is implemented, after Star Service platform 502 receives the observing and controlling instruction of ground observing and controlling system transmission, it can be by the observing and controlling
Instruction is transmitted to above-mentioned multi-functional spaceborne supercomputer device 503, carries out so that multi-functional spaceborne supercomputer device 503 is instructed according to observing and controlling
Corresponding movement.
Satellite provided by the embodiments of the present application includes technical characteristic identical with above-mentioned multi-functional spaceborne supercomputer device, equally
It is able to achieve the function of above-mentioned multi-functional spaceborne supercomputer device, specific work process is referring to above-described embodiment, and details are not described herein.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description
With the specific work process of device, the corresponding process in embodiment of the method can be referred to, is repeated no more in the application.In the application
In provided several embodiments, it should be understood that disclosed systems, devices and methods, it can be real by another way
It is existing.The apparatus embodiments described above are merely exemplary, for example, the division of the module, only a kind of logic function
It can divide, there may be another division manner in actual implementation, in another example, multiple module or components can combine or can collect
At another system is arrived, or some features can be ignored or not executed.Another point, shown or discussed mutual coupling
Conjunction or direct-coupling or communication connection can be the indirect coupling or communication connection by some communication interfaces, device or module,
It can be electrical property, mechanical or other forms.
The module as illustrated by the separation member may or may not be physically separated, aobvious as module
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme
's.
It, can also be in addition, each functional unit in each embodiment of the application can integrate in one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in the executable non-volatile computer-readable storage medium of a processor.Based on this understanding, the application
Technical solution substantially the part of the part that contributes to existing technology or the technical solution can be with software in other words
The form of product embodies, which is stored in a storage medium, including some instructions use so that
One computer equipment (can be personal computer, server or the network equipment etc.) executes each embodiment institute of the application
State all or part of the steps of method.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, ROM, RAM, magnetic or disk
Etc. the various media that can store program code.
In addition, in the description of the embodiment of the present application unless specifically defined or limited otherwise, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
Connection inside two elements.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in application.
In the description of the present application, it should be noted that term " first ", " second ", " third " are used for description purposes only,
It is not understood to indicate or imply relative importance.
Finally, it should be noted that embodiment described above, the only specific embodiment of the application, to illustrate the application
Technical solution, rather than its limitations, the protection scope of the application is not limited thereto, although with reference to the foregoing embodiments to this Shen
It please be described in detail, those skilled in the art should understand that: anyone skilled in the art
Within the technical scope of the present application, it can still modify to technical solution documented by previous embodiment or can be light
It is readily conceivable that variation or equivalent replacement of some of the technical features；And these modifications, variation or replacement, do not make
The essence of corresponding technical solution is detached from the spirit and scope of the embodiment of the present application technical solution, should all cover the protection in the application
Within the scope of.Therefore, the protection scope of the application should be based on the protection scope of the described claims.
Claims (10)
1. a kind of multi-functional spaceborne supercomputer device, which is characterized in that described device include: main control unit, algorithm accelerator module and
Configuration unit；
The main control unit is connect with the configuration unit, and the configuration unit is connect with the algorithm accelerator module；
The main control unit receives the first observing and controlling instruction that Star Service platform is sent, and is instructed according to first observing and controlling, from preparatory
Target injection file corresponding with the first observing and controlling instruction is found out in multiple injection files of storage, and passes through the configuration
The logic that unit carries out the target injection file to the algorithm accelerator module configures；
After the completion of logic configuration, the algorithm accelerator module carries out the corresponding operation content of target injection file
Algorithm accelerates, and instructs corresponding function with the first observing and controlling described in quick execution.
2. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that described device further include: with it is described
The port POE of main control unit connection；
The main control unit carries out network data communication by the port POE and the Star Service platform or other load；
The main control unit also passes through the port POE and obtains power supply from power supply unit.
3. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the main control unit is also connected with
One data storage device；
The main control unit receives the second observing and controlling instruction that the Star Service platform is sent, and to the finger in second observing and controlling instruction
Frame progress framing and verification is enabled to store the injection file generated according to described instruction frame to described first after verifying successfully
Data storage device.
4. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the algorithm accelerator module is also connected with
There is the second data storage device；
Second data storage device is for storing configuration number of the algorithm accelerator module in the logic configuration process
According to.
5. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the algorithm accelerator module includes:
FPGA array；
The port of the FPGA array is configured with driver.
6. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the main control unit and the algorithm
Accelerator module also passes through PCIe bus and/or the connection of UART asynchronous serial port；
The main control unit carries out high speed data transfer by the PCIe bus and the algorithm accelerator module；
The main control unit carries out slow data transmission by the UART asynchronous serial port and the algorithm accelerator module.
7. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the configuration unit includes antifuse
FPGA。
8. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the main control unit is also connected with
One data buffer storage device；
The first data buffer storage device is used for exented memory.
9. multi-functional spaceborne supercomputer device according to claim 1, which is characterized in that the algorithm accelerator module is also connected with
There is the second data buffer storage device；
The second data buffer storage device is used for data buffer storage.
10. a kind of satellite, which is characterized in that the satellite includes: satellite body；Star Service platform is installed on the satellite body
And such as the described in any item multi-functional spaceborne supercomputer devices of claim 1-9；
The Star Service platform and the multi-functional spaceborne supercomputer device communicate to connect.
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