CN110266282B - Variable-gain bipolar pulse amplifier - Google Patents
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Abstract
The present invention provides a variable gain bipolar pulse amplifier, comprising: the limiting amplifier is used for carrying out limiting amplification on the input signal and carrying out gain adjustment; the power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external power supply voltage; and the summing amplifier is used for summing and amplifying the output signal of the limiting amplifier and the unit gain signal. The invention can directly carry out logarithmic amplification processing on the bipolar pulse modulation signal, and the processed signal can completely reserve the amplitude and phase information of the original signal. Aiming at the defects of fixed gain and poor flexibility of the traditional true logarithmic amplifier, an external gain adjusting function is added, small-signal gain adjustment can be carried out through an external resistor, and the true logarithmic amplifier has stronger flexibility in practical application.
Description
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a variable-gain bipolar pulse amplifier.
Background
In system applications such as radars, telemetry equipment, communication receivers and the like, when an input signal is a bipolar pulse amplitude modulation signal with a large dynamic range (the signal amplitude may be from several millivolts to several volts), high-gain amplification needs to be performed on a small signal, gain compression needs to be performed on a large signal, an output signal with a small dynamic range is obtained, and amplitude and phase information of the signal are completely reserved for a post-stage module (such as an AD sampling circuit) to process. The processing circuit is required to have the functions of large dynamic range compression, high gain and capability of retaining signal amplitude and phase information. In engineering, the true logarithm amplifier is generally used for realizing the signal processing function, but after a traditional true logarithm amplifier finished product is packaged, the small signal gain is also solidified and cannot be adjusted, and the use flexibility is poor.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a variable-gain bipolar pulse amplifier for solving the problems of the prior art.
To achieve the above and other related objects, the present invention provides a variable gain bipolar pulse amplifier, comprising:
the limiting amplifier is used for carrying out limiting amplification and gain adjustment on the input signal;
the power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external power supply voltage;
and the summing amplifier is used for summing and amplifying the output signal of the limiting amplifier and the unit gain signal.
Optionally, the second power supply voltage stabilizing circuit includes:
the positive power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on external positive power supply voltage;
and the negative power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external negative power supply voltage.
Optionally, the limiting amplifier comprises an input terminal, an output terminal and an adjusting terminal; the regulating end is externally connected with a regulating resistor or suspended, and the input end of the limiting amplifier is connected with an input signal;
the summing amplifier comprises a first input end, a second input end and an output end;
the input end of the limiting amplifier is electrically connected with the first input end of the summing amplifier, and the output end of the limiting amplifier is electrically connected with the second input end of the summing amplifier.
Optionally, the limiting amplifier comprises a first resistor, a sixth resistor, a third capacitor and a first operational amplifier; the summing amplifier comprises a seventh resistor, an eighth resistor, a ninth resistor and a second operational amplifier;
the first end of the first resistor is respectively connected with the first end of the seventh resistor and the positive input end of the first operational amplifier, the first end of the first resistor is connected with an input signal, and the second end of the first resistor is grounded; the sixth resistor is connected in parallel between the inverting input end and the output end of the first operational amplifier; the adjusting end is connected with the inverting input end of the first operational amplifier;
the output end of the first operational amplifier is connected with the sixth resistor to form a first electrical node, the first electrical node is connected with the first end of the third capacitor, the second end of the third capacitor is connected with the first end of the eighth resistor, the second end of the eighth resistor is connected with the second end of the seventh resistor to form a second electrical node, the second electrical node is respectively connected with the reverse input end of the second operational amplifier, and the ninth resistor is connected between the reverse input end and the output end of the second operational amplifier in parallel.
Optionally, the positive power supply secondary voltage stabilizing circuit comprises a three-terminal regulator and a capacitor; the voltage input end of the three-terminal voltage stabilizer is connected with the power voltage, the first end of the capacitor is connected with the voltage input end of the three-terminal voltage stabilizer, and the second end of the capacitor is grounded; the output end of the three-terminal voltage stabilizer is connected with the positive voltage input end of the summing amplifier and the positive voltage input end of the limiting amplifier.
Optionally, the negative power supply secondary voltage stabilizing circuit comprises a three-terminal regulator and a capacitor; the voltage input end of the three-terminal voltage stabilizer is connected with the power voltage, the first end of the capacitor is connected with the voltage input end of the three-terminal voltage stabilizer, and the second end of the capacitor is grounded; the output end of the three-terminal voltage stabilizer is connected with the negative voltage input end of the summing amplifier and the negative voltage input end of the limiting amplifier.
As described above, the variable gain bipolar pulse amplifier of the present invention has the following advantageous effects:
the variable-gain bipolar pulse amplifier can directly perform logarithmic amplification processing on bipolar pulse modulation signals, and the processed signals can completely retain amplitude and phase information of original signals. Aiming at the defects of fixed gain and poor flexibility of the traditional true logarithmic amplifier, an external gain adjusting function is added, small-signal gain adjustment can be carried out through an external resistor, and the true logarithmic amplifier has stronger flexibility in practical application.
Drawings
FIG. 1 is a block diagram of a variable gain bipolar pulse amplifier according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a variable gain bipolar pulse amplifier embodying the present invention;
FIG. 3 shows an envelope magnitude of a bipolar pulse modulated signal with the circuit embodying the present inventionPPAn output simulation oscillogram when the voltage is 2mV (small signal input);
FIG. 4 shows an envelope magnitude of a bipolar pulse modulated signal with the circuit embodying the present inventionPPOutput simulation oscillogram when being 4V (large signal input);
FIG. 5 shows an envelope magnitude V for a bipolar pulse modulated signal when the GADJ pin of the exemplary embodiment of the invention is suspendedPPThe output simulation oscillogram when the voltage is 200 mV;
FIG. 6 is a graph showing a simulation of the output waveform of a pulse signal having a pulse width of 200ns for a circuit embodying the present invention;
fig. 7 is a simulation diagram of the output waveform of the pulse signal with a pulse width of 50us according to the embodiment of the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The invention provides a variable-gain bipolar pulse amplifier, which is used for realizing logarithmic amplification processing on a large dynamic bipolar pulse modulation signal and has an external adjustment function on small signal gain.
As shown in fig. 1, the technical solution adopted by the present invention to achieve the above-mentioned functions is to invent an external gain-adjustable bipolar pulse amplifier, which comprises a limiting amplifier 1, a power supply secondary voltage-stabilizing circuit and a summing amplifier 4;
the limiting amplifier 1 is used for carrying out limiting amplification on an input signal and carrying out gain adjustment;
the summing amplifier 4 is used for summing and amplifying the output signal of the limiting amplifier and the unit gain signal.
The power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external power supply voltage;
the secondary power supply voltage stabilizing circuit comprises a positive secondary power supply voltage stabilizing circuit 2 and a negative secondary power supply voltage stabilizing circuit 3,
the positive power supply secondary voltage stabilizing circuit 2 is used for carrying out secondary voltage stabilization on external positive power supply voltage; the negative power supply secondary voltage stabilizing circuit 3 is used for carrying out secondary voltage stabilization on the external negative power supply voltage. The positive power supply secondary voltage stabilizing circuit comprises a power input end 2_ VCC and a power output end 2_ OUT, and the negative power supply secondary voltage stabilizing circuit comprises a power input end 3_ VEE and a power output end 3_ OUT.
In one embodiment, the limiting amplifier includes an input terminal, an output terminal 1_ OUT, a positive power terminal 1_ VCC, a negative power terminal 1_ VEE, and a regulation terminal GADJ; the adjusting end is externally connected with an adjusting resistor or suspended, and the input end of the limiting amplifier is connected with an input signal;
the summing amplifier includes a first input terminal 4_ IN1, a second input terminal 4_ IN2, an output terminal OUT, a positive power supply terminal 4_ VCC, and a negative power supply terminal 4_ VEE.
The input of the limiting amplifier is electrically connected to the first input 4_ IN1 of the summing amplifier and the output of the limiting amplifier is electrically connected to the second input 4_ IN2 of the summing amplifier.
As shown IN fig. 2, a limiting amplifier 1, the input terminal of which is the input terminal of the whole circuit, is connected to the IN terminal; its output terminal 1_ OUT is connected to the terminal 4_ IN2 of the summing amplifier 4; a positive power supply end 1_ VCC is connected with a power supply output end 2_ OUT of the positive power supply secondary voltage stabilizing circuit 2; the negative power supply end 1_ VEE is connected with the power supply output end 3_ OUT of the negative power supply secondary voltage stabilizing circuit 3; the GADJ end is connected with an external debugging resistor for gain adjustment.
The positive power supply secondary voltage stabilizing circuit 2 is connected with an external power supply end through a power supply input end 2_ VCC; the power output end 2_ OUT is connected with the positive power supply 1_ VCC terminal of the limiting amplifier 1, and is also connected with the positive power supply terminal 4_ VCC terminal of the summing amplifier 4.
The negative power supply secondary voltage stabilizing circuit 3 is characterized in that a power supply input end 3_ VEE of the negative power supply secondary voltage stabilizing circuit is connected with an external power supply end; the output end 3_ OUT is connected with the negative power supply end 1_ VEE end of the limiting amplifier 1, and is also connected with the negative power supply end 4_ VEE end of the summing amplifier 4.
A summing amplifier 4 having an input terminal 4_ IN1 terminal connected to the IN terminal; the input end 4_ IN2 end is connected with the 1_ OUT end of the limiting amplifier 1; the 4_ VCC end of the positive power supply secondary voltage stabilizing circuit is connected with the 2_ OUT of the positive power supply secondary voltage stabilizing circuit 2; the 4_ VEE end of the negative voltage source secondary voltage stabilizing circuit is connected with the 3_ OUT of the negative power source secondary voltage stabilizing circuit 3; the output end of the circuit is connected with the output end OUT of the circuit.
The limiting amplifier 1 comprises a first resistor R1, a sixth resistor R6, a third capacitor C3 and a first operational amplifier IC 1; the summing amplifier includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a second operational amplifier IC 2.
A first terminal of the first resistor R is connected to the input terminal IN, while a positive input terminal IN + of the first operational amplifier IC1 and a first terminal of the seventh resistor R7 are connected, and a second terminal of R1 is connected to ground;
a first end of the sixth resistor R6 is connected to the inverting input IN-of the first operational amplifier IC1 and the external gain adjustment terminal GADJ; a second terminal of the R6 is connected to the output terminal OUT of the first operational amplifier IC 1; while a second terminal of R6 is connected to a first terminal of a third capacitor C3;
the second terminal of the third capacitor C3 is connected to the first terminal of the eighth resistor R8, and the second terminal of the seventh resistor R7 is connected to the second terminal of the eighth resistor R8.
The seventh resistor R7 is connected to the eighth resistor R8 and then to the first terminal of the ninth resistor R9, while the first terminal of the ninth resistor R9 is connected to the inverting input terminal IN 2-of the second operational amplifier IC2, the forward input terminal of the second operational amplifier IC2 is grounded, and the output terminal of the second operational amplifier IC2 is connected to the second terminal of the ninth resistor R9.
As shown in fig. 2, the positive power supply secondary voltage stabilizing circuit 2 includes a fourth capacitor C4 and a first three-terminal regulator IC3, the negative power supply secondary voltage stabilizing circuit includes a second three-terminal regulator IC4 and a fifth capacitor C5, and the limiting amplifier further includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; the summing amplifier 4 comprises a seventh capacitance C7 and an eighth capacitance C8. The first and second three-terminal voltage regulators IC3 and IC4 are conventional three-terminal voltage regulators.
A first end of the fourth capacitor C4 is connected to the ground terminal of the first three-terminal regulator IC3 and to ground; the second terminal of C4 is connected to the external positive power supply terminal and to the input of the first three-terminal regulator IC 3.
The INPUT terminal INPUT of the second three-terminal regulator IC4 is connected to the external negative power supply terminal and is connected to the first terminal of the fifth capacitor C5, and the second terminal of C5 is connected to the ground terminal of the second three-terminal regulator IC4 and is connected to ground.
A first output end and a second output end of the first three-terminal regulator IC3 are simultaneously connected with a VCC end of the first operational amplifier IC1, a second end of the fifth resistor R5, a second end of the second capacitor C2, a positive power source end VS + of the second operational amplifier IC2 and a first end of the eighth capacitor C8; a first end of the second capacitor C2 is grounded, a second end of the eighth capacitor C8 is grounded, and a first end of the fifth resistor R5 is connected to a first end of the second resistor R2 and a VH end of the first operational amplifier IC1, respectively; a second terminal of the second resistor R2 is connected to the VL terminal of the first operational amplifier IC 1; a first end of the third resistor R3 is connected with the VL end of the first operational amplifier IC1, a second end of the resistor R3 is connected with a first end of the first capacitor C1, and a second end of the capacitor C1 is grounded; the fourth resistor R4 is connected in parallel with the third resistor R3, and the VEE end of the first operational amplifier IC1 is connected with the BACK end and then connected with the first end of the first capacitor C1; meanwhile, a first end of the first capacitor C1 is connected with a first OUTPUT end OUTPUT1 and a second OUTPUT end OUTPUT2 of the second three-terminal regulator IC4, a first end of the first capacitor C1 is connected with a negative power source end VS-of the second operational amplifier IC2, and is connected with a first end of the seventh capacitor C7, and a second end of the seventh capacitor C7 is grounded.
The circuit block diagram of the invention is shown in figure 1, and the variable gain bipolar pulse amplifier of the invention is realized by mutually connecting a limiting amplifier, a positive power supply secondary voltage stabilizing circuit, a negative power supply secondary voltage stabilizing circuit and a summing amplifier.
Fig. 2 shows a specific circuit of a variable gain bipolar pulse amplifier according to an embodiment of the present invention.
The first operational amplifier in the limiting amplifier 1 is an operational amplifier with an output clamping function, the invention is implemented by using a high-speed clamping operational amplifier CLC501 with a device model of TI company and a power supply voltage of +/-5V, and can also be implemented by using an SF9631AX type operational amplifier developed by the 24 th research institute of the national electronic technology group company, or an operational amplifier with similar functions, such as the THS7530 of the TI company or the AD8036/AD8037 of the ADI company. The setting of the clamping voltage can be carried out by adjusting the resistors R2-R5, wherein the resistance value of R2 is 3k omega, the resistance value of R3 is 5.1k omega, R4 is a debugging resistor, the debugging resistor is not installed initially, and R5 is 5.1k omega. When the input is a small signal, high-gain amplification is realized; when the input is a large signal, clamping amplitude limiting amplification is realized. A negative input end of the first operational amplifier is externally led out to form a GADJ pin, and when a secondary pin is suspended, the first operational amplifier is a emitter follower; when the GADJ pin is externally connected with a debugging resistor, the first operational amplifier is a positive proportion operational amplifier with a negative feedback structure. R1 is an input terminal pull-down resistor with a value of 150 Ω; and R6 is a feedback resistor with the value of 4.7k omega. C1 and C2 are power supply filter capacitors, and the values of the power supply filter capacitors are 0.1 uF. C3 is a blocking capacitor with the value of 1 uF.
The first three-terminal regulator IC3 in the positive power supply secondary voltage stabilizing circuit 2 is a three-terminal regulator with an input range of + 6V- +15V and an output voltage of +5V, the device specifically implemented by the invention is CW7805 of Beijing Yuxiang Electron Limited company, and the device can also be implemented by using a three-terminal regulator with similar functions. C4 is a power supply filter capacitor, and the value is 0.1 uF.
The second three-terminal regulator IC4 in the negative power supply secondary voltage stabilizing circuit 3 is a three-terminal regulator with an input range of-6V to-15V and an output voltage of-5V, the device specifically implemented by the invention is CW7905 of Beijing Yuxiang Electron Limited company, and the device can also be implemented by using a three-terminal regulator with similar functions. C5 is a power supply filter capacitor, and the value is 0.1 uF.
The second operational amplifier IC2 in the summing amplifier 4 is an operational amplifier supplying ± 5V, and mainly implements an inverse proportional operational amplification function. The device specifically implemented by the invention is AD8042 of AD company, and can also be realized by SX8042 or other general high-speed operational amplifiers developed by research institute 24 of China electronic technology group. The resistors R7 and R8 and R9 form reverse proportional amplification resistors respectively, the value of R7 is 4.7k omega, the value of R8 is 1.5k omega, and the value of R9 is 3.6k omega. C7 and C8 are power supply filter capacitors, and take the value of 0.1 uF.
The actual measurement result of the circuit of the invention is consistent with the simulation results of the circuits of the invention in figures 3-7, the circuit can work under the condition of-55 ℃ to 125 ℃, and the temperature stability is good.
The variable gain bipolar pulse amplifier can be manufactured by adopting a standard SMT (surface mount technology) and MCM (multi-chip module) process.
The variable-gain bipolar pulse amplifier is realized by mutually connecting a limiting amplifier, a positive power supply secondary voltage stabilizing circuit, a negative power supply secondary voltage stabilizing circuit and a summing amplifier. The operational amplifier with the bipolar clamping function is selected, the output of the operational amplifier and a signal of a unit gain are combined into a true logarithmic amplifier with a double-gain structure, and then the logarithmic compression and amplification function of an input signal is realized through a post-stage summing amplifier. The circuit has the following characteristics:
1. the circuit has the characteristics of large input dynamic range, high small signal gain and externally adjustable gain.
According to the circuit scheme of a specific implementation of fig. 2, the envelope signal of the pulse amplitude modulation signal is simulated (the GADJ pin is externally connected with a debugging resistor 100 Ω). Fig. 3 is a simulation result of an amplification function performed on an input small signal (modulation signal amplitude VPP ═ 2 mV); fig. 4 is a simulation result of an amplification function of an input large signal (modulation signal amplitude VPP ═ 4V). From the simulation results, the scheme can carry out logarithmic amplification on the input signal with the signal amplitude ranging from VPP (2 mV to 4V), the input dynamic range is about 66dB, the output range of the signal amplitude after logarithmic amplification ranges from VPP (230 mV to 8.4V), and the output dynamic range is about 30 dB. The small signal input amplitude is amplified from VPP 2mV to VPP 230mV, and the amplification gain is about 41.2 dB. Fig. 5 shows simulation results of the amplification function of the input signal (the amplitude of the modulation signal VPP is 200mV) when the GADJ pin is suspended. When the external GADJ pin is empty, the first-stage limiting amplifier is in a emitter follower state, the amplitude of an input signal is amplified from VPP (200 mV) to VPP (620 mV), and the amplification gain is about 9.8 dB. When the GADJ pin is externally connected with a debugging resistor of 100 omega, the gain of a small signal can reach 41.2dB, and the gain adjustability can reach 31.4 dB. In addition, the small-signal amplification gain and the gain adjustability are both related to the external debugging resistor of the GADJ pin, and the amplification factor can be increased properly according to the practical application condition.
2. After the pulse signal is amplified, the original pulse width signal width can be kept.
According to the circuit scheme of a specific implementation of fig. 2, the pulse signal is simulated (GADJ pin is externally connected with a debugging resistor 100 Ω). Fig. 6 to 7 show output signal simulations when the input pulse amplitude is-1V (negative pulse) and the pulse widths are 200ns and 50us, respectively. Simulation results show that after a pulse input signal with the pulse width of 200 ns-50 us is amplified, the pulse width of the original signal is unchanged and is consistent with the input signal.
3. Has a wide input voltage range. A low-voltage limiting amplifier and an operational amplifier are selected, a three-terminal voltage stabilizer is added at the power supply end of a positive power supply and a negative power supply, and the input voltage range can be from +/-6V to +/-15V.
4. The limiting amplifier, the operational amplifier, the three-terminal voltage stabilizer, the resistor and the capacitor are all conventional devices, and the adopted devices are few, small in size and low in cost. The circuit of the invention does not need to be debugged, and is convenient for mass production.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (4)
1. A variable gain bipolar pulse amplifier, comprising:
the limiting amplifier is used for carrying out limiting amplification on the input signal and carrying out gain adjustment;
the power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external power supply voltage;
a summing amplifier for summing and amplifying the output signal of the limiting amplifier and the unity gain signal;
the limiting amplifier comprises an input end, an output end and an adjusting end; the adjusting end is externally connected with an adjusting resistor or suspended, and the input end of the limiting amplifier is connected with an input signal;
the summing amplifier comprises a first input end, a second input end and an output end;
the input end of the limiting amplifier is electrically connected with the first input end of the summing amplifier, and the output end of the limiting amplifier is electrically connected with the second input end of the summing amplifier;
the limiting amplifier comprises a first resistor, a sixth resistor, a third capacitor and a first operational amplifier;
the summing amplifier comprises a seventh resistor, an eighth resistor, a ninth resistor and a second operational amplifier;
the first end of the first resistor is respectively connected with the first end of the seventh resistor and the positive input end of the first operational amplifier, the first end of the first resistor is connected with an input signal, and the second end of the first resistor is grounded; the sixth resistor is connected in parallel between the inverting input end and the output end of the first operational amplifier; the adjusting end is connected with the inverting input end of the first operational amplifier;
the output end of the first operational amplifier is connected with the sixth resistor to form a first electrical node, the first electrical node is connected with the first end of the third capacitor, the second end of the third capacitor is connected with the first end of the eighth resistor, the second end of the eighth resistor is connected with the second end of the seventh resistor to form a second electrical node, the second electrical node is respectively connected with the reverse input end of the second operational amplifier, and the ninth resistor is connected between the reverse input end and the output end of the second operational amplifier in parallel.
2. A variable gain bipolar pulse amplifier as claimed in claim 1, wherein said power supply secondary regulation circuit comprises:
the positive power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on external positive power supply voltage;
and the negative power supply secondary voltage stabilizing circuit is used for carrying out secondary voltage stabilization on the external negative power supply voltage.
3. A variable gain bipolar pulse amplifier as claimed in claim 2,
the positive power supply secondary voltage stabilizing circuit comprises a three-terminal voltage regulator and a capacitor; the voltage input end of the three-terminal voltage stabilizer is connected with the power voltage, the first end of the capacitor is connected with the voltage input end of the three-terminal voltage stabilizer, and the second end of the capacitor is grounded; the output end of the three-terminal voltage stabilizer is connected with the positive voltage input end of the summing amplifier and the positive voltage input end of the limiting amplifier.
4. A variable gain bipolar pulse amplifier as claimed in claim 2,
the negative power supply secondary voltage stabilizing circuit comprises a three-terminal voltage regulator and a capacitor; the voltage input end of the three-terminal voltage stabilizer is connected with the power voltage, the first end of the capacitor is connected with the voltage input end of the three-terminal voltage stabilizer, and the second end of the capacitor is grounded; the output end of the three-terminal voltage stabilizer is connected with the negative voltage input end of the summing amplifier and the negative voltage input end of the limiting amplifier.
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| "一种大动态范围对数放大器的研究";俞红珊;《中国优秀博硕士学位论文全文数据库(硕士) 信息科技辑》;20111215(第S1期);第32-54页 * |
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