CN110224831A - A kind of high reliability physics unclonable function circuit based on four tube voltage a reference sources - Google Patents
A kind of high reliability physics unclonable function circuit based on four tube voltage a reference sources Download PDFInfo
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- CN110224831A CN110224831A CN201910378132.0A CN201910378132A CN110224831A CN 110224831 A CN110224831 A CN 110224831A CN 201910378132 A CN201910378132 A CN 201910378132A CN 110224831 A CN110224831 A CN 110224831A
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- voltage
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- puf
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- high reliability
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/73—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by creating or determining hardware identification, e.g. serial numbers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
Abstract
The present invention provides a kind of high reliability physics unclonable function circuit based on four tube voltage a reference sources, including external source, column decoder, line decoder, multiply 16 voltage-reference arrays, selector, voltage comparator for one 16.Wherein, voltage-reference array contains 256 base units, and each base unit includes 2 voltage-references.Each voltage-reference is made of the NMOS transistor of 4 different threshold voltages, is used as current loading comprising two enhanced NMOS transistors, the NMOS transistor of two low threshold voltages forms SCM structure.The novel PUF circuit that the invention proposes a kind of based on 4 transistors and biasing subthreshold voltage refers to entirely, voltage-reference inherently show the ultralow sensitivity to temperature and mains voltage variations, this allows for the significant raising of reliability of PUF design.
Description
[technical field]
The present invention relates to chip secure technical field, in particular to a kind of high reliability object based on four tube voltage a reference sources
Manage unclonable function circuit.
[background technique]
Secure key data storage for hardware security, physics unclonable function (PUF) are used as light weight level security
Key has shown that a possibility that huge, and the inevitable technique that the generation of key is originated from semiconductor fabrication is missed
Difference.Compared with the conventional cryptography/decipherment algorithm being stored in private key in nonvolatile memory (NVM), PUF can be utilized can not
It controls with uncertain device manufacturing process error and generates uniqueness, it is random to be responded with reliable, there is stronger robust
Property.It is effective against extensive invasive or half intrusion sexual assault.The severe ring in application is calculated in view of car networking or mist
The deficiency of border factor and Resources on Chip, high reliability, low-power consumption and area utilization have become being critical to for current PUF design
Element.Nowadays, it has already been proposed many state-of-the-art silicon PUF to cope with these challenges.In document 1, author is proposed
Monostable and full static state PUF based on complementary current mirror.Nevertheless, this PUF be only capable of 25 DEG C~80 DEG C and 0.7V~
Satisfactory reliability is shown within the scope of relatively narrow temperature/supply voltage of 1.0V.In document 2, one is proposed
Kind ultra-compact and high robust weak PUF, it using a pair of ultra-compact analog circuit, output response and absolute temperature (PTAT) at
Ratio.In this design, there is a very strong reliability to temperature and mains voltage variations due to PUF, two PTAT circuits
Difference between output voltage depends primarily on the difference of transistor threshold voltage.But the design is 0 in operating temperature range
DEG C in 80 DEG C, mean reliability only has 96.5%.In document 3, the PUF based on voltage-reference array is given first
Mentality of designing.The energy efficiency of this PUF design is 0.16pJ/bit, real within the scope of the mains voltage variations of 0.8V to 1.4V
The high reliability for having showed 98.17% realizes 97.60% high reliability in 0 DEG C to 80 DEG C of range of temperature.So
And due to being restricted using the operating rate of the asynchronous analog-to-digital conversion scheme based on bidirectional counter, PUF, and the work of PUF
Make temperature and supply voltage range relative narrower.About nearest document 4, although realizing low BER under normal operation, it
The energy consumption of consumption is 3.6pj/bit.
[summary of the invention]
It is an object of that present invention to provide a kind of, and the high reliability physics unclonable function based on four tube voltage a reference sources is electric
Road.
To achieve the goals above, which includes: external source, column decoder, line decoder, multiplies for one 16
16 voltage-reference arrays, selector, voltage comparator；Wherein, voltage-reference array contains 256 base units altogether,
Every a line or each column are all made of 16 base units, and each base unit includes 2 voltage-references；Column decoder
Output end is connected with the column input terminal of voltage-reference array, to provide the column selection signal of array；Line decoder output end with
The row input terminal of voltage-reference array is connected, to provide the row selects signal of array；Two voltage-reference array output ends
It is connect respectively with selector input terminal, by selector, each decoder will be random from the voltage-reference array controlled
A column or a line are chosen, will be selected by the row choosing of decoder and column selection, a base unit, then its two electricity generated
Pressure is transmitted on voltage comparator, exported after being finally compared by comparator to two voltage values it is corresponding as a result, i.e. " 0 " or
" 1 " signal.
Further, each voltage-reference is made of the NMOS transistor of 4 different threshold voltages, includes two enhancings
Type NMOS transistor is used as current loading, and the NMOS transistor of two low threshold voltages forms SCM structure.
Further, all transistors are all in work in subthreshold region.
Further, the column decoder and line decoder are 4-16 decoder.
Compared with prior art, the invention proposes one kind based on 4 transistors and biases subthreshold voltage entirely refers to
Novel PUF circuit, voltage-reference inherently shows the ultralow sensitivity to temperature and mains voltage variations, this is allowed for
The significant raising of reliability of PUF design.Also, compared with traditional band gap voltage reference source, it is biased in the complete of sub-threshold region
MOSFET voltage reference source structure has microwatt level power consumption and compact layout designs, can meet internet of things equipment well
Low-power consumption and low cost require.
[Detailed description of the invention]
Fig. 1 is the overall structure of PUF of the present invention.
Fig. 2 is the circuit frame of PUF of the present invention design.
Fig. 3 is base unit structural schematic diagram of the present invention.
Fig. 4 is voltage-reference knot schematic diagram of the present invention.
Fig. 5 is the Small Current Signal model of voltage-reference NMOS and PMOS of the present invention.
Fig. 6 (a) is the case where variation based on the voltage VREF variation with temperature that 256 Case Simulations obtain；6(b)
The case where changing for voltage VREF with the variation of voltage.
Fig. 7 is the voltage's distribiuting situation of its 256 voltage-references in the single PUF example of the present invention.
Fig. 8 is the temperature reliability of present invention PUF design.
Fig. 9 is the potential reliability of present invention PUF design.
Figure 10 is the uniqueness simulation result of present invention PUF design.
[specific embodiment]
In order to which the technological means for realizing the present invention is clear, the present invention is further explained with reference to the accompanying drawing.
Embodiment:
As shown in Figure 1-3, high reliability physics unclonable function circuit of the invention, by 16 × 16 voltage-references
Array is formed with high-precision digital comparator and row/column decoder at a high speed.Specifically, base unit includes two electricity
Press a reference source.When column decoder, line decoder are activated with by input inquiry one base unit of random selection, two institutes
Comparator will be input by selecting the output voltage of Voltage Reference.Due to the variation of random manufacturing technique, above-mentioned two output voltage
It will be slightly different.Then by comparing two different output voltages, i.e. V0And V1, generate number PUF response.The base proposed
The schematic diagram of plinth unit is as shown in Figure 3.By making different types of MOSFET be biased in subthreshold region, realize with small
The subthreshold voltage a reference source of power consumption.In PUF design proposed by the present invention, each reference data source has different threshold values by 4
The NMOS transistor of voltage forms.Two enhanced NMOS transistors are used as current loading, and the NMOS of two low threshold voltages is brilliant
Body pipe forms SCM (automatic biasing MOSFET) structure.In order to reduce total power consumption, all transistors are all in work in subthreshold region.
As a result, the electric current of Voltage Reference can be expressed as follows:
Wherein μ is charge carrier mobility, COXIt is grid capacitance density, W/L is effective width and length, and Vth is threshold
Threshold voltage, m are the sub-threshold slope factor, VTIt is thermal voltage.It is worth noting that, working as voltage VdsWhen > 150mV, in formula (1)It can be ignored.Then electric current, which flows through four transistors and can simplify, is expressed as follows:
Wherein W2And L2It is M2Effective channel width and length, W4And L4It is M respectively4Effective channel width and length.
In conjunction with formula (2) and formula (3), Voltage Reference VREFOutput be equivalent to:
By size adjusting appropriate, we can be minimized influence of the temperature to VREF output voltage, and makeAbout
Equal to 0, this corresponds to excellent stability of the VR in big temperature range.It is worth noting that, we can count from formula 4
It calculatesThis demonstrate that we have very strong robustness to mains voltage variations.
For Voltage Reference shown in Fig. 3, VREFPSRR be equal to:
If VREF/VDDIt is minimized, then voltage-reference can be realized to the outstanding reliable of mains voltage variations
Property.As described in Figure 5, we can be with:
Wherein gds and gms is source electrode mutual conductance and the drain conductance of transistor respectively.Since gms is greater than gds, (VREF/VDD)
PMOS is greater than (VREF/VDD)NMOS.Therefore, NMOS is used as current loading rather than PMOS, to improve to mains voltage variations
Stability.
If in addition, be two enhanced NMOS,It can be given below:
Therefore, by adding an enhanced NMOS, VREF/VDDValue further reducedThis can be into one
Step improves stability, while adapting to biggish mains voltage variations range.
Simulation result is as follows:
PUF design embodiment of the present invention is realized using the 65nm CMOS technology of standard.In Fig. 6, voltage is set forth
The case where output voltage of reference cell changes with the variation of different temperatures and supply voltage.Voltage base designed by this paper
Quasi- source can achieve 81.9ppm/ DEG C of average temperature coefficient (TC), and temperature range is -40 DEG C to 140 DEG C, this is according to 256 times
Monte Carlo simulation operation is calculated, without finishing.Meanwhile voltage-reference show with mains voltage variations (from
0.8V to 1.4V) weak dependence, analog simulation result is as shown in Figure 9.As shown in fig. 7, presenting in single PUF example
The distribution of 256 Voltage References, wherein best fit Gaussian curve has the average value mu of 317.5mV and the standard deviation of 20.8mV
Poor δ.
Reliability, reliability show that PUF can resist the variation of chip operation environmental condition, such as temperature and supply voltage
Variation.The reliability S of PUF example Hamming distance (HD) can be calculated out of piece.In general, in normal operation condition to any
The position the n response Ri of challenge is used as referring to.Then identical challenge k times is applied under different operating conditions identical
PUF example is expressed as Ri to obtain k response, and j indicates j=1, and 2, k, and reliability S can be calculated as follows:
In the present embodiment, simulating different operating temperature (- 40 DEG C to 140 DEG C) and various supply voltages, (0.8V is extremely
Reliability under 1.4V).As shown in Figure 8,9, the original reliability worst at -40 DEG C is 98.44%, is in 1.4V
97.27%.Meanwhile PUF design realizes 99.30% He within the scope of above-mentioned temperature range and supply voltage respectively
98.94% mean reliability.
Uniqueness, the CRP that uniqueness characterization is generated from specific PUF example distinguish degree, ideal feelings with other examples
It is equal to 50% under condition and is usually assessed by HD between piece, as follows:
Wherein Ru and Rv is to be responded respectively with the n-bit that identical challenge generates by PUF chip u and v, and m is PUF reality
The sum of example.Based on Monte Carlo simulation, 1000 PUF examples are generated under identical operating environment and identical challenge.Such as
Shown in Figure 10, HD distribution is fitted well by Gaussian curve between PUF, wherein average value mu=0.4998, and standard deviation=
0.0337, this corresponds to 49.98% fabulous uniqueness.
Randomness refers to the ability that PUF generates random information source, this is encryption key management and equipment identification/authentication application
Important feature.The randomness of proposed PUF design is assessed used here as the NIST protos test suite PROTOS being widely used, and uses text
Recommended setting used in offering 3.Significantly, since data bit flow size is limited, some tests can not be carried out.It is logical
Often, P value should be greater than 0.01, and the information source generated can just be considered as random, and confidence level is up to 99%.Based on from 20
1000 CRP that PUF example generates, NIST test result are summarized in tablei, and wherein P value calculates in the 11st column.According to test
As a result, the PUF proposed is by all test items listed, all P values are all larger than 0.01.
Table I NIST test result
Compare
The PUF of proposition is designed and is compared with other newest PUF embodiments by Table II.It is proposed that PUF exist
There is outstanding uniqueness and reliability within the scope of wide temperature and supply voltage.However, this PUF design consumption 0.84pJ/
Energy efficiency, this is primarily due to the high dynamic power consumption of digital comparator and the higher static function of voltage-reference array
Consumption.But we guarantee the outstanding reliability to environmental change, this point pair using the high speed and high-precision of this comparator
It is of great significance for equipment involved by Internet of Things.
This PUF of Table II and nearest PUF structural behaviour contrast table
1INV_PUF is only listed, SA_PUF has similar performance.
2It carries out inferring from the BER listed and obtain.
Compared with existing PUF structure, it is proposed that PUF structure have within the scope of more broad temperature and supply voltage
There are outstanding uniqueness and reliability specifically, mean reliability is up within the temperature range of -40 DEG C~140 DEG C
99.30%, also very reliable within the scope of the supply voltage of 0.8V~1.4V, mean reliability is up to 98.94%.In normal item
Under part (i.e. 27 DEG C of temperature and the supply voltage of 1.2V), under the handling capacity of 20Mb/s, energy efficiency is calculated as 0.84pJ/
Position.
All technical solutions for belonging to the principle of the invention all belong to the scope of protection of the present invention.For those skilled in the art
For member, several improvement carried out without departing from the principles of the present invention, these improvement also should be regarded as guarantor of the invention
Protect range.
Bibliography
Document 1:A.Alvarez, W.Zhao, and M.Alioto, " 15fJ/b static physically
Unclonable functions for secure chip identification with < 2%native bit
instability and 140 Inter/Intra PUF Hamming distance separation in 65nm”,in
ISSCC Dig.Tech.Papers,Feb.2015,pp.1-3.
Document 2:J.Li, and M.Seok, " Ultra-compact and robust physically unclonable
function based on voltage-compensated proportional-to-absolutetemperature
voltage generators”,IEEE Journal of Solid-State Circuits,vol.51,no.9,pp.2192-
2202,Sep.2016.
Document 3:Y.Cao et al., " A Sub-pico Joules Per Bit Robust Physical
Unclonable Function Based on Subthreshold Voltage References”,2018IEEE
International Symposium on Circuits and Systems(ISCAS),Florence,Italy,2018,
pp.1-5.
Document 4:J.Lee, D.Lee, Y.Lee and Y.Lee, " A 445F2leakage-based physically
unclonable Function with Lossless Stabilization Through Remapping for IoT
Security,”in Proc.IEEE Int.Solid-State Circuits Conf.,2018,pp.132-134.
Claims (4)
1. a kind of high reliability physics unclonable function circuit based on four tube voltage a reference sources, which is characterized in that the circuit
Include: external source, column decoder, line decoder, multiply 16 voltage-reference arrays, selector, voltage comparator for one 16,
Wherein, voltage-reference array contains 256 base units, and every a line or each column are all made of 16 base units, and
Each base unit includes 2 voltage-references；Column decoder output end is connected with the column input terminal of voltage-reference array,
To provide the column selection signal of array；Line decoder output end is connected with the row input terminal of voltage-reference array, to provide
The row selects signal of array；Two voltage-reference array output ends are connect with selector input terminal respectively, by selector, each
Decoder will randomly select a column or a line from the voltage-reference array controlled, by decoder row choosing and column selection,
One base unit will be selected, and then its two voltage generated is transmitted on voltage comparator, finally by comparator to two
A voltage value exports corresponding as a result, i.e. " 0 " or " 1 " signal after being compared.
2. high reliability physics unclonable function circuit according to claim 1, which is characterized in that each voltage reference
Source is made of the NMOS transistor of 4 different threshold voltages, is used as current loading comprising two enhanced NMOS transistors, and two
The NMOS transistor of low threshold voltage forms SCM structure.
3. high reliability physics unclonable function circuit according to claim 1, which is characterized in that all transistors are all
In work in subthreshold region.
4. high reliability physics unclonable function circuit according to claim 1, which is characterized in that the column decoder
And line decoder is 4-16 decoder.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112417523A (en) * | 2020-11-19 | 2021-02-26 | 深圳大学 | Physical unclonable function circuit structure based on silicide removal contact hole |
| CN113095035A (en) * | 2021-03-16 | 2021-07-09 | 宁波大学 | Subthreshold dynamic delay type PUF circuit |
| CN114826622A (en) * | 2022-06-27 | 2022-07-29 | 深圳大学 | Optical reconfigurable PUF device based on CMOS image sensor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN204166421U (en) * | 2014-09-10 | 2015-02-18 | 成都星芯微电子科技有限公司 | A kind of voltage reference source circuit of low-power consumption low noise high power supply voltage rejection ratio |
| CN105245220A (en) * | 2015-09-25 | 2016-01-13 | 深圳大学 | Physical unclonable chip circuit |
| CN107766750A (en) * | 2017-11-22 | 2018-03-06 | 河海大学常州校区 | A kind of PUF circuits based on threshold voltage benchmark |
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2019
- 2019-05-08 CN CN201910378132.0A patent/CN110224831A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204166421U (en) * | 2014-09-10 | 2015-02-18 | 成都星芯微电子科技有限公司 | A kind of voltage reference source circuit of low-power consumption low noise high power supply voltage rejection ratio |
| CN105245220A (en) * | 2015-09-25 | 2016-01-13 | 深圳大学 | Physical unclonable chip circuit |
| CN107766750A (en) * | 2017-11-22 | 2018-03-06 | 河海大学常州校区 | A kind of PUF circuits based on threshold voltage benchmark |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112417523A (en) * | 2020-11-19 | 2021-02-26 | 深圳大学 | Physical unclonable function circuit structure based on silicide removal contact hole |
| CN112417523B (en) * | 2020-11-19 | 2022-06-10 | 深圳大学 | Physical unclonable function circuit structure based on silicide removal contact hole |
| CN113095035A (en) * | 2021-03-16 | 2021-07-09 | 宁波大学 | Subthreshold dynamic delay type PUF circuit |
| CN113095035B (en) * | 2021-03-16 | 2022-04-12 | 宁波大学 | Subthreshold dynamic delay type PUF circuit |
| CN114826622A (en) * | 2022-06-27 | 2022-07-29 | 深圳大学 | Optical reconfigurable PUF device based on CMOS image sensor |
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Application publication date: 20190910 |