CN110188026B - Method and device for determining missing parameters of fast table - Google Patents

Method and device for determining missing parameters of fast table Download PDF

Info

Publication number
CN110188026B
CN110188026B CN201910473368.2A CN201910473368A CN110188026B CN 110188026 B CN110188026 B CN 110188026B CN 201910473368 A CN201910473368 A CN 201910473368A CN 110188026 B CN110188026 B CN 110188026B
Authority
CN
China
Prior art keywords
fast table
host
parameter
virtual machine
determining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910473368.2A
Other languages
Chinese (zh)
Other versions
CN110188026A (en
Inventor
王俊儒
杨小娟
高翔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Loongson Technology Corp Ltd
Original Assignee
Loongson Technology Corp Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Loongson Technology Corp Ltd filed Critical Loongson Technology Corp Ltd
Priority to CN201910473368.2A priority Critical patent/CN110188026B/en
Publication of CN110188026A publication Critical patent/CN110188026A/en
Application granted granted Critical
Publication of CN110188026B publication Critical patent/CN110188026B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention provides a method and a device for determining a fast table missing parameter, wherein the method is applied to the technical field of computers and comprises the following steps: respectively executing a first test program on the virtual machine and a corresponding host machine to obtain a first operation time length and a second operation time length, wherein the first test program comprises a first cyclic code which is executed for a plurality of times and causes the missing of a fast table; determining a fast table deletion parameter corresponding to the host; and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host. The method can determine the fast table deletion parameters of the virtual machine which does not support the PERF tool under the MIPS architecture, and the fast table deletion is not introduced in the test per se, thereby being beneficial to improving the test result. The test is not limited to the MIPS architecture, can be used for X86 and ARM architectures, and has universality.

Description

Method and device for determining missing parameters of fast table
Technical Field
The embodiment of the invention relates to the technical field of computers, in particular to a method and a device for determining a fast table missing parameter.
Background
In KVM (Kernel-based Virtual Machine, kernel virtual machine), a fast table is a short for translation detection buffer (TLB, translation Lookaside Buffer), which is used as a memory management unit to improve the virtual address to physical address translation speed. The overhead of a fast table miss is a significant percentage of the virtual machine overhead. Particularly, under the MIPS (Microprocessor without Interlocked Piped Stages, microprocessor without interlocking pipeline) architecture, after the fast table is missing, the hardware of the virtual machine is only responsible for exiting the client mode, and the rest work is completed by software, so that the overhead of the fast table is larger, and the virtualization performance is influenced.
In the prior art, the overhead test for the fast table miss is usually performed by a performance analysis tool, and a typical performance analysis tool is a PERF (PERFormance profiling, performance analysis) tool, which can record various performance events of a kernel and a process in an operating system, such as a process switching number, a CPU (Central Processing Unit ) processing time, a TLB miss number, and the like.
It has been found that the PERF statistics are typically the number of fast table misses, not the overhead period; the virtual machine under the MIPS architecture does not support the peff tool, and the peff process itself also has an effect on the fast table miss, resulting in inaccurate test results.
Disclosure of Invention
The invention provides a method and a device for determining a fast table missing parameter, so as to solve the problem of PERF statistics of the fast table missing parameter.
In order to solve the technical problems, the invention is realized as follows:
in a first aspect, an embodiment of the present invention provides a method for determining a fast table miss parameter, where the method may include:
respectively executing a first test program on the virtual machine and a corresponding host machine to obtain a first operation time length and a second operation time length, wherein the first test program comprises a first cyclic code which is executed for a plurality of times and causes the missing of a fast table;
determining a fast table deletion parameter corresponding to the host;
and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host.
In a second aspect, an embodiment of the present invention provides a device for determining a missing parameter of a fast table, where the device may include:
the first test program execution module is used for respectively executing a first test program on the virtual machine and a corresponding host machine to obtain a first operation duration and a second operation duration, wherein the first test program comprises a first loop code which is executed for a plurality of times and causes the deletion of a fast table;
the host machine fast table deletion parameter determining module is used for determining fast table deletion parameters corresponding to the host machine;
and the virtual machine fast table deletion parameter determining module is used for determining the fast table deletion parameter corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameter corresponding to the host.
In a third aspect, an embodiment of the present invention provides an electronic device, including a processor, a memory, and a computer program stored on the memory and executable on the processor, where the computer program when executed by the processor implements the steps of the method for determining a fast table miss parameter according to the first aspect.
In a fourth aspect, an embodiment of the present invention provides a computer readable storage medium, on which a computer program is stored, which when executed by a processor implements the steps of the method for determining a fast table miss parameter according to the first aspect.
In the embodiment of the invention, a first test program is executed on a virtual machine and a corresponding host machine respectively to obtain a first operation time length and a second operation time length, wherein the first test program comprises a first loop code which is executed for a plurality of times and causes the deletion of a fast table; determining a fast table deletion parameter corresponding to the host; and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host. The method can determine the fast table deletion parameters of the virtual machine which does not support the PERF tool under the MIPS architecture, and the fast table deletion is not introduced in the test per se, thereby being beneficial to improving the test result. The test is not limited to the MIPS architecture, can be used for X86 and ARM architectures, and has universality.
Drawings
FIG. 1 is one of the flowcharts of a method for determining a missing parameter of a fast table according to an embodiment of the present invention;
FIG. 2 is a second flowchart of a method for determining a missing parameter of a fast table according to an embodiment of the present invention;
FIG. 3 is one of the block diagrams of the apparatus for determining a missing parameter of a fast table according to the embodiment of the present invention;
FIG. 4 is a second block diagram of a device for determining a missing parameter of a fast table according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a hardware structure of a mobile terminal implementing various embodiments of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is one of flowcharts of a method for determining a missing parameter of a snapshot provided in an embodiment of the present invention, where, as shown in fig. 1, the method may include:
step 101, executing a first test program on a virtual machine and a corresponding host machine respectively to obtain a first operation duration and a second operation duration, wherein the first test program comprises a first loop code which is executed for a plurality of times and causes a fast table to be lost.
The first operation duration is the time required by the virtual machine to execute the first test program, and the second operation duration is the time required by the host to execute the first test program.
The host is a computer which exists actually, and the virtual machine is a virtual machine created based on the host, is usually carried on the host, and adopts the configuration of a processor, a memory and the like of the host to process data.
The first test program may be pre-written code, and execution of the first test program may cause a plurality of fast table misses, so that fast table miss parameters may be tested. In the embodiment of the present invention, for simplicity, the first loop code may be a memory access operation, and the memory access operation may introduce a fast table miss.
Of course, it is understood that any operation that may introduce a snapshot miss may be used as the first loop code in the first test program.
Further, the greater the number of executions of the first loop code, the higher the accuracy, and in practical applications, the number of executions is generally set to a higher value, for example, 10 hundred million times or more.
Step 102, determining a fast table deletion parameter corresponding to the host.
The idea of the embodiment of the invention is to determine the fast table missing parameters of the virtual machine based on the fast table missing parameters of the host, and the fast table missing parameters are larger because the host is required to manage the virtual machine when the virtual machine processes data, so that more time is required to be consumed.
In the embodiment of the invention, the fast table missing parameter can be the number of processor operation times corresponding to each fast table missing, and the larger the fast table missing parameter is, the larger the time cost corresponding to each fast table missing is; the smaller the fast table miss parameter, the smaller the corresponding time overhead for each fast table miss. It will be appreciated that the processor frequency is different for different processors.
In the embodiment of the invention, the host computer supports PERF tool statistics fast table deletion under the MIPS architecture, but the virtual machine does not support PERF tool statistics fast table deletion, so that fast table deletion parameters corresponding to the host computer can be obtained through statistics of the existing PERF tool and can also be obtained through testing of other testing programs.
And step 103, determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host.
Specifically, the larger the difference between the first operation duration and the second operation duration is, the more the processing time of the virtual machine is for the same number of times of the fast table deletion; the smaller the difference between the first operation duration and the second operation duration, the less the processing time of the virtual machine for the same number of fast table misses.
For the same first operation duration and second operation duration, no additional time overhead is represented by the virtual machine relative to the host, so that the fast table deletion parameters of the virtual machine and the host are the same.
The more the host corresponding fast table is missing, the more the virtual machine corresponding fast table is missing; the fewer the fast table deletion corresponding to the host computer, the fewer the fast table deletion corresponding to the virtual machine, the fast table deletion times of the virtual machine can be considered to be equal to the fast table deletion times of the host computer, but the two fast table deletion times have different time, so that the fast table deletion parameters are different.
In the embodiment of the invention, the fast table missing parameter of the host can be represented by the number of processor operations corresponding to the single fast table missing of the host, the fast table missing parameter of the virtual machine can be represented by the number of processor operations corresponding to the single fast table missing of the virtual machine, and the single execution of the first loop code introduces the single fast table missing.
Specifically, in one embodiment of the present invention, calculating the above-mentioned fast table miss parameter of the virtual machine may include the following substeps 1031 to 1034:
sub-step 1031, calculating a duration required by the virtual machine to execute the first cyclic code once according to the first operation duration and the execution times of the first cyclic code to obtain a first single duration, and calculating a duration required by the host to execute the first cyclic code once according to the second operation duration and the execution times of the first cyclic code to obtain a second single duration.
Specifically, the first single time period may be a ratio of the first operation period to the number of executions of the first loop code, and the second single time period may be a ratio of the second operation period to the number of executions of the first loop code.
In a sub-step 1032, a difference of the first single time duration minus the second single time duration is calculated to obtain a single time duration difference.
It can be appreciated that the single duration difference is a time overhead that is greater for the virtual machine to execute the first loop code once than for the host machine to execute the first loop code once.
And step 1033, calculating the number of processor operations additionally required by the virtual machine to execute the first loop code once according to the single time duration difference and the processor frequency of the host computer, and obtaining a fast table missing parameter difference.
Specifically, the calculation formula of the fast table missing parameter difference is the product of the single time length difference and the processor frequency of the host, and the fast table missing parameter difference is the difference between the fast table missing parameters of the virtual machine and the host.
Sub-step 1034, determining the fast table missing parameter corresponding to the virtual machine according to the fast table missing parameter difference and the fast table missing parameter corresponding to the host.
The fast table missing parameters corresponding to the virtual machine are the sum of the fast table missing parameter difference and the fast table missing parameters corresponding to the host.
Specifically, in one embodiment of the present invention, calculating the above-mentioned fast table miss parameter of the virtual machine may include the following substeps 1035 to 1038:
sub-step 1035, calculating a duration required by the virtual machine to execute the first cyclic code once according to the first operation duration and the execution times of the first cyclic code to obtain a first single duration, and calculating a duration required by the host to execute the first cyclic code once according to the second operation duration and the execution times of the first cyclic code to obtain a second single duration.
This step is identical to substep 1031.
Sub-step 1036, calculating the number of processor operations corresponding to the first cyclic code executed by the virtual machine once according to the first single time duration and the processor frequency of the host machine to obtain a first number of operations, and calculating the number of processor operations corresponding to the first cyclic code executed by the host machine once according to the second single time duration and the processor frequency of the host machine to obtain a second number of operations.
Specifically, the first operation number may be a product of the first single time duration and a processor frequency of the host, and the second operation number may be a product of the second single time duration and the processor frequency of the host.
And step 1037, calculating a difference value of the first operation times minus the second operation times to obtain a fast table missing parameter difference.
It will be appreciated that the calculation of sub-steps 1036 to 1037 is in a different order and essentially identical to the calculation of sub-steps 1032 to 1033.
And substep 1038, determining a fast table missing parameter corresponding to the virtual machine according to the fast table missing parameter difference and the fast table missing parameter corresponding to the host.
This step is identical to sub-step 1034.
It will be appreciated that the calculation order may also be adjusted according to the calculation principle described above, and the embodiment of the present invention does not limit the intermediate order of calculating the missing parameters of the snapshot.
In summary, in the embodiment of the present invention, a first test program is executed on a virtual machine and a corresponding host machine, so as to obtain a first operation duration and a second operation duration, where the first test program includes executing a first loop code that causes a fast table miss for multiple times; determining a fast table deletion parameter corresponding to the host; and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host. The method can determine the fast table deletion parameters of the virtual machine which does not support the PERF tool under the MIPS architecture, and the fast table deletion is not introduced in the test per se, thereby being beneficial to improving the test result. The test is not limited to the MIPS architecture, can be used for X86 and ARM architectures, and has universality.
FIG. 2 is a second flowchart of a method for determining a missing parameter of a fast table according to an embodiment of the present invention, as shown in FIG. 2, the method may include:
step 201, executing a first test program on a virtual machine and a corresponding host machine respectively to obtain a first operation duration and a second operation duration, wherein the first test program comprises a plurality of times of executing a first loop code which causes the missing of the fast table, and the execution times of the first loop code are determined by preset loop times, the data quantity contained in each page and the number of pages loaded in each fast table.
The preset cycle number can be set according to an actual application scene, and the embodiment of the invention does not limit the preset cycle number.
It will be appreciated that in an operating system, data is paged according to a page size, the page size of each page may be fixed, the page size may be represented by a number of bits, and the occupied size of a data type may be represented by a number of bits, but since the occupied sizes of different data types are different, even though the page sizes of each page are the same, the data amounts contained in each page are different.
The number of pages loaded per snapshot may be the ratio of the number of bits occupied per snapshot to the number of bits occupied per page.
In the embodiment of the present invention, the number of execution times of the first loop code may be determined by a preset number of loops, an amount of data contained in each page, and the number of pages loaded in each fast table, for example, for the following first test program:
Figure BDA0002081384440000071
in the first test procedure, OVER1 is the preset number of cycles, DATAMAX is the data amount contained in each page, pagenesum 1 is determined according to the number of pages loaded in each fast table, and is usually set to be more than 2 times the number of pages loaded in each fast table, and the first cycle code is pi][j]I ζ (exclusive OR of i and j) which does not introduce too much computational complexity, so that the first LOOP code is executed a number of times LOOP 1 Is OVER1 DATAMAX pagenesum 1.
Step 202, determining a fast table deletion parameter corresponding to the host.
This step may refer to the detailed description of step 102, and will not be described herein.
Alternatively, in another embodiment of the present invention, step 202 includes sub-steps A1 to A2:
and a sub-step A1, executing a second test program on the host computer to obtain a third operation time, wherein the second test program comprises a plurality of times of execution of second loop codes which cause cache miss, and the execution times of the second loop codes are determined by preset loop times, the data quantity contained in each page and the number of pages loaded in each secondary cache.
The preset cycle number can be set according to an actual application scene, and the embodiment of the invention does not limit the preset cycle number.
The amount of data contained in each page may refer to the description in step 201, and will not be described in detail herein.
The number of pages loaded by each secondary cache is the ratio of the size of each secondary cache to the page size, thereby ensuring that the second test program only triggers a cache miss and not a fast table miss.
In the embodiment of the present invention, the number of execution times of the second loop code may be determined by a preset number of loops, an amount of data contained in each page, and the number of pages loaded in each secondary cache, for example, for the following second test program:
Figure BDA0002081384440000081
in the second test procedure, OVER2 is a preset number of cycles, which may be the same as or different from OVER1, DATAMAX is the amount of data contained in each page, PAGESUM2 is generally set to be more than 2 times the number of pages loaded in each secondary cache according to the number of pages loaded in each secondary cache, and the second cycle code is pi][j]I ζ (exclusive OR of i and j) which does not introduce too much computational complexity, so that the second loop code is executed a number of times L O 2 O is POVER2 DATAMAX pagenesum 2.
And a sub-step A2 of calculating a fast table deletion parameter corresponding to the host according to the third operation time length, the second operation time length and the execution times of the second cyclic codes.
Specifically, the difference between the third operation duration and the second operation duration may represent the number of fast table missing, and in the embodiment of the present invention, in order to be consistent with the fast table missing parameters corresponding to the virtual machine, the fast table missing parameters are represented by the number of processor operations corresponding to the single fast table missing, and the difference between the third operation duration and the second operation duration is converted.
Optionally, in another embodiment of the present invention, sub-step A2 comprises sub-steps a21 to a22:
and a sub-step A21, generating a second running time difference according to the third running time, the second running time, the execution times of the second cyclic code and the execution times of the first cyclic code, wherein the second running time difference is the difference between the running time of the first cyclic code executed by the host computer once and the running time of the second cyclic code executed by the host computer once.
Specifically, the second running time difference TDIFF 2 The calculation can be made with reference to the following formula:
Figure BDA0002081384440000091
wherein T is 2 For a second duration of operation, LOOP 1 For the number of execution times of the first loop code, reference is specifically made to the detailed description in step 201.
T 3 For a third duration of operation, LOOP 2 For the number of execution times of the second loop code, reference may be made specifically to the detailed description in the sub-step A1.
And a sub-step A22 of calculating the corresponding fast table deletion parameter of the host according to the second running time difference and the processor frequency of the host.
Specifically, the fast table miss parameter TLBM1 corresponding to the host may be calculated by referring to the following formula:
Figure BDA0002081384440000092
wherein FRQ is the processor frequency of the host.
Optionally, in another embodiment of the present invention, step 202 includes sub-step A3:
and a substep A3, counting the fast table missing parameters corresponding to the host by adopting a counter.
In the embodiment of the invention, for an architecture supporting a counter, such as MIPS, a fast table miss parameter corresponding to a counter PERF statistical host may be adopted.
It should be noted that, if the result counted by the pef does not meet the requirement of the present invention, that is, the fast table miss parameter expressed by the number of processor operations corresponding to the single fast table miss may be converted.
And 203, calculating a difference value of the first operation time length minus the second operation time length to obtain a first operation time difference.
Specifically, the first running time difference TDIFF 1 The calculation can be made with reference to the following formula:
TDIFF 1 =T 1 -T 2 (3)
wherein T is 1 For a first operating period, T 2 For a second operating period, T 1 >T 2
It can be appreciated that the first running time difference TDIFF 1 The fast table that is more than the host is missing overhead time for the virtual machine.
And step 204, calculating the number of processor operations corresponding to the first running time difference according to the first running time difference and the processor frequency of the host.
Specifically, the number of processor operations NPO may be calculated with reference to the following formula:
NPO=TDIFF 1 ·FRQ=(T 1 -T 2 )·FRQ (4)
the FRQ is the processor frequency of the host, and it can be understood that the processor frequency may be the processor operation number in a unit time, so that the processor operation number NPO may be the processor operation number corresponding to the fast table missing overhead time of the virtual machine more than the host, that is, the fast table missing overhead of the virtual machine more than the host may be represented by the processor operation number, where the more the processor operation number is, the greater the fast table missing overhead of the virtual machine more than the host is represented; the fewer the number of processor operations, the less the fast table miss overhead representing the virtual machine being more numerous than the host.
And step 205, calculating the number of processor operations additionally required by the virtual machine for executing the first loop code once according to the number of processor operations and the number of execution times of the first loop code, and obtaining a fast table missing parameter difference.
Specifically, the fast table miss parameter difference NPOP may be calculated with reference to the following formula:
Figure BDA0002081384440000101
wherein LOOP 1 For the number of execution times of the first loop code, reference may be made to the detailed description of step 201, which is not repeated here.
It can be understood that the fast table miss parameter difference is the number of processor operations that is additionally required by the virtual machine to execute the first loop code once, with respect to the number of processor operations corresponding to the host machine to execute the first loop code once.
And 206, determining the fast table deletion parameters corresponding to the virtual machine according to the fast table deletion parameter difference and the fast table deletion parameters corresponding to the host.
Specifically, the fast table miss parameter TLBM2 corresponding to the virtual machine may be calculated by referring to the following formula:
Figure BDA0002081384440000111
the TLBM1 is a fast table miss parameter of the host obtained in step 202, and it is understood that the fast table miss parameter of the host and the fast table miss parameter of the virtual machine are both represented by the number of processor operations corresponding to a single fast table miss, and if the fast table miss parameter obtained in step 201 is not represented by the number of processor operations corresponding to a single fast table miss, conversion is required, for example, if the fast table miss parameter obtained in step 201 is the time overhead corresponding to a single fast table miss, the number of processor operations corresponding to a single fast table miss needs to be obtained by multiplying the processor frequency of the host.
In summary, in the embodiment of the present invention, a first test program is executed on a virtual machine and a corresponding host machine, so as to obtain a first operation duration and a second operation duration, where the first test program includes executing a first loop code that causes a fast table miss for multiple times; determining a fast table deletion parameter corresponding to the host; and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host. The method can determine the fast table deletion parameters of the virtual machine which does not support the PERF tool under the MIPS architecture, and the fast table deletion is not introduced in the test per se, thereby being beneficial to improving the test result. The test is not limited to the MIPS architecture, can be used for X86 and ARM architectures, and has universality.
In addition, the method can calculate the fast table missing parameter of the host through the execution time of the second test program, or directly count the fast table missing parameter of the host by using a counter, so that the fast table missing parameter of the host has certain statistical flexibility.
Fig. 3 is one of the block diagrams of a fast table missing parameter determining apparatus according to an embodiment of the present invention, as shown in fig. 3, the fast table missing parameter determining apparatus 300 may include:
the first test program execution module 301 is configured to execute a first test program on the virtual machine and the corresponding host machine, to obtain a first operation duration and a second operation duration, where the first test program includes executing a first loop code that causes a fast table miss for multiple times.
And the host fast table deletion parameter determining module 302 is configured to determine fast table deletion parameters corresponding to the host.
The virtual machine fast table deletion parameter determining module 303 is configured to determine fast table deletion parameters corresponding to the virtual machine according to the first operation duration, the second operation duration, the execution times of the first loop code, and fast table deletion parameters corresponding to the host.
In summary, the apparatus for determining a missing parameter of a fast table according to the embodiment of the present invention can implement each process in the method embodiment of fig. 1, and in order to avoid repetition, a description is omitted here. In the embodiment of the invention, a first test program is executed on a virtual machine and a corresponding host machine respectively to obtain a first operation time length and a second operation time length, wherein the first test program comprises a first loop code which is executed for a plurality of times and causes the deletion of a fast table; determining a fast table deletion parameter corresponding to the host; and determining the fast table deletion parameters corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameters corresponding to the host. The method can determine the fast table deletion parameters of the virtual machine which does not support the PERF tool under the MIPS architecture, and the fast table deletion is not introduced in the test per se, thereby being beneficial to improving the test result. The test is not limited to the MIPS architecture, can be used for X86 and ARM architectures, and has universality.
Alternatively, referring to fig. 4, on the basis of fig. 3 described above, there is shown a block diagram of another determination apparatus of a fast table deletion parameter. Wherein, the apparatus 400 may further include:
the first test program execution module 401 is configured to execute a first test program on a virtual machine and a corresponding host machine, to obtain a first operation duration and a second operation duration, where the first test program includes executing a first loop code that causes a missing of a snapshot multiple times, and the execution times of the first loop code are determined by a preset loop times, an amount of data contained in each page, and the number of pages loaded in each snapshot.
The host fast table missing parameter determining module 402 is configured to determine fast table missing parameters corresponding to the host.
A virtual machine fast table deletion parameter determining module 403, configured to determine a fast table deletion parameter corresponding to the virtual machine according to the first operation duration, the second operation duration, the execution times of the first loop code, and a fast table deletion parameter corresponding to the host; optionally, in another embodiment of the present invention, the virtual machine fast table miss parameter determining module 403 includes:
the first running time difference calculating submodule 4031 is configured to calculate a difference value obtained by subtracting the second running time from the first running time to obtain a first running time difference.
And a processor operation number calculation submodule 4032, configured to calculate, according to the first running time difference and the processor frequency of the host, the processor operation number corresponding to the first running time difference.
And the fast table missing parameter difference calculating submodule 4033 is configured to calculate, according to the number of processor operations and the number of execution times of the first loop code, the number of processor operations that is additionally required by the virtual machine to execute the first loop code once, so as to obtain a fast table missing parameter difference.
And the virtual machine fast table deletion parameter calculation submodule 4034 is configured to determine a fast table deletion parameter corresponding to the virtual machine according to the fast table deletion parameter difference and the fast table deletion parameter corresponding to the host.
Optionally, in another embodiment of the present invention, the host fast table miss parameter determining module 402 includes:
and the second test program execution sub-module is used for executing a second test program on the host computer to obtain a third operation time, the second test program comprises a plurality of times of execution of second loop codes which cause cache miss, and the execution times of the second loop codes are determined by preset loop times, the data quantity contained in each page and the number of pages loaded in each secondary cache.
And the host machine fast table deletion parameter determination submodule is used for calculating the fast table deletion parameter corresponding to the host machine according to the third operation time length, the second operation time length and the execution times of the second cyclic code.
Optionally, in another embodiment of the present invention, the host fast table miss parameter determining submodule includes:
the second running time difference calculating unit is used for generating a second running time difference according to the third running time length, the second running time length, the execution times of the second cyclic codes and the execution times of the first cyclic codes, wherein the second running time difference is a difference value between the running time length of the first cyclic codes executed by the host computer once and the running time length of the second cyclic codes executed by the host computer once.
And the host machine fast table missing parameter determining unit is used for calculating and obtaining the fast table missing parameter corresponding to the host machine according to the second running time difference and the processor frequency of the host machine.
Optionally, in another embodiment of the present invention, the host fast table miss parameter determining module 402 includes:
and the host machine fast table missing parameter statistics sub-module is used for adopting a counter to count fast table missing parameters corresponding to the host machine.
In summary, the apparatus for determining a missing parameter of a fast table according to the embodiment of the present invention can implement each process in the method embodiment of fig. 2, and in order to avoid repetition, a description is omitted here.
The device for determining the missing fast table parameters provided by the embodiment of the invention has the beneficial effects of the device for determining the missing fast table parameters shown in fig. 3, and the missing fast table parameters of the host can be calculated through the execution time of the second test program, or the missing fast table parameters of the host can be directly counted by using a counter, so that the missing fast table parameters of the host have certain statistic flexibility.
Embodiments of the present disclosure also provide an electronic device, referring to fig. 5, including: the personalized recommendation method of the previous embodiment is implemented by the processor 501, the memory 502 and the computer program 5021 stored in the memory 502 and capable of running on the processor when the processor 501 executes the program.
Embodiments of the present disclosure also provide a readable storage medium, which when executed by a processor of an electronic device, enables the electronic device to perform the personalized recommendation method of the foregoing embodiments.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
The algorithms and displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Various general-purpose systems may also be used with the teachings herein. The required structure for a construction of such a system is apparent from the description above. In addition, embodiments of the present disclosure are not directed to any particular programming language. It will be appreciated that the contents of the embodiments of the present disclosure described herein may be implemented using various programming languages, and the above description of specific languages is provided for disclosure of enablement and best mode of the embodiments of the present disclosure.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the disclosure may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the disclosure, various features of embodiments of the disclosure are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., an embodiment of the disclosure that claims require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this disclosure.
Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and disposed in one or more apparatuses different from the embodiments. The modules or units or components of the embodiments may be combined into one module or unit or component and, furthermore, they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Various component embodiments of the present disclosure may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that some or all of the functions of some or all of the components in a personalized recommendation device according to embodiments of the disclosure may be implemented in practice using a microprocessor or Digital Signal Processor (DSP). Embodiments of the present disclosure may also be implemented as a device or apparatus program for performing part or all of the methods described herein. Such a program implementing embodiments of the present disclosure may be stored on a computer readable medium or may have the form of one or more signals. Such signals may be downloaded from an internet website, provided on a carrier signal, or provided in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the embodiments of the disclosure, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. Embodiments of the present disclosure may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
The foregoing description of the preferred embodiments of the present disclosure is not intended to limit the embodiments of the present disclosure, but is intended to cover any modifications, equivalents, and improvements made within the spirit and principles of the embodiments of the present disclosure.
The foregoing is merely a specific implementation of the embodiments of the disclosure, but the protection scope of the embodiments of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the embodiments of the disclosure, and the changes or substitutions are intended to be covered by the protection scope of the embodiments of the disclosure. Therefore, the protection scope of the embodiments of the present disclosure shall be subject to the protection scope of the claims.

Claims (9)

1. A method for determining a fast table miss parameter, the method comprising:
respectively executing a first test program on the virtual machine and a corresponding host machine to obtain a first operation time length and a second operation time length, wherein the first test program comprises a first cyclic code which is executed for a plurality of times and causes the missing of a fast table;
determining a fast table deletion parameter corresponding to the host;
determining the fast table deletion parameter corresponding to the virtual machine according to the first operation time length, the second operation time length, the execution times of the first cyclic code and the fast table deletion parameter corresponding to the host, wherein the fast table deletion parameter comprises: calculating a difference value of the first operation time length minus the second operation time length to obtain a first operation time difference; calculating the number of processor operations corresponding to the first running time difference according to the first running time difference and the processor frequency of the host; calculating the number of processor operations additionally required by the virtual machine for executing the first cyclic code once according to the number of processor operations and the number of execution times of the first cyclic code, and obtaining a fast table missing parameter difference; and determining the fast table deletion parameters corresponding to the virtual machine according to the fast table deletion parameter difference and the fast table deletion parameters corresponding to the host.
2. The method of claim 1, wherein the determining the fast table miss parameter corresponding to the host comprises:
executing a second test program on the host to obtain a third operation time length, wherein the second test program comprises a plurality of times of execution of second loop codes which cause cache miss;
and calculating a fast table deletion parameter corresponding to the host according to the third operation time length, the second operation time length and the execution times of the second cyclic code.
3. The method according to claim 2, wherein calculating the fast table miss parameter corresponding to the host according to the third running duration, the second running duration, and the execution times of the second loop code includes:
generating a second running time difference according to the third running time, the second running time, the execution times of the second cyclic code and the execution times of the first cyclic code, wherein the second running time difference is a difference value between the running time of the first cyclic code executed by the host computer once and the running time of the second cyclic code executed by the host computer once;
and calculating the corresponding fast table deletion parameter of the host according to the second running time difference and the processor frequency of the host.
4. The method of claim 1, wherein the determining the fast table miss parameter corresponding to the host comprises:
and counting the fast table missing parameters corresponding to the host by adopting a counter.
5. The method of any one of claims 1 to 4, wherein the number of executions of the first loop code is determined by a preset number of loops, an amount of data contained per page, and a number of pages loaded per snapshot.
6. A method according to claim 2 or 3, wherein the number of executions of the second loop code is determined by a preset number of loops, the amount of data contained per page, and the number of pages loaded per secondary cache.
7. A device for determining a missing parameter of a snapshot, the device comprising:
the first test program execution module is used for respectively executing a first test program on the virtual machine and a corresponding host machine to obtain a first operation duration and a second operation duration, wherein the first test program comprises a first loop code which is executed for a plurality of times and causes the deletion of a fast table;
the host machine fast table deletion parameter determining module is used for determining fast table deletion parameters corresponding to the host machine;
the virtual machine fast table deletion parameter determining module is configured to determine fast table deletion parameters corresponding to the virtual machine according to the first operation duration, the second operation duration, the execution times of the first loop code, and fast table deletion parameters corresponding to the host, where the fast table deletion parameters include: calculating a difference value of the first operation time length minus the second operation time length to obtain a first operation time difference; calculating the number of processor operations corresponding to the first running time difference according to the first running time difference and the processor frequency of the host; calculating the number of processor operations additionally required by the virtual machine for executing the first cyclic code once according to the number of processor operations and the number of execution times of the first cyclic code, and obtaining a fast table missing parameter difference; and determining the fast table deletion parameters corresponding to the virtual machine according to the fast table deletion parameter difference and the fast table deletion parameters corresponding to the host.
8. An electronic device comprising a processor, a memory and a computer program stored on the memory and executable on the processor, the computer program when executed by the processor implementing a method of determining a fast table miss parameter according to any of claims 1 to 6.
9. A computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, which when executed by a processor implements a method of determining a fast table miss parameter according to any of claims 1 to 6.
CN201910473368.2A 2019-05-31 2019-05-31 Method and device for determining missing parameters of fast table Active CN110188026B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910473368.2A CN110188026B (en) 2019-05-31 2019-05-31 Method and device for determining missing parameters of fast table

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910473368.2A CN110188026B (en) 2019-05-31 2019-05-31 Method and device for determining missing parameters of fast table

Publications (2)

Publication Number Publication Date
CN110188026A CN110188026A (en) 2019-08-30
CN110188026B true CN110188026B (en) 2023-05-12

Family

ID=67719768

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910473368.2A Active CN110188026B (en) 2019-05-31 2019-05-31 Method and device for determining missing parameters of fast table

Country Status (1)

Country Link
CN (1) CN110188026B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2024444A1 (en) * 1989-10-20 1991-04-21 Geoffrey O. Blandy Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
CN101246452A (en) * 2007-02-12 2008-08-20 国际商业机器公司 Method and apparatus for fast performing MMU analog, and total system simulator
CN102360339A (en) * 2011-10-08 2012-02-22 浙江大学 Method for improving utilization efficiency of TLB (translation lookaside buffer)
CN104156255A (en) * 2014-07-31 2014-11-19 华为技术有限公司 Virtual machine migration method, virtual machine migration device and source physical host
CN107193631A (en) * 2017-04-28 2017-09-22 华中科技大学 A kind of virtual time piece dispatching method detected based on the Parallel application stage and system
CN107577616A (en) * 2017-09-05 2018-01-12 郑州云海信息技术有限公司 A kind of method and system for dividing final stage shared buffer memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7330942B2 (en) * 2004-07-31 2008-02-12 Hewlett-Packard Development Company, L.P. Method for efficient virtualization of physical memory in a virtual-machine monitor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2024444A1 (en) * 1989-10-20 1991-04-21 Geoffrey O. Blandy Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
CN101246452A (en) * 2007-02-12 2008-08-20 国际商业机器公司 Method and apparatus for fast performing MMU analog, and total system simulator
CN102360339A (en) * 2011-10-08 2012-02-22 浙江大学 Method for improving utilization efficiency of TLB (translation lookaside buffer)
CN104156255A (en) * 2014-07-31 2014-11-19 华为技术有限公司 Virtual machine migration method, virtual machine migration device and source physical host
CN107193631A (en) * 2017-04-28 2017-09-22 华中科技大学 A kind of virtual time piece dispatching method detected based on the Parallel application stage and system
CN107577616A (en) * 2017-09-05 2018-01-12 郑州云海信息技术有限公司 A kind of method and system for dividing final stage shared buffer memory

Also Published As

Publication number Publication date
CN110188026A (en) 2019-08-30

Similar Documents

Publication Publication Date Title
US9158660B2 (en) Controlling operation of a run-time instrumentation facility
US7620941B1 (en) Mechanism for lossless user-level tracing on an architecture supporting PC-relative addressing
US9483268B2 (en) Hardware based run-time instrumentation facility for managed run-times
US9280346B2 (en) Run-time instrumentation reporting
JP6153533B2 (en) Runtime instrumentation oriented sampling
US9454462B2 (en) Run-time instrumentation monitoring for processor characteristic changes
US9665461B2 (en) Obtaining application performance data for different performance events via a unified channel
US20030135720A1 (en) Method and system using hardware assistance for instruction tracing with secondary set of interruption resources
US8286192B2 (en) Kernel subsystem for handling performance counters and events
EP2615552A1 (en) System testing method
US7793160B1 (en) Systems and methods for tracing errors
EP2810170B1 (en) Run-time instrumentation indirect sampling by address
US9442818B1 (en) System and method for dynamic data collection
US7735067B1 (en) Avoiding signals when tracing user processes
CN110188026B (en) Method and device for determining missing parameters of fast table
Walcott-Justice et al. THeME: A system for testing by hardware monitoring events
Mittal et al. Integrating sampling approach with full system simulation: Bringing together the best of both
Chiueh Fast bounds checking using debug register
Walcott-Justice Exploiting Hardware Monitoring in Software Engineering
Heinig et al. Who’s using that memory? A subscriber model for mapping errors to tasks
JPH0452935A (en) Address trace data gathering system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: 100095 Building 2, Longxin Industrial Park, Zhongguancun environmental protection technology demonstration park, Haidian District, Beijing

Applicant after: Loongson Zhongke Technology Co.,Ltd.

Address before: 100095 Building 2, Longxin Industrial Park, Zhongguancun environmental protection technology demonstration park, Haidian District, Beijing

Applicant before: LOONGSON TECHNOLOGY Corp.,Ltd.

GR01 Patent grant
GR01 Patent grant