CN110176220A - Time sequence control circuit, time sequence control method, display panel and display device - Google Patents
Time sequence control circuit, time sequence control method, display panel and display device Download PDFInfo
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- CN110176220A CN110176220A CN201910549173.1A CN201910549173A CN110176220A CN 110176220 A CN110176220 A CN 110176220A CN 201910549173 A CN201910549173 A CN 201910549173A CN 110176220 A CN110176220 A CN 110176220A
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- 238000000034 method Methods 0.000 title claims abstract description 16
- 230000036961 partial effect Effects 0.000 claims description 75
- 239000003990 capacitor Substances 0.000 claims description 25
- 230000011664 signaling Effects 0.000 claims description 23
- 230000000670 limiting effect Effects 0.000 claims description 16
- 230000005611 electricity Effects 0.000 claims description 9
- 230000001934 delay Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 21
- 239000000758 substrate Substances 0.000 description 19
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000002411 adverse Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000003116 impacting effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a time sequence control circuit, a time sequence control method, a display panel and a display device, relates to the technical field of display, and aims to control the output time sequence of two voltage signals for a simple power supply chip. In the embodiment of the invention, the voltage dividing unit is used for controlling the voltage difference between the control end of the switch unit and the input end of the switch unit, and the delay unit is used for controlling the second voltage signal input by the second signal input end to be output to the signal output end after the first preset time under the coordination of the switch unit and the first voltage signal input by the first signal input end; the switching units comprise transistors or triodes, and the types of the transistors or the triodes in the two switching units are different; the first voltage signal and the second voltage signal are input simultaneously.
Description
Technical field
The present invention relates to field of display technology, espespecially a kind of sequential control circuit, sequential control method, display panel and aobvious
Showing device.
Background technique
Display mainly includes liquid crystal display and electroluminescent display, and liquid crystal display is a kind of non-spontaneous smooth device
Part needs that backlight module is arranged, and realizes display function using the backlight that backlight module provides；Electroluminescent display and liquid crystal
Display is different, and electroluminescent display is a kind of selfluminous element, no setting is required backlight module, i.e., can be real without backlight
Existing display function, therefore, electroluminescent display can make more frivolous.Currently, either liquid crystal display is still electric
Electroluminescent display is widely used in.
Power supply chip is generally comprised in display, for providing high level signal and low level signal to driving chip, is driven
Dynamic chip for example can be gate drivers, so that gate drivers export grid into the grid line being correspondingly connected with and open or close
Signal, to realize display function.Wherein, gate drivers are to have for the input timing of high level signal and low level signal
It is necessarily required such as more early than the time of input high level signal at least to the time of gate drivers input low level signal
It 1-4 milliseconds, while to guarantee that gate drivers work normally, avoids impacting gate drivers.
However, inside does not include sequential control circuit for the power supply chip of simple type, so this kind of power supply chip
It is to export high level signal and low level signal simultaneously, is driven if high level signal and low level signal are input to grid simultaneously
When in dynamic device, large effect can be caused to the normal work of gate drivers, generated latch-up, led to gate drivers
It burns.
Based on this, for the power supply chip of simple type, how to guarantee to control high level signal and low level signal
Output timing is those skilled in the art's technical problem urgently to be resolved.
Summary of the invention
The embodiment of the invention provides a kind of sequential control circuit, sequential control method, display panel and display devices, use
To control the output timing of high level signal and low level signal.
In a first aspect, the sequential control circuit has first the embodiment of the invention provides a kind of sequential control circuit
Signal input part, second signal input terminal and signal output end；
The sequential control circuit includes: two switch units, two partial pressure units and at least one delay cell；
The partial pressure unit is connected between the control terminal and input terminal of the switch unit, and the partial pressure unit is used for:
Control the pressure difference between the control terminal of the switch unit and the input terminal of the switch unit；
The delay cell is used for:
Under the cooperation for the first voltage signal that the switch unit and first signal input part input, control
The second voltage signal of the second signal input terminal input exports after the first preset time to the signal output end；
The switch unit includes transistor or triode, the class of transistor or triode in two switch units
Type is different；
Wherein, the first voltage signal inputs simultaneously with the second voltage signal.
Second aspect, the embodiment of the invention provides a kind of display panels, comprising: power supply chip and with the power supply
The sequential control circuit of chip electrical connection；
The sequential control circuit is used for as described in above-mentioned sequential control circuit provided in an embodiment of the present invention by the electricity
The first voltage signal and second voltage signal timesharing output that source chip exports simultaneously.
The third aspect, the embodiment of the invention provides a kind of display devices, including such as provided in an embodiment of the present invention above-mentioned
Display panel.
Fourth aspect, the embodiment of the invention provides a kind of sequential control methods, using such as provided in an embodiment of the present invention
Above-mentioned sequential control circuit is realized, which comprises
Under the cooperation for the first voltage signal that switch unit and the first signal input part input, delay cell control
The second voltage signal of second signal input terminal input exports after the first preset time to signal output end；
Wherein, partial pressure unit controls the pressure between the control terminal of the switch unit and the input terminal of the switch unit
Difference；The switch unit includes transistor or triode, and the type of transistor or triode in two switch units is not
Together；The first voltage signal inputs simultaneously with the second voltage signal.
The present invention has the beneficial effect that:
A kind of sequential control circuit, sequential control method, display panel and display device provided in an embodiment of the present invention are led to
The setting to sequential control circuit is crossed, and sequential control circuit and power supply chip are used cooperatively, is simple in power supply chip
When the power supply chip of type, it can control the output timing of first voltage signal and second voltage signal using sequence controller, make
Two voltage signal timesharing outputs are obtained, avoids causing adverse effect to gate drivers, improves the reliability of display device, pass through
Sequential control circuit provided in an embodiment of the present invention cooperates the power supply chip of simple type, is realized with a low cost the timesharing output of signal.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the first sequential control circuit provided in the embodiment of the present invention；
Fig. 2 is the structural schematic diagram of second of the sequential control circuit provided in the embodiment of the present invention；
Fig. 3 is the structural schematic diagram of the third sequential control circuit provided in the embodiment of the present invention；
Fig. 4 is the structural schematic diagram of the 4th kind of sequential control circuit provided in the embodiment of the present invention；
Fig. 5 is the structural schematic diagram of the first display panel provided in the embodiment of the present invention；
Fig. 6 is the structural schematic diagram of second of the display panel provided in the embodiment of the present invention；
Fig. 7 is the structural schematic diagram of the array substrate provided in the embodiment of the present invention；
Fig. 8 is the structural schematic diagram of the third display panel provided in the embodiment of the present invention；
Fig. 9 is a kind of structural schematic diagram of the display device provided in the embodiment of the present invention.
Wherein, K1- first switch unit, K2- second switch unit, the first partial pressure unit of F1-, the second partial pressure unit of F2-,
The first delay cell of Y1-, the second delay cell of F2-, the first current limiting unit of L1, the second current limiting unit of L2-, 1- power supply chip, 2-
Sequential control circuit, 10- display panel, 11- array substrate, 12- opposite substrate, 13- liquid crystal, 14- flexible circuit board, 15- grid
Driver, 16- package substrate, the display area A1-, A2- frame region, the first signal input part of IN1-, IN2- second signal
Input terminal, OUT, OUT1, OUT2- signal output end, GND- ground signalling end, C1- first capacitor, R1- first resistor, R2-
Two resistance, R3- 3rd resistor.
Specific embodiment
Below in conjunction with attached drawing, to a kind of sequential control circuit provided in an embodiment of the present invention, sequential control method, display
The specific embodiment of panel and display device is described in detail.It should be noted that described embodiment is only
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a kind of sequential control circuits, as shown in Figure 1 to Figure 3, wherein when Fig. 1 is the first
The structural schematic diagram of sequence control circuit, Fig. 2 are the structural schematic diagram of second of sequential control circuit, and Fig. 3 is the third timing control
The structural schematic diagram of circuit processed.
Referring to shown in Fig. 1 to Fig. 3, sequential control circuit has the first signal input part IN1, second signal input terminal IN2
With signal output end OUT；
Sequential control circuit includes: two switch units (such as K1 and K2), two partial pressure units (such as F1 and F2), Yi Jizhi
A few delay cell (such as Y1 and Y2)；
Partial pressure unit is connected between the control terminal of switch unit and input terminal, and partial pressure unit is used for: control switch unit
Control terminal and switch unit input terminal between pressure difference；
Delay cell is used for:
Under the cooperation for the first voltage signal that switch unit and the first signal input part IN1 are inputted, the second letter of control
The second voltage signal of number input terminal IN2 input exports after the first preset time to signal output end OUT；
Switch unit includes transistor or triode, and the type of transistor or triode in two switch units is different；
Wherein, first voltage signal inputs simultaneously with second voltage signal.
It in embodiments of the present invention, can be by the power supply chip of itself and simple type by the setting to sequential control circuit
It is used cooperatively, can control the output timing of first voltage signal and second voltage signal using sequence controller, so that
In the case that one voltage signal first exports, second voltage signal is exported after the first preset time, realizes two voltage letters
Number timesharing output, so as to avoid causing adverse effect to driving chip, improve the reliability of display device, use simultaneously
The power supply chip of sequential control circuit and simple type provided in an embodiment of the present invention can be realized signal timesharing output, reduce at
This.Here driving chip can be gate drivers or other can provide the driving chip of signal for display panel, the present invention
Embodiment is only illustrated with gate drivers, and but it is not limited to this.
Illustrate a bit, in embodiments of the present invention, the type of transistor or triode in two switch units is different, can
To understand are as follows:
When switch unit includes transistor, as depicted in figs. 1 and 2, two switch units are respectively defined as first switch
Unit (being indicated with K1) and second switch unit (being indicated with K2), the effective T1 of the crystal for including in first switch unit K1 indicate,
And type is p-type, the effective T2 of the crystal for including in second switch unit K2 is indicated, and type is N-type.Alternatively, transistor T1 is N
Type, transistor T2 are p-type, do not provide diagram.
Alternatively, when switch unit includes triode, as shown in figure 3, two switch units are still respectively defined as first
Switch unit (being indicated with K1) and second switch unit (being indicated with K2), the triode Q1 table for including in first switch unit K1
Show, type is NPN type, and the triode for including in second switch unit K2 indicates that type is positive-negative-positive with Q2.Alternatively, triode Q1
For positive-negative-positive, triode Q2 is NPN type.
In this way, while guaranteeing that sequential control circuit works normally the switch unit can also be selected to include as needed
Transistor still includes triode, to improve the flexibility of design.
In the specific implementation, in embodiments of the present invention, delay cell can be set one, be also provided with more
It is a, such as two.Below just respectively with sequential control circuit include a delay cell, and including two delay cells for
It is specifically described.
Optionally, when sequential control circuit includes a delay cell, for ease of description, two switch units are distinguished
It is named as first switch unit K1 and second switch unit K2, two partial pressure units are named as the first partial pressure unit F1 and second
Partial pressure unit F2, that is to say, that sequential control circuit includes first switch unit K1, second switch unit K2, the first partial pressure list
First F1, the second partial pressure unit F2 and a delay cell.
At this point, the structure of sequential control circuit can have following two:
The first structure:
Shown in Figure 1, the input terminal of first switch unit K1 (is used with the first signal input part IN1, delay cell respectively
Y1 indicate) first end and the first partial pressure unit F1 first end electrical connection, the control terminal of output end and second switch unit K2
Electrical connection, control terminal are electric with the second end of ground signalling end GND, the second end of the second partial pressure unit F2 and delay cell Y1 respectively
Connection, first switch unit K1 are used for:
Under the ground signalling of delay cell Y1, ground signalling end GND input and the control of the first partial pressure unit F1,
The first signal input part IN1 first voltage signal inputted is transmitted to second switch unit K2 after the first preset time；
The input terminal of the second switch unit K2 first end with second signal input terminal IN2 and the second partial pressure unit F2 respectively
Electrical connection, output end are electrically connected with signal output end OUT, and control terminal is also electrically connected with the second end of the second partial pressure unit F2, the
Two switch unit K2 are used for:
Under the control of first voltage signal and the second partial pressure unit F2, by the second of second signal input terminal IN2 input
Voltage signal is transmitted to signal output end OUT.
That is, delay cell Y1 is electrically connected with first switch unit K1 in such structure, control first voltage letter
It number is transmitted to the time of second switch unit K2, i.e., at the first signal input part IN1 input this moment of first voltage signal
After first preset time, first voltage signal can be transmitted to second switch unit K2 by first switch unit K1.
And first voltage signal arrival second switch unit K2 opens this process up to second switch unit K2, can recognize
To be that there is no delays, so second switch unit K2 can be stood when first voltage signal reaches second switch unit K2
It carves to open and second voltage signal is transmitted to signal output end OUT.
Therefore, since the first signal input part IN1 input this moment of first voltage signal to the first preset time it
Afterwards, sequential control circuit can export second voltage signal.
If first voltage signal and second voltage signal are exported from the power supply chip of simple type simultaneously, pass through the timing control
Circuit processed can make second voltage signal export after first voltage signal exports the first preset time, be effectively ensured the
One voltage signal and second voltage signal timesharing are exported into gate drivers, to guarantee that gate drivers can normally effectively
Work, guarantee the normal display of display panel.
Second of structure:
Shown in Figure 2, the input terminal of first switch unit K1 is single with the partial pressure of the first signal input part IN1 and first respectively
The first end of first F1 is electrically connected, and output end is electrically connected with the control terminal of second switch unit K2, control terminal respectively with ground signalling
The second end electrical connection of GND and the second partial pressure unit F2 is held, first switch unit K1 is used for:
Under the ground signalling of ground signalling end GND input and the control of the first partial pressure unit F1, the first signal is inputted
The first voltage signal of end IN1 input is transmitted to second switch unit K2；
The input terminal of the second switch unit K2 first end with second signal input terminal IN2, the second partial pressure unit F2 respectively
Be electrically connected with the first end of delay cell (being indicated with Y2), output end is electrically connected with signal output end OUT, control terminal also respectively with
The second end of delay cell Y2 and the electrical connection of the second end of the second partial pressure unit F2, second switch unit K2 are used for:
Under the control of first voltage signal, delay cell Y2 and the second partial pressure unit F2, by second signal input terminal
The second voltage signal of IN2 input exports after the first preset time to signal output end OUT.
That is, delay cell Y2 is electrically connected with second switch unit K2 in such structure, in first voltage signal
Reaching this moment of second switch unit K2 starts to the first preset time, and second switch unit K2 is opened, and by second
The second voltage signal of signal input part IN2 input is transmitted to signal output end OUT.
And it inputs first voltage signal from the first signal input part IN1 and is opened to first switch unit K1 and believe first voltage
Number it is transmitted to this process of second switch unit K2, it is believed that be that there is no delays, so the first signal input part IN1 is defeated
When entering first voltage signal, first switch unit K1 can be opened at once, and first voltage signal is transmitted to second switch unit
K2。
Therefore, since the first signal input part IN1 input this moment of first voltage signal to the first preset time it
Afterwards, sequential control circuit can export second voltage signal.
If first voltage signal and second voltage signal are exported from the power supply chip of simple type simultaneously, pass through the timing control
Circuit processed can make second voltage signal export after first voltage signal exports the first preset time, be effectively ensured the
One voltage signal and second voltage signal timesharing are exported into gate drivers, to guarantee that gate drivers can normally effectively
Work, guarantee the normal display of display panel.
Optionally, when sequential control circuit includes two delay cell, for ease of description, two switch units are distinguished
It is named as first switch unit K1 and second switch unit K2, two partial pressure units are named as the first partial pressure unit F1 and second
Two delay cells are named as the first delay cell Y1 and the second delay cell Y2, that is to say, that timing control by partial pressure unit F2
Circuit processed includes first switch unit K1, second switch unit K2, the first partial pressure unit F1, the second partial pressure unit F2, Yi Ji
One delay cell Y1 and the second delay cell Y2.
Specifically, shown in Figure 3, the input terminal of first switch unit K1 respectively with the first signal input part IN1, first
The first end of delay cell Y1 and the electrical connection of the first end of the first partial pressure unit F1, the control of output end and second switch unit K2
End electrical connection, control terminal respectively with ground signalling end GND, the second end of the second partial pressure unit F2 and the first delay cell Y1 the
The electrical connection of two ends, first switch unit K1 are used for:
In the ground signalling of the first delay cell Y1, ground signalling end GND input and the control of the first partial pressure unit F1
Under, the first voltage signal of the first signal input part IN1 input is preset first and is transmitted to second switch list after the sub- time
First K2；
The input terminal of the second switch unit K2 first end with second signal input terminal IN2, the second partial pressure unit F2 respectively
It is electrically connected with the first end of the second delay cell Y2, output end is electrically connected with signal output end OUT, and control terminal is also respectively with second
The second end of delay cell Y2 and the electrical connection of the second end of the second partial pressure unit F2, second switch unit K2 are used for:
It is under the control of first voltage signal, the second delay cell Y2 and the second partial pressure unit F2, second signal is defeated
The second voltage signal for entering to hold IN2 to input presets after the sub- time output to signal output end OUT second.
That is, the first delay cell Y1 is electrically connected with first switch unit K1 in such structure, the first electricity of control
Pressure signal is transmitted to time of second switch unit K2, i.e., the first signal input part IN1 input first voltage signal this when
After first carved presets the sub- time, first voltage signal can be transmitted to second switch unit K2 by first switch unit K1.
Second delay cell Y2 is electrically connected with second switch unit K2, reaches second switch unit K2 in first voltage signal
This moment starts after presetting the sub- time to second, and second switch unit K2 is opened, and second signal input terminal IN2 is inputted
Second voltage signal be transmitted to signal output end OUT.
Therefore, since the first signal input part IN1 inputs this moment of first voltage signal, until first presets the sub- time
After the time adduction for presetting the sub- time with second, sequential control circuit can be exported second voltage signal.
If first voltage signal and second voltage signal are exported from the power supply chip of simple type simultaneously, pass through the timing control
Circuit processed can make second voltage signal preset the sub- time and second in first voltage signal output first and preset the sub- time
It is exported after time adduction, first voltage signal is effectively ensured and second voltage signal timesharing is exported into gate drivers, from
And guarantee that gate drivers normally can effectively work, guarantee the normal display of display panel.
Illustrate a bit, the sequential control circuit to be defined as for the time being when sequential control circuit includes two delay cell
The sequential control circuit is defined as the when sequential control circuit includes a delay cell by a kind of sequence controller circuit for the time being
When two kinds of sequence controller circuits, the first sequential control circuit is compared with second of sequential control circuit, the first timing control
The time delay that circuit processed is generated when exporting second voltage signal can be greater than second of sequential control circuit in output second voltage
The time delay generated when signal, therefore, first, which presets the sub- time, presets the sum of sub- time with second and can be greater than the first preset time.
In the specific implementation, in embodiments of the present invention, delay cell may include first capacitor C1；
Referring to shown in Fig. 1 and Fig. 3, delay cell (such as F1) is electrically connected with first switch unit K1, first capacitor C1 connection
Between the control terminal and the first signal input part IN1 of first switch unit K1；
Or, delay cell (such as F2) is electrically connected with second switch unit K2 shown in referring to figs. 2 and 3, first capacitor C1 connects
It is connected between the control terminal of second switch unit K2 and second signal input terminal IN2.
In this way, by the setting of simple capacitor, can be realized the effect of delay cell, then by with switch unit and point
Being used cooperatively for pressure unit, can effectively control the output time of second voltage signal, to realize defeated to second voltage signal
The control of timing out.
Specifically, in embodiments of the present invention, shown in Figure 3, when sequential control circuit includes two delay cell,
The capacitance of first capacitor C1 in two delay cells can be set to it is identical, such as, but not limited to, in two delay cells
First capacitor C1 capacitance be 1 μ F.
Certainly, the capacitance of the first capacitor C1 in two delay cells may be set to be difference.
In this way, facilitating the design of simplified sequential control circuit, and it is convenient for the production of sequential control circuit；Also, by two
The capacitance of a first capacitor C1 is set as identical, is conducive to the treatment process for simplifying sequential control circuit, and convenient for defeated
The control of timing out.Furthermore, it is possible to be configured according to actual needs to capacitance, the flexibility of design is improved, to be adapted to
The needs of various application scenarios.
In the specific implementation, in embodiments of the present invention, referring to shown in Fig. 1 to Fig. 3, partial pressure unit includes first resistor
R1；Wherein, the resistance value of the first resistor R1 in two partial pressure units can be set to difference, such as, but not limited to, one of them
The resistance value of first resistor R1 is 47K Ω, the resistance value of another first resistor R1 is 10K Ω.
Certainly, the resistance value of the first resistor R1 in two partial pressure units may be set to be identical.
That is, can be believed according to first voltage in the resistance value for the first resistor R1 being arranged in two partial pressure units
Number, the triode that includes in second voltage signal, two switch units or whens transistor turns need pressure difference (when triode,
Pressure difference of the pressure difference between base stage and emitter；When transistor, pressure difference of the pressure difference between grid and source electrode) size, to two
The resistance value of a first resistor R1 is configured, and to guarantee the normal work of sequential control circuit, and can also improve timing control
The flexibility of circuit design processed, to adapt to the needs of various application scenarios.
In this way, the function of partial pressure unit can be realized by simple resistive arrangement, sequential control circuit is not only simplified
Structure, also reduce the manufacture difficulty of sequential control circuit.
Specifically, in embodiments of the present invention, the resistance value of any one first resistor R1 can be set to 10K Ω -1M Ω.
In this way, effective protection can be carried out to switch unit, in order to avoid pressure difference and threshold value between the control terminal and input terminal of switch unit
Voltage (threshold voltage are as follows: required voltage when switching means conductive) it is too many compared to difference (control terminal of switch unit and
Pressure difference between input terminal is more much larger than threshold voltage) and switch unit is caused to burn, to guarantee that switch unit can be normal
Work.
Illustrate a bit, the setting of the capacitance of first capacitor C1, affects first and preset sub- time and the second default son
The setting of time or the first preset time, it is possible to be controlled according to actual needs by the way that the capacitance of first capacitor C1 is arranged
System first presets the sub- time and second and presets sub- time or the first preset time, to pass through simple electronic component
Realize timing control.
Since the both ends of first capacitor C1 are electrically connected with the control terminal of first switch unit K1 with input terminal respectively, and first
The both ends of resistance R1 are also electrically connected with the control terminal of first switch unit K1 with input terminal respectively, so the resistance value of first resistor R1
The sub- time and second is preset for first and presets the setting of sub- time or the first preset time, and there is influence.
Therefore, the sub- time is preset or when the first preset time is configured presetting the sub- time and second to first, it can be with
The capacitance of first capacitor C1 and the resistance value of first resistor R1 are comprehensively considered, to improve the accuracy of timing control, the first electricity
The resistance value of the capacitance and first resistor R1 of holding C1 is bigger, and the time of delay is longer, optionally, passes through setting first capacitor C1's
Other delay times can also can be set at 1-4 milliseconds in the resistance value of capacitance and first resistor R1, delay time,
This is without limitation.
In the specific implementation, in embodiments of the present invention, shown in Figure 4, which is the 4th kind of sequential control circuit
Structural schematic diagram, sequential control circuit further include: be connected between the control terminal of first switch unit K1 and ground signalling end GND
The first current limiting unit L1 and be connected between the control terminal of second switch unit K2 and first switch unit K1 second limit
Flow unit L2；
First current limiting unit L1 is used for: limitation flows into the electric current of first switch unit K1；
Second current limiting unit L2 is used for: limitation flows into the electric current of second switch unit K2.
In this way, passing through the setting of the first current limiting unit L1 and the second current limiting unit L2, corresponding switch unit can be risen
To protective effect, guarantee the normal work of switch unit, to guarantee the normal work of sequential control circuit.
Specifically, in embodiments of the present invention, shown in Figure 4, the first current limiting unit L1 includes second resistance R2, and second
Current limiting unit L2 includes 3rd resistor R3；
The resistance value of second resistance R2 and 3rd resistor R3 can be set to identical, such as but be not limited to, second resistance R2
100K Ω is disposed as with the resistance value of 3rd resistor R3.
Certainly, the resistance value of second resistance R2 and 3rd resistor R3 may be set to be difference.
In this way, being arranged by simple resistance, the effect of current limiting unit can be realized, not only can simplify timing control electricity
The structure on road can also reduce the manufacture difficulty of sequential control circuit, reduce cost of manufacture.And it is possible to according to actual needs
Second resistance R2 and the resistance value of 3rd resistor R3 are configured, the flexibility of design is improved, to be adapted to various application scenarios
Needs.
It should be noted that in embodiments of the present invention, first voltage signal can be low level signal, such as VGL, second
Voltage signal can be high level signal, such as VGH.Certainly, however it is not limited to this, it can also be that other need the letter of time sharing transmissions
Number.
Based on the same inventive concept, the embodiment of the invention provides a kind of sequential control methods, wherein using such as the present invention
The above-mentioned sequential control circuit that embodiment provides is realized that sequential control method may include:
Under the cooperation for the first voltage signal that switch unit and the first signal input part input, delay cell control
The second voltage signal of second signal input terminal input exports after the first preset time to signal output end；
Wherein, the pressure difference between the control terminal of partial pressure unit control switch unit and the input terminal of switch unit；Switch is single
Member includes transistor or triode, and the type of transistor or triode in two switch units is different；First voltage signal with
Second voltage signal inputs simultaneously.
Just sequential control method is illustrated with structure shown in Fig. 4 below.
In Fig. 4, the triode for including in first switch unit K1 is named as the first triode for the time being, is indicated with Q1, class
Type is NPN type, i.e., is greater than the current potential of emitter in the current potential of base stage, and the potential difference between base stage and emitter is greater than or equal to
When threshold voltage, the emitter and collector of triode is connected.The triode for including in second switch unit K2 is named as the time being
Second triode, is indicated with Q2, and type is positive-negative-positive, i.e., is less than the current potential of emitter, and base stage and emitter in the current potential of base stage
Between potential difference be greater than or equal to threshold voltage when, triode emitter and collector conducting.It is with first voltage signal
Low level signal (VGL), second voltage signal be high level signal (such as VGH) for be illustrated.
First stage:
In the input of the first signal input part IN1 no signal, the first triode Q1 is in close state, the first triode Q1
Emitter and collector between be in close state.
When the first signal input part IN1 inputs first voltage signal, because first voltage signal is usually less than ground signalling
End GND provide ground signalling such as can be -10mv if first voltage signal is VGL, so for the first triode Q1 and
Speech, the current potential of base stage are greater than the current potential of emitter one end.
Due to the presence for the first capacitor C1 being electrically connected with the first triode Q1, in the first signal input part IN1 input the
It when one voltage signal, can charge to first capacitor C1, first capacitor C1 has charged after presetting sub- time T1 by first
At after the delay of first capacitor C1, i.e., after presetting sub- time T1 by first, the voltage of node C3 reaches the one or three pole
The voltage of pipe Q1 conducting, such as higher than the first voltage signal 0.7V of the first signal input part IN1 input, the here electricity of node C3
After pressure is the first signal input part IN1 input first voltage signal, with the first triode Q1 first resistor R1 being electrically connected and the
Two resistance R2 form the partial pressure after an access, and node C3 is the section between first resistor R1 and second resistance R2 here
Point, and node C3 is electrically connected with the base stage of the first triode Q1, the first resistor R1 by being electrically connected with the first triode Q1 and
The partial pressure of second resistance R2 and the metering function of second resistance R2, can protect the first triode Q1, avoid because of the one or three pole
Pressure difference between the base stage and emitter of pipe Q1 is larger and punctures, to guarantee that the first triode Q1 can work normally.
Therefore, after first presets sub- time T1, the first triode Q1 is in the conductive state, can be by emitter one end
First voltage signal be transmitted to one end of 3rd resistor R3.
Second stage:
When the first triode Q1 is closed, no signal is transmitted to the base stage of the second triode Q2, so the two or three pole at this time
Pipe Q2 is in close state, and is in close state between the emitter and collector of the second triode Q2.
While the first triode Q1 is connected and first voltage signal is transmitted to one end of 3rd resistor R3, the second letter
Number input terminal IN2 has the input of second voltage signal, because first voltage signal is usually less than second voltage signal, so for second
For triode Q2, the current potential of base stage is less than the current potential of emitter one end.
Due to the presence for the first capacitor C1 being electrically connected with the second triode Q2, third electricity is transmitted in first voltage signal
It when hindering one end of R3, can charge to first capacitor C1, after the delay of first capacitor C1, that is, pass through the second default period of the day from 11 p.m. to 1 a.m
Between after T2, the voltage of node C2 reaches the voltage of the second triode Q2 conducting, and the voltage of node C2 is the first triode here
Q1 conducting after, with the second triode Q2 first resistor R1 be electrically connected and 3rd resistor R3 formation one access after partial pressure, this
In node C2 be node between first resistor R1 and 3rd resistor R3, and the base stage of node C2 and the second triode Q2
Electrical connection.Play the role of partial pressure by first resistor R1 and 3rd resistor R3, the metering function of the R3 of 3rd resistor can be with
The second triode Q2 is protected, avoids puncturing because the pressure difference between the base stage and emitter of the second triode Q2 is larger, to protect
Demonstrate,proving the second triode Q2 can work normally.
Therefore, after second presets sub- time T2, the second triode Q2 is in the conductive state, can be by emitter one end
Second voltage signal be transmitted to signal output end.
Based on above-mentioned two stage, the delay time of sequential control circuit presets the default son of sub- time T1 and second for first
The adduction (being indicated with T0) of time T2, namely it is input to sequential control circuit simultaneously in first voltage signal and second voltage signal
When, after T0 of the sequential control circuit when two voltage signals input, second voltage signal is transmitted to signal output end, it is real
Showed the timing control to voltage signal, here first preset sub- time T1 and second preset sub- time T2 can be by adjusting
One resistance R1, second resistance R2,3rd resistor R3 and first capacitor C1 are arranged, such as can be 1-4 milliseconds, do not limit herein
It is fixed.
Based on the same inventive concept, the embodiment of the invention provides a kind of display panels, as shown in figure 5, the figure is first
The structural schematic diagram of kind display panel, comprising: power supply chip 1 and the sequential control circuit 2 being electrically connected with power supply chip 1；
Such as above-mentioned sequential control circuit provided in an embodiment of the present invention of sequential control circuit 2, is used for power supply chip 1 simultaneously
The first voltage signal of output and second voltage signal timesharing output.
That is, shown in Figure 5, on the one hand, power supply chip 1 is electric by the first voltage signal of output simultaneously and second
Pressure signal passes through the first signal input part IN1 respectively and second signal input terminal IN2 is input in sequential control circuit 2, passes through
After sequential control circuit 2 controls the timing of second voltage signal, second voltage signal is exported to gate drivers 15
In.
On the other hand, power supply chip 1 simultaneously exports first voltage signal into gate drivers 15.
In embodiments of the present invention, by the way that sequential control circuit 2 and power supply chip 1 to be used cooperatively, it is in power supply chip 1
When the power supply chip 1 of simple type, when can control the output of first voltage signal and second voltage signal using sequence controller 2
Sequence, so that two voltage signal timesharing outputs, avoid causing adverse effect to gate drivers 15, improve the reliable of display panel
Property, while the cost of manufacture of display panel can also be reduced.
Specifically, display panel provided in an embodiment of the present invention can be liquid crystal display panel, can also be electroluminescent
Display panel.
Optionally, when display panel is liquid crystal display panel, shown in Figure 6, which is second of display panel
Structural schematic diagram, display panel 10 can also include: opposite and the array substrate 11 and opposite substrate 12 set and be located at array
The liquid crystal 13 of substrate 11 and opposite substrate 12, and display panel 10 further includes the flexible circuit board being electrically connected with array substrate 11
14, as shown in fig. 7, the figure is the structural schematic diagram of array substrate 11, power supply chip 1 can be located on flexible circuit board 14,
Sequential control circuit 2 can be located on flexible circuit board 14, alternatively, may be located on the frame region in array substrate 11
A2, wherein frame region A2 is arranged around display area A1, and gate drivers 15 can also be located at the rim area of array substrate 11
Power supply chip may be implemented by the cabling (being not shown in Fig. 7) being arranged on frame region A2 and flexible circuit board 14 in domain A2
1, the electrical connection of sequential control circuit 2 and gate drivers 15.
In addition, can also include: pixel electrode and public electrode in display panel, diagram not be provided, passes through pixel electrode
Liquid crystal 13 can be driven to deflect with public electrode, by the colored filter being arranged on opposite substrate 12, to realize
Colour display functions.Wherein, pixel electrode is arranged in array substrate 11, and public electrode can be set in array substrate 11,
It can also be arranged in opposite substrate 12, flexible design can be carried out according to actual needs, do not limited herein.
Optionally, when display panel is electroluminescence display panel, shown in Figure 8, which is the third display surface
The structural schematic diagram of plate, display panel 10 can also include: array substrate 11 and package substrate 16 that be opposite and setting, similarly,
The setting position of power supply chip 1 and sequential control circuit 2 may refer to foregoing description, and overlaps will not be repeated.
In addition, be provided in array substrate 11 in electroluminescence display panel pixel circuit and with pixel circuit electricity
The luminescence unit of connection, does not provide diagram, and luminescence unit includes anode layer, luminescent layer, cathode layer, anode and picture in anode layer
Plain circuit electrical connection can input positive charge (such as hole) to luminescent layer by the anode in anode layer, by cathode layer
Cathode can input negative electrical charge (such as electronics) to luminescent layer, positive charge and the negative electrical charge compound rear generation energy excitation in luminescent layer
Luminescent material in luminescent layer and shine, to realize display function.
Based on the same inventive concept, the embodiment of the invention provides a kind of display devices, as shown in figure 9, the figure is display
The structural schematic diagram of device, including such as above-mentioned display panel 10 provided in an embodiment of the present invention.
In the specific implementation, which can be with are as follows: mobile phone (as shown in Figure 9), tablet computer, television set, display,
Any products or components having a display function such as laptop, Digital Frame, navigator.The implementation of the display device can be with
Referring to the embodiment of above-mentioned display panel, overlaps will not be repeated.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (14)
1. a kind of sequential control circuit, which is characterized in that the sequential control circuit has the first signal input part, second signal
Input terminal and signal output end；
The sequential control circuit includes: two switch units, two partial pressure units and at least one delay cell；
The partial pressure unit is connected between the control terminal and input terminal of the switch unit, and the partial pressure unit is used for: control
Pressure difference between the control terminal of the switch unit and the input terminal of the switch unit；
The delay cell is used for:
Under the cooperation for the first voltage signal that the switch unit and first signal input part input, described in control
The second voltage signal of second signal input terminal input exports after the first preset time to the signal output end；
The switch unit includes transistor or triode, and the type of transistor or triode in two switch units is not
Together；
Wherein, the first voltage signal inputs simultaneously with the second voltage signal.
2. sequential control circuit as described in claim 1, which is characterized in that the sequential control circuit includes first switch list
Member, second switch unit, the first partial pressure unit, the second partial pressure unit and the delay cell.
3. sequential control circuit as claimed in claim 2, which is characterized in that
The input terminal of the first switch unit respectively with first signal input part, the first end of the delay cell and institute
The first end electrical connection of the first partial pressure unit is stated, output end is electrically connected with the control terminal of the second switch unit, control terminal point
It is not electrically connected with the second end at ground signalling end, the second end of second partial pressure unit and the delay cell, described first
Switch unit is used for:
Under the control of ground signalling and first partial pressure unit that the delay cell, the ground signalling end input,
The first voltage signal that first signal input part inputs is transmitted to described second to open after first preset time
Close unit；
The input terminal of the second switch unit respectively with the second signal input terminal and second partial pressure unit first
End electrical connection, output end are electrically connected with the signal output end, and second end of the control terminal also with second partial pressure unit is electrically connected
It connects, the second switch unit is used for:
Under the control of the first voltage signal and second partial pressure unit, by the of second signal input terminal input
Two voltage signals are transmitted to the signal output end.
4. sequential control circuit as claimed in claim 2, which is characterized in that
The input terminal of the first switch unit respectively with first signal input part and first partial pressure unit first
End electrical connection, output end is electrically connected with the control terminal of the second switch unit, control terminal respectively with ground signalling end and described
The second end of second partial pressure unit is electrically connected, and the first switch unit is used for:
It is under the control of the ground signalling and first partial pressure unit of ground signalling end input, first signal is defeated
The first voltage signal for entering end input is transmitted to the second switch unit；
The input terminal of the second switch unit first end with the second signal input terminal, second partial pressure unit respectively
Be electrically connected with the first end of the delay cell, output end is electrically connected with the signal output end, control terminal also respectively with it is described
The electrical connection of the second end of the second end of delay cell and second partial pressure unit, the second switch unit are used for:
Under the control of the first voltage signal, the delay cell and second partial pressure unit, described second is believed
The second voltage signal of number input terminal input exports after first preset time to the signal output end.
5. sequential control circuit as described in claim 1, which is characterized in that the sequential control circuit includes first switch list
Member, second switch unit, the first partial pressure unit, the second partial pressure unit and the first delay cell and the second delay cell；
The input terminal of the first switch unit first end with first signal input part, first delay cell respectively
It is electrically connected with the first end of first partial pressure unit, output end is electrically connected with the control terminal of the second switch unit, is controlled
End is electrically connected with the second end at ground signalling end, the second end of second partial pressure unit and first delay cell respectively,
The first switch unit is used for:
In the control of ground signalling and first partial pressure unit that first delay cell, the ground signalling end input
Under system, the first voltage signal of first signal input part input is preset first and is transmitted to described second after the sub- time
Switch unit；
The input terminal of the second switch unit first end with the second signal input terminal, second partial pressure unit respectively
Be electrically connected with the first end of second delay cell, output end is electrically connected with the signal output end, control terminal also respectively with
The electrical connection of the second end of the second end of second delay cell and second partial pressure unit, the second switch unit are used
In:
Under the control of the first voltage signal, second delay cell and second partial pressure unit, by described
The second voltage signal of binary signal input terminal input presets after the sub- time output to the signal output end second；
Wherein, it described first presets the sub- time and with described second presets the sum of sub- time greater than first preset time.
6. such as the described in any item sequential control circuits of claim 2-5, which is characterized in that the delay cell includes the first electricity
Hold；
The delay cell is electrically connected with the first switch unit, and the first capacitor is connected to the first switch unit
Between control terminal and first signal input part；
Or, the delay cell is electrically connected with the second switch unit, the first capacitor is connected to the second switch list
Between the control terminal and the second signal input terminal of member.
7. sequential control circuit as claimed in claim 6, which is characterized in that the sequential control circuit includes that two delays are single
Member；
The capacitance of first capacitor in two delay cells is identical.
8. sequential control circuit as described in claim 1, which is characterized in that the partial pressure unit includes first resistor；
The resistance value of the first resistor in two partial pressure units is different.
9. sequential control circuit as claimed in claim 8, which is characterized in that the resistance value of the first resistor is 10K Ω -1M
Ω。
10. such as the described in any item sequential control circuits of claim 2-5, which is characterized in that the sequential control circuit also wraps
It includes: the first current limiting unit being connected between the control terminal of the first switch unit and the ground signalling end and connection
The second current limiting unit between the control terminal and the first switch unit of the second switch unit；
First current limiting unit is used for: limitation flows into the electric current of the first switch unit；
Second current limiting unit is used for: limitation flows into the electric current of the second switch unit.
11. sequential control circuit as claimed in claim 10, which is characterized in that first current limiting unit includes the second electricity
Resistance, second current limiting unit includes 3rd resistor；
The second resistance is identical as the resistance value of the 3rd resistor.
12. a kind of display panel characterized by comprising power supply chip and the timing control being electrically connected with the power supply chip
Circuit processed；
The sequential control circuit as described in claim any one of 1-11, for by the power supply chip simultaneously export first
Voltage signal and second voltage signal timesharing output.
13. a kind of display device, which is characterized in that including display panel as claimed in claim 12.
14. a kind of sequential control method, which is characterized in that using such as the described in any item sequential control circuits of claim 1-11
It is realized, which comprises
Under the cooperation for the first voltage signal that switch unit and the first signal input part input, delay cell control second
The second voltage signal of signal input part input exports after the first preset time to signal output end；
Wherein, partial pressure unit controls the pressure difference between the control terminal of the switch unit and the input terminal of the switch unit；Institute
Stating switch unit includes transistor or triode, and the type of transistor or triode in two switch units is different；Institute
First voltage signal is stated to input simultaneously with the second voltage signal.
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| CN201910549173.1A CN110176220B (en) | 2019-06-24 | 2019-06-24 | Time sequence control circuit, time sequence control method, display panel and display device |
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