CN110162267A - Flash memory storage and write-in management method - Google Patents

Flash memory storage and write-in management method Download PDF

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Publication number
CN110162267A
CN110162267A CN201810472910.8A CN201810472910A CN110162267A CN 110162267 A CN110162267 A CN 110162267A CN 201810472910 A CN201810472910 A CN 201810472910A CN 110162267 A CN110162267 A CN 110162267A
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CN
China
Prior art keywords
flash memory
memory module
block
memory
ratio
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Pending
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CN201810472910.8A
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Chinese (zh)
Inventor
詹伯彦
陈伟旻
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Asolid Technology Co Ltd
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Asolid Technology Co Ltd
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Publication of CN110162267A publication Critical patent/CN110162267A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

The present invention provides a kind of flash memory storage and write-in management method.The write-in management method of flash memory includes: to detect the size of the unused block of user's block of flash memory;Calculate the ratio of the size of size and user's block that block is not used;And the switching action of the memory module of flash memory is carried out according to ratio, wherein the memory module of flash memory includes single-order memory module and multistage memory module.

Description

Flash memory storage and write-in management method
Technical field
The present invention relates to a kind of flash memory storages and write-in management method, more particularly to can promote memory space Service efficiency flash memory storage and write-in management method.
Background technique
Flash memory in the development of storage storage unit, drilled by single bit by the data storage of a storage unit Into at more bit architectures, make its same quantity storage unit when flash memory, more bit storage frameworks can obtain more The advantage of capacity.In general, most of more bit storage flash memories provide single bit memory module simultaneously.However The read or write speed of flash memory yields to the physical structure in storage unit, and speed is according to fastly to slow respectively single-order storage unit (Single-Level Cell, SLC), multi-level cell memory (Multi-Level Cell, MLC), three rank storage units (Triple-Level Cell, TLC), quadravalence storage unit (Quad-Level Cell, QLC).
Traditionally, each memory cell stores up 1 information bit, referred to as single-order storage unit, single using this storage The flash memory of member is also referred to as single-order storage unit flash memory (SLC flash memory) or abbreviation SLC flash memory Reservoir.The advantages of SLC flash memory be transmission speed faster, power consumption is lower and the longer life expectancy of storage unit.So And since the information that each storage unit includes is less, every megabit of group need to spend higher cost to produce.It is multistage to deposit Storage unit can store up 2 or more information bits in each memory cell, and it is multiple that " multistage " refers to that charge charging has Energy rank (i.e. multiple voltage values), just can so store the value of multiple bits in each storage unit.Use this storage unit Flash memory be also referred to as multi-level cell memory flash memory (MLC flash memory) or abbreviation MLC flash Device.More bits can be stored by each storage unit, MLC flash memory can reduce production cost, but compared with SLC quick flashing Memory, transmission speed is slower, and power consumption is higher lower with the service life of storage unit.
It should be noted that be based on flash memory hardware level, it is single with MLC mode in use, tolerance is lower, need Increasingly complex instruction and accurate physics actuation, certainly will need the more interminable time compared with SLC.But it is single with SLC mode It uses, and the shortcomings that memory capacity is reduced can be faced.Therefore, how to overcome and read and write efficiency limitation under more bit storage frameworks, then The project that engineer as related fields is paid attention to.
Summary of the invention
The present invention provides a kind of flash memory storage and write-in management method, and passes through monitoring flash memory The unused block of user's block switches the memory module of flash memory to promote the service efficiency of memory space.
The present invention provides a kind of write-in management method of flash memory comprising: detect the user of flash memory The size of the unused block of block;Calculate the ratio of the size of size and user's block that block is not used;And foundation Ratio carries out the switching action of the memory module of flash memory, and wherein the memory module of flash memory includes single-order storage mould Formula and multistage memory module.
The present invention provides a kind of flash memory storage, including flash memory and controller.Flash memory With user's block and system block.Controller is coupled to flash memory, to: detect the user of flash memory The size of the unused block of block;Calculate the ratio of the size of size and user's block that block is not used;And foundation Ratio carries out the switching action of the memory module of flash memory, and wherein the memory module of flash memory includes single-order storage mould Formula and multistage memory module.
Based on user's block above-mentioned, that flash memory storage provided by the invention passes through monitoring flash memory Overall size and unused block size proportionate relationship, the switching action of Lai Jinhang memory module.In this way, flash memory Reservoir can carry out storing data according to actual use state, promote the service efficiency of memory space.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make Carefully it is described as follows.
Detailed description of the invention
Fig. 1 illustrates the block diagram of the flash memory storage of exemplary embodiment of the invention.
Fig. 2 illustrates the flow chart of the write-in management method of the flash memory of exemplary embodiment of the invention.
Fig. 3 A and Fig. 3 B illustrate the schematic diagram of the flash memory of exemplary embodiment of the invention.
Fig. 4 illustrates the schematic diagram of the mapping table of exemplary embodiment of the invention.
Fig. 5 illustrates the flow chart of the method for the switching memory module of the flash memory of exemplary embodiment of the invention.
Drawing reference numeral explanation
100: flash memory storage;
110: flash memory;
120: controller;
S201, S203, S205: the step of management method is written;
310: user's block;
3101: having used block;
3102: block is not used;
320: system block;
400: mapping table;
410~4N0: map information;
4102: label;
S501, S503, S505, S507: the step of management method is written.
Specific embodiment
Fig. 1 illustrates the block diagram of flash memory storage according to an exemplary embodiment of the invention.Please refer to figure 1, the flash memory storage 100 of the present embodiment includes flash memory 110 and controller 120.Controller 120 is coupled to Flash memory 110.Wherein, flash memory 110 can have system block and user's block.System block can be used to deposit Storage system temporal data.User's block then can be used to store the data for coming from user's end (such as electronic device).In this hair In bright embodiment, controller 120 can detect the state data memory of flash memory 110, such as controller 120 can detect quick flashing The size of the unused block of user's block in memory 110.Also, controller 120 simultaneously calculates the ruler that block is not used The very little ratio with the size of user's block in flash memory 110.Specifically bright, the size of user's block can be preparatory It is stored in controller 120.Also, controller 120 can make to detect and the size and user's block of the unused block of acquisition Size carry out division arithmetic, to generate the ratio.
Also, the switching that controller 120 can carry out the memory module of flash memory 110 according to above-mentioned ratio is dynamic Make.Wherein, in the embodiment of the present invention, memory module can have single-order memory module and multistage memory module.Work as flash memory 110 operations indicate that each of flash memory 110 storage unit can store single a bit in single-order memory module Data.Opposite, when the operation of flash memory 110 is in multistage memory module, each of expression flash memory 110 is deposited Storage unit can store the data of multiple bits (more than one bit).In embodiments of the present invention, when flash memory 110 operates In multistage memory module, each of flash memory 110 storage unit can record two, three, four, or more The data of bit, do not limit specifically.
Further, since the storage unit of flash memory 110 can be single-order memory module or multistage memory module, control Mapping table is arranged so that user's end judges the memory module of each storage unit in device 120.Mapping table includes in flash memory Multiple map informations between multiple physical address and multiple logical addresses.
Subsidiary one mentions, and flash memory 110 can be NOR type flash memory, be also possible to NAND type flash Device.Also, flash memory storage 100 can be storage card or solid state hard disk (Solid State Drive, SSD) etc., And flash memory storage 100 may be disposed at digital camera, mobile phone, music player, tablet computer or PC etc. In any electronic device.
In addition, the hardware structure about controller 120, controller 120 can be the processor of tool operational capability.Alternatively, Controller 120 can be by hardware description language (Hardware Description Language, HDL) or other The design method for digital circuit well-known to those skilled in the art of anticipating is designed, and can programmed logic gate array by scene Column (Field Programmable Gate Array, FPGA), complexity can program logic device (Complex Programmable Logic Device, CPLD) or special application integrated circuit (Application-specific Integrated Circuit, ASIC) mode come the hardware circuit realized.
Referring to Fig. 1 and Fig. 2, wherein Fig. 2 illustrates the write-in of the flash memory of exemplary embodiment of the invention The flow chart of management method.Fig. 2 is please referred to, step S201 detects the unused block of user's block of flash memory 110 Size.Specifically, controller 120 can periodically detect flash memory 110 to calculate the use of flash memory 110 The size of the unused block of person's block.Then, step S203 then calculates the ruler of size and user's block that block is not used Very little ratio.Furthermore, controller 120 can carry out division for the size of size and user's block that block is not used Operation, and use acquisition ratio.Then, step S205 then carries out the switching of the memory module of flash memory 110 according to ratio Movement.Specifically, the preset value that controller 120 can arbitrarily be set for ratio obtained and user is compared dynamic Make, and switches the memory module of flash memory 110 according to comparison result.It further illustrates, user can be according to certainly The numerical value of oneself demand adjustment preset value.Wherein, it is worth mentioning, preset value can be by designer according to flash memory 110 Actual behaviour in service be arranged, be not particularly limited.
Fig. 3 A and Fig. 3 B illustrate the schematic diagram of flash memory according to an exemplary embodiment of the invention.Referring to Fig. 1, Fig. 3 A and Fig. 3 B, flash memory 110 include user's block 310 and system block 320.It is wrapped in user's block 310 It includes and has used block 3101 and unused block 3102.User's block 310 can be preset as single-order memory module by controller 120 Or multistage memory module, it is not particularly limited.
Fig. 3 A is please referred to, in user's block 310, in the case where the size that block 3102 is not used is relatively large, control Device 120 processed can be according to ratio and the comparison result of preset value, to judge that user's block 310 has enough unused blocks 3102.Controller 120 can set single-order memory module for the memory module of unused block 3102.Furthermore, if control Device 120 processed judges that block 3102 is not used to be occupied in user's block 310 according to ratio and the comparison result of preset value The memory module of unused block 3102 can be converted into single-order memory module by enough ratios, controller 120.To promote data Storage speed with and reliability.
Fig. 3 B is please referred to below, in user's block 310, in the relatively small situation of the size that block 3102 is not used Under, controller 120 can according to ratio and the comparison result of preset value, come judge user's block 310 do not have it is enough not Use block 3102.Controller 120 can set multistage memory module for the memory module of unused block 3102.Further and Speech, if controller 120 according to ratio and the comparison result of preset value, judges to be not used block 3102 in user's block Enough ratios are not occupied in 310, the memory module of unused block 3102 can be converted into multistage storage mould by controller 120 Formula, to store the storing data of more size.
Fig. 4 illustrates the schematic diagram of the mapping table of exemplary embodiment of the invention.Fig. 4 is please referred to, in implementation of the invention In mode, mapping table 400 can be separately set, wherein mapping table 400 includes multiple map informations in flash memory storage 410~4N0.410~4N0 of map information is recorded respectively between multiple physical address and multiple logical addresses in flash memory Corresponding relationship.Mapping table 400 may be provided in any form of storaging medium in flash memory storage, for example, quiet State random access memory (Static Random-Access Memory, SRAM), dynamic random access memory (Dynamic Random Access Memory, DRAM) and/or flash memory in.Mapping table 400 can be used to receive user's end (such as Electronic device) produced by logical address.Mapping table 400 and according to the received logical address of institute to generate corresponding flash The physical address of device.To confirm that the corresponding memory module of storage unit of corresponding physical address is single-order memory module or multistage Memory module, a settable label (such as label 4102) in map information (such as map information 410).Wherein label 4102 can Represent the corresponding memory module of memory block of the physical address in map information 410.In embodiments of the present invention, label 4102 It may be disposed at any one bit in map information 410.For example bright, label 4102 can patrol for the first logical value or second Collect value, wherein when label 4102 can be the first logical value, indicate the corresponding storage of physical address in map information 410 Mode is single-order memory module.Opposite, when label 3102 can be the second logical value, indicate the reality in map information 410 The corresponding memory module in body address is multistage memory module.The first above-mentioned logical value can be logic level " 0 " (or logic Level " 1 "), and the second logical value can be logic level " 1 " (or logic level " 0 ").
In other embodiments of the present invention, label 4102 also can have two or more bits, and there is no special Fixed limitation.For example, label 4102 can be any two bits in map information 410.When label 4102 can be the When one logical value " 00 ", indicate that the corresponding memory module of physical address in map information 410 is single-order memory module.Then, When label 4102 can be the second logical value " 01 ", indicate that the corresponding memory module of physical address in map information 410 is Each storage unit can record the multistage memory module of the data of two bits.Furthermore when label 4102 can patrol for third When collecting value " 10 ", indicate that the corresponding memory module of physical address in map information 410 is each storage unit recordable three The multistage memory module of the data of a bit.And when label 4102 can be the 4th logical value " 11 ", indicate mapping letter The corresponding memory module of physical address in breath 410 is the multistage storage for the data that each storage unit can record four bits Mode.
Certainly, the above-mentioned logical value of label 4102 and the corresponding relationship of memory module are merely the example of explanation, no To limit scope of the invention.Those skilled in the art can carry out defined label according to actual demand according to above-mentioned example 4102 logical value and the corresponding relationship of memory module, are not particularly limited.
In other words, controller can obtain mapped physical address according to the label of the map information corresponding to logical address Memory module.Furthermore, when user's end reads the data of flash memory, user's end can be according to mapping table The marker for judgment of map information should read data with single-order memory module or multistage memory module.
Fig. 5 illustrates the flow chart of the method for the switching memory module of the flash memory of exemplary embodiment of the invention. It please refers to Fig. 5, the unused block of flash memory is preset as single-order memory module or multistage memory module in step S501. Then, step S503 judges whether the ratio of the size of the size that block is not used and user's block is greater than preset value, if greatly In preset value, then enter step in S505.If being less than preset value, enter step in S507.In step S505, controller will Unused block is set as single-order memory module.In step s 507, unused block is set multistage storage mould by controller Formula.
In conclusion user block of the flash memory storage provided by the invention by monitoring flash memory Overall size and unused block size proportionate relationship, the switching action of Lai Jinhang memory module.In this way, flash memory Reservoir can carry out storing data according to actual use state, promote the service efficiency of memory space.In addition, the present invention is in small data The space of amount using when be able to maintain efficient read-write, and it is original using holding also to possess memory in face of the storage of big data quantity Amount.Therefore, the present invention can improve the service efficiency of flash memory storage.
Although the present invention is disclosed as above with embodiment, however, it is not to limit the invention, any technical field Middle technical staff, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore protection of the invention Range is subject to view as defined in claim.

Claims (10)

1. a kind of write-in management method of flash memory characterized by comprising
Detect the size of the unused block of user's block of the flash memory;
Calculate the ratio of the size of the unused block and the size of user's block;And
The switching action of the memory module of the flash memory is carried out according to the ratio,
Wherein the memory module of the flash memory includes single-order memory module and multistage memory module.
2. the write-in management method of flash memory according to claim 1, wherein being carried out according to the ratio described fast The switching action of the memory module of flash memory includes:
Judge whether the ratio is greater than preset value, and when the ratio is greater than the preset value, sets the flash memory The memory module of reservoir is the single-order memory module;And
When the ratio is not more than the preset value, the memory module of the flash memory is set as the multistage storage Mode.
3. the write-in management method of flash memory according to claim 1, further includes:
The memory module for presetting the flash memory is the single-order memory module or the multistage memory module.
4. the write-in management method of flash memory according to claim 1, further includes:
Mapping table is set, wherein the mapping table includes multiple physical address and multiple logical addresses in the flash memory Between multiple map informations.
5. the write-in management method of flash memory according to claim 4, further includes:
Label is set in each map information, wherein the label is the corresponding each entity of each map information The memory module of address.
6. a kind of flash memory storage characterized by comprising
Flash memory has user's block and system block;And
Controller, is coupled to the flash memory, the controller to:
Detect the size of the unused block of user's block of the flash memory;
Calculate the ratio of the size of the unused block and the size of user's block;And
The switching action of the memory module of the flash memory is carried out according to the ratio,
Wherein the memory module of the flash memory includes single-order memory module and multistage memory module.
7. flash memory storage according to claim 6, wherein the controller to:
Judge whether the ratio is greater than preset value, and when the ratio is greater than the preset value, sets the flash memory The memory module of reservoir is the single-order memory module;And
When the ratio is not more than the preset value, the memory module of the flash memory is set as the multistage storage Mode.
8. flash memory storage according to claim 6, wherein the controller presets the flash memory Memory module be the single-order memory module or the multistage memory module.
9. flash memory storage according to claim 6, wherein mapping table, the mapping is arranged in the controller Table includes multiple map informations between multiple physical address and multiple logical addresses in the flash memory.
10. flash memory storage according to claim 9, wherein the controller is in each map information Setting label, the label are the memory module of the corresponding each physical address of each map information.
CN201810472910.8A 2018-02-13 2018-05-17 Flash memory storage and write-in management method Pending CN110162267A (en)

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TW107105304A TWI687809B (en) 2018-02-13 2018-02-13 Flash memory storage device and programming management method thereof

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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101271432A (en) * 2007-03-19 2008-09-24 亮发科技股份有限公司 Quick flashing memory device and its control method
US20100122016A1 (en) * 2008-11-12 2010-05-13 Micron Technology Dynamic slc/mlc blocks allocations for non-volatile memory
US20100205352A1 (en) * 2009-02-10 2010-08-12 Phison Electronics Corp. Multilevel cell nand flash memory storage system, and controller and access method thereof
US20110191525A1 (en) * 2010-02-04 2011-08-04 Phison Electronics Corp. Flash memory storage device, controller thereof, and data programming method thereof
US20120079167A1 (en) * 2010-09-24 2012-03-29 Kabushiki Kaisha Toshiba Memory system
US20120240012A1 (en) * 2010-07-07 2012-09-20 Stec, Inc. Apparatus and method for multi-mode operation of a flash memory device
US20130124787A1 (en) * 2011-09-09 2013-05-16 Ocz Technology Group Inc. Nand flash-based storage device and methods of using
US20140059277A1 (en) * 2011-01-13 2014-02-27 Indilinx Co., Ltd. Storage for adaptively determining a processing technique with respect to a host request based on partition data and operating method for the storage device
WO2018002999A1 (en) * 2016-06-28 2018-01-04 株式会社日立製作所 Storage device and storage equipment

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI471862B (en) * 2011-08-19 2015-02-01 Silicon Motion Inc Flash memory controller
US9588883B2 (en) * 2011-09-23 2017-03-07 Conversant Intellectual Property Management Inc. Flash memory system

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101271432A (en) * 2007-03-19 2008-09-24 亮发科技股份有限公司 Quick flashing memory device and its control method
US20100122016A1 (en) * 2008-11-12 2010-05-13 Micron Technology Dynamic slc/mlc blocks allocations for non-volatile memory
US20100205352A1 (en) * 2009-02-10 2010-08-12 Phison Electronics Corp. Multilevel cell nand flash memory storage system, and controller and access method thereof
US20110191525A1 (en) * 2010-02-04 2011-08-04 Phison Electronics Corp. Flash memory storage device, controller thereof, and data programming method thereof
US20120240012A1 (en) * 2010-07-07 2012-09-20 Stec, Inc. Apparatus and method for multi-mode operation of a flash memory device
US20120079167A1 (en) * 2010-09-24 2012-03-29 Kabushiki Kaisha Toshiba Memory system
US20140059277A1 (en) * 2011-01-13 2014-02-27 Indilinx Co., Ltd. Storage for adaptively determining a processing technique with respect to a host request based on partition data and operating method for the storage device
US20130124787A1 (en) * 2011-09-09 2013-05-16 Ocz Technology Group Inc. Nand flash-based storage device and methods of using
WO2018002999A1 (en) * 2016-06-28 2018-01-04 株式会社日立製作所 Storage device and storage equipment

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Application publication date: 20190823