CN110161441B - Digital broadband lock field system and working method - Google Patents
Digital broadband lock field system and working method Download PDFInfo
- Publication number
- CN110161441B CN110161441B CN201910560993.0A CN201910560993A CN110161441B CN 110161441 B CN110161441 B CN 110161441B CN 201910560993 A CN201910560993 A CN 201910560993A CN 110161441 B CN110161441 B CN 110161441B
- Authority
- CN
- China
- Prior art keywords
- lock
- frequency
- signal
- channel
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N24/00—Investigating or analyzing materials by the use of nuclear magnetic resonance, electron paramagnetic resonance or other spin effects
- G01N24/08—Investigating or analyzing materials by the use of nuclear magnetic resonance, electron paramagnetic resonance or other spin effects by using nuclear magnetic resonance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/20—Arrangements or instruments for measuring magnetic variables involving magnetic resonance
- G01R33/28—Details of apparatus provided for in groups G01R33/44 - G01R33/64
- G01R33/38—Systems for generation, homogenisation or stabilisation of the main or gradient magnetic field
- G01R33/389—Field stabilisation, e.g. by field measurements and control means or indirectly by current stabilisation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- General Physics & Mathematics (AREA)
- Biochemistry (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Health & Medical Sciences (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Magnetic Resonance Imaging Apparatus (AREA)
Abstract
The invention relates to a digital broadband lock field system and a working method thereof, wherein the system consists of control software, an FPGA controller, a lock transmitting channel, a lock receiving channel and a Z0 current output module. The digitized broadband lock field system and the working method can realize nuclear magnetic resonance signal excitation and lock signal receiving of any atomic nucleus in the frequency range of 10 MHz-1.5 GHz, the Z0 current output module supports lock error feedback direct output, supports fully digitized lock field, and has the advantages of simple structure, convenience in control and strong adaptability to various magnetic field change rates.
Description
Technical Field
The invention relates to the technical field of nuclear magnetic resonance spectrometers, in particular to a digital broadband field locking system and a working method thereof.
Background
The nuclear magnetic resonance spectrometer is developed and produced by applying the nuclear magnetic resonance principle, and is characterized in that a high-power pulse signal is transmitted to a detected sample placed in a strong magnetic field to excite the resonance phenomenon of the atomic nucleus of the detected sample, and the nuclear magnetic resonance signal of a complementary detection sample is obtained by methods such as accumulation, phase coding and the like. Frequency f of nuclear magnetic resonance signal and intensity B of magnetic field0In a certain proportional relationship:
when detecting nuclear magnetic signals of a sample to be detected, the objective requirement is that the magnetic field is kept stable enough to ensure the consistency of the acquired nuclear magnetic signals each time. However, the strong magnetic field provided by the superconducting magnet is actually affected by various factors such as ambient temperature, external moving objects, and performance attenuation of the magnet itself, and is in a slow drift state all the time. For the purpose of stabilizing the magnetic field, it is necessary to correct the drift of the magnetic field so that the magnetic field strength is at a constant value, i.e., a lock field.
By using the strict correspondence between the resonance frequency of the atomic nucleus and the magnetic field, the nuclear magnetic resonance spectrometer often monitors the drift of the magnetic field by using the frequency shift of the resonance signal of the atomic nucleus in the magnetic field, which has a single molecular structure (i.e., only one frequency), strong nuclear magnetic signal, no reaction with the molecule to be detected, and easy acquisition. The resonance frequency of the D-nucleus is typically used to monitor the state of the magnetic field drift and correct the lock field for the magnetic field drift. However, in the actual use process, sometimes the D nucleus of the sample needs to be detected, or the D nucleus in the sample has various molecular structures, namely the D nucleus can not be used for field locking, and the D nucleus needs to be used19F nuclei and other nuclei within the range supported by the nmr spectrometer perform field locking.
To implement a lock field system, the following functions need to be implemented:
1) the lock launching function: outputting a radio frequency pulse signal with specific power, phase, width, shape and frequency to excite nuclear magnetic resonance signals (lock signals) of atomic nuclei;
2) lock receiving function: amplifying and down-converting the excited nuclear magnetic resonance signal, and performing analog-to-digital conversion to digitize the lock signal;
3) lock error calculation function: acquiring a difference value between a lock signal frequency and a target lock field frequency in a digital or analog mode;
4) the lock feedback function: and converting the received and extracted locking error into a corresponding current value to form a magnetic field opposite to the magnetic field offset, so as to realize the correction of the magnetic field offset.
In order to realize the above functions, the prior art method is as follows:
1) constructing a lock transmitting and receiving system based on a multi-channel DDS or DAC, directly outputting the required transmitting signal frequency by using one channel, and performing digital quadrature detection or analog quadrature detection on a received signal after performing down-conversion by using the other channel;
2) the lock error data obtained by digital orthogonal detection outputs an analog voltage signal through a DAC (digital-to-analog converter), the analog orthogonal detection directly obtains a lock error voltage signal, and the voltage signal is input to a Z0 driving feedback system;
3) the Z0 driving feedback system consists of a DAC (digital-to-analog converter), a proportional-integral circuit and a V/I (voltage/input) current source, wherein the DAC is used for outputting a Z0 basic value, and a lock error voltage signal is sent to the V/I current source through the proportional-integral circuit to carry out lock error feedback so as to realize magnetic field drift correction.
The prior art has the following disadvantages:
1) the emission part uses DDS or DAC to generate signals with specific frequency and phase, the frequency range output by the DDS or low-speed DAC is very low (less than 100MHz), only the emission of D nuclear frequency can be realized, the emission of atomic nucleus frequency above 100MHz can not be realized, namely the lock field of other nuclei can not be supported;
the high-speed DAC can generate signals with the frequency of hundreds of MHz to 1GHz, but the cost of the high-speed DAC and the matched FPGA controller is very high;
2) when receiving signals, carrying out digital quadrature detection or analog quadrature detection, wherein the analog quadrature detection directly outputs a lock error voltage value, the digital quadrature detection outputs the lock error voltage value through a DAC (digital-to-analog converter), and the lock error voltage value is further input into a Z0 feedback circuit, so that the lock feedback system is long in path and complex in system;
3) the Z0 feedback link is adjusted by the analog proportional-integral circuit to the response parameter of the feedback path, the parameter of the analog device is fixed, the parameter can not be changed arbitrarily according to the requirement, and the change of the magnetic field change rate can not be adapted.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a digital broadband lock field system and a working method thereof, and solves the problem that the existing lock field system cannot realize lock field in a broadband range.
The invention is realized by the following technical scheme:
a digital broadband field locking system comprises an FPGA controller, wherein the FPGA controller is connected with control software through a communication interface, the FPGA controller is also respectively connected with a lock transmitting channel, a lock receiving channel and a Z0 current output module, the lock transmitting channel and the lock receiving channel are connected with a lock preamplifier, the lock preamplifier is connected with a probe, the Z0 current output module is connected with a shimming coil,
the lock transmitting channel comprises a double-channel DDS, a low-pass filter I, a mixer I, a frequency selectable filter I, a transmitting signal power adjusting module and a switch I which are connected in sequence, the frequency selectable filter I comprises a one-out-of-multiple switch I, a low-pass filter array I and a one-out-of-multiple switch II which are connected in sequence, the transmitting signal power adjusting module comprises a variable attenuator I and an amplifier I, and the mixer I is further connected with a local oscillation channel;
the lock receiving channel comprises a switch II, a frequency selectable filter II, a variable attenuator II, an amplifier II, a frequency mixer III, a low-pass filter III, a variable amplifier, a frequency mixer II, a low-pass filter II and an analog-to-digital converter which are sequentially connected, the frequency mixer III is connected with a local oscillation channel, the frequency mixer II is also connected with a dual-channel DDS, the frequency selectable filter II comprises a multiple-selection switch IV, a filter array II and a multiple-selection switch III which are sequentially connected, and the variable attenuator II, the amplifier II and the variable amplifier form a receiving channel power adjusting module;
the Z0 current output module comprises a digital-to-analog converter and a V/I converter which are connected in sequence.
Furthermore, the local oscillation channel comprises a phase-locked loop, a low-pass filter IV, an amplifier III and a power divider which are connected in sequence.
Further, the mixer I and the mixer III are both connected with a power divider.
A working method of a digital broadband lock field system specifically comprises the following steps:
step S1: starting the lock field system of any one of claims 1 to 3, inputting working parameters to the broadband lock field system through a user operation interface: z0 reference value, lock field reference frequency f0Receive gain and transmit power;
step S2: the FPGA controller controls the first channel output frequency of the double-channel DDS to be fIF0Transmit intermediate frequency signals, fIF0The frequency of the output of the signal and local oscillator channel is fLO1After the local oscillation signal is mixed by the mixer I, the frequency is changedOutput pulse signal f after rate selectable filter I, transmitting signal power regulating module and switch ITX，fTXThe frequency of (d) is: f. ofTX＝fLO1-fIF0(fIF0The frequency range of (A) is controlled to be between 10MHz and 100MHz, fTXThe frequency of (3) is adjusted within the range of 0-2 GHz);
step S3: emitted fTXThe signal excites the nuclear magnetic resonance signal of the lock field atomic nucleus in a certain spectrum width range, at the moment, the FPGA controller controls the switch II to receive the signal f according to a certain time lengthRXAccess lock receiving channel, fRXThe frequency is: f. ofRX＝fB0+Δf，fRXThe signal is inverted into a receiving intermediate frequency signal f by a mixer IIIIF1，fIF1The frequency is: f. ofIF1＝fLO1-fRX，fIF1The signal is processed by a low-pass filter III to eliminate harmonic in the mixed output signal, and then processed by a mixer II to remove fIF1The signal is converted into a received intermediate frequency signal fIF，fIF＝fLO0-fIF1，fIFThe signal is sent to the FPGA controller through a low-pass filter II and an analog-to-digital converter; wherein: f. ofB0Is the current magnetic field strength B0Corresponding resonance frequency, fB0＝γB0Δ f is the chemical shift of the lock field nucleus, fLO0Is the second channel output frequency, f, of the two-channel DDSIF1The frequency range of (A) is 10 MHz-100 MHz;
step S4: after the FPGA controller obtains the lock signal, the error between the frequency of the lock signal and the reference frequency of the lock field is calculated, and the error value is used for controlling the output voltage of a DAC (digital-to-analog converter) in the Z0 current output module and the output voltage V of the DACiDriving the V/I converter to output current I, current I and DAC voltage value ViProportional relation;
the current I output by the Z0 current output module is output to the shimming coils, and the solenoid coils in the shimming coils generate magnetic fields with the same magnitude and the opposite direction to the magnetic field offset, so that the correction of the magnetic field offset is realized.
Furthermore, the FPGA controller controls the switch I to cut off the output signal into a pulse signal with a specified width, so that nuclear magnetic resonance signals of locked atomic nuclei in a certain spectrum width range are excited.
Furthermore, the FPGA controller controls the switch I and the switch II to work alternately according to the time requirement of the field locking pulse sequence.
Furthermore, the FPGA controller monitors the drift of the magnetic field in real time through a lock error signal and calculates the feedback output current I to realize the real-time correction of the drift of the magnetic field.
Compared with the prior art, the invention has the beneficial effects that:
the digitized broadband field locking system and the working method can realize nuclear magnetic resonance signal excitation and lock signal receiving of any atomic nucleus in the frequency range of 10 MHz-1.5 GHz, the Z0 current output module supports Z0 reference current and lock error feedback direct output, supports full digital field locking, and has the advantages of simple structure, convenience in control and strong adaptability to various magnetic field change rates.
Drawings
Fig. 1 is a block diagram of an internal structure of a digital broadband lock field system according to an embodiment of the present invention;
fig. 2 is a block diagram of an external structure of a digital broadband lock field system according to an embodiment of the present invention.
In the figure:
1. an FPGA controller; 2. a dual-channel DDS; 3. a low-pass filter I; 4. a mixer I; 5. selecting one more switch I; 6. a low-pass filter array I; 7. selecting one more switch II; 8. a variable attenuator I; 9. an amplifier I; 10. a switch I; 11. a phase-locked loop; 12. a low-pass filter IV; 13. an amplifier III; 14. a power divider; 15. an analog-to-digital converter; 16. a low-pass filter II; 17. a mixer II; 18. a variable amplifier; 19. a low-pass filter III; 20. a mixer III; 21. an amplifier II; 22. a variable attenuator II; 23. selecting one more switch III; 24. a filter array II; 25. selecting one more switch IV; 26. a switch II; 27. a digital-to-analog converter; 28. a V/I converter.
Detailed Description
The following examples are presented to illustrate certain embodiments of the invention in particular and should not be construed as limiting the scope of the invention. The present disclosure may be modified from materials, methods, and reaction conditions at the same time, and all such modifications are intended to be within the spirit and scope of the present invention.
1-2, the digital broadband field locking system comprises an FPGA controller 1, wherein the FPGA controller 1 is connected with control software 29 through a communication interface, the FPGA controller 1 is further connected with a lock transmitting channel 30, a lock receiving channel 31 and a Z0 current output module 32 respectively, the lock transmitting channel 30 and the lock receiving channel 31 are connected with a lock preamplifier 33, the lock preamplifier 33 is connected with a probe 34, and the Z0 current output module 32 is connected with a shim coil 35;
the lock transmitting channel 30 comprises a double-channel DDS2, a low-pass filter I3, a frequency mixer I4, a frequency selectable filter I, a transmitting signal power adjusting module and a switch I10 which are sequentially connected, and the frequency mixer I4 is also connected with a local oscillation channel; the frequency selectable filter I comprises a one-out-of-multiple switch I5, a low-pass filter array I6 and a one-out-of-multiple switch II 7 which are sequentially connected, the FPGA controller 1 can control the one-out-of-multiple switch I5 and the one-out-of-multiple switch II 7 according to the output frequency range, and a certain low-pass filter is selected in the low-pass filter array I6 to suppress harmonic waves generated by the mixer I4 and generate a pure-spectrum transmitting signal; the transmitting signal power adjusting module comprises a variable attenuator I8 and an amplifier I9, and the power of a transmitting signal is adjusted in a large range under the control of the FPGA controller 1; the switch I10 cuts the output signal into a pulse signal with a specified width under the control of the FPGA controller 1, and realizes the excitation of the nuclear magnetic resonance signal of the lock field atomic nucleus within a certain spectrum width range.
The lock receiving channel comprises a switch II 26, a frequency selectable filter II, a variable attenuator II 22, an amplifier II 21, a mixer III 20, a low-pass filter III 19, a variable amplifier 18, a mixer II 17, a low-pass filter II 16 and an analog-to-digital converter 15 which are sequentially connected, the mixer III 20 is connected with a local oscillation channel, the mixer II 17 is further connected with a dual-channel DDS2, the frequency selectable filter II comprises a multiple-selection switch IV 25, a filter array II 24 and a multiple-selection switch III 23 which are sequentially connected, the FPGA controller 1 controls the multiple-selection switch III 23 and the multiple-selection switch IV 25 according to the quality of an external signal, and a proper filter is selected from the filter array II 24 to suppress an out-of-band signal of a received signal; the variable attenuator II 22, the amplifier II 21 and the variable amplifier 18 form a receiving channel power adjusting module;
the Z0 current output module comprises a digital-to-analog converter 27 and a V/I converter 28 which are connected in sequence.
In this embodiment, the local oscillation channel includes a phase-locked loop 11, a low-pass filter iv 12, an amplifier iii 13, and a power divider 14, which are connected in sequence.
In this embodiment, the mixers i 4 and iii 20 are both connected to the power divider 14.
A working method of a digital broadband lock field system specifically comprises the following steps:
step S1: starting the lock field system of any one of claims 1 to 3, inputting working parameters to the broadband lock field system through a user operation interface: z0 reference value, lock field reference frequency f0Receiving gain and transmitting power (the receiving gain is immediately executed by the variable attenuator II 22 and the variable amplifier 18 of the FPGA controller 1 which are sent into the receiving path to adjust the gain of the receiving signal, and the transmitting power is immediately executed by the variable attenuator I8 of the FPGA controller 1 which is sent into the transmitting path to adjust the power of the transmitting signal);
step S2: the FPGA controller 1 controls the first channel output frequency of the dual-channel DDS2 to be fIF0Transmit intermediate frequency signals, fIF0The frequency of the output of the signal and local oscillator channel is fLO1The local oscillator signal is mixed by a mixer I4, and then the local oscillator signal passes through a frequency selectable filter I, a transmitting signal power adjusting module and a switch I10 to output a pulse signal f with specified frequency and widthTX，fTXThe frequency of (d) is: f. ofTX＝fLO1-fIF0 fIF0The frequency range of (A) is controlled to be between 10MHz and 100MHz, fTXThe frequency of (3) is adjusted within the range of 0-2 GHz; due to different magnetic field strength B0The value of the gyromagnetic ratio constant gamma is different from that of different lock field atomic nuclei, so that f needs to be adjustedTXTo obtain a nuclear magnetic resonance signal of the particular field-locked nuclei. By selecting the appropriate fLO1Frequency, and adjust fIF0Frequency value of fTXThe frequency of the device can be adjusted within the range of 0-2 GHz to excite the atomic nucleus used for the lock field within the range;
step S3: emitted fTXThe signal excites nuclear magnetic resonance signals of the lock field atomic nucleus within a certain spectrum width range, at the moment, the FPGA controller 1 controls the switch II 26 to receive the signal f according to a certain time lengthRXAccess lock receiving channel, fRXThe frequency is: f. ofRX＝fB0+ Δ f, the switch ii 26 and the switch i 10 of the transmission channel are alternatively operated by the FPGA controller 1 according to the time requirement of the lock field pulse sequence to form a pulse sequence cycle of waiting-transmission-reception; f. ofRXThe signal is inverted into a receiving intermediate frequency signal f by a mixer III 20IF1，fIF1The frequency is: f. ofIF1＝fLO1-fRX，fIF1The signal is passed through low pass filter III 19 to remove harmonics in the mixed output signal, and then through mixer II 17 to remove fIF1The signal is converted into a received intermediate frequency signal fIF，fIF＝fLO0-fIF1，fIFThe signal is sent to the FPGA controller 1 through a low-pass filter II 16 and an analog-to-digital converter 15; wherein: f. ofB0Is the current magnetic field strength B0Corresponding resonance frequency, fB0＝γB0(ii) a Δ f is the chemical shift of the lock field nuclei; f. ofLO0Is the second channel output frequency of the two channel DDS 2; f. ofIF1The frequency range of (A) is 10 MHz-100 MHz; f. ofIFIs set to be less than 10MHz to reduce the cost of the analog-to-digital converter 15, the low-pass filter ii 16 eliminates the mixed harmonic;
step S4: after the FPGA controller 1 obtains the lock signal, the error between the frequency of the lock signal and the reference frequency of the lock field is calculated, and the error value is used for controlling the output voltage of the DAC27 and the output voltage V of the DAC27 in the Z0 current output module 32iDriving the V/I converter 28 to output a current I, a current I and a DAC voltage value ViProportional relation;
the current I output by the Z0 current output module 32 is output to the shim coils 35, and the solenoid coils in the shim coils 35 generate magnetic fields with the same magnitude and opposite direction to the magnetic field offset, thereby realizing the correction of the magnetic field drift.
In this embodiment, the FPGA controller 1 controls the switch i 10 to cut off the output signal into a pulse signal with a specified width, so as to excite the nuclear magnetic resonance signal of the locked nucleus within a certain spectrum width range.
In the embodiment, the FPGA controller 1 controls the switch i 10 and the switch ii 26 to work alternately according to the time requirement of the lock field pulse sequence.
In this embodiment, the FPGA controller 1 monitors the drift of the magnetic field in real time through the lock error signal, and calculates the feedback output current I to realize the real-time correction of the drift of the magnetic field.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (6)
1. A working method of a digital broadband field locking system comprises an FPGA controller (1), wherein the FPGA controller (1) is connected with control software (29) through a communication interface, the FPGA controller (1) is further respectively connected with a lock transmitting channel (30), a lock receiving channel (31) and a Z0 current output module (32), the lock transmitting channel (30) and the lock receiving channel (31) are connected with a lock preamplifier (33), the lock preamplifier (33) is connected with a probe (34), and the Z0 current output module (32) is connected with a shimming coil (35); the lock transmitting channel (30) comprises a double-channel DDS (2), a low-pass filter I (3), a frequency mixer I (4), a frequency selectable filter I, a transmitting signal power adjusting module and a switch I (10) which are sequentially connected, the frequency selectable filter I comprises a multiple-selection switch I (5), a low-pass filter array I (6) and a multiple-selection switch II (7) which are sequentially connected, the transmitting signal power adjusting module comprises a variable attenuator I (8) and an amplifier I (9), the frequency mixer I (4) is further connected with a local oscillator channel, the lock receiving channel (31) comprises a switch II (26), a frequency selectable filter II, a variable attenuator II (22), an amplifier II (21), a frequency mixer III (20), a low-pass filter III (19), a variable amplifier (18), a frequency mixer II (17), a low-pass filter II (16) and an analog-to-digital converter (15) which are sequentially connected, the frequency mixer III (20) is connected with a local oscillation channel, the frequency mixer II (17) is further connected with a dual-channel DDS (2), the frequency selectable filter II comprises a one-out-of-multiple switch IV (25), a filter array II (24) and a one-out-of-multiple switch III (23) which are sequentially connected, and the variable attenuator II (22), the amplifier II (21) and the variable amplifier (18) form a receiving channel power adjusting module; the Z0 current output module (32) comprises a digital-to-analog converter (27) and a V/I converter (28) which are connected in sequence, and is characterized in that the working method specifically comprises the following steps:
step S1: starting the digital broadband lock field system, and inputting working parameters to the broadband lock field system through a user operation interface: z0 reference value, lock field reference frequency f0Receive gain and transmit power;
step S2: the FPGA controller (1) controls the first channel output frequency of the dual-channel DDS (2) to be fIF0Transmit intermediate frequency signals, fIF0The frequency of the output of the signal and local oscillator channel is fLO1The local oscillator signal is mixed by a mixer I (4), and then passes through a frequency selectable filter I, a transmitting signal power adjusting module and a switch I (10) to output a pulse signal fTX，fTXThe frequency of (d) is: f. ofTX＝fLO1-fIF0， fIF0The frequency range of (A) is controlled to be between 10MHz and 100MHz, fTXThe frequency of (3) is adjusted within the range of 0-2 GHz;
step S3: emitted fTXThe signal excites nuclear magnetic resonance signals of the lock field atomic nucleus within a certain spectrum width range, at the moment, the FPGA controller (1) controls a switch II (26) to receive a signal f according to a certain time lengthRXAccess lock receiving channel, fRXThe frequency is: f. ofRX＝fB0+Δf，fRXThe signal is inverted into a received intermediate frequency signal f by a mixer III (20)IF1，fIF1The frequency is: f. ofIF1＝fLO1-fRX，fIF1The signal is passed through a low pass filter III (19) to remove harmonics in the mixed output signal, and then through a mixer II (17) to remove fIF1The signal is converted into a received intermediate frequency signal fIF，fIF＝fLO0-fIF1，fIFThe signal is sent to the FPGA controller (1) through a low-pass filter II (16) and an analog-to-digital converter (15); wherein: f. ofB0Is the current magnetic field strength B0Corresponding resonance frequency, fB0＝γB0Δ f is the chemical shift of the lock field nucleus, fLO0Is the second channel output frequency, f, of the two-channel DDS (2)IF1The frequency range of (A) is 10 MHz-100 MHz;
step S4: after the FPGA controller (1) obtains the lock signal, the error between the frequency of the lock signal and the reference frequency of the lock field is calculated, and the error value is used for controlling the output voltage of a DAC (27) in a Z0 current output module (32), and the output voltage V of the DAC (27)iDriving a V/I converter (28) to output a current I, a current I and a DAC voltage value ViProportional relation;
the current I output by the Z0 current output module (32) is output to the shimming coils (35), and the solenoid coils in the shimming coils (35) generate magnetic fields with the same magnitude and the opposite direction of the magnetic field deviation, so that the correction of the magnetic field deviation is realized.
2. The working method of the digital broadband lock field system according to claim 1, wherein the FPGA controller (1) controls the switch i (10) to cut off the output signal into a pulse signal with a specified width, so as to excite the nuclear magnetic resonance signal of the locked nuclear within a certain spectrum width range.
3. The operating method of the digital broadband lock field system according to claim 2, wherein the FPGA controller (1) controls the switch I (10) and the switch II (26) to operate alternatively according to the time requirement of the lock field pulse sequence.
4. The operating method of a digital broadband lock field system according to claim 2, wherein the FPGA controller (1) monitors the drift of the magnetic field in real time through the lock error signal, and calculates the feedback output current I to realize the real-time correction of the drift of the magnetic field.
5. The operating method of a digitized wideband lock field system according to claim 4, wherein the local oscillation channel comprises a phase-locked loop (11), a low-pass filter IV (12), an amplifier III (13) and a power divider (14) connected in sequence.
6. The operating method of a digital broadband lock field system according to claim 5, wherein the mixer I (4) and the mixer III (20) are both connected to the power divider (14).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910560993.0A CN110161441B (en) | 2019-06-26 | 2019-06-26 | Digital broadband lock field system and working method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910560993.0A CN110161441B (en) | 2019-06-26 | 2019-06-26 | Digital broadband lock field system and working method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110161441A CN110161441A (en) | 2019-08-23 |
| CN110161441B true CN110161441B (en) | 2021-08-17 |
Family
ID=67626993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910560993.0A Active CN110161441B (en) | 2019-06-26 | 2019-06-26 | Digital broadband lock field system and working method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110161441B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3839543B1 (en) * | 2019-12-20 | 2022-03-02 | Bruker France S.A.S. | Method for measuring nmr-data of a target sample in an nmr spectrometer and nmr spectrometer |
| CN112379317B (en) * | 2020-06-15 | 2021-05-18 | 武汉中科牛津波谱技术有限公司 | Nuclear magnetic resonance pulse sequence controller |
| CN112213672B (en) * | 2020-09-27 | 2022-03-22 | 武汉中科牛津波谱技术有限公司 | Nuclear magnetic resonance automatic field locking method and system based on exponential fitting |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1394549A (en) * | 2001-07-04 | 2003-02-05 | Ge医疗系统环球技术有限公司 | Radio-frequency transmitting circuit, complex digital synthesizer and magnetic resonance imaging equipment |
| JP2007101350A (en) * | 2005-10-04 | 2007-04-19 | Hitachi Ltd | Nmr magnetic field stabilizer |
| CN101413994A (en) * | 2008-11-28 | 2009-04-22 | 中国科学院武汉物理与数学研究所 | Signal receiving and transmitting device of digital magnetic nuclear resonance lock |
| CN205377852U (en) * | 2015-12-30 | 2016-07-06 | 南京誉葆科技有限公司 | Frequently, subassembly is combined and received |
| CN105806868A (en) * | 2014-12-29 | 2016-07-27 | 丹东东方测控技术股份有限公司 | Digital nuclear magnetic resonance console device |
| CN104267360B (en) * | 2014-09-03 | 2017-04-05 | 东北大学 | A kind of radiofrequency signal method for generation of miniature nuclear magnetic resonance, NMR |
| CN108761364A (en) * | 2018-05-21 | 2018-11-06 | 上海健康医学院 | A kind of high-performance NMR relaxation analyzer lock field system and its application |
| CN109450479A (en) * | 2018-12-08 | 2019-03-08 | 武汉中科牛津波谱技术有限公司 | A kind of signal modulation module and method |
-
2019
- 2019-06-26 CN CN201910560993.0A patent/CN110161441B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1394549A (en) * | 2001-07-04 | 2003-02-05 | Ge医疗系统环球技术有限公司 | Radio-frequency transmitting circuit, complex digital synthesizer and magnetic resonance imaging equipment |
| JP2007101350A (en) * | 2005-10-04 | 2007-04-19 | Hitachi Ltd | Nmr magnetic field stabilizer |
| CN101413994A (en) * | 2008-11-28 | 2009-04-22 | 中国科学院武汉物理与数学研究所 | Signal receiving and transmitting device of digital magnetic nuclear resonance lock |
| CN104267360B (en) * | 2014-09-03 | 2017-04-05 | 东北大学 | A kind of radiofrequency signal method for generation of miniature nuclear magnetic resonance, NMR |
| CN105806868A (en) * | 2014-12-29 | 2016-07-27 | 丹东东方测控技术股份有限公司 | Digital nuclear magnetic resonance console device |
| CN205377852U (en) * | 2015-12-30 | 2016-07-06 | 南京誉葆科技有限公司 | Frequently, subassembly is combined and received |
| CN108761364A (en) * | 2018-05-21 | 2018-11-06 | 上海健康医学院 | A kind of high-performance NMR relaxation analyzer lock field system and its application |
| CN109450479A (en) * | 2018-12-08 | 2019-03-08 | 武汉中科牛津波谱技术有限公司 | A kind of signal modulation module and method |
Non-Patent Citations (2)
| Title |
|---|
| 核磁共振波谱仪锁场数字接收机的设计与实现;黄臻 等;《仪表技术与传感器》;20090915(第09期);第28-30页 * |
| 核磁共振系统的数字化研究;刘颖;《中国博士学位论文全文数据库 基础科学辑》;20081115(第11期);第A005-35页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110161441A (en) | 2019-08-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110161441B (en) | Digital broadband lock field system and working method | |
| CN101413994B (en) | Signal receiving and transmitting device of digital magnetic nuclear resonance lock | |
| US20080027666A1 (en) | Device and method for compensation of magnetic field disruptions in highly homogeneous magnetic fields | |
| CN110720183B (en) | Optical frequency comb locking system, method for locking an optical frequency comb, and at least one machine readable medium | |
| JP2504666B2 (en) | Method and apparatus for compensating for magnetic field disturbance in a magnetic field | |
| CN110531291B (en) | Topological structure of high-intensity magnetic field condensed nuclear magnetic resonance spectrometer system | |
| Ihara et al. | Nuclear magnetic resonance measurements in dynamically controlled field pulse | |
| CN109450479B (en) | Signal modulation module and method | |
| Vogel | High gain proportional rf control stability at TESLA cavities | |
| McPeak et al. | An x-band continuous wave saturation recovery electron paramagnetic resonance spectrometer based on an arbitrary waveform generator | |
| CN110830060B (en) | Radio frequency signal generating device and method | |
| Ben-Zvi et al. | The control and electronics of a superconducting booster module | |
| Shane et al. | A versatile pulsed X-band ENDOR spectrometer | |
| US5546001A (en) | Switching signal generator and magnetic resonance imaging system using the same | |
| CN110554331A (en) | emission phase calibration system and method of nuclear magnetic resonance instrument | |
| He et al. | A peripheral component interconnect express-based scalable and highly integrated pulsed spectrometer for solution state dynamic nuclear polarization | |
| JP5890129B2 (en) | Pulse ESR device | |
| Rutkowski et al. | MTCA. 4-based digital LLRF control system for CW SRF linacs | |
| JP4811995B2 (en) | NMR magnetic field stabilizer | |
| US7167002B2 (en) | Stabilizer for stabilizing NMR magnetic field and method of the same | |
| Jiang et al. | The digital field-frequency lock system of high-resolution nmr spectrometer | |
| CN110824888B (en) | Signal acquisition method and device applied to atomic fountain clock | |
| JP2010025896A (en) | Nuclear magnetic resonance apparatus | |
| CN109782204B (en) | Multi-core magnetic resonance radio frequency channel device for polarization transfer enhancement technology | |
| Owen | Prevention of Dual-Mode Excitation in 9-Cell Cavities for LCLSII-HE |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |