CN110149489A - The method of sampling, device and computer storage medium and imaging sensor - Google Patents
The method of sampling, device and computer storage medium and imaging sensor Download PDFInfo
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- CN110149489A CN110149489A CN201910435920.9A CN201910435920A CN110149489A CN 110149489 A CN110149489 A CN 110149489A CN 201910435920 A CN201910435920 A CN 201910435920A CN 110149489 A CN110149489 A CN 110149489A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/616—Noise processing, e.g. detecting, correcting, reducing or removing noise involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
Abstract
The embodiment of the present application discloses a kind of method of sampling, device and computer storage medium and imaging sensor, this method comprises: obtaining signal to be processed；According to the default sampling number of the signal to be processed, corresponding first parameter of first slope voltage signal is determined；Wherein, the first slope voltage signal is to be obtained according to first parameter by first slope generator, and the first slope voltage signal includes at least one acclivity and/or at least one decline slop；The sampling processing of default sampling number, output digit signals are carried out to the signal to be processed based on the first slope voltage signal.
Description
Technical field
This application involves image sensor technologies field more particularly to a kind of method of samplings, device and computer storage
Medium and imaging sensor.
Background technique
Imaging sensor is a kind of equipment that optical imagery is converted into electronic signal.Imaging sensor is broadly divided into charge
Coupling element (Charge Coupled Device, CCD) imaging sensor and metal-oxide semiconductor (MOS) (Complementary
Metal-Oxide Semiconductor, CMOS) imaging sensor.With the continuous promotion of CMOS technology and technology, CMOS figure
As sensor is increasingly being applied in various consumer electronics products, such as digital camera, mobile phone and video monitoring system
System etc..
The shortcomings that cmos image sensor also has itself, such as noise are larger.Although current cmos image sensor can be with
Noise is reduced by multi-sampling techniques, but traditional multi-sampling techniques need additional increase hardware circuit can be real
Existing multiple sampling, is limited by space under the small size of pixel unit and is difficult to realize.
Summary of the invention
The main purpose of the application is to propose a kind of method of sampling, device and computer storage medium and image sensing
Device realizes the multiple sampling of different numbers by changing the way of output of ramp voltage, to drop without increasing hardware circuit
The low signal noise of cmos image sensor.
In order to achieve the above objectives, the technical solution of the application is achieved in that
In a first aspect, the embodiment of the present application provides a kind of method of sampling, which comprises
Obtain signal to be processed；
According to the default sampling number of the signal to be processed, corresponding first parameter of first slope voltage signal is determined；
Wherein, the first slope voltage signal is to be obtained according to first parameter by first slope generator, and described first tiltedly
Slope voltage signal includes at least one acclivity and/or at least one decline slop；
The sampling processing of default sampling number is carried out to the signal to be processed based on the first slope voltage signal, it is defeated
Digital signal out.
Second aspect, the embodiment of the present application provide a kind of sampling apparatus, and the sampling apparatus includes acquiring unit, determination
Unit and the first sampling unit, wherein
The acquiring unit is configured to obtain signal to be processed；
The determination unit is configured to determine first slope voltage according to the default sampling number of the signal to be processed
Corresponding first parameter of signal；Wherein, the first slope voltage signal is to be occurred according to first parameter by first slope
What device obtained, the first slope voltage signal includes at least one acclivity and/or at least one decline slop；
First sampling unit is configured to the first slope voltage signal and carries out in advance to the signal to be processed
If the sampling processing of sampling number, output digit signals.
The third aspect, the embodiment of the present application provide a kind of sampling apparatus, and the sampling apparatus includes: memory and processing
Device；Wherein,
The memory, for storing the computer program that can be run on the processor；
The processor, for the step of when running the computer program, executing method as described in relation to the first aspect.
Fourth aspect, the embodiment of the present application provide a kind of computer storage medium, the computer storage medium storage
The step of having sampling routine, method as described in relation to the first aspect is realized when the sampling routine is executed by least one processor.
5th aspect, the embodiment of the present application provide a kind of imaging sensor, and described image sensor includes at least such as the
Sampling apparatus described in two aspects or the third aspect.
A kind of method of sampling, device provided by the embodiment of the present application and computer storage medium and imaging sensor,
This method is applied to sampling apparatus, and the sampling apparatus can be located in cmos image sensor.Signal to be processed is obtained first；
Then according to the default sampling number of the signal to be processed, corresponding first parameter of first slope voltage signal is determined；Wherein,
The first slope voltage signal is to be obtained according to first parameter by first slope generator, the first slope voltage
Signal includes at least one acclivity and/or at least one decline slop；Again based on the first slope voltage signal to institute
State the sampling processing that signal to be processed carries out default sampling number, last output digit signals；In this way, by changing ramp voltage
The way of output obtain first slope voltage signal, and the multiple of different numbers may be implemented according to the first slope voltage signal
Sampling, to reduce the signal noise of cmos image sensor, but also without increasing additional hardware circuit.
Detailed description of the invention
Fig. 1 is a kind of flow diagram of the method for sampling provided by the embodiments of the present application；
Fig. 2 is a kind of electrical block diagram of analog-digital converter provided by the embodiments of the present application；
Fig. 3 is a kind of signal waveform schematic diagram of analog-digital conversion process provided by the embodiments of the present application；
Fig. 4 is the signal waveform schematic diagram under a kind of different sampling numbers provided by the embodiments of the present application；
Fig. 5 is a kind of electrical block diagram of cmos image sensor provided by the embodiments of the present application；
Fig. 6 is a kind of waveform diagram of first slope voltage signal provided by the embodiments of the present application；
Fig. 7 is a kind of composed structure schematic diagram of sampling apparatus provided by the embodiments of the present application；
Fig. 8 is the composed structure schematic diagram of another sampling apparatus provided by the embodiments of the present application；
Fig. 9 is a kind of specific hardware structure schematic diagram of sampling apparatus provided by the embodiments of the present application；
Figure 10 is a kind of composed structure schematic diagram of imaging sensor provided by the embodiments of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description.
Referring to Fig. 1, it illustrates a kind of flow diagrams of the method for sampling provided by the embodiments of the present application.As shown in Figure 1,
This method may include:
S101: signal to be processed is obtained；
It should be noted that signal to be processed can be through photodiode (Photo Diode, PD) received incidence
The electric signal that optical signal exports after by photoelectric conversion is also possible to carry out what relevant treatment obtained later to the electric signal
Preprocessed signal.In addition, signal to be processed is analog signal, signal to be processed in this way is subsequently through analog-digital converter
When (Analog-to-Digital Converter, ADC) carries out analog-to-digital conversion, in order to reduce the noise of signal, need to wait for this
It handles signal and carries out multiple sampling processing, so as to achieve the purpose that reduce signal noise.
S102: according to the default sampling number of the signal to be processed, first slope voltage signal corresponding first is determined
Parameter；Wherein, the first slope voltage signal is to be obtained according to first parameter by first slope generator, described
One ramp voltage signal includes at least one acclivity and/or at least one decline slop；
It should be noted that default sampling number indicates the pre-set sampling for carrying out sampling processing to signal to be processed
Number.It is inferior that default sampling number can be 1 time, 2 times, 3 times or 4, in practical applications, presets sampling number according to practical feelings
Condition is set, and the embodiment of the present application is not especially limited.In addition, to can be first slope voltage signal corresponding for the first parameter
Slope is also possible to the corresponding quantization step of first slope voltage signal, can also be the corresponding electricity of first slope voltage signal
Pressure value, or even can also be between the initial value of at least one acclivity and the minimum of at least one decline slop and exist in advance
If difference；In practical applications, the embodiment of the present application is also not especially limited.It, can be in this way, after determining the first parameter
Obtain include at least one slope first slope voltage signal.
It should also be noted that, slope quantity included in first slope voltage signal is related with default sampling number.
It include a slope in first slope voltage signal, which can be acclivity when default sampling number is 1 time
Or decline slop；It include 2 slopes in first slope voltage signal when default sampling number is 2 times, which can be with
For an acclivity and a decline slop；It include 4 in first slope voltage signal when default sampling number is 4 times
Slope, 4 slopes can be 2 acclivities and 2 decline slops；When default sampling number is 2N times, first slope
It include 2N slope in voltage signal, which can be N number of acclivity and N number of decline slop；When default sampling time
Include 2N-1 slope in first slope voltage signal when number is 2N-1 time, the 2N-1 slope can be N number of acclivity with
N-1 decline slop；Here the value of N is the positive integer more than or equal to 1.
S103: at the sampling for carrying out default sampling number to the signal to be processed based on the first slope voltage signal
Reason, output digit signals.
It should be noted that include at least one slope in first slope voltage signal, and slope quantity and default
Sampling number is related；That is, include default sampling number slope in first slope voltage signal, thus according to this
The sampling processing that default sampling number is carried out to signal to be processed may be implemented in one ramp voltage signal, reaches reduction signal noise
Purpose.
In the embodiment of the present application, this method is applied to sampling apparatus, and the sampling apparatus can be located at cmos image and pass
In sensor.By obtaining signal to be processed；According to the default sampling number of the signal to be processed, determine that first slope voltage is believed
Number corresponding first parameter；Wherein, the first slope voltage signal is according to first parameter by first slope generator
It obtains, the first slope voltage signal includes at least one acclivity and/or at least one decline slop；Based on described
First slope voltage signal carries out the sampling processing of default sampling number, output digit signals to the signal to be processed；In this way,
For the application without increasing hardware circuit, the way of output by changing ramp voltage obtains first slope voltage signal, and according to
The multiple sampling of different numbers may be implemented in the first slope voltage signal, so that the signal for reducing cmos image sensor is made an uproar
Sound.
Referring to fig. 2, it illustrates a kind of electrical block diagrams of analog-digital converter provided by the embodiments of the present application.Such as figure
Shown in 2, analog-digital converter 20 may include first comparator U1, first slope generator U2 and counter U3；Wherein, to be processed
Signal (being indicated with Input signal) can be connected to the non-inverting input terminal (+) of first comparator U1, and first slope generator U2 is used for
It generates first slope voltage signal (being indicated with Ramp signal), which can be connected to first comparator U1
Inverting input terminal (-), the output end of first comparator U1 can export comparison signal (being indicated with COMP_OUT signal), this compares letter
It number is connected to one end of counter U3, (Digital can be used finally by the other end of counter U3 with output digit signals
Output signal indicates)；To which the analog signal (signal i.e. to be processed) of input is converted to digital signal, realizes modulus and turn
The process changed.
Specifically, referring to Fig. 3, it illustrates a kind of signal waveforms of analog-digital conversion process provided by the embodiments of the present application to show
It is intended to.As shown in figure 3, trunnion axis (x-axis) direction indicates the size that counter U3 is counted, can be indicated with [Time]；Vertical axis
(y-axis) direction indicates the size of voltage, can be indicated with [V]；It is assumed that default sampling number is 1 time, then first slope voltage
Signal (Ramp signal) only one slope, the slope is acclivity in Fig. 3, is indicated with overstriking solid black lines；It is to be processed
Signal (Input signal) indicates that comparison signal (COMP_OUT signal) uses solid black lines in Fig. 3 in Fig. 3 with dash-dotted gray line
It indicates.According to Fig. 3 as can be seen that when Ramp signal is less than Input signal, first comparator U1 is exported at this time COMP_
OUT signal is positive value, and counter U3 can be counted always, and obtained count value is output data.
Further, since first slope voltage signal is to be obtained according to the first parameter by first slope generator U2
's；Wherein, the first parameter can refer to the corresponding rate of rise of acclivity and/or the corresponding descending slope of decline slop.Cause
This, in the embodiment of the application, for S102, the default sampling number according to the signal to be processed, really
Determine corresponding first parameter of first slope voltage signal, may include:
S102a: according to default sampling number, the corresponding slope of first slope voltage signal is determined；
S102b: using determining slope as first parameter；Wherein, the slope includes the rate of rise and/or decline
Slope.
It should be noted that including acclivity and/or decline slop in first slope voltage signal, thus determine
Slope in include the corresponding rate of rise of acclivity and/or the corresponding descending slope of decline slop.On it should be noted that
Rising slope is positive value, and descending slope is negative value.
It should also be noted that, determine the corresponding rate of rise of first slope voltage signal and/or descending slope it
Afterwards, first slope voltage signal can be generated by first slope generator U2.Therefore, in some embodiments, S102b it
Afterwards, this method can also include:
S102c: being based on the rate of rise and/or the descending slope, obtains described the by first slope generator
One ramp voltage signal；Wherein, in the first slope voltage signal, at least one described acclivity is according on described
Rise what slope obtained, at least one described decline slop is obtained according to the descending slope.
It should be noted that include at least one slope in first slope voltage signal, and slope quantity and default
Sampling number is related.It for acclivity is changed according to the rate of rise at least one slope, for decline
Slope is changed according to descending slope.
It should also be noted that, default sampling number is more, the rate of rise is bigger, and descending slope is smaller；Default sampling time
Number is fewer, and the rate of rise is smaller, and descending slope is bigger.That is, by changing the corresponding slope of first slope voltage signal,
The sampling processing to signal difference number to be processed may be implemented.In addition, by changing the corresponding electricity of first slope voltage signal
Pressure value can also be realized and change first slope voltage signal for cyclical signal.
Referring to fig. 4, it illustrates the signal waveform schematic diagrames under a kind of different sampling numbers provided by the embodiments of the present application.
As shown in figure 4, signal (Input signal, use to be processed under Bu Tong default sampling number is set forth with (d) in (a), (b), (c)
Dash-dotted gray line indicates), first slope voltage signal (Ramp signal is indicated with overstriking solid black lines) and comparison signal (COMP_
OUT signal is indicated with solid black lines) between variation relation.Specifically, for first slope voltage signal, when default
When sampling number is 1 time, in (a), first slope voltage signal includes 1 slope, which risen tiltedly according to first
1 acclivity that rate obtains；When default sampling number is 2 times, in (b), first slope voltage signal includes 2 oblique
Slope, 2 slopes include 1 acclivity obtained according to second rate of rise and 1 obtained according to the first descending slope
Decline slop；When default sampling number is 3 times, in (c), first slope voltage signal includes 3 slopes, 3 slopes
Including 2 acclivities obtained according to the third rate of rise and 1 decline slop obtained according to the second descending slope；When pre-
If sampling number is 4 times, in (d), first slope voltage signal includes 4 slopes, which includes according on the 4th
Rise 2 obtained acclivities of slope and 2 decline slops obtained according to third descending slope.
Figure 4, it is seen that due to having adjusted the corresponding voltage value of first slope voltage signal, first slope voltage letter
It number can be periodically variable signal；And included slope quantity and default sampling number in first slope voltage signal
It is related；With the increase of slope quantity, default sampling number is consequently increased.In addition, the 4th rate of rise rises greater than third
Slope, the third rate of rise are greater than second rate of rise, and second rate of rise is greater than first rate of rise, that is to say, that with
The increase of default sampling number, the angle between acclivity and trunnion axis positive direction is gradually increased, so that the rate of rise
It is gradually increased；Third descending slope less than the second descending slope, the second descending slope less than the first descending slope, that is,
It says, with the increase of default sampling number, the angle between decline slop and trunnion axis positive direction is gradually reduced, so that under
Drop angle rate is gradually reduced；To realize the multiple sampling processing to signal to be processed, reduction signal noise can achieve
Purpose.
It is described to be based on the first slope voltage signal to institute for S103 in another embodiment of the application
The sampling processing that signal to be processed carries out default sampling number is stated, output digit signals may include:
S103a: it is based on the first slope voltage signal, the signal to be processed is preset by first comparator
The sampling processing of sampling number obtains the output data of default sampling number；
S103b: carrying out mean value calculation to the output data of the default sampling number, using obtained average data as
The digital signal；
S103c: the digital signal is exported.
It should be noted that multiple sampling processing be by carrying out multiple signal sampling to signal after, to multiple
Sampled data carry out average value processing, thus achieve the purpose that reduce signal noise.In this way, it is assumed that default sampling number is M
Secondary, M is the positive integer more than or equal to 1；In the embodiment of the present application, an original ADC is divided into multiple low resolution
ADC, and the corresponding quantization step of the ADC of each low resolution is M times of the corresponding quantization step of original ADC, so that often
The signal noise of the ADC output of a low resolution is reduced to 1/M times of the signal noise of former ADC output, to reduce final
The signal noise of output.
Further, in some embodiments, described to be based on the first slope voltage signal, pass through first comparator pair
The signal to be processed carries out the sampling processing of default sampling number, obtains the output data of default sampling number, may include:
For default sampling number slope included by the first slope voltage signal, by first comparator to every
One slope and the signal to be processed are compared processing；
According to the result of the comparison, the corresponding output data in each slope is obtained by counter；
Based on default sampling number slope, the output data of the default sampling number is obtained.
It should be noted that since first slope voltage signal includes M harmonic wave (M is default sampling number), in this way
Processing can be compared to each slope in M slope and signal to be processed by first comparator U1, according to what is compared
As a result, the corresponding output data in each slope is obtained by counter U3, to obtain M output data；It is defeated to this M again
Data carry out average value processing, the digital signal of available final output out.
Further, in some embodiments, it is described according to the result of the comparison, each slope pair is obtained by counter
The output data answered may include:
For each slope, when the corresponding signal value in the slope is less than the corresponding signal value of the signal to be processed
When, control counter carries out counting processing；
When the corresponding signal value in slope signal value corresponding not less than the signal to be processed, control counter stops
Only counting is handled；
According to counting as a result, obtaining the corresponding output data in each slope.
It should be noted that by the way that the corresponding signal value in slope and the corresponding signal value of signal to be processed to be compared,
Only when the corresponding signal value in slope signal value corresponding less than signal to be processed, counter U3 can just be executed at counting always
Reason；And when the corresponding signal value in slope signal value corresponding more than or equal to signal to be processed, counter U3 can then stop counting
Number processing；To according to counter, the corresponding output data in available each slope.
Illustratively, by taking analog-digital converter 20 shown in Fig. 2 as an example, it is assumed that default sampling number is M times, passes through the first ratio
M sampling processing is carried out to signal to be processed (Input signal) and first slope voltage signal (Ramp signal) compared with device U1, it can be with
Obtain the output data of M sampling；Wherein, for sampling each time, the comparison signal exported according to first comparator U1
(COMP_OUT signal) can be sampled corresponding output data by counter U3 each time；For counter U3, only
Have when the corresponding signal value of Ramp signal signal value corresponding less than Input signal, counter U3 can just execute counting processing；
The output data finally sampled to this M times carries out mean value calculation, to obtain average data, and using the average data as number
Word signal (Digital Output signal) is exported；It, can be with since the digital signal is obtained by mean value calculation
Achieve the purpose that reduce signal noise.
For signal to be processed, signal to be processed can be to be passed through by the received incident optical signal of photodiode
The electric signal exported after photoelectric conversion is crossed, is also possible to carry out the electric signal in the pretreatment obtained after relevant treatment letter
Number.Therefore, described to obtain signal to be processed for S101 in the another embodiment of the application, may include:
S101a: incident optical signal is received；
S101b: photoelectric conversion is carried out to the incident optical signal, obtains electric signal；
S101c: using the electric signal as the signal to be processed.
It should be noted that signal to be processed, which can be, passes through the received incident optical signal of photodiode by pixel unit
The electric signal exported after by photoelectric conversion, at this time can be using electric signal as signal to be processed.
Referring to Fig. 5, a kind of electrical block diagram of cmos image sensor provided by the embodiments of the present application is shown.Such as
Shown in Fig. 5, cmos image sensor 50 may include pixel unit 510；Wherein, pixel unit 510 may include two pole of photoelectricity
Pipe D1, transfering transistor M1, reset transistor M2, source level amplifier M3 and gating transistor M4.Wherein, photodiode D1
Cathode is connect with the source electrode of transfering transistor M1, for the photoelectron from photodiode D1 to be transferred to floating diffusion
(Floating Diffusion, FD) node；The grid of transfering transistor M1 and the signal wire for providing transfer control signal TG connect
It connects, the grid of reset transistor M2 is connect with the signal wire for providing reseting controling signal RG, the drain electrode of reset transistor M2, source level
The drain electrode of amplifier M3 is connect with supply voltage Vpix, the drain electrode of the source electrode, transfering transistor M1 of reset transistor M2 and source
The grid of pole amplifier M3 is connect with FD node, and the source electrode of source level amplifier M3 is connected with the drain electrode of gating transistor M4, choosing
The grid of logical transistor M4 is connect with the signal wire for providing gate control signal SEL, and the source electrode of gating transistor M4 is for exporting
Electric signal.
In pixel unit 510 shown in Fig. 5, photodiode D1 can from outside receive optical signal, and be based on or
Optical charge is generated in response to the received optical signal of institute.Transfering transistor M1 can save the received Photocharge transfer of institute to FD
Then point controls the transfer operation of transfering transistor M1, when transfer controls signal TG and controlling signal TG in response to transfer
When for transfering transistor M1 to be connected, transfering transistor M1 can carry out Photocharge transfer at this time；When transfer control signal TG is used
When disconnecting transfering transistor M1, transfering transistor M1 can terminate Photocharge transfer at this time.Reset transistor M2 passes through response
The optical charge being stored in FD node is resetted in reseting controling signal RG.From the angle of reset transistor M2, supply voltage
Vpix may be used as resetting voltage；When reseting controling signal RG is for when disconnecting reset transistor M2, the signal at FD node to be anti-
The optical charge that FD node is received and stored on from D1 is reflected；When reseting controling signal RG is used for turns on reset transistor M2, electricity
Source voltage Vpix is applied to FD node via reset transistor, removes the optical charge received at FD node from D1 at this time.
The grid of source level amplifier M3 is connect with FD node, and electric signal corresponding with optical charge can be generated, be mainly used for signal and put
Big effect；Wherein, source amplifier M3 can also be known as source follower or buffer amplifier.Gating transistor M4 passes through response
The gating operation of gating transistor M4 is controlled in gate control signal SEL, when gate control signal SEL is brilliant for gating to be connected
When body pipe M4, the electric signal at source level amplifier M3 will be exported by gating transistor M4 at this time, to obtain electric signal.
After obtaining electric signal, on the one hand on the other hand can may be used also directly using the electric signal as signal to be processed
After carrying out relevant treatment (such as correlated-double-sampling processing) to the electric signal, using obtained preprocessed signal as to be processed
Signal.Therefore, in the another embodiment of the application, after S101b, this method can also include:
S101d: carrying out correlated-double-sampling processing to the electric signal by the second comparator and the second ramp voltage signal,
Obtain preprocessed signal；Wherein, second ramp voltage signal is obtained by the second ramp generator, second slope
Voltage signal is different from the first slope voltage signal；
S101e: using the preprocessed signal as the signal to be processed.
It should be noted that the second ramp generator can generate the second ramp voltage signal according to the second parameter；Wherein,
Second parameter can be pre-set parameter, it can be used to obtain to be needed second by the second ramp generator oblique
Slope voltage signal, and slope quantity to be needed included in the second ramp voltage signal can be 1, or it is more
A, the embodiment of the present application is not especially limited.
It is also to be noted that first slope voltage signal and the second ramp generator caused by first slope generator
Generated second ramp voltage signal is different.Here, first slope voltage signal is for converting analog signals into
Multiple sampling processing in digital signal, the mainly signal noise in elimination analog-to-digital conversion；And the second ramp voltage signal is
Electric signal for being exported to pixel unit 510 carries out correlated-double-sampling processing, the mainly reset in elimination photoelectric conversion
Noise.
Further, correlated-double-sampling (Correlated Double Sampling, CDS) is for eliminating reset noise
Interference, it is inhibited to low-frequency noise.Wherein, it is enabled and reseting controling signal RG in gate control signal SEL
During being enabled, FD node can be resetted；That is, when gate control signal SEL is that high level is brilliant for gating to be connected
When body pipe M4, reseting controling signal RG is also high level at this time, then can be with turns on reset transistor M2, then according to CDS's
Predetermined period resets the optical charge being stored in FD node.It is gating due to there is a period of time during the reset,
At this time by the time interval of control double sampling, to realize correlated-double-sampling processing, and to this sampling twice
As a result subtracted each other, just essentially eliminate the interference of reset noise.
As shown in figure 5, the cmos image sensor 50 can also include correlated-double-sampling other than pixel unit 510
Unit 520；Wherein, correlated-double-sampling unit 520 may include first capacitor C1, the second comparator U4, the second ramp generator
U5 and first switch S1.
Specifically, for correlated-double-sampling unit 520, the source electrode of gating transistor M4 and one end of first capacitor C1
Connection, and the other end of first capacitor C1 is connected to the inverting input terminal (-) of the second comparator U4, the second ramp generator U5 is used
In generating the second ramp voltage signal, generated second ramp voltage signal can be connected to the homophase input of the second comparator U4
It holds (+), first switch S1 is connected to the inverting input terminal (-) of the second comparator U4 and the output end of the second comparator U4.
In this way, reset transistor M2 can be made to be connected when reseting controling signal RG is high level；During reset, when gating is controlled
When signal SEL processed is high level, gating transistor M4 can be made to be connected, so that pixel unit 510 passes through gating transistor M4
The electric signal exported can be stored in first capacitor C1；In the correlated-double-sampling unit 520, pass through first switch S1 and
Correlated-double-sampling may be implemented in two comparator U4, and the double sampling noise of the correlated-double-sampling is not much different, by this
Double sampling noise is subtracted each other, it will be able to the interference of reset noise is substantially eliminated, to obtain preprocessed signal, i.e. and telecommunications
Number actually active amplitude, subsequent multiple sampling processing can be carried out using the preprocessed signal as signal to be processed at this time.
As shown in figure 5, the cmos image sensor 50 is also other than pixel unit 510 and correlated-double-sampling unit 520
It may include analog-digital converter 20；Wherein, which may include first comparator U1, first slope generator U2
With counter U3.
In this way, cmos image sensor 50 shown in fig. 5 is based on, after obtaining preprocessed signal, although pretreatment letter
The interference of reset noise number is eliminated, it is also possible to pass through analog-digital converter using the preprocessed signal as signal to be processed
20 pairs its carry out multiple sampling processing, while being converted into digital signal, finally read the digital signal；Due to this first tiltedly
The multiple sampling of different numbers may be implemented in slope voltage signal, in this way during reading the digital signal, also just reduces
The reading noise of cmos image sensor；It is electric also without additional hardware is increased and compared with traditional multi-sampling techniques
Road.
Further, in order to enable the eradicating efficacy of signal noise is more preferable, for first slope voltage signal, may be used also
It is staggered preset quantity quantization step with controlling starting voltage value and the minimum voltage value of decline slop of acclivity.Therefore,
In some embodiments, this method can also include:
In the first slope voltage signal, initial value and at least one decline slop of at least one acclivity
Difference between minimum is equal to preset quantity quantization step.
It should be noted that the value of preset quantity can be 1, it is also possible to 2, can also be 3, or even can also be it
He is worth；In practical applications, it is set according to the actual situation, the embodiment of the present application is not especially limited.For example it is assumed that quantization
Step-length is 1, preset quantity 2, then the starting voltage value of at least one acclivity and at least one decline slop is minimum
Difference between voltage value is equal to 2.
Referring to Fig. 6, it illustrates a kind of waveform diagrams of first slope voltage signal provided by the embodiments of the present application.Such as
Shown in Fig. 6, which includes 4 slopes, i.e., default sampling number is 4 times, and the starting of acclivity
Difference between voltage value and the minimum voltage value of decline slop is not equal to 0；That is, the starting voltage of 2 acclivities
There are preset difference value (such as preset quantity quantization steps) between value and the minimum voltage value of 2 decline slops.In Fig. 6,
It is assumed that a quantization step is indicated with L, and the decline slop of the starting voltage value of the acclivity of first time and first time are most
There are the difference of 1 quantization step, the starting voltage value of secondary acclivity and secondary declines between low voltage value
There are the differences of 2 quantization steps between the minimum voltage value on slope；Pass through first slope voltage signal pair shown in fig. 6 in this way
Signal to be processed carries out multiple sampling processing, and the eradicating efficacy of signal noise can be made more preferable.
A kind of method of sampling is present embodiments provided, this method is applied to sampling apparatus, and sampling apparatus can be located at
In cmos image sensor；Signal to be processed is obtained first；Then it according to the default sampling number of the signal to be processed, determines
Corresponding first parameter of first slope voltage signal；Wherein, the first slope voltage signal be according to first parameter by
First slope generator obtains, the first slope voltage signal include at least one acclivity and/or at least one under
Drop angle slope；It is based on the first slope voltage signal again, the sampling processing of default sampling number is carried out to the signal to be processed,
Last output digit signals；In this way, first slope voltage signal is obtained by the way of output for changing ramp voltage, and according to this
The multiple sampling of different numbers may be implemented in first slope voltage signal, so that the signal for reducing cmos image sensor is made an uproar
Sound, but also without increasing additional hardware circuit.
Based on the identical inventive concept of previous embodiment, referring to Fig. 7, it illustrates one kind provided by the embodiments of the present application to adopt
The composition of sampling device 70, the sampling apparatus 70 may include: acquiring unit 701, determination unit 702 and the first sampling unit
703；Wherein,
The acquiring unit 701 is configured to obtain signal to be processed；
The determination unit 702 is configured to the default sampling number according to the signal to be processed, determines first slope electricity
Press corresponding first parameter of signal；Wherein, the first slope voltage signal is to be sent out according to first parameter by first slope
What raw device obtained, the first slope voltage signal includes at least one acclivity and/or at least one decline slop；
First sampling unit 703, be configured to the first slope voltage signal to the signal to be processed into
The sampling processing of the default sampling number of row, output digit signals.
In the above scheme, the determination unit 702, concrete configuration are to determine first slope according to sampling number is preset
The corresponding slope of voltage signal；And using determining slope as first parameter；Wherein, the slope includes the rate of rise
And/or descending slope.
In the above scheme, referring to Fig. 8, first sampling unit 703 may include first slope generator 7031, match
It is set to based on the rate of rise and/or the descending slope, obtains the first slope voltage signal；Wherein, described
In one ramp voltage signal, at least one described acclivity is obtained according to the rate of rise, described under at least one
Drop angle slope is obtained according to the descending slope.
In the above scheme, referring to Fig. 8, first sampling unit 703 can also include first comparator 7032 and read
Take unit 7033, wherein
The first comparator 7032 is configured to the first slope voltage signal, to the signal to be processed into
The sampling processing of the default sampling number of row, obtains the output data of default sampling number；
The reading unit 7033 is configured to carry out mean value calculation to the output data of the default sampling number, will
Obtained average data is as the digital signal；And the output digital signal.
In the above scheme, referring to Fig. 8, first sampling unit 703 can also include counter 7034, wherein
The first comparator 7032 is configured to for default sampling number included by the first slope voltage signal
A slope is compared processing to each slope and the signal to be processed；
The counter 7034 is configured to according to the result of the comparison, obtain the corresponding output data in each slope；
The reading unit 7033 is configured to default sampling number slope, obtains the default sampling number
Output data.
In the above scheme, the counter 7034, concrete configuration are for each slope, when the slope is corresponding
When signal value is less than the signal to be processed corresponding signal value, counting processing is carried out；And work as the corresponding signal in the slope
When corresponding not less than the signal to be processed signal value of value, stop counting processing；And according to counting as a result, obtaining each
The corresponding output data in a slope.
In the above scheme, referring to Fig. 7, the sampling apparatus 70 can also include pixel unit 704, be configured to receive into
Penetrate optical signal；And photoelectric conversion is carried out to the incident optical signal, obtain electric signal；
The acquiring unit 701, concrete configuration are using the electric signal as the signal to be processed.
In the above scheme, referring to Fig. 7, the sampling apparatus 70 can also include the second sampling unit 705, be configured to lead to
It crosses second comparator and the second ramp voltage signal and correlated-double-sampling processing is carried out to the electric signal, obtain pretreatment letter
Number；Wherein, second ramp voltage signal is obtained by second ramp generator, second ramp voltage signal
It is different from the first slope voltage signal；
The acquiring unit 701, concrete configuration are using the preprocessed signal as the signal to be processed.
In the above scheme, referring to Fig. 8, second sampling unit 705 may include 7051 He of the second ramp generator
Second comparator 7052；Wherein,
Second ramp generator 7051 is configured to obtain the second ramp voltage signal；Wherein, the second slope electricity
Press signal different from the first slope voltage signal；
Second comparator 7052 is configured to second ramp voltage signal and carries out correlation to the electric signal
Double sampled processing, obtains preprocessed signal.
It is to be appreciated that in the present embodiment, " unit " can be partial circuit, segment processor, subprogram or soft
Part etc., naturally it is also possible to be module, can also be non-modularization.And each component part in the present embodiment can collect
It is physically existed alone at each unit in one processing unit, is also possible to, it can also be integrated with two or more units
In a unit.Above-mentioned integrated unit both can take the form of hardware realization, can also be using software function module
Form is realized.
If the integrated unit realizes that being not intended as independent product is sold in the form of software function module
Or in use, can store in a computer readable storage medium, based on this understanding, the technical side of the present embodiment
Substantially all or part of the part that contributes to existing technology or the technical solution can be produced case in other words with software
The form of product embodies, which is stored in a storage medium, including some instructions are used so that one
Platform computer equipment (can be personal computer, server or the network equipment etc.) or processor (processor) execute sheet
The all or part of the steps of embodiment the method.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory
(Read Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic or disk
Etc. the various media that can store program code.
Therefore, a kind of computer storage medium is present embodiments provided, which is stored with sampling routine,
The step of any one of previous embodiment the method is realized when the sampling routine is executed by least one processor.
Based on the composition and computer storage medium of above-mentioned sampling apparatus 70, referring to Fig. 9, it illustrates the application implementations
The specific hardware structure for the sampling apparatus 70 that example provides, may include: network interface 901, memory 902 and processor 903；Respectively
A component is coupled by bus system 904.It is understood that bus system 904 is for realizing the connection between these components
Communication.Bus system 904 further includes power bus, control bus and status signal bus in addition in addition to including data/address bus.But
For the sake of clear explanation, various buses are all designated as bus system 904 in Fig. 9.Wherein, network interface 901, for
During being received and sent messages between other ext nal network elements, signal is sended and received；
Memory 902, for storing the computer program that can be run on processor 903；
Processor 903, for executing when running the computer program:
Obtain signal to be processed；
According to the default sampling number of the signal to be processed, corresponding first parameter of first slope voltage signal is determined；
Wherein, the first slope voltage signal is to be obtained according to first parameter by first slope generator, and described first tiltedly
Slope voltage signal includes at least one acclivity and/or at least one decline slop；
The sampling processing of default sampling number is carried out to the signal to be processed based on the first slope voltage signal, it is defeated
Digital signal out.
It is appreciated that the memory 902 in the embodiment of the present application can be volatile memory or nonvolatile memory,
It or may include both volatile and non-volatile memories.Wherein, nonvolatile memory can be read-only memory (Read-
Only Memory, ROM), programmable read only memory (Programmable ROM, PROM), the read-only storage of erasable programmable
Device (Erasable PROM, EPROM), electrically erasable programmable read-only memory (Electrically EPROM, EEPROM) or
Flash memory.Volatile memory can be random access memory (Random Access Memory, RAM), be used as external high
Speed caching.By exemplary but be not restricted explanation, the RAM of many forms is available, such as static random access memory
(Static RAM, SRAM), dynamic random access memory (Dynamic RAM, DRAM), Synchronous Dynamic Random Access Memory
(Synchronous DRAM, SDRAM), double data speed synchronous dynamic RAM (Double Data Rate
SDRAM, DDRSDRAM), enhanced Synchronous Dynamic Random Access Memory (Enhanced SDRAM, ESDRAM), synchronized links
Dynamic random access memory (Synchlink DRAM, SLDRAM) and direct rambus random access memory (Direct
Rambus RAM, DRRAM).The memory 902 of system and method described herein is intended to include but is not limited to these and arbitrarily its
It is suitble to the memory of type.
And processor 903 may be a kind of IC chip, the processing capacity with signal.During realization, on
Each step for stating method can be completed by the integrated logic circuit of the hardware in processor 903 or the instruction of software form.
Above-mentioned processor 903 can be general processor, digital signal processor (Digital Signal Processor, DSP),
Specific integrated circuit (Application Specific Integrated Circuit, ASIC), ready-made programmable gate array
(Field Programmable Gate Array, FPGA) either other programmable logic device, discrete gate or transistor are patrolled
Collect device, discrete hardware components.It may be implemented or execute disclosed each method, step and the logical box in the embodiment of the present application
Figure.General processor can be microprocessor or the processor is also possible to any conventional processor etc..In conjunction with the application
The step of method disclosed in embodiment, can be embodied directly in hardware decoding processor and execute completion, or use decoding processor
In hardware and software module combination execute completion.Software module can be located at random access memory, and flash memory, read-only memory can
In the storage medium of this fields such as program read-only memory or electrically erasable programmable memory, register maturation.The storage
Medium is located at memory 902, and processor 903 reads the information in memory 902, and the step of the above method is completed in conjunction with its hardware
Suddenly.
It is understood that embodiments described herein can with hardware, software, firmware, middleware, microcode or its
Combination is to realize.For hardware realization, processing unit be may be implemented in one or more specific integrated circuit (Application
Specific Integrated Circuits, ASIC), digital signal processor (Digital Signal Processing,
DSP), digital signal processing appts (DSP Device, DSPD), programmable logic device (Programmable Logic
Device, PLD), field programmable gate array (Field-Programmable Gate Array, FPGA), general processor,
In controller, microcontroller, microprocessor, other electronic units for executing herein described function or combinations thereof.
For software implementations, it can be realized herein by executing the module (such as process, function etc.) of function described herein
The technology.Software code is storable in memory and is executed by processor.Memory can in the processor or
It is realized outside processor.
Optionally, as another embodiment, processor 903 is additionally configured to when running the computer program, is executed
The step of any one of previous embodiment the method.
Referring to Figure 10, it illustrates a kind of composed structure schematic diagrames of imaging sensor provided by the embodiments of the present application.Such as
Shown in Figure 10, which is included at least just like any one sampling apparatus 70 involved in previous embodiment.
It should be noted that in this application, the terms "include", "comprise" or its any other variant are intended to non-
It is exclusive to include, so that the process, method, article or the device that include a series of elements not only include those elements,
It but also including other elements that are not explicitly listed, or further include solid by this process, method, article or device
Some elements.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including
There is also other identical elements in the process, method of the element, article or device.
Above-mentioned the embodiment of the present application serial number is for illustration only, does not represent the advantages or disadvantages of the embodiments.
Disclosed method in several embodiments of the method provided herein, in the absence of conflict can be any group
It closes, obtains new embodiment of the method.
Disclosed feature in several product embodiments provided herein, in the absence of conflict can be any group
It closes, obtains new product embodiments.
Disclosed feature in several methods provided herein or apparatus embodiments, in the absence of conflict can be with
Any combination obtains new embodiment of the method or apparatus embodiments.
The above, the only specific embodiment of the application, but the protection scope of the application is not limited thereto, it is any
Those familiar with the art within the technical scope of the present application, can easily think of the change or the replacement, and should all contain
Lid is within the scope of protection of this application.Therefore, the protection scope of the application should be based on the protection scope of the described claims.
Claims (19)
1. a kind of method of sampling, which is characterized in that the described method includes:
Obtain signal to be processed；
According to the default sampling number of the signal to be processed, corresponding first parameter of first slope voltage signal is determined；Wherein,
The first slope voltage signal is to be obtained according to first parameter by first slope generator, the first slope voltage
Signal includes at least one acclivity and/or at least one decline slop；
The sampling processing for carrying out default sampling number to the signal to be processed based on the first slope voltage signal, exports number
Word signal.
2. the method according to claim 1, wherein the default sampling according to the signal to be processed time
Number, determines corresponding first parameter of first slope voltage signal, comprising:
According to default sampling number, the corresponding slope of first slope voltage signal is determined；
Using determining slope as first parameter；Wherein, the slope includes the rate of rise and/or descending slope.
3. according to the method described in claim 2, it is characterized in that, it is described using determining slope as first parameter it
Afterwards, the method also includes:
Based on the rate of rise and/or the descending slope, the first slope voltage is obtained by first slope generator
Signal；Wherein, in the first slope voltage signal, at least one described acclivity is obtained according to the rate of rise
, at least one described decline slop is obtained according to the descending slope.
4. the method according to claim 1, wherein it is described based on the first slope voltage signal to it is described to
Processing signal carries out the sampling processing of default sampling number, output digit signals, comprising:
Based on the first slope voltage signal, default sampling number is carried out to the signal to be processed by first comparator
Sampling processing obtains the output data of default sampling number；
Mean value calculation is carried out to the output data of the default sampling number, is believed obtained average data as the number
Number；
Export the digital signal.
5. according to the method described in claim 4, it is characterized in that, described be based on the first slope voltage signal, by the
One comparator carries out the sampling processing of default sampling number to the signal to be processed, obtains the output number of default sampling number
According to, comprising:
For default sampling number slope included by the first slope voltage signal, by first comparator to each
Slope and the signal to be processed are compared processing；
According to the result of the comparison, the corresponding output data in each slope is obtained by counter；
Based on default sampling number slope, the output data of the default sampling number is obtained.
6. according to the method described in claim 5, it is characterized in that, it is described according to the result of the comparison, obtained often by counter
The corresponding output data in one slope, comprising:
For each slope, when the corresponding signal value in the slope is less than the corresponding signal value of the signal to be processed, control
Counter processed carries out counting processing；
When the corresponding signal value in slope signal value corresponding not less than the signal to be processed, control counter stops meter
Number processing；
According to counting as a result, obtaining the corresponding output data in each slope.
7. method according to any one of claims 1 to 6, which is characterized in that described to obtain signal to be processed, comprising:
Receive incident optical signal；
Photoelectric conversion is carried out to the incident optical signal, electric signal is obtained, using the electric signal as the signal to be processed.
8. the method according to the description of claim 7 is characterized in that it is described obtain electric signal after, the method also includes:
Correlated-double-sampling processing is carried out to the electric signal by the second comparator and the second ramp voltage signal, is pre-processed
Signal, using the preprocessed signal as the signal to be processed；Wherein, second ramp voltage signal is by the second slope
What generator obtained, second ramp voltage signal is different from the first slope voltage signal.
9. a kind of sampling apparatus, which is characterized in that the sampling apparatus includes that acquiring unit, determination unit and the first sampling are single
Member, wherein
The acquiring unit is configured to obtain signal to be processed；
The determination unit is configured to determine first slope voltage signal according to the default sampling number of the signal to be processed
Corresponding first parameter；Wherein, the first slope voltage signal is to be obtained according to first parameter by first slope generator
It arrives, the first slope voltage signal includes at least one acclivity and/or at least one decline slop；
First sampling unit is configured to the first slope voltage signal and carries out default adopt to the signal to be processed
The sampling processing of sample number, output digit signals.
10. sampling apparatus according to claim 9, which is characterized in that the determination unit, concrete configuration are according to default
Sampling number determines the corresponding slope of first slope voltage signal；And using determining slope as first parameter；Its
In, the slope includes the rate of rise and/or descending slope.
11. sampling apparatus according to claim 10, which is characterized in that first sampling unit includes first slope hair
Raw device, is configured to the rate of rise and/or the descending slope, obtains the first slope voltage signal；Wherein, exist
In the first slope voltage signal, at least one described acclivity is obtained according to the rate of rise, it is described at least
One decline slop is obtained according to the descending slope.
12. sampling apparatus according to claim 9, which is characterized in that first sampling unit further includes first comparing
Device and reading unit, wherein
The first comparator is configured to the first slope voltage signal, carries out default adopt to the signal to be processed
The sampling processing of sample number obtains the output data of default sampling number；
The reading unit is configured to carry out mean value calculation to the output data of the default sampling number, flat by what is obtained
Equal data are as the digital signal；And the output digital signal.
13. sampling apparatus according to claim 12, which is characterized in that first sampling unit further includes counter,
Wherein,
The first comparator is configured to for default sampling number slope included by the first slope voltage signal,
Processing is compared to each slope and the signal to be processed；
The counter is configured to according to the result of the comparison, obtain the corresponding output data in each slope；
The reading unit is configured to default sampling number slope, obtains the output data of the default sampling number.
14. sampling apparatus according to claim 13, which is characterized in that the counter, concrete configuration are for each
A slope carries out counting processing when the corresponding signal value in the slope is less than the corresponding signal value of the signal to be processed；With
And when the corresponding signal value in slope signal value corresponding not less than the signal to be processed, stop counting processing；And
According to counting as a result, obtaining the corresponding output data in each slope.
15. according to the described in any item sampling apparatuses of claim 9 to 14, which is characterized in that the sampling apparatus further includes picture
Plain unit is configured to receive incident optical signal；And photoelectric conversion is carried out to the incident optical signal, obtain electric signal；
The acquiring unit, concrete configuration are using the electric signal as the signal to be processed.
16. sampling apparatus according to claim 15, which is characterized in that the sampling apparatus further includes the second sampling list
Member, second sampling unit include the second ramp generator and the second comparator；Wherein,
Second ramp generator is configured to obtain the second ramp voltage signal；Wherein, second ramp voltage signal with
The first slope voltage signal is different；
Second comparator is configured to second ramp voltage signal and carries out at correlated-double-sampling to the electric signal
Reason, obtains preprocessed signal；
The acquiring unit, concrete configuration are using the preprocessed signal as the signal to be processed.
17. a kind of sampling apparatus, which is characterized in that the sampling apparatus includes: memory and processor；Wherein,
The memory, for storing the computer program that can be run on the processor；
The processor, for executing such as any one of claim 1 to 8 the method when running the computer program
Step.
18. a kind of computer storage medium, which is characterized in that the computer storage medium is stored with sampling routine, described to adopt
It is realized when sample program is executed by least one processor such as the step of any one of claim 1 to 8 the method.
19. a kind of imaging sensor, which is characterized in that described image sensor is included at least such as any one of claim 9 to 17
The sampling apparatus.
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| PCT/CN2020/091092 WO2020233574A1 (en) | 2019-05-23 | 2020-05-19 | Sampling method and apparatus, and computer storage medium and image sensor |
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Application publication date: 20190820 |