CN110137219B

CN110137219B - Light emitting diode display

Info

Publication number: CN110137219B
Application number: CN201910107320.XA
Authority: CN
Inventors: 朴贵铉; 朴喆远; 全保建; 洪泌荀
Original assignee: Samsung Display Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2018-02-02
Filing date: 2019-02-02
Publication date: 2024-02-06
Anticipated expiration: 2039-02-02
Also published as: US10868093B2; US20190245014A1; CN110137219A; KR20190094265A; KR102500676B1; EP3522230A1; EP3522230B1

Abstract

A light emitting diode display comprising: a first electrode; a second electrode overlapping the first electrode; a light emitting layer between the first electrode and the second electrode; a pixel defining layer overlapping a portion of the first electrode, the pixel defining layer and the light emitting layer being spaced apart from each other in a top view; and an inorganic layer between the first electrode and the light emitting layer, an edge of the inorganic layer overlapping the light emitting layer and the pixel defining layer.

Description

Light emitting diode display

Cross Reference to Related Applications

Korean patent application No. 10-2018-0013569, entitled "light emitting diode display", filed on the korean intellectual property office at 2/2018, is incorporated herein by reference in its entirety.

Technical Field

The present disclosure relates to a light emitting diode display.

Background

The light emitting diode display includes two electrodes and a light emitting layer therebetween. Electrons injected from the cathode as one of the two electrodes and holes injected from the anode as the other of the two electrodes are coupled to each other in the light emitting layer to form excitons. The exciton emits light upon emission of energy.

The light emitting diode display includes a plurality of pixels having light emitting diodes including a cathode, an anode, and a light emitting layer. Each pixel includes a transistor and a capacitor for driving the light emitting diode.

Disclosure of Invention

Exemplary embodiments provide a light emitting diode display including a first electrode, a second electrode overlapping the first electrode, a light emitting layer between the first electrode and the second electrode, a pixel defining layer overlapping a portion of the first electrode, and an inorganic layer between the first electrode and the light emitting layer, wherein the light emitting layer and the pixel defining layer are spaced apart from each other in a plane, and an edge of the inorganic layer overlaps the light emitting layer and the pixel defining layer.

The light emitting layer may be surrounded by the first electrode, the inorganic layer, and the second electrode.

The edge of the light emitting layer and the edge of the pixel defining layer may be located on one surface of the inorganic layer.

The second electrode may be in contact with the inorganic layer in a region of the space between the pixel defining layer and the light emitting layer.

The inorganic layer may overlap the first electrode.

The light emitting diode display may further include a thin film transistor connected to the first electrode; and a planarization layer on the thin film transistor, wherein a portion of the inorganic layer may be located between the pixel defining layer and the planarization layer.

Another exemplary embodiment also provides a light emitting diode display including a first electrode connected to a thin film transistor, a second electrode overlapping the first electrode, a light emitting layer between the first electrode and the second electrode, a pixel defining layer overlapping the thin film transistor, and an inorganic layer between the first electrode and the light emitting layer, wherein the light emitting layer and the pixel defining layer may be spaced apart from each other in a plane, and the inorganic layer and the pixel defining layer may be spaced apart from each other in the plane.

The inorganic layer may overlap with an edge of the light emitting layer and an edge of the first electrode.

The inorganic layer may cover an edge of the first electrode.

The light emitting diode display may further include a planarization layer on the thin film transistor, wherein the second electrode may be in contact with the planarization layer.

Still another exemplary embodiment provides a light emitting diode display including a first electrode, a second electrode overlapping the first electrode, a light emitting layer between the first electrode and the second electrode, an auxiliary layer between the first electrode and the second electrode and spaced apart from the light emitting layer, an inorganic layer between the light emitting layer and the first electrode, and a pixel defining layer between the first electrode and the auxiliary layer, wherein the inorganic layer may overlap an edge of the light emitting layer and an edge of the auxiliary layer.

The light emitting layer may include at least one of a hole transport region and a hole injection region, a light emitting region, and at least one of an electron transport region and an electron injection region.

The first electrode may be an anode, and the auxiliary layer may include at least one of a hole transport region and a hole injection region.

The first electrode may be a cathode, and the auxiliary layer may include at least one of an electron transport region and an electron injection region.

The auxiliary layer may be located on a side surface of the pixel defining layer.

The light emitting layer and the pixel defining layer may be spaced apart from each other in a plane.

The second electrode may be in contact with the inorganic layer in a region spaced between the auxiliary layer and the light emitting layer.

The pixel defining layer and the inorganic layer may be spaced apart from each other in a plane.

The first electrode may be in contact with the auxiliary layer in a region of the space between the pixel defining layer and the inorganic layer.

One pixel may include at least two auxiliary layers spaced apart from each other.

The inorganic layer may further include a protrusion between two auxiliary layers spaced apart from each other.

The inorganic layer may include at least two protrusions.

The protrusion may overlap the pixel defining layer.

The light emitting layer may further include a hole injection region and an electron injection region, and the auxiliary layer may include one to four regions selected from a hole transport region, a hole injection region, an electron injection region, and an electron transport region.

Drawings

Features will become apparent to those skilled in the art from the detailed description of an exemplary embodiment with reference to the accompanying drawings, in which:

fig. 1 illustrates a cross-sectional view of a light emitting diode display according to an exemplary embodiment.

Fig. 2 illustrates a schematic partial plan view of some of the components of fig. 1.

Fig. 3 and 4 illustrate cross-sectional views of a light emitting diode display according to a modified example of fig. 1, respectively.

Fig. 5 illustrates a cross-sectional view of a light emitting diode display according to an exemplary embodiment.

Fig. 6 illustrates a partial plan view of some of the components of fig. 5.

Fig. 7 and 8 illustrate cross-sectional views at various stages in a method of manufacturing the light emitting diode display in fig. 5.

Fig. 9 illustrates a plan view of a modified example according to fig. 6.

Fig. 10 and 11 illustrate masks used in the process of manufacturing the light emitting diode display of fig. 9.

Fig. 12, 13 and 14 illustrate plan views according to modified examples of fig. 9.

Fig. 15 illustrates an equivalent circuit diagram of one pixel of a light emitting diode display according to an exemplary embodiment.

Fig. 16 illustrates a layout of transistors and capacitors of a light emitting diode display according to an exemplary embodiment.

Fig. 17 illustrates a cross-sectional view along line XVII-XVII of fig. 16.

Fig. 18 illustrates a cross-sectional view along lines XVIII-XVIII and XVIII '-XVIII' of fig. 16.

Detailed Description

Hereinafter, exemplary embodiments will now be described more fully with reference to the accompanying drawings; they may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the exemplary embodiments to those skilled in the art.

In the drawings, the size of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. In addition, it will be further understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present. Like numbers refer to like elements throughout.

Hereinafter, a light emitting diode display according to an exemplary embodiment will be described with reference to fig. 1 and 2. Fig. 1 is a cross-sectional view of a light emitting diode display according to an exemplary embodiment, and fig. 2 is a schematic plan view of some components of fig. 1. Note that some elements have been removed from fig. 2 to better illustrate the relative structure of elements 350, 360, and 370.

Referring to fig. 1 and 2, a light emitting diode display according to an exemplary embodiment may include a buffer layer 111 on a substrate 110. The buffer layer 111 may overlap the entire surface of the substrate 110. The buffer layer 111 may include an inorganic material, such as silicon oxide (SiO _x ) And silicon nitride (SiN) _x ). The buffer layer 111 may be a single layer or multiple layers. The buffer layer 111 may planarize one surface of the substrate 110 or prevent diffusion of impurities that degrade characteristics of the semiconductor layer 151 to be described below and prevent penetration of moisture or the like. According to an exemplary embodiment, the buffer layer 111 may be omitted.

The semiconductor layer 151 of the thin film transistor may be located on the buffer layer 111. The semiconductor layer 151 includes a channel region 154, and source and drain regions 153 and 155 located at both sides of the channel region 154 and doped. The semiconductor layer 151 may include, for example, polysilicon, amorphous silicon, or an oxide semiconductor.

The gate insulating layer 140 is located on the semiconductor layer 151. The gate insulating layer 140 may overlap the entire surface of the substrate 110. The gate insulating layer 140 may include an inorganic insulating material, such as silicon oxide (SiO _x ) And silicon nitride (SiN) _x )。

A gate conductor including the gate electrode 124 of the thin film transistor is located on the gate insulating layer 140. The gate electrode 124 may overlap the channel region 154 of the semiconductor layer 151. An interlayer insulating layer 160 including an inorganic insulating material or an organic insulating material is positioned on the gate electrode 124.

A data conductor including a source electrode 173 and a drain electrode 175 of the thin film transistor, a data line 171, a driving voltage line, and the like is disposed on the interlayer insulating layer 160. The source electrode 173 and the drain electrode 175 may be connected to the source region 153 and the drain region 155 of the semiconductor layer 151 through the contact holes 163 and 165 of the interlayer insulating layer 160 and the gate insulating layer 140, respectively.

The gate electrode 124, the source electrode 173, and the drain electrode 175 form a thin film transistor together with the semiconductor layer 151. The illustrated thin film transistor may be a driving transistor included in one pixel of the light emitting diode display. The illustrated thin film transistor may be referred to as a top gate transistor because the gate electrode 124 is located over the semiconductor layer 151. However, the structure of the transistor is not limited thereto, and various modifications may be made, for example, the transistor may be a bottom gate transistor in which a gate electrode is located under a semiconductor layer.

The planarization layer 180 may be located on the interlayer insulating layer 160 and the data conductor. The planarization layer 180 may be used to eliminate and planarize steps in order to improve the light emitting efficiency of the light emitting element to be formed thereon. The planarization layer 180 may overlap the thin film transistor and cover the thin film transistor.

The planarization layer 180 may include, for example, an organic insulating material. The organic insulating material may include, for example, polyimide, polyamide, polyacrylate, polyphenylene oxide, polyphenylene sulfide, unsaturated polyester, epoxy, phenolic resin, etc., but is not limited thereto.

The pixel electrode 191 may be located on the planarization layer 180. The pixel electrode 191 may be connected to the drain electrode 175 of the thin film transistor through the contact hole 185 of the planarization layer 180.

The pixel electrode 191 may include an inorganic material, for example, a reflective conductive material, a semi-transmissive conductive material, or a transparent conductive material. For example, the pixel electrode 191 may include a transparent conductive material such as Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO), and at least one of metals such as lithium (Li), calcium (Ca), aluminum (Al), silver (Ag), magnesium (Mg), and gold (Au).

The pixel defining layer 360 may be located on the planarization layer 180 and the pixel electrode 191. The pixel defining layer 360 may overlap a portion of the pixel electrode 191, for example, in the X and Z directions.

The pixel defining layer 360 has an opening 361 overlapping a portion of the pixel electrode 191. The opening 361 of the pixel defining layer 360 may define an area corresponding to a pixel. The pixel defining layer 360 may include an organic insulating material such as polyimide, polyacrylate, and polyamide, but is not limited thereto.

The inorganic layer 350 is located between the pixel defining layer 360 and the pixel electrode 191. As shown in fig. 1, the inorganic layer 350 may be placed to overlap with an edge of a light emitting layer 370, which will be described below, and overlap with an edge of the pixel defining layer 360. For example, as shown in fig. 2, the first edge 350a of the inorganic layer 350 may overlap the pixel defining layer 360, and the second edge 350b may overlap the light emitting layer 370, e.g., the first edge 350a may be an outer edge completely surrounding the second edge 350 b.

As shown in fig. 1, an edge of the pixel defining layer 360 and an edge of the light emitting layer 370 may be located on a first surface (e.g., an upper surface) of the inorganic layer 350. A second surface of the inorganic layer 350 (e.g., a lower surface of the inorganic layer 350 opposite to the first surface) may face the pixel electrode 191. For example, as shown in fig. 1, an edge of the pixel defining layer 360 may continuously cover a portion of the upper surface of the inorganic layer 350 and a lateral surface of the first edge (portion "b" in fig. 2), and an edge of the light emitting layer 370 may continuously cover a portion of the upper surface of the inorganic layer 350 and a lateral surface of the second edge (portion "a" in fig. 2). For example, as shown in fig. 2, the overlap between the edge of the pixel defining layer 360 and the edge of the inorganic layer 350, and the overlap between the edge of the light emitting layer 370 and the edge of the inorganic layer 350 may be continuous in the X and Y directions. The inorganic layer 350 may include an inorganic material, such as silicon oxide (SiO _x ) Silicon nitride (SiN) _x ) Etc.

The width between the light emitting layer 370 and the pixel defining layer 360 on the upper surface of the inorganic layer 350 may be about 0.1 μm or more, for example, about 0.5 μm or more. Specifically, the width of the region on the upper surface of the inorganic layer 350, which does not overlap with the light emitting layer 370 and the pixel defining layer 360, may be about 0.1 μm or more, for example, about 0.5 μm or more. However, the width is not limited thereto, and may vary according to the process of manufacturing each component.

The light emitting layer 370 is positioned on the pixel electrode 191 and the inorganic layer 350. The light emitting layer 370 includes a light emitting region. The light emitting layer 370 may further include at least one of a hole injection region, a hole transport region, an electron injection region, and an electron transport region.

The light emitting layer 370 may include an organic material that uniquely emits light having basic colors such as red, green, and blue. Alternatively, the light emitting layer 370 may also have a structure in which a plurality of organic materials emitting light having different colors are stacked. Alternatively, the light emitting layer 370 may include inorganic materials emitting red, green, and blue light.

In a plane, the light emitting layer 370 does not overlap the pixel defining layer 360, i.e., in a vertical direction, the light emitting layer 370 does not overlap an upper surface of the pixel defining layer 360. The light emitting layer 370 and the pixel defining layer 360 may be spaced apart from each other in a horizontal direction (e.g., an X-direction). The light emitting layer 370 may overlap a portion of the inorganic layer 350, for example, the light emitting layer 370 may overlap a portion of the upper surface of the inorganic layer 350 and extend along a side of the inorganic layer 350. The edge of the light emitting layer 370 may overlap with the inorganic layer 350.

The common electrode 270 transmitting a common voltage is positioned on the light emitting layer 370. For example, the common electrode 270 may include an inorganic material that is a transparent conductive material, such as Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO). In another example, the common electrode 270 may also be formed of an inorganic material by thinly stacking metals such as calcium (Ca), barium (Ba), magnesium (Mg), aluminum (Al), silver (Ag), etc., to have light transmittance. Although not shown, at least one protective layer or functional layer may be located on the common electrode 270. For example, as shown in fig. 1, the common electrode 270 may extend continuously over (e.g., directly over) the light emitting layer 370, the pixel defining layer 360, and the region between the light emitting layer 370 and the pixel defining layer 360.

Specifically, as shown in fig. 1, the common electrode 270 may overlap the inorganic layer 350. In particular, the common electrode 270 may be in contact with a portion of the inorganic layer 350 exposed between the pixel defining layer 360 and the light emitting layer 370. For example, as shown in fig. 1, the common electrode 270 may continuously and conformally extend on the sides of the light emitting layer 370, the sides of the pixel defining layer 360, and the upper surface of the inorganic layer 350 exposed between the light emitting layer 370 and the facing sides of the pixel defining layer 360.

In the comparative embodiment, for example, when the inorganic layer 350 is not formed, the common electrode 270 may contact the pixel electrode 191 in a region between the light emitting layer 370 and the pixel defining layer 360. In contrast, according to an embodiment, when the inorganic layer 350 is located in the exposed region between the light emitting layer 370 and the pixel defining layer 360, the inorganic layer 350 prevents contact between the common electrode 270 and the pixel electrode 191.

The pixel electrode 191, the light emitting layer 370, and the common electrode 270 of each pixel form a light emitting element as a light emitting diode. For example, the pixel electrode 191 may be an anode that is a hole injection electrode, and the common electrode 270 may be a cathode that is an electron injection electrode. In another example, the pixel electrode 191 may be a cathode, and the common electrode 270 may be an anode. Holes and electrons are injected into the light emitting layer 370 from the pixel electrode 191 and the common electrode 270, respectively, and excitons formed by coupling the injected holes and electrons drop from an excited state to a ground state to emit light.

A thin film encapsulation layer 390 may be positioned on the common electrode 270. The thin film encapsulation layer 390 may include a plurality of inorganic layers, or a structure including inorganic layers and organic layers alternately stacked.

The inorganic layer may include a metal oxide or a metal nitride. As one example, the inorganic layer may include SiN _x 、Al ₂ O ₃ 、SiO ₂ And TiO ₂ Any one of them. The organic layer may include a polymer such as any one of polyethylene terephthalate, polyimide, polycarbonate, epoxy, polyethylene, and polyacrylate.

In this specification, an example in which the thin film encapsulation layer 390 is directly on the common electrode 270 is illustrated, but the embodiment is not limited thereto. For example, a separate filler material, a separate adhesive material, etc. may be located between the common electrode 270 and the thin film encapsulation layer 390.

The light emitting diode display according to an exemplary embodiment includes a light emitting layer 370, and the light emitting layer 370 is entirely surrounded by an inorganic material, for example. That is, referring to fig. 1, the lower surface of the light emitting layer 370 may overlap the inorganic layer 350 and the pixel electrode 191. In addition, a side surface (e.g., a lateral surface) of the light emitting layer 370 may overlap the common electrode 270. In addition, an upper surface of the light emitting layer 370 may overlap the common electrode 270. The light emitting layer 370 according to an exemplary embodiment may be surrounded, for example, entirely surrounded, by the pixel electrode 191, the inorganic layer 350, and the common electrode 270, wherein the pixel electrode 191, the inorganic layer 350, and the common electrode 270 all include an inorganic material, for example, are composed of an inorganic material.

When an element or layer (e.g., pixel defining layer 360) includes an organic material, a gas may be generated due to a manufacturing process, sunlight, etc., and the gas is referred to as an exhaust gas. When the generated exhaust gas is introduced into the light emitting layer 370, the light emitting layer 370 may be contaminated or infected. However, according to the embodiment, since the light emitting layer 370 is completely surrounded by an inorganic material, for example, exhaust gas generated from an organic material in the light emitting diode display is prevented from being introduced into the light emitting layer 370. Accordingly, contamination or infection of the light emitting layer 370 may be reduced, and reliability of a display device including the light emitting layer 370 may be improved.

Hereinafter, a light emitting diode display according to an exemplary embodiment will be described with reference to fig. 3 and 4. Fig. 3 and 4 are sectional views of a light emitting diode display according to a modified example of fig. 1, respectively. The description of the same components as those described with reference to fig. 1 and 2 will be omitted hereinafter.

Referring to fig. 3, an inorganic layer 350 may be located on the planarization layer 180 and the pixel electrode 191. That is, a portion of the inorganic layer 350 may be located on the pixel electrode 191, and the remaining portion of the inorganic layer 350 may be located on the planarization layer 180, for example, the inorganic layer 350 may have an L-shaped cross section that extends continuously along a portion of the upper surface of the pixel electrode 191 and along the lateral surface of the pixel electrode 191 to contact the planarization layer 180. A portion of the inorganic layer 350 may be located between the pixel defining layer 360 and the planarization layer 180. According to an exemplary embodiment, the inorganic layer 350 may be in contact with the planarization layer 180.

One end of the inorganic layer 350 may cover one end of the pixel electrode 191. The inorganic layer 350 may overlap with an edge of the pixel electrode 191. In this specification, an example in which one end of the inorganic layer 350 completely covers one end of the pixel electrode 191 is described, but the embodiment is not limited thereto. That is, in fig. 3, the inorganic layer 350 located on the right side covers the right end of the pixel electrode 191, and the inorganic layer 350 located on the left side does not cover the left end of the pixel electrode 191. However, other embodiments are also included, such as partial coverage of each edge of the pixel electrode 191 or coverage of only some edges of the pixel electrode 191.

Referring to fig. 4, an inorganic layer 350 according to an exemplary embodiment may be located on the pixel electrode 191 and the planarization layer 180. That is, the inorganic layer 350 may cover one end of the pixel electrode 191. The inorganic layer 350 may overlap with an edge of the pixel electrode 191. The pixel electrode 191 may be covered with the light emitting layer 370 and the inorganic layer 350 and not contact the common electrode 270.

The inorganic layer 350 may overlap with the light emitting layer 370. The edge of the inorganic layer 350 may overlap with the light emitting layer 370. An edge of the light emitting layer 370 may be located on one surface of the inorganic layer 350.

According to an exemplary embodiment, the pixel defining layer 360 may be spaced apart from the light emitting layer 370. In addition, the pixel defining layer 360 may be further spaced apart from the inorganic layer 350. The planarization layer 180 may be exposed in a spaced region between the pixel defining layer 360 and the inorganic layer 350. In the spacer region, the planarization layer 180 may be in contact with the common electrode 270.

According to the exemplary embodiment of fig. 4, the upper surface and the side surface of the light emitting layer 370 are surrounded by the common electrode 270, and the lower surface of the light emitting layer 370 is surrounded by the inorganic layer 350 and the pixel electrode 191. The light emitting layer 370 is surrounded by an inorganic material to prevent performance degradation due to exhaust gas infiltration.

Hereinafter, a light emitting diode display according to an embodiment will be described with reference to fig. 5 to 8. Fig. 5 is a cross-sectional view of a light emitting diode display according to an exemplary embodiment. Fig. 6 is a partial plan view of some of the components of fig. 5, and fig. 7 and 8 are sectional views at various stages in a method of manufacturing a light emitting diode display according to the exemplary embodiment of fig. 5. Exemplary embodiments identical or similar to the foregoing exemplary embodiments will be described below.

According to fig. 5 and 6, the inorganic layer 350 is positioned on the pixel electrode 191. The inorganic layer 350 may be placed to overlap with an edge of a light emitting layer 370A to be described below. In addition, the inorganic layer 350 may overlap with an edge of the auxiliary layer 370B. The edges of the inorganic layer 350 may overlap the light emitting layer 370A and the auxiliary layer 370B.

The light emitting layer 370A is positioned on the pixel electrode 191 and the inorganic layer 350. The auxiliary layer 370B is positioned on the pixel electrode 191, the inorganic layer 350, and the pixel defining layer 360.

The light emitting layer 370A according to an exemplary embodiment includes a light emitting region. In addition, the light emitting layer 370A may further include at least one of a hole injection region, a hole transport region, an electron transport region, and an electron injection region sequentially disposed from the pixel electrode 191.

An edge of the light emitting layer 370A may be located on one surface of the inorganic layer 350. The lower surface of the light emitting layer 370A may overlap the pixel electrode 191 and the inorganic layer 350, and the side surfaces and the upper surface of the light emitting layer 370A may overlap the common electrode 270. The light emitting layer 370A according to an exemplary embodiment may be surrounded by a layer made of an inorganic material. The performance of the light emitting element can be improved by preventing exhaust gas or the like from being introduced into the light emitting layer 370A.

In a plane, the pixel defining layer 360 and the light emitting layer 370A may be spaced apart from each other. The inorganic layer 350 and the auxiliary layer 370B may be located between the spaced apart pixel defining layer 360 and the light emitting layer 370A.

The auxiliary layer 370B may overlap the pixel defining layer 360 and the inorganic layer 350, and may be spaced apart from the light emitting layer 370A. The common electrode 270 may be positioned on the inorganic layer 350 in a spaced region between the auxiliary layer 370B and the light emitting layer 370A. According to an exemplary embodiment, the common electrode 270 may be in contact with the inorganic layer 350.

The auxiliary layer 370B may overlap with a portion of the upper surface and a side surface of the pixel defining layer 360. According to an exemplary embodiment, the auxiliary layer 370B may be located only on a side surface of the pixel defining layer 360, and may not be located on an upper surface of the pixel defining layer 360.

The inorganic layer 350 may overlap the light emitting layer 370A and the auxiliary layer 370B, and may be spaced apart from the pixel defining layer 360. The auxiliary layer 370B may be positioned on the pixel electrode 191 in a spaced region between the inorganic layer 350 and the pixel defining layer 360. According to an exemplary embodiment, the pixel electrode 191 may be in contact with the auxiliary layer 370B within the interval region.

The width between the light emitting layer 370A and the auxiliary layer 370B on the upper surface of the inorganic layer 350 may be about 0.1 μm or more, for example, about 0.5 μm or more. Specifically, the width of the region on the upper surface of the inorganic layer 350, which does not overlap with the light emitting layer 370A and the auxiliary layer 370B, may be about 0.1 μm or more, for example, about 0.5 μm or more. However, the width is not limited thereto, and may vary according to the process of manufacturing each component.

When the pixel electrode 191 is an anode, the auxiliary layer 370B may include at least one of a hole transport region and a hole injection region. When the pixel electrode 191 is a cathode, the auxiliary layer 370B may include at least one of an electron transport region and an electron injection region.

At least one of the hole injection region and the hole transport region included in the auxiliary layer 370B may be the same material as the hole injection region and the hole transport region included in the light emitting layer 370A. In addition, at least one of the electron injection region and the electron transport region included in the auxiliary layer 370B may be the same material as the electron injection region and the electron transport region included in the light emitting layer 370A. The embodiment is not limited thereto, and the light emitting layer 370A and the auxiliary layer 370B may include different materials. The hole transport region, the hole injection region, the electron transport region, and the electron injection region may include an inorganic material.

Unlike the light emitting layer 370A, the auxiliary layer 370B does not include a light emitting region. Even when a voltage is applied to the pixel electrode 191 and the common electrode 270, the auxiliary layer 370B does not include a light emitting region, and thus excitons are not formed. However, the auxiliary layer 370B may include an inorganic material. The auxiliary layer 370B covers a side surface of the pixel defining layer 360 adjacent to the light emitting region to reduce exhaust gas from being discharged from the pixel defining layer 360.

The manufacturing method will be described with respect to the foregoing exemplary embodiments described with reference to fig. 5 and 6, with reference to fig. 7 and 8. The substrate 110, the thin film transistor, the planarization layer 180, the pixel electrode 191, and the pixel defining layer 360 may be manufactured using any convenient method.

Referring to fig. 7, an inorganic layer 350 may be formed on the pixel electrode 191. Thereafter, a first layer a including at least one of a hole transport region and a hole injection region may be formed using a first Fine Metal Mask (FMM). According to an exemplary embodiment, the first layer a may include at least one of an electron transport region and an electron injection region.

The first layer a may overlap with a side surface of the pixel defining layer 360 and a portion of an upper surface of the pixel defining layer 360. The first layer a may completely cover the inorganic layer 350. In addition, the first layer a may overlap the pixel electrode 191.

Thereafter, a photo mask PR for patterning is formed on the pixel defining layer 360 and the first layer a. The photo mask PR may overlap a portion of the inorganic layer 350, a portion of the first layer a, and the pixel defining layer 360.

Thereafter, as shown in fig. 8, an auxiliary layer 370B may be formed through an etching process using a photo-sensitive mask PR. The auxiliary layer 370B may overlap a portion of the inorganic layer 350 and a portion of the pixel defining layer 360.

Thereafter, a light emitting layer 370A spaced apart from the auxiliary layer 370B is formed using a second fine metal mask. The light emitting diode display according to the exemplary embodiment of fig. 5 may be manufactured by sequentially forming the common electrode 270 and the thin film encapsulation layer 390 on the light emitting layer 370A and the auxiliary layer 370B.

Hereinafter, a light emitting diode display according to an exemplary embodiment will be described with reference to fig. 9 to 11. Fig. 9 is a plan view of a modified example according to fig. 6, and fig. 10 and 11 are masks used in the process of manufacturing the light emitting diode display according to the exemplary embodiment of fig. 9, respectively. The description of the same components as those of the foregoing exemplary embodiments will be omitted.

Referring to fig. 9, one pixel may include at least two auxiliary layers 370B spaced apart from each other. The auxiliary layers 370B according to the exemplary embodiment of fig. 6 are connected to each other, but the auxiliary layers 370B according to the exemplary embodiment of fig. 9 may be spaced apart from each other.

According to an exemplary embodiment, the inorganic layer 350 may further include protrusions 350A. The protrusion 350A may be located between two auxiliary layers 370B spaced apart from each other.

According to an exemplary embodiment, the protrusion 350A may overlap the pixel defining layer 360. The inorganic layer 350 may overlap the auxiliary layer 370B and the light emitting layer 370A. In addition, the inorganic layer 350 may overlap the pixel defining layer 360 in a region where the protrusion 350A is located.

In the exemplary embodiment of fig. 9, the light emitting layer 370A may include at least one of a hole injection region and a hole transport region, at least one of an electron transport region and an electron injection region, and a light emitting region. According to an exemplary embodiment, the light emitting layer 370A may include a hole injection region, a hole transport region, a light emitting region, an electron transport region, and an electron injection region, which are sequentially stacked.

The auxiliary layer 370B may include one to four regions selected from a hole injection region, a hole transport region, an electron transport region, and an electron injection region. Since the light emitting region included in the light emitting layer 370A is not included, the auxiliary layer 370B does not perform a light emitting function and may serve as an inorganic layer only.

A method of manufacturing the above-described light emitting layer 370A and auxiliary layer 370B will be described with reference to fig. 10 and 11.

As shown in fig. 10, a first fine metal mask M1 is prepared, the first fine metal mask M1 having a first opening A1 corresponding to an area where the light emitting layer 370A is located and a second opening A2 corresponding to an area where the auxiliary layer 370B is located. As shown in fig. 11, a second fine metal mask M2 is prepared, the second fine metal mask M2 having a third opening A3 corresponding to the region where the light emitting layer 370A is located, and no opening corresponding to the region where the auxiliary layer 370B is located.

At least one of the hole transport region, the hole injection region, the light emitting region, the electron injection region, and the electron transport region is deposited using the first fine metal mask M1. Further, at least one selected from the group consisting of a hole transporting region, a hole injecting region, a light emitting region, an electron injecting region, and an electron transporting region is deposited using the second fine metal mask M2. Each of the first and second fine metal masks M1 and M2 may be used at least once during the manufacturing process.

In the case of using the first and second fine metal masks M1 and M2, a hole transporting region, a hole injecting region, a light emitting region, an electron injecting region, and an electron transporting region may all be formed in the light emitting layer 370A. Meanwhile, the light emitting region deposited using the second fine metal mask M2 may not be deposited in the region where the auxiliary layer 370B is located. The auxiliary layer 370B may not include the light emitting region deposited using the second fine metal mask M2.

The auxiliary layer 370B does not include a light emitting region required to function as a light emitting layer. Accordingly, the auxiliary layer 370B may be a layer in which only an inorganic material is deposited. The auxiliary layer 370B may prevent exhaust gas generated from an organic layer such as the pixel defining layer 360, and does not have excitons like the light emitting layer 370A.

Hereinafter, a light emitting diode display according to an exemplary embodiment will be described with reference to fig. 12 to 14. Fig. 12, 13 and 14 are plan views according to a modified example of fig. 9. The description of the foregoing components may be omitted.

Referring to fig. 12, one pixel according to an exemplary embodiment may include four auxiliary layers 370B spaced apart from each other in a plane. In plan, each auxiliary layer 370B may have a "+" shape or a "rotated" + "shape, for example, each auxiliary layer 370B may have a rotated L-shape in a top plan view. The plurality of auxiliary layers 370B may be arranged to have a symmetrical shape around the center of the light emitting layer 370A in a top plan view.

The inorganic layer 350 between the plurality of auxiliary layers 370B and the light emitting layer 370A may have a quadrangular frame shape in a top plan view. In addition, the inorganic layer 350 may include protrusions 350A between two auxiliary layers 370B spaced apart from each other.

Referring to fig. 13, the auxiliary layer 370B according to an exemplary embodiment may include two auxiliary layers 370B spaced apart from each other in a plane. Each auxiliary layer 370B may have a "+" or "+" shape, for example, each auxiliary layer 370B may have a rotated L-shape in a top plan view. The plurality of auxiliary layers 370B may be symmetrical to each other.

The inorganic layer 350 between the light emitting layer 370A and the auxiliary layer 370B may have a quadrangular frame shape in a top plan view. Further, the inorganic layer 350 may include protrusions 350A overlapping with the spaces spaced between the auxiliary layers 370B. According to an exemplary embodiment, the inorganic layer 350 may include protrusions 350A protruding in a diagonal direction from vertices (e.g., corners) of the quadrangular frame shape.

Referring to fig. 14, one pixel according to an exemplary embodiment may include four auxiliary layers 370B spaced apart from each other. Each auxiliary layer 370B may have a linear shape, for example, a straight line shape. The plurality of auxiliary layers 370B may be symmetrical to each other.

The inorganic layer 350 between the light emitting layer 370A and the auxiliary layer 370B may have a quadrangular frame shape in a top plan view. In addition, the inorganic layer 350 may include protrusions 350A overlapping with spaces spaced between the auxiliary layers 370B. According to an exemplary embodiment, the inorganic layer 350 may have four protrusions 350A extending in a diagonal direction from each vertex (e.g., corner) of the quadrangular frame shape.

Hereinafter, a light emitting diode display according to an exemplary embodiment will be described with reference to fig. 15 to 18. Fig. 15 is an equivalent circuit diagram of one pixel of a light emitting diode display according to an exemplary embodiment, fig. 16 is a layout diagram of transistors and capacitors of the light emitting diode display according to an exemplary embodiment, fig. 17 is a sectional view of the light emitting diode display of fig. 16 taken along the line XVII-XVII, and fig. 18 is a sectional view of the light emitting diode display of fig. 16 taken along the lines XVIII-XVIII and XVIII '-XVIII'.

As shown in fig. 15, the light emitting diode display according to the exemplary embodiment includes a plurality of signal lines 151, 152, 153, 158, 171, 172, and 192 and a plurality of pixels PX connected to the plurality of signal lines and arranged in an approximately matrix form. One pixel PX includes a plurality of transistors T1, T2, T3, T4, T5, T6, and T7 connected to a plurality of signal lines 151, 152, 153, 158, 171, 172, and 192, a storage capacitor Cst, and a light emitting diode OLD.

The transistors T1, T2, T3, T4, T5, T6, and T7 include a driving transistor T1, a switching transistor T2, a compensation transistor T3, an initialization transistor T4, an operation control transistor T5, a light emission control transistor T6, and a bypass transistor T7. The signal lines 151, 152, 153, 158, 171, 172 and 192 include a scan line 151 transmitting a scan signal Sn, a previous scan line 152 transmitting a previous scan signal Sn-1 to the initializing transistor T4, a light emission control line 153 transmitting a light emission control signal EM to the operation control transistor T5 and the light emission control transistor T6, a bypass control line 158 transmitting a bypass signal BP to the bypass transistor T7, a data line 171 crossing the scan line 151 and transmitting a data signal Dm, a driving voltage line 172 transmitting a driving voltage ELVDD and formed substantially parallel to the data line 171, and an initializing voltage line 192 transmitting an initializing voltage Vint initializing the driving transistor T1.

The gate electrode G1 of the driving transistor T1 is connected to one end Cst1 of the storage capacitor Cst. The source electrode S1 of the driving transistor T1 is connected to the driving voltage line 172 via the operation control transistor T5. The drain electrode D1 of the driving transistor T1 is electrically connected to the anode of the light emitting diode OLD via the light emission control transistor T6. The driving transistor T1 receives the data signal Dm according to the switching operation of the switching transistor T2 to supply the driving current I to the light emitting diode OLD _d 。

The gate electrode G2 of the switching transistor T2 is connected to the scan line 151. The source electrode S2 of the switching transistor T2 is connected to the data line 171. The drain electrode D2 of the switching transistor T2 is connected to the source electrode S1 of the driving transistor T1, and is connected to the driving voltage line 172 via the operation control transistor T5. The switching transistor T2 is turned on according to the scan signal Sn received through the scan line 151 to perform an operation of transmitting the data signal Dm transmitted to the data line 171 to the source electrode S1 of the driving transistor T1.

The gate electrode G3 of the compensation transistor T3 is connected to the scan line 151. The source electrode S3 of the compensation transistor T3 is connected to the drain electrode D1 of the driving transistor T1, and is connected to the anode of the light emitting diode oled via the light emission control transistor T6. The drain electrode D3 of the compensation transistor T3 is connected to the drain electrode D4 of the initialization transistor T4, one end Cst1 of the storage capacitor Cst, and the gate electrode G1 of the driving transistor T1. The compensation transistor T3 is turned on according to the scan signal Sn received through the scan line 151, and connects the gate electrode G1 and the drain electrode D1 of the driving transistor T1 to connect the driving transistor T1.

The gate electrode G4 of the initializing transistor T4 is connected to the previous scanning line 152. The source electrode S4 of the initialization transistor T4 is connected to the initialization voltage line 192. The drain electrode D4 of the initializing transistor T4 is connected to one end Cst1 of the storage capacitor Cst and the gate electrode G1 of the driving transistor T1 via the drain electrode D3 of the compensating transistor T3. The initializing transistor T4 is turned on according to the previous scan signal Sn-1 received through the previous scan line 152 to transmit the initializing voltage Vint to the gate electrode G1 of the driving transistor T1 and initialize the gate voltage of the gate electrode G1 of the driving transistor T1.

The gate electrode G5 of the operation control transistor T5 is connected to the light emission control line 153. The source electrode S5 of the operation control transistor T5 is connected to the driving voltage line 172. The drain electrode D5 of the operation control transistor T5 is connected to the source electrode S1 of the driving transistor T1 and the drain electrode D2 of the switching transistor T2.

The gate electrode G6 of the light emission control transistor T6 is connected to the light emission control line 153. The source electrode S6 of the light emission control transistor T6 is connected to the drain electrode D1 of the driving transistor T1 and the source electrode S3 of the compensation transistor T3. The drain electrode D6 of the light emission control transistor T6 is electrically connected to the anode of the light emitting diode OLD.

The operation control transistor T5 and the emission control transistor T6 are simultaneously turned on according to the emission control signal EM received through the emission control line 153. As a result, the driving voltage ELVDD is compensated by the diode-connected driving transistor T1 to be transmitted to the light emitting diode OLD.

The gate electrode G7 of the bypass transistor T7 is connected to the bypass control line 158. The source electrode S7 of the bypass transistor T7 is connected to the drain electrode D6 of the light emission control transistor T6 and the anode of the light emitting diode OLD. The drain electrode D7 of the bypass transistor T7 is connected to the initialization voltage line 192 and the source electrode S4 of the initialization transistor T4.

The other end Cst2 of the storage capacitor Cst is connected to the driving voltage line 172, and the cathode of the light emitting diode OLD is connected to the common voltage line 741 that transfers the common voltage ELVSS.

In this specification, a structure having 7 transistors including the bypass transistor T7 and 1 capacitor is illustrated, but the embodiment is not limited thereto, and various modifications may be made to the number of transistors and the number of capacitors.

Hereinafter, in addition to fig. 15 described above, a planar structure of the light emitting diode display according to an exemplary embodiment will be first described in detail with reference to fig. 16.

The light emitting diode display according to the exemplary embodiment includes scan lines 151, a previous scan line 152, a light emission control line 153, and a bypass control line 158, which apply a scan signal Sn, a previous scan signal Sn-1, a light emission control signal EM, and a bypass signal BP to pixels, respectively, and extend in a row direction. In addition, the light emitting diode display includes a data line 171 and a driving voltage line 172 crossing the scan line 151, the previous scan line 152, the light emission control line 153, and the bypass control line 158 and applying a data signal Dm and a driving voltage ELVDD to pixels, respectively. The initialization voltage line 192 transmitting the initialization voltage Vint may have a shape bent many times in the row direction. The initialization voltage Vint transferred from the initialization voltage line 192 may be transferred to the compensation transistor T3 via the initialization transistor T4.

The pixel includes a driving transistor T1, a switching transistor T2, a compensation transistor T3, an initialization transistor T4, an operation control transistor T5, a light emission control transistor T6, a bypass transistor T7, a storage capacitor Cst, and a light emitting diode. The light emitting diode is composed of a pixel electrode 191, a light emitting layer 370, and a common electrode 270.

The channel of each of the driving transistor T1, the switching transistor T2, the compensation transistor T3, the initializing transistor T4, the operation control transistor T5, the light emission control transistor T6, and the bypass transistor T7 is located on a single connected semiconductor layer 131. The semiconductor layer 131 may have various curved shapes.

The semiconductor layer 131 includes a channel doped with an N-type impurity or a P-type impurity, and a source doping region and a drain doping region formed at both sides of the channel and having a doping concentration higher than that of the doping impurity doped in the channel. In an exemplary embodiment, the source and drain doped regions correspond to a source electrode and a drain electrode, respectively. The source and drain electrodes formed in the semiconductor layer 131 may be formed by doping only the corresponding regions. Further, in the semiconductor layer 131, regions between the source electrode and the drain electrode of different transistors are doped so as to electrically connect the source electrode and the drain electrode to each other.

The channels included in the semiconductor layer 131 may include a driving channel 131a included in the driving transistor T1, a switching channel 131b included in the switching transistor T2, a compensation channel 131c included in the compensation transistor T3, an initialization channel 131d included in the initialization transistor T4, an operation control channel 131e included in the operation control transistor T5, a light emission control channel 131f included in the light emission control transistor T6, and a bypass channel 131g included in the bypass transistor T7.

The driving transistor T1 includes a driving channel 131a, a driving gate electrode 155a, a driving source electrode 136a, and a driving drain electrode 137a. The driving channel 131a is curved, and may have a serpentine shape or a zigzag shape.

The driving gate electrode 155a overlaps the driving channel 131 a. The driving source electrode 136a and the driving drain electrode 137a are disposed adjacent to both sides of the driving channel 131 a. The driving gate electrode 155a is connected to the driving connection member 174 through the driving contact hole 61.

The switching transistor T2 includes a switching channel 131b, a switching gate electrode 155b, a switching source electrode 136b, and a switching drain electrode 137b. The switching gate electrode 155b, which is a portion extending downward from the scan line 151, overlaps the switching channel 131 b. The switching source electrode 136b and the switching drain electrode 137b are disposed adjacent to both sides of the switching channel 131 b. The switching source electrode 136b is connected to the data line 171 through the switching contact hole 62.

The compensation transistor T3 includes a compensation channel 131c, a compensation gate electrode 155c, a compensation source electrode 136c, and a compensation drain electrode 137c. The compensation gate electrode 155c may be a protrusion extending upward from the scan line 151. The compensation gate electrode 155c overlaps the compensation channel 131 c. The compensation source electrode 136c and the compensation drain electrode 137c may be located at both sides of the compensation channel 131 c. The compensation drain electrode 137c is connected to the driving connection member 174 through the compensation contact hole 63.

The initializing transistor T4 includes an initializing channel 131d, an initializing gate electrode 155d, an initializing source electrode 136d, and an initializing drain electrode 137d. The initializing gate electrode 155d may be a protrusion extending downward from the previous scan line 152. The initialization gate electrode 155d overlaps the initialization channel 131 d. The initialization source electrode 136d and the initialization drain electrode 137d are disposed adjacent to both sides of the initialization channel 131 d. The initialization source electrode 136d is connected to the initialization connection member 175 through the initialization contact hole 64.

The operation control transistor T5 includes an operation control channel 131e, an operation control gate electrode 155e, an operation control source electrode 136e, and an operation control drain electrode 137e. The operation control gate electrode 155e as a part of the light emission control line 153 overlaps the operation control channel 131 e. The operation control source electrode 136e and the operation control drain electrode 137e are disposed adjacent to both sides of the operation control channel 131 e. The operation control source electrode 136e is connected to a part of the driving voltage line 172 through the operation control contact hole 65.

The emission control transistor T6 includes an emission control channel 131f, an emission control gate electrode 155f, an emission control source electrode 136f, and an emission control drain electrode 137f. The emission control gate electrode 155f, which is a part of the emission control line 153, overlaps the emission control channel 131 f. The emission control source electrode 136f and the emission control drain electrode 137f are disposed adjacent to both sides of the emission control channel 131 f. The emission control drain electrode 137f is connected to the emission control connection member 179 through the emission control contact hole 66.

The bypass transistor T7 includes a bypass channel 131g, a bypass gate electrode 155g, a bypass source electrode 136g, and a bypass drain electrode 137g. The bypass gate electrode 155g, which is a part of the bypass control line 158, overlaps the bypass channel 131 g. The bypass source electrode 136g and the bypass drain electrode 137g are disposed adjacent to both sides of the bypass channel 131 g. The bypass source electrode 136g is connected to the emission control connection member 179 through the emission control contact hole 66. The bypass drain electrode 137g is directly connected to the initialization source electrode 136 d.

The driving source electrode 136a of the driving transistor T1 is connected to the switching drain electrode 137b and the operation control drain electrode 137 e. The driving drain electrode 137a is connected to the compensation source electrode 136c and the emission control source electrode 136 f.

The storage capacitor Cst includes the first storage electrode 155a and the second storage electrode 156 with the second gate insulating layer 142 disposed therebetween. The first storage electrode 155a corresponds to the driving gate electrode 155a. The second storage electrode 156, which is a portion extending from the storage line 154, occupies a larger area than the driving gate electrode 155a and entirely covers the driving gate electrode 155a. The second gate insulating layer 142 is a dielectric material, and the storage capacitance is determined by the charge stored in the storage capacitor Cst and the voltage between the electrodes 155a and 156. The driving gate electrode 155a serves as a first storage electrode 155a to obtain a space capable of forming a storage capacitor Cst within a space narrowed by the driving channel 131a occupying a large area in the pixel.

The first storage electrode 155a as the driving gate electrode 155a is connected to one end of the driving connection member 174 through the driving contact hole 61 and the storage opening 51. The storage opening 51 is an opening formed in the second storage electrode 156.

The driving connection member 174 may be substantially parallel to the data line 171 and located on the same layer. The other end of the driving connection member 174 is connected to the compensation drain electrode 137c of the compensation transistor T3 and the initialization drain electrode 137d of the initialization transistor T4 through the compensation contact hole 63. The driving connection member 174 connects the driving gate electrode 155a, the compensation drain electrode 137c of the compensation transistor T3, and the initialization drain electrode 137d of the initialization transistor T4 to each other.

The second storage electrode 156 is connected to the driving voltage line 172 through the storage contact hole 69. The storage capacitor Cst may store a storage capacitance corresponding to a difference between the driving voltage ELVDD transferred to the second storage electrode 156 through the driving voltage line 172 and the driving gate voltage of the driving gate electrode 155 a.

Hereinafter, a sectional structure of the light emitting diode display according to the exemplary embodiment will be described in detail according to a stacking order with reference to fig. 17 and 18 in addition to fig. 15 and 16. Since the stacked structure of the operation control transistor T5 and the light emission control transistor T6 is almost the same, a detailed description will be omitted.

The buffer layer 111 is located on the substrate 110. The buffer layer 111 prevents impurities from the substrate 110 during crystallization to form polycrystalline silicon. Further, the pressure of the semiconductor layer located on the buffer layer 111 may be reduced by planarizing one surface of the substrate 110. The buffer layer 111 may include, for example, silicon nitride (SiN) _x ) Or silicon oxide (SiO) _x ) Is an inorganic material of (a).

A semiconductor layer including a driving channel 131a, a switching channel 131b, a compensation channel 131c, an initializing channel 131d, an operation control channel 131e, a light emission control channel 131f, and a bypass channel 131g is located on the buffer layer 111.

The driving source electrode 136a and the driving drain electrode 137a are located at both sides of the driving channel 131 a. The switching source electrode 136b and the switching drain electrode 137b are located at both sides of the switching channel 131 b. The compensation source electrode 136c and the compensation drain electrode 137c are located at both sides of the compensation channel 131 c. The initialization source electrode 136d and the initialization drain electrode 137d are located at both sides of the initialization channel 131 d. The operation control source electrode 136e and the operation control drain electrode 137e are located at both sides of the operation control channel 131 e. The emission control source electrode 136f and the emission control drain electrode 137f are located at both sides of the emission control channel 131 f. The bypass source electrode 136g and the bypass drain electrode 137g are located on both sides of the bypass channel 131 g.

The first gate insulating layer 141 is located on the semiconductor layer.

A first gate conductor including a scan line 151 including a switching gate electrode 155b and a compensation gate electrode 155c, a previous scan line 152 including an initializing gate electrode 155d, a light emission control line 153 including an operation control gate electrode 155e and a light emission control gate electrode 155f, a bypass control line 158 including a bypass gate electrode 155g, and a driving gate electrode (first storage electrode) 155a is located on the first gate insulating layer 141.

The second gate insulating layer 142 is located on the first gate conductor and the first gate insulating layer 141. The first and second gate insulating layers 141 and 142 may include silicon nitride (SiN) _x ) Silicon dioxide SiO ₂ Etc.

A second gate conductor including a storage line 154 parallel to the scan line 151 and a second storage electrode 156 as a portion extending from the storage line 154 is located on the second gate insulating layer 142.

An interlayer insulating layer 160 is located on the second gate insulating layer 142 and the second gate conductor. The interlayer insulating layer 160 may have a driving contact hole 61, a switching contact hole 62, a compensation contact hole 63, an initialization contact hole 64, an operation control contact hole 65, a light emission control contact hole 66, and a storage contact hole 69.

A data conductor including a data line 171, a driving voltage line 172, a driving connection member 174, an initializing connection member 175, and a light emission control connection member 179 is located on the interlayer insulating layer 160.

The data line 171 is connected to the switching source electrode 136b through the switching contact hole 62. One end of the driving connection member 174 is connected to the first storage electrode 155a through the driving contact hole 61. The other end of the driving connection member 174 is connected to the compensation drain electrode 137c and the initialization drain electrode 137d through the compensation contact hole 63. The initialization connection member 175 is connected to the initialization source electrode 136d through the initialization contact hole 64. The emission control connection member 179 is connected to the emission control drain electrode 137f through the emission control contact hole 66.

A planarization layer 180 is positioned on the data conductor and the interlayer insulating layer 160. The planarization layer 180 planarizes one surface by covering the data conductor, and thus, the pixel electrode 191 can be formed on the planarization layer 180 without steps. The planarization layer 180 may have a thickness greater than that of the interlayer insulating layer 160, and minimizes parasitic capacitance between the data conductor and the pixel electrode 191. The planarization layer 180 may include an organic material such as polyacrylate resin and polyimide resin, or a stacked film of an organic material and an inorganic material.

The pixel electrode 191 and the initialization voltage line 192 are positioned on the planarization layer 180. The light emission control connection member 179 is connected to the pixel electrode 191 through the pixel contact hole 81. The initialization connection member 175 is connected to the initialization voltage line 192 through the initialization voltage line contact hole 82.

The pixel defining layer 360 is located on the pixel electrode 191. The pixel defining layer 360 has an opening 361 exposing the pixel electrode 191. The pixel defining layer 360 may include an organic material such as polyacrylate resin and polyimide resin, or a silicon-based inorganic material.

The light emitting layer 370 may be positioned on the pixel electrode 191. The inorganic layer 350 may be located between the light emitting layer 370 and the pixel electrode 191. Since the inorganic layer 350 according to the exemplary embodiment is the same as the inorganic layer 350 described in fig. 1, a detailed description will be omitted hereinafter.

In this specification, an example in which the inorganic layer 350 according to the exemplary embodiment of fig. 1 is applied is illustrated, but the embodiment is not limited thereto. The components of the pixel electrode 191, the inorganic layer 350, the pixel defining layer 360, and the like described in fig. 3 to 14 may be applied.

The common electrode 270 is positioned on the light emitting layer 370. The common electrode 270 is also located on the pixel defining layer 360 and over a plurality of pixels. A light emitting diode OLD including the pixel electrode 191, the light emitting layer 370, and the common electrode 270 may be formed.

Herein, the pixel electrode 191 may be an anode as a hole injection electrode, and the common electrode 270 may be a cathode as an electron injection electrode. The embodiment is not limited thereto, and the pixel electrode 191 may be a cathode and the common electrode 270 may be an anode according to a driving method of the light emitting diode display. Holes and electrons are injected into the light emitting layer 370 from the pixel electrode 191 and the common electrode 270, respectively, and light is emitted when excitons, in which the injected holes and electrons are coupled to each other, drop from an excited state to a ground state.

By way of summary and review, embodiments provide a light emitting diode display that includes a light emitting layer surrounded by an inorganic material. That is, according to the foregoing exemplary embodiments, the light emitting layer may include, for example, a structure entirely surrounded by an inorganic material to prevent the performance of the light emitting layer from being deteriorated due to exhaust gas infiltration. In other words, since the light emitting layer is surrounded by the inorganic material, deterioration due to exhaust gas emitted from a layer (e.g., a pixel defining layer) containing an organic material can be reduced. Further, a light emitting diode with improved quality may be provided.

Exemplary embodiments are disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, features, characteristics, and/or elements described with respect to particular embodiments may be used alone or in combination with features, characteristics, and/or elements described with respect to other embodiments, unless specifically indicated otherwise, as will be apparent to one of ordinary skill in the art from the filing of the present application. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims

1. A light emitting diode display, comprising:

a first electrode;

a second electrode overlapping the first electrode;

a light emitting layer located between the first electrode and the second electrode;

a pixel defining layer overlapping a portion of the first electrode, the pixel defining layer and the light emitting layer being spaced apart from each other in a top view; and

an inorganic layer between the first electrode and the light emitting layer, an edge of the inorganic layer overlapping the light emitting layer and the pixel defining layer.

2. The light emitting diode display of claim 1, wherein the light emitting layer is surrounded by the first electrode, the inorganic layer, and the second electrode.

3. The light emitting diode display of claim 1, wherein an edge of the light emitting layer and an edge of the pixel defining layer are located on one surface of the inorganic layer.

4. The light emitting diode display of claim 1, wherein the second electrode is in contact with the inorganic layer in a region between the pixel defining layer and the light emitting layer.

5. The light emitting diode display of claim 1, wherein the inorganic layer overlaps the first electrode.

6. A light emitting diode display, comprising:

a first electrode connected to the thin film transistor;

a second electrode overlapping the first electrode;

a pixel defining layer overlapping the thin film transistor; and

an inorganic layer between the first electrode and the light emitting layer;

wherein the light emitting layer and the pixel defining layer are spaced apart from each other when viewed in a top view, and the inorganic layer and the pixel defining layer are spaced apart from each other when viewed in a top view.

7. The light emitting diode display of claim 6, wherein the inorganic layer overlaps an edge of the light emitting layer and an edge of the first electrode.

8. The light emitting diode display of claim 6, wherein the inorganic layer covers an edge of the first electrode.

9. A light emitting diode display, comprising:

a first electrode;

a second electrode overlapping the first electrode;

an auxiliary layer located between the first electrode and the second electrode and spaced apart from the light emitting layer;

an inorganic layer between the light emitting layer and the first electrode; and

a pixel defining layer between the first electrode and the auxiliary layer,

wherein the inorganic layer overlaps with an edge of the light emitting layer and an edge of the auxiliary layer.

10. The light emitting diode display of claim 9, wherein the auxiliary layer is located on a side surface of the pixel defining layer, and wherein the light emitting layer and the pixel defining layer are spaced apart from each other when viewed in a top view.