CN110134402B - Method for generating animation of RAM and register change in simulation operation - Google Patents

Abstract

The invention relates to a method for generating animation of RAM and register change during simulation operation. The invention aims to record the execution position of a simulation program (through a PC value) and the values of a register, an RAM and other storage areas in the simulation process in real time in the simulation process of the program software of the embedded system, and synthesize an animation video, so that the influence of instructions in the program execution process on the register and the RAM can be visually checked, and students can effectively understand and master related instructions in the teaching and training process of the embedded system. The method is convenient to use, and the change videos of the RAM, the register and the like in the single-step debugging process of the embedded system program can be obtained only by inputting the program and the specified parameters every time, so that the time spent by manual comparison of a user is greatly reduced, a beginner can conveniently understand the program, the program error searching and effect inspection are facilitated, and the method has auxiliary significance for developing training.

Description

Method for generating animation of RAM and register change in simulation operation

Technical Field

The invention relates to the technical field of embedded system learning, in particular to a method for generating animation with influence of an instruction execution process on a register and a RAM.

Background

Learning assembly language is a very important link for learning embedded system (especially single chip microcomputer) application, and how to effectively understand program execution and influence thereof on a register and a RAM is a vital part for beginners to learn assembly language. However, due to the hardware structure of the embedded system, it is not easy to observe the change of the RAM state inside the embedded system. The partially compiled emulation software provides dynamic display functions of registers and RAM. However, these compiling emulation software do not provide the function of comparing the RAM area before and after execution of one instruction in the RAM, and the RAM area is large. If every time an instruction is executed, the user manually compares the instruction with the RAM area before the instruction is executed, a great deal of time and energy are spent on the user when finding the changed area, the phenomena of missing and wrong reading are easy to occur, and the learning requirement of a beginner cannot be well met.

Disclosure of Invention

The purpose of the invention is: the influence of the instructions on the register and the RAM in the program execution process compiled by the assembly language can be visually checked.

In order to achieve the above object, the technical solution of the present invention is to provide a method for generating animation of RAM and register change during simulation runtime, which is characterized by comprising the following steps:

step 1, selecting a chip for running a program, simulating a running program file, compiling simulation software, simulating time, maximum execution steps, a monitoring range of an RAM and the size of a display area of the RAM;

step 2, opening the compiling simulation software, newly building a chip project specified in the step 1, loading a program file to be simulated and run, and compiling and linking;

step 3, setting an initial value of the step count N to be 0, starting timing, setting a display interface of the compiling simulation software, enabling the compiling simulation software to display a register and an RAM data area, displaying the RAM data area at a default position, and adjusting the size of a display area of the RAM data area according to the setting;

step 4, controlling the compiling simulation software to execute one step, and adding one to the step number count N;

step 5, intercepting a Register area picture and an RAM area picture displayed by compiling simulation software, storing the Register area picture as a picture file with a prefix of N _ Register, defining the picture as an N _ Register image, displaying the RAM area content in batches according to the size of a set RAM display area, sequentially intercepting pictures, sequentially naming the prefixes of the pictures obtained by intercepting the pictures as N _ 0001-N _000N and defining the pictures as N _ 0001-N _000N images, and synthesizing the N _ 0001-N _000N images into an image file with a prefix name of N _ RAM from small to large, and defining the image file as an N _ RAM image;

step 6, if the current step is not the first step, comparing the N _ Register image and the N _ RAM image of the current step with the N _ Register image and the N _ RAM image obtained in the previous step to obtain an image difference position, and marking a difference position on the N _ Register image and the N _ RAM image of the current step; if the current step is the first step, entering step 7;

step 7, obtaining a current PC value from the N _ Register image by using an OCR technology, and recording the current PC pointer value as N _ PC;

step 8, judging whether the number of the execution steps reaches the standard or the execution time reaches the standard, if so, executing the next step, otherwise, executing the step 4;

step 9, generating a program diagram

The program diagram comprises an instruction address, an instruction machine code and an instruction which are sequentially arranged, wherein the instruction is imported through a specified code file; finding the machine code of the instruction by inquiring the instruction table; calculating the initial address of the corresponding instruction according to the ORG pseudo instruction and the byte length of the instruction, and then generating a program diagram;

step 10, video synthesis

Merging the program diagram, the marked N _ Register image and the N _ RAM image into a picture N _ Compound image, adding a solid arrow in front of an instruction address position equal to the N _ PC value, and roughly displaying the instruction, and adding a dotted arrow in the instruction address position equal to the previous PC value, if the PC value is not changed or the first instruction is executed, not displaying the dotted arrow, and synthesizing the video in a mode of 30 frames per second, wherein the 30 frames in the Nth second are all corresponding N _ Compound images.

The invention aims to record the execution position of a simulation program (through a PC value) and the values of a register, an RAM and other storage areas in the simulation process in real time in the simulation process of the program software of the embedded system, and synthesize an animation video, so that the influence of instructions in the program execution process on the register and the RAM can be visually checked, and students can effectively understand and master related instructions in the teaching and training process of the embedded system.

When the user uses the invention, only the appointed code file and hardware parameters are needed to be input, the invention completes the project establishment, starts the debugging simulation, single step debugging, interception of the register and RAM area through the operation of virtual keys, mouse and the like, compares the difference of the register and RAM before and after each step of execution, marks the difference part, and combines to complete the output of the final animation.

Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the method is convenient to use, and the change videos of the RAM, the register and the like in the single-step debugging process of the embedded system program can be obtained only by inputting the program and the specified parameters every time, so that the time spent by manual comparison of a user is greatly reduced, a beginner can conveniently understand the program, the program error searching and effect inspection are facilitated, and the method has auxiliary significance for developing training.

Drawings

FIG. 1 is a flow chart of the operation of the present invention;

FIG. 2 is a system parameter setting interface of the present invention;

FIG. 3 is a composite image of an embodiment of the present invention when instructions are not executed;

FIG. 4 is a composite image after executing an instruction according to an embodiment of the present invention;

FIG. 5 is a composite image after executing two instructions according to an embodiment of the present invention;

FIG. 6 is a composite image after execution of three instructions according to an embodiment of the present invention.

Detailed Description

The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.

The invention aims to record the execution instruction position (through a PC value) of a simulation program and values of machine codes and storage areas such as a register, an RAM and the like in the simulation process in real time in the simulation process of the program software of the embedded system, and synthesize an animation video, so that the influence of the instruction on the register and the RAM in the program execution process can be visually checked, and students can effectively understand and master related instructions in the teaching and training process of the embedded system.

Preferably, the compiling simulation software selected by the invention is keil software.

The specific implementation flow is shown in fig. 1. The detailed description is as follows:

the invention provides a method for generating a RAM and register change animation in simulation operation, which comprises the following steps:

step 1: the comparison system is turned on and the parameter setting interface is selected, as shown in fig. 2. The setting parameters comprise selection of a chip, file names and paths of simulation running programs, simulation duration and maximum execution steps, a monitoring range of the RAM and the size of a display area of the RAM.

Step 2: the system automatically opens a project of newly building a specified chip by compiling simulation software, loads a program file, compiles and links.

And step 3: the system automatically sets the initial value of the step count N to 0 and starts timing. Setting a display interface of the compiling simulation software, enabling the compiling simulation software to display the register and the memory data area, displaying the memory data area at a default position, and adjusting the size of a display area of the memory data area according to the setting (for example, each row displays 8 bytes, and 16 rows are displayed).

And 4, step 4: the system controls the compiling simulation software to execute one step through the virtual key and the mouse, and the step number count N is increased by one.

And 5: the system automatically intercepts the pictures of the register and the RAM area. And intercepting a Register area, storing the Register area as a picture file with a prefix of N _ Register, and defining the picture file as an N _ Register image. The method comprises the steps that the content of an RAM area is displayed in batches according to the size of a set RAM display area, screenshot is conducted in sequence, prefixes of pictures obtained through screenshot are named as N _ 0001-N _000N and defined as N _ 0001-N _000N images, the N _ 0001-N _000N images are synthesized into an image file with the prefix name of N _ RAM from small to large and defined as an N _ RAM image;

step 6: respectively comparing the difference between the N _ Register image and the N _ RAM image of the current step N and the previous step N-1 by the system (if N is the first step, the current step is ignored); and marks the difference on the N _ Register image and the N _ RAM image.

And 7: the system obtains the current PC value from the N _ Register image using OCR technology and records the current PC pointer value as N _ PC.

And 8: and (4) if the number of the execution steps reaches the standard or the execution time reaches the standard, executing the next step, or else executing the step (4).

And step 9: and generating a program diagram. The program diagram includes an instruction address, instruction machine code, and an instruction. And are sequentially arranged. Wherein the instructions are imported through a designated code file (removing empty lines in the code file, redundant space symbols). The system finds the machine code of the instruction by looking up the instruction table (where the pseudo instructions such as ORG, DB, etc. do not generate machine code). The system calculates the starting address of the corresponding instruction through the ORG pseudo instruction and the byte length of the instruction. After that, a program diagram is generated.

Step 10: and (6) video synthesis. The program map, the N _ Register image of the marked Register map, and the N _ RAM image are merged into one picture of N _ Compound, and a solid arrow is added before an instruction address position equal to the N _ PC value and the instruction is displayed bold, and an arrow of an instruction address position equal to the previous PC value and a dotted line is added (if the PC value is not changed or the first instruction is executed, the arrow of the dotted line is not displayed). The composite video is composed in a way of 30 frames per second, wherein 30 frames in the Nth second are all corresponding images N _ Compound (an instruction is executed).

Example (b):

keil is used as compiling simulation software, and 89C51 is used as a chip for explanation. Wherein the 89C51 assembler is as follows:

a first procedure:

ORG 0000H

MAIN:MOV A,#0FFH

MOV 31H,#33H

SJMP$

END

89C51 is selected in the parameter setting interface, the RAM area is set to be displayed as 16 rows and 8 columns, and the monitoring range of the RAM is set to be 00-7 FH. The program simulation time of the embodiment is set to 30S, the upper limit of the simulation step number is set to 30S, and finally the address and the file name of the specified code file are selected. Click the "start animation" button.

When the instructions have not been executed, the first second image of the synthesized video is as shown in FIG. 3. Where the solid arrow points to the first instruction according to the current PC value 0000H.

When an instruction is executed, the second image of the synthesized video is as described in fig. 4. Where the solid arrow points to the next instruction to be executed (the second instruction) based on the current PC value of 0002H. The dashed arrow points to the instruction immediately preceding the completion of execution. The value of register A changes from 00H to FFH; the user can easily conclude that the last executed instruction MOV A, # FFH has the effect of changing the value in register A to FF.

The third second image of the composed video after executing the two instructions is as described in fig. 5. Wherein the solid arrow points to the next upcoming instruction SJMP $, depending on the current PC value 0005H. The dashed arrow points to the instruction immediately preceding the completion of execution. The value of the 30H position in the RAM is changed from 00 to 33; the user can easily conclude that the last executed instruction MOV 30, #33H has the effect of replacing the value of the 30 position in RAM with 33.

When the three instructions are executed, the fourth second image of the synthesized video is as described in fig. 6. Wherein the solid arrow continues to point to SJMP $accordingto the current PC value 0005H, and the dotted arrow disappears as the last solid arrow. Therefore, the user can easily conclude that the value of PC has not changed before and after the execution of the instruction, but that states has changed.

The final output video is the composite video of each image. The composite video is composed in 30 frames per second, where the 30 frames of the nth second are the corresponding images N _ Compound. The 30 frames in the first second are all the synthesized pictures shown in fig. 3.

Claims (1)

1. A method for generating animation of RAM and register change in simulation operation is characterized by comprising the following steps:

step 1, selecting a chip for running a program, simulating a running program file, compiling simulation software, simulating time, maximum execution steps, a monitoring range of an RAM and the size of a display area of the RAM;

step 2, opening the compiling simulation software, newly building a chip project specified in the step 1, loading a program file to be simulated and run, and compiling and linking;

step 3, setting an initial value of the step count N to be 0, starting timing, setting a display interface of the compiling simulation software, enabling the compiling simulation software to display the register and the memory data area, displaying the memory data area at a default position, and adjusting the size of a display area of the memory data area according to the setting;

step 4, controlling the compiling simulation software to execute one step, and adding one to the step number count N;

step 5, intercepting a Register area picture and an RAM area picture displayed by compiling simulation software, storing the Register area picture as a picture file with a prefix of N _ Register, defining the picture as an N _ Register image, displaying the RAM area content in batches according to the size of a set RAM display area, sequentially intercepting pictures, sequentially naming the prefixes of the pictures obtained by intercepting the pictures as N _ 0001-N _000N and defining the pictures as N _ 0001-N _000N images, and synthesizing the N _ 0001-N _000N images into an image file with a prefix name of N _ RAM from small to large, and defining the image file as an N _ RAM image;

step 6, if the current step is not the first step, comparing the N _ Register image and the N _ RAM image of the current step with the N _ Register image and the N _ RAM image obtained in the previous step to obtain an image difference position, and marking a difference position on the N _ Register image and the N _ RAM image of the current step; if the current step is the first step, entering step 7;

step 7, obtaining a current PC value from the N _ Register image by using an OCR technology, and recording the current PC pointer value as N _ PC;

step 8, judging whether the number of the execution steps reaches the standard or the execution time reaches the standard, if so, executing the next step, otherwise, executing the step 4;

step 9, generating a program diagram

The program diagram comprises an instruction address, an instruction machine code and an instruction which are sequentially arranged, wherein the instruction is imported through a specified code file; finding the machine code of the instruction by inquiring the instruction table; calculating the initial address of the corresponding instruction according to the ORG pseudo instruction and the byte length of the instruction, and then generating a program diagram;

step 10, video synthesis

Merging the program diagram, the marked N _ Register image and the N _ RAM image into a picture N _ Compound image, adding a solid arrow in front of an instruction address position equal to the N _ PC value, and roughly displaying the instruction, and adding a dotted arrow in the instruction address position equal to the previous PC value, if the PC value is not changed or the first instruction is executed, not displaying the dotted arrow, and synthesizing the video in a mode of 30 frames per second, wherein the 30 frames in the Nth second are all corresponding N _ Compound images.

Images