CN110133014B - Method and system for detecting internal defects of chip - Google Patents
Method and system for detecting internal defects of chip Download PDFInfo
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- CN110133014B CN110133014B CN201910336438.XA CN201910336438A CN110133014B CN 110133014 B CN110133014 B CN 110133014B CN 201910336438 A CN201910336438 A CN 201910336438A CN 110133014 B CN110133014 B CN 110133014B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
- G01R31/311—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of integrated circuits
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
- G01N23/04—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
- G01N23/046—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material using tomography, e.g. computed tomography [CT]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/303—Contactless testing of integrated circuits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/10—Image acquisition modality
- G06T2207/10116—X-ray image
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
Abstract
The chip internal defect detection method and the chip internal defect detection system provided by the invention are based on an X-ray absorption imaging principle, carry out projection imaging on a chip to be detected by utilizing X-rays at a plurality of irradiation angles, reconstruct tomographic image information, obtain a high-resolution three-dimensional image through processing of superposition, denoising and the like of the tomographic image, rapidly extract the three-dimensional information of the internal defects of the packaged chip, improve the working efficiency, have the characteristics of wide application range, high popularization and mobility and are suitable for detection of various electronic components.
Description
Technical Field
The invention relates to the field of industrial detection, in particular to a method and a system for detecting internal defects of a chip.
Background
Chip manufacturing technology is moving towards the goals of high density, miniaturization, high speed automation, high yield, high reliability, and long lifetime. The manufacturing process of the precision chip is very complicated, and different defects caused by different processes, such as gold bar fracture, component dislocation, pin inclination and the like, and a series of defects generated by heat generation after use directly affect the efficiency and the service life of the chip. Therefore, the automatic and accurate detection of defects in a chip is a very important task, although complex.
The traditional chip defect detection method generally adopts a manual detection method, so that the speed is low, the efficiency is low and the accuracy is poor. Some common visible light-based non-contact detection methods improve accuracy, speed, stability and the like, but can only detect two-dimensional surface defects, and cannot detect the packaged internal chip structure. For the detection of internal defects after chip packaging, an effective technical means is lacked at present.
Disclosure of Invention
The embodiment of the invention provides a method and a system for detecting internal defects of a chip, which can quickly extract three-dimensional information of the internal defects of the chip.
In a first aspect, the present invention provides a method for detecting internal defects of a chip, the method comprising:
controlling a chip to be tested to rotate, and irradiating the chip to be tested by utilizing X-rays when the chip to be tested rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles;
splitting the two-dimensional projection image corresponding to each illumination angle to obtain a one-dimensional projection, and forming a one-dimensional projection sequence by the one-dimensional projection sequence, wherein the one-dimensional projection represents projection information of a fault of the chip to be detected;
respectively reconstructing two-dimensional images of corresponding faults of the chip to be tested according to the one-dimensional projections corresponding to different illumination angles;
and reconstructing a three-dimensional image of the chip to be detected by using the two-dimensional images of all the faults, wherein the three-dimensional image is used for determining whether the chip to be detected has internal defects.
As an optional scheme, the controlling the chip to be tested to rotate, and when the chip to be tested rotates by a preset angle, the chip to be tested is irradiated by using an X-ray to obtain a plurality of two-dimensional projection images with different irradiation angles, includes:
the exposure interval of X-rays is preset, the chip to be detected rotates around the central line of the chip at a constant speed, the X-rays emitted by the radioactive source irradiate the chip to be detected according to the preset exposure interval, and the detector detects a plurality of two-dimensional projection images with different irradiation angles.
As an alternative, the rotation axis of the chip to be tested is perpendicular to the connecting line between the radiation source and the center of the detector.
As an optional scheme, the reconstructing the two-dimensional images of the corresponding slices of the chip to be measured according to the one-dimensional projections corresponding to the multiple illumination angles includes:
and reconstructing a two-dimensional image of the corresponding fault by adopting a filtering back projection algorithm and the projection information.
As an alternative, the reconstructing a two-dimensional image of a corresponding slice by using a filtered back-projection algorithm and the projection information includes:
and performing one-dimensional Fourier transform on each one-dimensional projection of the fault, performing windowing processing by using a filter function, performing inverse Fourier transform to obtain a filtered projection image, performing back projection processing on the projection image to obtain density distribution information of the fault image in the corresponding projection direction, and performing superposition reconstruction on all back projections to obtain a two-dimensional image of the fault.
As an optional solution, the method further comprises:
and converting the original three-dimensional model image of the chip to be tested between the space physical size and the image scale according to the calibration coefficient of the fault reconstruction three-dimensional image to obtain an original three-dimensional point cloud image taking the pixel as a unit.
As an optional solution, the method further comprises:
and performing three-dimensional geometric correction on the three-dimensional image obtained by reconstructing the chip to be detected and the original three-dimensional point cloud image, and performing sub-pixel level comparison operation on the correction process to obtain defect information between the chip to be detected and the original three-dimensional model image.
As an optional scheme, before performing three-dimensional geometric correction on the three-dimensional image obtained by reconstructing the chip to be detected and the original three-dimensional point cloud image, and performing sub-pixel level comparison operation on the correction process to obtain defect information between the chip to be detected and the original three-dimensional model image, the method further includes:
and carrying out three-dimensional point cloud registration on the three-dimensional image.
In a second aspect, the invention provides a system for detecting internal defects of a chip, which comprises a radioactive source, a rotary table for placing the chip to be detected, a detector and an upper computer, wherein the rotary table drives the chip to be detected to rotate, X-rays emitted by the radioactive source irradiate the chip to be detected according to a preset exposure interval, the detector sends a two-dimensional projection image obtained by irradiation to the upper computer, the upper computer splits the two-dimensional projection image corresponding to each irradiation angle to obtain a one-dimensional projection sequence, the one-dimensional projections corresponding to different irradiation angles are obtained to respectively reconstruct two-dimensional images of corresponding faults of the chip to be detected, the two-dimensional images of all the faults are used for reconstructing three-dimensional images of the chip to be detected, and the three-dimensional images are used for determining whether the chip to be detected has internal defects or not, wherein the one-dimensional projection represents projection information of a fault of the chip to be measured.
According to the technical scheme, the embodiment of the invention has the following advantages:
the chip internal defect detection method and the chip internal defect detection system provided by the invention are based on an X-ray absorption imaging principle, carry out multi-angle projection imaging on a chip to be detected by utilizing X-rays, reconstruct tomographic image information, obtain a high-resolution three-dimensional image through processing such as superposition and denoising of the tomographic image, rapidly extract the three-dimensional information of the internal defect of the packaged chip, improve the working efficiency, have the characteristics of wide application range, strong popularization and mobility and are suitable for detection of various electronic components.
Drawings
FIG. 1 is a flow chart of one embodiment of a method for detecting defects in a chip according to the present invention;
FIG. 2 is a flow chart of another embodiment of a method for detecting defects inside a chip according to the present invention;
FIG. 3 is a flow chart of a method for detecting defects in a chip according to another embodiment of the present invention;
FIG. 4 is a schematic diagram of a two-dimensional image of a cross-section obtained by a filtering back-projection method in the method for detecting the internal defect of the chip according to the present invention;
FIG. 5 is a schematic diagram of an embodiment of image registration performed by the method for detecting internal defects of a chip according to the present invention;
fig. 6 is a structural diagram of an embodiment of a chip internal defect detection apparatus provided by the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Referring to fig. 1, an embodiment of a method for detecting a chip internal defect provided in the embodiment of the present invention includes:
s101, controlling a chip to be tested to rotate, and irradiating the chip to be tested by utilizing X-rays when the chip to be tested rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles.
The chip to be tested can be a packaged chip or an unpackaged chip, a radioactive source radiates X to shoot, imaging is carried out by a detector, the chip to be tested is placed on a rotary table, the rotary table can realize precise angle rotation, the chip to be tested rotates, when the chip to be tested rotates by a preset angle, the chip to be tested is irradiated by X rays to obtain a plurality of two-dimensional projection images with different irradiation angles, the irradiation angle of each two-dimensional projection image is unique, for example, the preset angle is set to be 1 degree, 360 times of irradiation is needed when the chip to be tested rotates for one circle, an exposure interval is determined according to the rotation speed and the preset angle of the chip to be tested, one-time X shooting exposure is carried out when the chip to be tested rotates by the preset angle, namely, the two-dimensional projection image of one angle is correspondingly collected, and the two-dimensional projection image of the angle of 1 degree is obtained, the next exposure interval is 2 degrees corresponding to the two-dimensional projection image, in one implementation mode, a uniform rotation mode can be adopted, specifically, the exposure interval of X rays is preset, the rotary table rotates at a uniform speed to enable the chip to be detected to rotate around the central line of the rotary table, the chip to be detected can rotate by a certain angle during one exposure, the angle for collecting the image of the chip to be detected each time can be the same, the X rays emitted by the radioactive source irradiate the chip to be detected according to the preset exposure interval, the detector detects a plurality of two-dimensional projection images with different angles, the angle and the exposure interval required by the equal angle can be set according to requirements, the more shooting angles are, the higher the resolution of the three-dimensional image of the chip to be detected is obtained through reconstruction, when the rotating speed of the chip to be detected is variable speed, the exposure interval can be determined according to the rotating speed and the preset angle, when the rotating speed is high, the corresponding exposure interval is reduced, and the exposure interval is dynamically adjusted so as to achieve the purpose of irradiating the chip to be detected at the same angle.
The rotation axis of the chip to be tested is the vertical direction of the central connecting line of the radioactive source and the detector, and the specific position of the central connecting line can be flexibly selected according to the requirement without limitation.
S102, splitting the two-dimensional projection image corresponding to each illumination angle to obtain a one-dimensional projection, and forming a one-dimensional projection sequence by the one-dimensional projection, wherein the one-dimensional projection represents projection information of a fault of the chip to be measured.
The method comprises the steps of dividing a chip to be detected into a plurality of faults, wherein each fault is provided with a plurality of two-dimensional projection images with different irradiation angles, splitting the two-dimensional projection image corresponding to each irradiation angle to obtain a one-dimensional projection, obtaining a two-dimensional projection image formed by a certain fault of the chip to be detected under the irradiation of X rays by a detector, converting one-dimensional Fourier of the two-dimensional projection image into one slice in two-dimensional Fourier transform of the fault image, and enabling each irradiation angle to correspond to one slice.
S103, reconstructing two-dimensional images of corresponding faults of the chip to be measured according to the one-dimensional projections corresponding to different illumination angles.
The two-dimensional image of the corresponding fault can be reconstructed by adopting a filtering back projection algorithm and the projection information, one-dimensional Fourier transform is carried out on each one-dimensional projection of the fault, then windowing is carried out by utilizing a filter function, inverse Fourier transform is carried out to obtain a filtered projection image, back projection processing is carried out on the projection image to obtain density distribution information of the fault image in the corresponding projection direction, and all back projections are superposed and reconstructed to obtain the two-dimensional image of the fault. Specifically, slices obtained by the same fault under different irradiation angles are determined into a group, and each group of one-dimensional projection can be reconstructed to obtain a two-dimensional image of the fault, so that the two-dimensional images of all the faults can be reconstructed.
S104, reconstructing a three-dimensional image of the chip to be detected by using the two-dimensional images of all the faults, wherein the three-dimensional image is used for determining whether the chip to be detected has internal defects.
In order to simplify the processing process, because the thickness of the chip is small, too many tomographic images can be not needed, the calculated amount is reduced, and after the three-dimensional image is obtained, the three-dimensional image can be compared with an original three-dimensional model image of the chip to be detected to determine whether internal defects occur, wherein the internal defects can be false soldering, dislocation and the like.
The chip internal defect detection method provided by the invention is based on an X-ray absorption imaging principle, utilizes X-rays to perform multi-irradiation-angle projection imaging on a chip to be detected, reconstructs tomographic image information, obtains a high-resolution three-dimensional image through processing such as superposition and denoising of the tomographic image, quickly extracts the three-dimensional information of the internal defect of the packaged chip, has wide application range, strong popularization and mobility and is suitable for detection of various electronic components.
Referring to fig. 2, in another embodiment of the method for detecting a chip internal defect in the embodiment of the present invention, the method includes:
s201, controlling a chip to be tested to rotate, and irradiating the chip to be tested by utilizing X-rays when the chip to be tested rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles.
Step S201 is similar to step S101 in the previous embodiment, and is not described herein again.
S202, splitting the two-dimensional projection image corresponding to each illumination angle to obtain a one-dimensional projection, and forming a one-dimensional projection sequence by the one-dimensional projection, wherein the one-dimensional projection represents projection information of a fault of the chip to be measured.
Step S202 is similar to step S102 in the previous embodiment, and is not described herein.
And S203, respectively reconstructing two-dimensional images of corresponding faults of the chip to be detected according to the one-dimensional projections corresponding to different illumination angles.
Step S203 is similar to step S103 in the previous embodiment, and is not described herein.
S204, reconstructing a three-dimensional image of the chip to be detected by using the two-dimensional images of all the faults, wherein the three-dimensional image is used for determining whether the chip to be detected has internal defects.
Step S204 is similar to step S104 in the previous embodiment, and is not described herein.
S205, performing three-dimensional geometric correction on the three-dimensional image obtained by the reconstruction of the chip to be detected and the original three-dimensional point cloud image, and performing sub-pixel level comparison operation on the correction process to obtain defect information between the chip to be detected and the original three-dimensional model image.
The method comprises the steps of converting an original three-dimensional model image of a chip to be detected between a space physical size and an image scale according to a calibration coefficient of a fault reconstruction three-dimensional image to obtain an original three-dimensional point cloud image with pixels as units, carrying out three-dimensional geometric correction on the three-dimensional image reconstructed by the chip to be detected and the original three-dimensional point cloud image, and carrying out sub-pixel level comparison operation on a correction process to obtain defect information between the chip to be detected and the original three-dimensional model image.
By utilizing the three-dimensional point cloud matching mode, the images can be better compared, and the defects in the chip can be found.
Referring to fig. 3, in another embodiment of the method for detecting a chip internal defect in the embodiment of the present invention, the method includes:
s301, controlling a chip to be tested to rotate, and irradiating the chip to be tested by utilizing X-rays when the chip to be tested rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles.
Step S301 is similar to step S101 in the previous embodiment, and is not described herein.
S302, splitting the two-dimensional projection image corresponding to each illumination angle to obtain a one-dimensional projection, and forming a one-dimensional projection sequence by the one-dimensional projection, wherein the one-dimensional projection represents projection information of a fault of the chip to be measured.
Step S302 is similar to step S102 in the previous embodiment, and is not described here.
And S303, respectively reconstructing two-dimensional images of corresponding faults of the chip to be detected according to the one-dimensional projections corresponding to different illumination angles.
Step S303 is similar to step S103 in the previous embodiment, and is not described herein.
S304, reconstructing a three-dimensional image of the chip to be detected by using the two-dimensional images of all the faults, wherein the three-dimensional image is used for determining whether the chip to be detected has internal defects.
Step S304 is similar to step S104 in the previous embodiment, and is not described herein.
And S305, carrying out three-dimensional point cloud registration on the three-dimensional image.
In a plurality of application fields of machine vision, such as stereo matching, image registration, shape recognition and the like, point cloud registration operation is always a key step. Point cloud registration is to match the coordinates of one point cloud (test point set) to the coordinates of another point cloud (reference point set), so as to achieve the consistency of the coordinates of the two point clouds, and the registration accuracy directly affects the reliability of subsequent error analysis. At present, common registration methods include a genetic algorithm, a least square matching method, a three-point alignment method and an ICP algorithm, the essence of registration is to transform a coordinate system of data point clouds measured in different coordinate systems to obtain an overall data model, and the key of the problem is how to obtain parameters R (rotation matrix) and T (translation vector) of coordinate transformation, so that the distance of three-dimensional data measured at two viewing angles after coordinate transformation is minimum, and the current registration algorithm can be divided into overall registration and local registration according to the process.
The specific implementation steps of the three-dimensional point cloud registration are 1, extracting key points from two data sets according to the same key point selection standard; 2. respectively calculating feature descriptors of all selected key points, wherein in the steps 1 and 2, feature points are not necessarily selected, and original point cloud data are directly adopted, and a registration algorithm is specifically relied on; 3. estimating the corresponding relation of the coordinate positions of the feature descriptors in the two data sets by combining the coordinate positions of the feature descriptors in the two data sets and taking the similarity of the features and the positions between the feature descriptors and the positions as the basis, and preliminarily estimating corresponding point pairs; 4. assuming that the data is noisy, the corresponding point pairs of errors that have an effect on the registration are removed; 5. and estimating rigid body transformation by using the residual correct corresponding relation, and completely registering.
S306, performing three-dimensional geometric correction on the three-dimensional image obtained by the reconstruction of the chip to be detected and the original three-dimensional point cloud image, and performing sub-pixel level comparison operation on the correction process to obtain defect information between the chip to be detected and the original three-dimensional model image.
With reference to fig. 4, the original three-dimensional model map of the chip to be tested is converted between the space physical size and the image scale according to the calibration coefficient of the tomographic reconstruction three-dimensional image to obtain an original three-dimensional point cloud map with pixels as units, the three-dimensional image reconstructed by the chip to be tested and the original three-dimensional point cloud map are subjected to three-dimensional geometric correction, and a sub-pixel level comparison operation is performed on the correction process to obtain defect information between the chip to be tested and the original three-dimensional model map.
Referring to fig. 5, in this embodiment, a two-dimensional image of a sample slice corresponding to projection information is reconstructed by using a filtered back-projection algorithm. The filtering back projection algorithm comprises the following specific processes: 1. calculating one-dimensional Fourier transform C of each projection image A of the fault under the spatial domain; 2. in a frequency domain, multiplying a filter function by each Fourier transform to obtain a D function, namely windowing, so that a reconstructed tomogram is prevented from blurring; 3. carrying out inverse Fourier transform on the D function to obtain a filtered projection image B; 4. and carrying out direct back projection on each filtered projection image B to obtain density distribution information of the tomographic image in the corresponding projection direction. 5. And superposing all back projections to reconstruct a tomographic image.
The chip internal defect detection method provided by the invention is based on an X-ray absorption imaging principle, utilizes X-rays to perform projection imaging at a plurality of irradiation angles on a chip to be detected, reconstructs tomographic image information, and obtains a high-resolution three-dimensional image through processing of superposition, denoising and the like of the tomographic image, quickly extracts the three-dimensional information of the internal defect of the packaged chip, and is wide in application range, strong in popularization and mobility, and applicable to detection of various electronic components.
The invention provides a system for detecting internal defects of a chip correspondingly by combining with the figure 6, which comprises a radioactive source 1, a rotary table 2 for placing a chip 5 to be detected, a detector 3 and an upper computer 4, wherein the rotary table 2 drives the chip 5 to be detected to rotate, X-rays emitted by the radioactive source 1 irradiate the chip 5 to be detected according to a preset exposure interval, the detector 3 sends a two-dimensional projection image obtained by irradiation to the upper computer 4, the upper computer 4 splits the two-dimensional projection image corresponding to each irradiation angle to obtain a one-dimensional projection, the one-dimensional projection sequence forms a one-dimensional projection sequence, the one-dimensional projections corresponding to different irradiation angles are obtained to respectively reconstruct two-dimensional images of corresponding faults of the chip to be detected, the three-dimensional images of all the faults are used for reconstructing three-dimensional images of the chip 5 to be detected, and the three-dimensional images are used for determining whether the chip to be detected has internal defects or not, and the one-dimensional projection represents projection information of a fault of the chip to be detected.
The chip to be tested of the chip internal defect detection system is not limited to a packaged chip, but is also suitable for various other electronic components without being packaged, and the limitation is not made.
According to the chip internal defect detection system provided by the invention, the chip to be detected is irradiated by X-rays emitted by the radioactive source according to the preset exposure interval, the detector sends a two-dimensional projection image obtained by irradiation to the upper computer, the X-rays are utilized to carry out projection imaging on the chip to be detected at a plurality of irradiation angles based on the X-ray absorption imaging principle, the tomographic image information is reconstructed, a high-resolution three-dimensional image is obtained by processing such as superposition and denoising of the tomographic image, the three-dimensional information of the internal defect of the packaged chip is rapidly extracted, and the working efficiency is improved.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable storage medium, and the storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
While the method and system for detecting internal defects of a chip provided by the present invention have been described in detail, those skilled in the art will appreciate that the various embodiments and applications of the method and system according to the present invention are not limited by the disclosure.
Claims (9)
1. A method for detecting internal defects of a chip, the method comprising:
controlling a chip to be tested to rotate, and irradiating the chip to be tested by utilizing X-rays when the chip to be tested rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles;
splitting the two-dimensional projection image corresponding to each illumination angle to obtain a one-dimensional projection, and forming a one-dimensional projection sequence by the one-dimensional projection, wherein the one-dimensional projection represents projection information of a fault of the chip to be detected;
respectively reconstructing two-dimensional images of corresponding faults of the chip to be tested according to the one-dimensional projections corresponding to different illumination angles;
reconstructing a three-dimensional image of the chip to be detected by using the two-dimensional images of all the faults, wherein the three-dimensional image is used for determining whether the chip to be detected has internal defects;
converting the original three-dimensional model image of the chip to be tested according to the calibration coefficient of the fault reconstruction three-dimensional image to obtain an original three-dimensional point cloud image;
and comparing the three-dimensional image obtained by reconstructing the chip to be tested with the original three-dimensional point cloud image to obtain defect information between the chip to be tested and the original three-dimensional model image.
2. The method for detecting the internal defect of the chip according to claim 1, wherein the step of controlling the chip to be detected to rotate and irradiating the chip to be detected with an X-ray every time the chip to be detected rotates by a preset angle to obtain a plurality of two-dimensional projection images with different irradiation angles comprises:
the exposure interval of X-rays is preset, the chip to be detected rotates around the central line of the chip at a constant speed, the X-rays emitted by the radioactive source irradiate the chip to be detected according to the preset exposure interval, and the detector detects a plurality of two-dimensional projection images with different irradiation angles.
3. The method according to claim 2, wherein the rotation axis of the chip under test is perpendicular to the line between the radiation source and the center of the detector.
4. The method for detecting the internal defect of the chip according to claim 1, wherein the reconstructing the two-dimensional image of the corresponding fault of the chip to be detected according to the one-dimensional projections corresponding to the different illumination angles comprises:
and reconstructing a two-dimensional image of the corresponding fault by adopting a filtering back projection algorithm and the projection information.
5. The method for detecting the internal defect of the chip according to claim 4, wherein the reconstructing the two-dimensional image of the corresponding fault by using the filtered back projection algorithm and the projection information comprises:
and performing one-dimensional Fourier transform on each one-dimensional projection of the fault, performing windowing processing by using a filter function, performing inverse Fourier transform to obtain a filtered projection image, performing back projection processing on the projection image to obtain density distribution information of the fault image in the corresponding projection direction, and performing superposition reconstruction on all back projections to obtain a two-dimensional image of the fault.
6. The method of detecting defects inside a chip according to claim 4, further comprising:
and converting the original three-dimensional model image of the chip to be tested between the space physical size and the image scale according to the calibration coefficient of the fault reconstruction three-dimensional image to obtain an original three-dimensional point cloud image taking the pixel as a unit.
7. The method of detecting defects inside a chip according to claim 6, further comprising:
and performing three-dimensional geometric correction on the three-dimensional image obtained by reconstructing the chip to be detected and the original three-dimensional point cloud image, and performing sub-pixel level comparison operation on the correction process to obtain defect information between the chip to be detected and the original three-dimensional model image.
8. The method according to claim 7, wherein before the three-dimensional geometric correction is performed on the three-dimensional image reconstructed by the chip to be tested and the original three-dimensional point cloud image, and the sub-pixel level comparison operation is performed on the correction process to obtain the defect information between the chip to be tested and the original three-dimensional model image, the method further comprises:
and carrying out three-dimensional point cloud registration on the three-dimensional image.
9. A chip internal defect detection system is characterized by comprising a radioactive source, a rotary table for placing a chip to be detected, a detector and an upper computer, wherein the rotary table drives the chip to be detected to rotate, X-rays emitted by the radioactive source irradiate the chip to be detected according to a preset exposure interval, the detector sends a two-dimensional projection image obtained by irradiation to the upper computer, the upper computer splits the two-dimensional projection image corresponding to each irradiation angle to obtain a one-dimensional projection sequence, the one-dimensional projection sequence forms a one-dimensional projection sequence, the one-dimensional projections corresponding to different irradiation angles are obtained to respectively reconstruct a two-dimensional image of a corresponding fault of the chip to be detected, the two-dimensional images of all the faults are used for reconstructing a three-dimensional image of the chip to be detected, and the three-dimensional image is used for determining whether the chip to be detected has internal defects or not, converting the original three-dimensional model image of the chip to be tested according to the calibration coefficient of the fault reconstruction three-dimensional image to obtain an original three-dimensional point cloud image, and comparing the three-dimensional image obtained by reconstructing the chip to be tested with the original three-dimensional point cloud image to obtain defect information between the chip to be tested and the original three-dimensional model image, wherein the one-dimensional projection represents projection information of one fault of the chip to be tested.
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