CN110071064A - A method of improving epitaxial wafer and pollutes the marking - Google Patents
A method of improving epitaxial wafer and pollutes the marking Download PDFInfo
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- CN110071064A CN110071064A CN201810061254.2A CN201810061254A CN110071064A CN 110071064 A CN110071064 A CN 110071064A CN 201810061254 A CN201810061254 A CN 201810061254A CN 110071064 A CN110071064 A CN 110071064A
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- support frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
Abstract
The present invention provides a kind of method of improvement epitaxial wafer pollution marking, which comprises provides epitaxy machine platform, the epitaxy machine platform includes pedestal, the support frame for being used to support the pedestal and the chamber at the top of the pedestal；Coating is formed on the pedestal；Semiconductor substrate is provided, the semiconductor substrate is put into the chamber, epitaxial layer is formed in the semiconductor substrate surface, the epitaxial layer and the semiconductor substrate constitute epitaxial wafer, wherein during forming the epitaxial layer, the coating can stop and/or adsorb the contaminant particles of support frame as described above.Using method of the invention, before semiconductor substrate surface forms epitaxial layer, coating is formed on the base, the coating can stop and/or the contaminant particles of adsorbent support frame, to reduce the contaminant particles concentration in support frame as described above region, and then improve the pollution marking of the epitaxial wafer.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of method of improvement epitaxial wafer pollution marking.
Background technique
In field of manufacturing semiconductor devices, it will usually form one layer of monocrystalline silicon on a silicon substrate as epitaxial layer, epitaxial layer
Injection base area, emitter region etc. can be formed in subsequent carry out ion implantation doping.By monocrystalline silicon wafer in chemical vapor deposition
(CVD) in equipment, after being heated to certain temperature, it is passed through the gas in the molecule of monosilane etc containing silicon, monosilane passes through heat
Decomposing the silicon atom generated will be deposited on the surface of monocrystalline silicon wafer, and according to the sequence of silicon atom in monocrystalline silicon wafer
It lines up, so that monocrystalline silicon wafer thickens and becomes larger, the crystalline axis direction and the crystalline axis direction in base's monocrystalline silicon wafer of epitaxial layer
It is consistent.When needing epitaxial layer is n-type semiconductor, a small amount of phosphine gas or three can be mixed in silane gas
Arsonium；When needing epitaxial layer is p-type semiconductor, a small amount of diborane gas can be mixed in silane gas.And root
According to the needs of epitaxial layer, the doping concentration of above-mentioned gas can be arbitrarily adjusted, is had for one layer of regrowth on the Silicon Wafer of polishing
The monocrystalline silicon thin film of certain resistivity and thickness, to improve and regulate and control silicon wafer surface quality and electric conductivity, and utilizes
Epitaxy method increases the thickness of monocrystalline silicon wafer, is one of the measure for reducing large scale integrated circuit cost.
Wherein, the iron tramp concentration of epitaxial wafer is a key parameter for influencing material property, and current epitaxial wafer is raw
During production, in the prevalence of the problem that the iron tramp concentration of certain fixed positions is higher, these are fixed position and are known as concentration of iron
Abnormal distribution point, these concentration of iron abnormal distribution points will affect the surface quality and electric property of wafer, to influence most end form
At device surface quality and electric property.
The present invention provides a kind of method of improvement epitaxial wafer pollution marking, to solve the above technical problems.
Summary of the invention
A series of concept of reduced forms is introduced in Summary, this will in the detailed description section into
One step is described in detail.Summary of the invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection scope for attempting to determine technical solution claimed more.
The present invention provides a kind of method of improvement epitaxial wafer pollution marking, which comprises epitaxy machine platform is provided, it is described
Epitaxy machine platform includes pedestal, the support frame for being used to support the pedestal and the chamber at the top of the pedestal；In the base
Coating is formed on seat；Semiconductor substrate is provided, the semiconductor substrate is put into the chamber, in the semiconductor substrate table
Face forms epitaxial layer, and the epitaxial layer and the semiconductor substrate constitute epitaxial wafer, wherein in the process for forming the epitaxial layer
In, the coating can stop and/or adsorb the contaminant particles of support frame as described above.
Further, the coating includes polysilicon layer.
Further, the contaminant particles are metallic pollution particles.
Further, the epitaxial layer is monocrystalline silicon layer.
Further, the coating with a thickness of 0.5 μm -2 μm.
Further, the coating with a thickness of 3 μm -6 μm.
Further, the method for forming the coating and/or epitaxial layer includes chemical vapor deposition process.
Further, in the chemical vapor deposition process, sedimentation time 10s-20s；And/or depositing temperature is 950
℃‐1050℃；And/or reaction gas flow is 10gpm-30gpm.
Further, in the chemical vapor deposition process, sedimentation time 45s-90s；And/or depositing temperature is 1050
℃‐1150℃；And/or reaction gas flow is 30gpm-40gpm.
Further, in the chemical vapor deposition process, reaction gas includes trichlorosilane.
Further, support frame as described above includes open triangles support frame.
In conclusion according to the method for the present invention, before semiconductor substrate surface forms epitaxial layer, being formed on the base
Coating, the coating can stop and/or the contaminant particles of adsorbent support frame, to reduce the pollution grain in support frame as described above region
Sub- concentration, and then improve the pollution marking of the epitaxial wafer.
Detailed description of the invention
Following drawings of the invention is incorporated herein as part of the present invention for the purpose of understanding the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing:
Figure 1A -1B is the schematic diagram and corresponding top view of current extension blade technolgy；
Fig. 2 is the technical process schematic diagram for improving epitaxial wafer and polluting the marking of the invention；
Fig. 3 A-3D is the schematic cross sectional view for the epitaxial wafer that the step of method according to the present invention is successively implemented obtains respectively
And corresponding top view.
Specific embodiment
In the following description, a large amount of concrete details are given so as to provide a more thorough understanding of the present invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid confusion with the present invention, for some technical characteristics well known in the art not into
Row description.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to illustrate proposition of the present invention
Improvement epitaxial wafer impurity concentration method.Obviously, execution of the invention is not limited to the technical staff institute of semiconductor field
The specific details being familiar with.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention is also
It can have other embodiments.
It should be understood that when the term " comprising " and/or " including " is used in this specification, indicating described in presence
Feature, entirety, step, operation, element and/or component, but do not preclude the presence or addition of other one or more features, entirety,
Step, operation, element, component and/or their combination.
The iron tramp concentration of epitaxial wafer is a key parameter for influencing material property, and current epitaxial wafer production process
In, higher in the prevalence of the iron tramp concentration of certain fixed positions, these fix the problem of position is known as abnormal point, these are different
Often point will affect the electric property of wafer, to influence the electric property of finally formed device.
For example, as shown in Figure 1A, carrying out extension work using the epitaxy machine platform of 101 support base 102 of open triangles support frame
Skill, the epitaxial wafer back side of formation and/or front will appear three concentration of iron abnormal distribution points, it has been investigated that these three concentration of iron
Abnormal distribution point is consistent with support rack position.It is as shown in Figure 1B the top view of epitaxial wafer 103 in Figure 1A, the iron of dotted line frame region
Impurity 104 is three concentration of iron abnormal distribution points.After being tested with the back side the front of epitaxial wafer 103, discovery epitaxial wafer back
The iron tramp concentration in face is higher, and the number of the concentration of iron abnormal distribution point corresponds to 101 number of support frame, when support frame is
When one, two, four or more, the number of concentration of iron abnormal distribution point is also accordingly one, two, four or more
It is a.Infer accordingly, the iron tramp 104 of concentration of iron abnormal distribution is caused to be mainly derived from the epitaxial wafer back side, it is outer during extension
The iron tramp atomic particle for prolonging the piece back side is gradually diffused into epitaxial wafer front, and above-mentioned concentration of iron abnormal distribution point is known as support frame dirt
Dye transfer note.
Presence in view of the above problems, the invention proposes a kind of methods of improvement epitaxial wafer pollution marking, such as Fig. 2 institute
Show comprising following key step:
In step s 201, epitaxy machine platform is provided, the epitaxy machine platform includes pedestal, the support for being used to support the pedestal
Frame and the chamber at the top of the pedestal；
In step S202, coating is formed on the pedestal；
In step S203, semiconductor substrate is provided, the semiconductor substrate is put into the chamber, is partly led described
Body substrate surface forms epitaxial layer, and the epitaxial layer and the semiconductor substrate constitute epitaxial wafer, wherein forming the extension
During layer, the coating can stop and/or adsorb the contaminant particles of support frame as described above.
Further, the adsorption layer includes polysilicon layer.
Further, the contaminant particles are metallic pollution particles.
Further, the epitaxial layer is monocrystalline silicon thin film layer.
Further, the coating with a thickness of 0.5 μm -2 μm.
Further, the coating with a thickness of 3 μm -6 μm.
Further, the method for forming the coating and/or epitaxial layer includes chemical vapor deposition process.
Further, in the chemical vapor deposition process, sedimentation time 10s-20s；And/or depositing temperature is
950℃‐1050℃；And/or reaction gas flow is 10gpm-30gpm.
Further, in the chemical vapor deposition process, sedimentation time 45s-90s；And/or depositing temperature is
1050℃‐1150℃；And/or reaction gas flow is 30gpm-40gpm.
Further, in the chemical vapor deposition process, reaction gas includes trichlorosilane.
Further, support frame as described above includes open triangles support frame.
Further, it is formed by epitaxial layer and/or thickness, can according to need any selection, can be 0.5 μm -10 μm,
If selecting thin layer, thickness can choose 0.5 μm -2 μm, more specifically may be selected to be 1 μm, 1.5 μm；If selecting thick-layer, choosing
3 μm -6 μm are selected, more specifically may be selected to be 4 μm, 5 μm etc..
According to the method for the present invention, before semiconductor substrate surface forms epitaxial layer, coating is formed on the base, it is described
Coating can stop and/or the contaminant particles of adsorbent support frame, thus reduce the contaminant particles concentration in support frame as described above region, into
And improve the pollution marking of the epitaxial wafer.
Fig. 3 A- Fig. 3 C shows the epitaxial wafer that the step of successively implementing according to the method for the embodiment of the present invention obtains respectively
Schematic cross sectional view.
Firstly, as shown in Figure 3A, providing epitaxy machine platform, the epitaxy machine platform includes pedestal 302, is used to support the pedestal
302 support frame 301 and the chamber 305 at the top of the pedestal 302.
Specifically, support frame as described above 301 is open triangles support frame, and three branches of support frame are symmetrically dispersed in institute
State the bottom of pedestal 302.In the region being in contact with the pedestal 302, support frame as described above 301 has the surface area increased, uses
In improving the support effect to the pedestal 302, branch's number of support frame can also be one, two, four or more.
Further, the pedestal 302 structure low between the senior middle school of both sides, successively successively decreased and two sides are in from both sides to centre
Axial symmetry distribution.Illustratively, the middle section of the pedestal 302 is made of the silicon carbide or graphite-structure of porous structure.
Next, as shown in Figure 3B, forming coating 306 on the pedestal 302, the coating 306 can stop or inhale
The contaminant particles of attached support frame as described above 301, can also stop and adsorb the contaminant particles of support frame as described above 301, thus described in reducing
The pollution marking in support frame region improves the surface quality and electric property of epitaxial wafer.
Wherein, the coating includes polysilicon layer, and the contaminant particles are metallic pollution particles, and the epitaxial layer is monocrystalline
Silicon membrane layer is formed by epitaxial layer and/or thickness, can according to need any selection, can be 0.5 μm -10 μm, if selection is thin
Layer, thickness can choose 0.5 μm -2 μm, more specifically may be selected to be 1 μm, 1.5 μm；If selecting thick-layer, 3 μm of -6 μ is selected
M more specifically may be selected to be 4 μm, 5 μm etc..The method for forming the coating and/or epitaxial layer includes chemical vapor deposition work
Skill.
In the present embodiment, the coating is that thin layer in the chemical vapor deposition process, has when forming thin layer
Three kinds select: (1) sedimentation time is 10s-20s, such as 15s；(2) depositing temperature is 950 DEG C -1050 DEG C, such as 1000 DEG C；(3) anti-
Answering gas flow is 10gpm-30gpm, such as 20gpm.Above-mentioned three kinds of selections individually can control to form thin layer, can also two
Two are used cooperatively or three while implementing to forming ideal thin layer.
In another embodiment, the coating is thick-layer, when forming thick-layer, in the chemical vapor deposition process,
There are three types of select: (1) sedimentation time is 45s-90s, such as 50s, 70s, 80s；(2) depositing temperature is 1050 DEG C -1150 DEG C, such as
1100℃；(3) reaction gas flow is 30gpm-40gpm, such as 35gpm, and above-mentioned three kinds of selections individually can control to be formed
Thick-layer can also be used cooperatively two-by-two or three while implement to forming ideal thick-layer.
Forming the increased polysilicon layer of thickness can be using extension sedimentation time, raising depositing temperature or increase gas flow
It realizes.It should be noted that can individually change sedimentation time, depositing temperature or gas during forming polysilicon layer
In these parameters of flow one of them or change simultaneously two or more parameters, to obtain the increased polysilicon layer of thickness,
To the preferably contaminant particles in blocking and/or adsorbent support frame region, and then reduction support frame as described above regional pollution population
To avoid semiconductor substrate from being diffused into undesirable iron tramp in chemical vapor deposition processes, pollution print is avoided the formation of
Note, further increases surface quality and electric property.
In the above two embodiments, the carrier gas of the chemical vapor deposition process includes hydrogen, reaction gas be comprising
The gas of element silicon, e.g. SiH4、Si2H6、Si2H6Cl2、SiHCl3、SiCl4Equal gases, in the present embodiment, reaction gas
For trichlorosilane (TCS).Above-mentioned coating formation process can be used in the formation process of the epitaxial layer.Support frame as described above packet
Include open triangles support frame.
It can be seen that coating 306 can reduce pedestal in subsequent epitaxy technique to the influence of epitaxial wafer, can also hinder
Gear and/or the contaminant particles in adsorbent support frame region improve epitaxial wafer to reduce the pollution marking in support frame as described above region
Surface quality and electric property.
Finally, as shown in Figure 3 C, providing semiconductor substrate 303, the semiconductor substrate 303 being put into the chamber 305
In, epitaxial layer (not shown), 303 structure of the epitaxial layer and the semiconductor substrate are formed on 303 surface of semiconductor substrate
At epitaxial wafer, wherein the coating 306 can stop and/or adsorb support frame as described above during forming the epitaxial layer
The contaminant particles in region, to reduce the pollution marking in support frame as described above region, to improve the surface quality and electricity of epitaxial wafer
Learn performance.
Specifically, the constituent material of the semiconductor substrate 303 can using silicon (Si), germanium (Ge) or SiGe (GeSi),
Silicon carbide (SiC)；It is also possible to silicon-on-insulator (SOI), germanium on insulator (GOI)；It or can also be other materials, example
Such as III-V compounds of group of GaAs, in the present invention, the semiconductor substrate select single crystal silicon material to constitute.Illustratively,
The semiconductor substrate 303 is the Silicon Wafer that diameter is 300mm.
Before forming the epitaxial layer, the natural oxidizing layer for removing the semiconductor substrate surface is also needed.Usual situation
Under, silicon substrate, which is chronically exposed among air, to form the natural oxidizing layer of layer by the dioxygen oxidation in air, removed
The natural oxidizing layer can make to contact between the epitaxial layer being subsequently formed and silicon substrate with good, and silicon can be improved
The quality of substrate.In the present embodiment, the method for removing the natural oxidizing layer is polished to the semiconductor substrate, such as
Gas phase polishing is carried out to the semiconductor substrate surface using HCl.
Further, the epitaxial layer is monocrystalline silicon thin film.The reaction gas that the chemical vapor deposition process uses is packet
Gas containing element silicon, e.g. SiH4、Si2H6、Si2H6Cl2、SiHCl3、SiCl4Equal gases, the reaction gas of the present embodiment are
Trichlorosilane.The thickness of the epitaxial layer can be any suitable thickness, can based on technique require with technological ability come
It determines, herein without limiting.
It is as shown in Figure 3D the top view of semiconductor substrate 303 in Fig. 3 C, it is dense does not occur the iron as shown in 1B in Fig. 3 D
Spend abnormal distribution point, it is seen then that the pollution marking of epitaxial wafer is improved.Due to semiconductor substrate surface formed epitaxial layer it
Before, coating is formd on the base, and the coating can stop or the contaminant particles of adsorbent support frame, to reduce the support
The contaminant particles concentration in frame region, and then improve the pollution marking of the epitaxial wafer, so as to improve miscellaneous contained by support frame as described above
Matter (such as iron tramp) improves the surface quality and electrical property of finally formed device to pollution caused by the epitaxial layer
Energy.
Further, when support frame is made of other materials, such as aluminium other metal materials, it is being epitaxially formed epitaxial layer
During, the material of above-mentioned support frame is likely to be diffused into semiconductor substrate surface, including the back side and/or front, described
Coating can stop or the material of adsorbent support frame diffusion, or the contaminant particles material for stopping adsorbent support frame to spread simultaneously,
It avoids polluting epitaxial wafer, and then improves the surface quality and electric property of device.
In conclusion according to the method for the present invention, before semiconductor substrate surface forms epitaxial layer, being formed on the base
Coating, the coating can stop and/or the contaminant particles of adsorbent support frame, to reduce the pollution grain in support frame as described above region
Sub- concentration, and then improve the pollution marking of the epitaxial wafer.
The present invention has been explained by the above embodiments, but it is to be understood that, above-described embodiment is only intended to
The purpose of citing and explanation, is not intended to limit the invention to the scope of the described embodiments.Furthermore those skilled in the art
It is understood that the present invention is not limited to the above embodiments, introduction according to the present invention can also be made more kinds of member
Variants and modifications, all fall within the scope of the claimed invention for these variants and modifications.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (11)
1. a kind of method for improving the epitaxial wafer pollution marking, which comprises the following steps:
There is provided epitaxy machine platform, the epitaxy machine platform include pedestal, the support frame for being used to support the pedestal and be located at the base
The chamber at seat top；
Coating is formed on the pedestal；
Semiconductor substrate is provided, the semiconductor substrate is put into the chamber, is formed in the semiconductor substrate surface outer
Prolonging layer, the epitaxial layer and the semiconductor substrate constitute epitaxial wafer, wherein during forming the epitaxial layer, the painting
Layer can stop and/or adsorb the contaminant particles of support frame as described above.
2. the method according to claim 1, wherein the coating includes polysilicon layer.
3. the method according to claim 1, wherein the contaminant particles are metallic pollution particles.
4. the method according to claim 1, wherein the epitaxial layer is monocrystalline silicon layer.
5. method according to claim 1-4, which is characterized in that the coating with a thickness of 0.5 μm -2 μm.
6. method according to claim 1-4, which is characterized in that the coating with a thickness of 3 μm -6 μm.
7. method according to claim 1-4, which is characterized in that form the side of the coating and/or epitaxial layer
Method includes chemical vapor deposition process.
8. the method according to the description of claim 7 is characterized in that in the chemical vapor deposition process, sedimentation time is
10s‐20s；And/or depositing temperature is 950 DEG C -1050 DEG C；And/or reaction gas flow is 10gpm-30gpm.
9. the method according to the description of claim 7 is characterized in that in the chemical vapor deposition process, sedimentation time is
45s‐90s；And/or depositing temperature is 1050 DEG C -1150 DEG C；And/or reaction gas flow is 30gpm-40gpm.
10. method according to claim 8 or claim 9, which is characterized in that in the chemical vapor deposition process, reaction gas
Body includes trichlorosilane.
11. method according to claim 1-4, which is characterized in that support frame as described above includes open triangles support
Frame.
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| CN201810061254.2A CN110071064A (en) | 2018-01-22 | 2018-01-22 | A method of improving epitaxial wafer and pollutes the marking |
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| CN201810061254.2A CN110071064A (en) | 2018-01-22 | 2018-01-22 | A method of improving epitaxial wafer and pollutes the marking |
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| CN106011795A (en) * | 2015-03-25 | 2016-10-12 | 应用材料公司 | Chamber components for epitaxial growth apparatus |
| CN107342253A (en) * | 2013-08-15 | 2017-11-10 | 应用材料公司 | Support cylinder for thermal processing chamber |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6120660A (en) * | 1998-02-11 | 2000-09-19 | Silicon Genesis Corporation | Removable liner design for plasma immersion ion implantation |
| CN100350551C (en) * | 2001-06-19 | 2007-11-21 | 圣戈本陶瓷及塑料股份有限公司 | Apparatus and method of making slip-free wafer boat |
| US6749684B1 (en) * | 2003-06-10 | 2004-06-15 | International Business Machines Corporation | Method for improving CVD film quality utilizing polysilicon getterer |
| CN107342253A (en) * | 2013-08-15 | 2017-11-10 | 应用材料公司 | Support cylinder for thermal processing chamber |
| CN106011795A (en) * | 2015-03-25 | 2016-10-12 | 应用材料公司 | Chamber components for epitaxial growth apparatus |
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Application publication date: 20190730 |