CN110048423B - Current control method for immune power grid voltage harmonic interference - Google Patents

Current control method for immune power grid voltage harmonic interference Download PDF

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CN110048423B
CN110048423B CN201910248416.8A CN201910248416A CN110048423B CN 110048423 B CN110048423 B CN 110048423B CN 201910248416 A CN201910248416 A CN 201910248416A CN 110048423 B CN110048423 B CN 110048423B
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voltage
current
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CN110048423A (en
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韩杨
杨雄超
蒋艾町
杨孟凌
胡鹏飞
王丛岭
杨平
熊静琪
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01Arrangements for reducing harmonics or ripples
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

Abstract

The invention discloses a current control method for immune power grid voltage harmonic interference, which is characterized in that under the condition of power grid voltage harmonic influence, grid-connected current waveforms are distorted, so that the tracking performance of current is influenced, and finally the quality of grid-connected current is reduced. In order to solve the problem, the invention provides a harmonic compensation and improved voltage phase-locked loop control method. According to the method, a moving average filter MAF module is added in a traditional three-phase-locked loop to eliminate the influence of harmonic waves on phase locking. In addition, the grid voltage feedforward is adopted to ensure the stable work and operation of the grid current of the inverter under the condition of a non-ideal grid. The inverter side adjusts the current through a fundamental wave control loop and a harmonic compensation module, wherein the harmonic compensation module solves the influence of harmonic waves on current distortion, the fundamental wave control loop enables the system to be more stable, and finally the reliability of the grid-connected current of the inverter is guaranteed.

Description

Current control method for immune power grid voltage harmonic interference
Technical Field
The invention belongs to the technical field of new energy power generation and micro-grid control in a power system, and relates to a control method for grid-connected current under the condition that new energy power generation is grid-connected and a power grid contains harmonic waves.
Background
In recent years, with the continuous consumption of non-renewable energy, the phenomenon of energy shortage is ubiquitous. The development and utilization of new energy resources such as photovoltaic energy, wind power and the like are accelerated, and the distributed power generation technology is more and more emphasized. In a distributed power generation system, the inverter plays an interface role in the energy conversion process between the renewable energy source and the grid, and also plays an extremely important role in the distributed power generation system. However, due to the harmonic wave of the grid voltage, the grid-connected current distortion phenomenon of the three-phase grid-connected inverter commonly occurs. Meanwhile, accurate power grid voltage phase and frequency information is needed for normal work of the grid-connected inverter. Therefore, optimizing the grid-connected current waveform and improving the current tracking performance are necessary to improve the power quality.
A Proportional Integral (PI) control method under a dq synchronous coordinate system is adopted in a traditional grid-connected inverter control strategy so as to realize tracking of voltage phase frequency without static error in a steady state. However, in practical application, the grid-connected current waveform is distorted due to the influence of factors such as direct current side fluctuation, dead time of a switching device, power grid voltage harmonic waves and the like, the current tracking power grid information capacity is weakened, and serious harmonic pollution is caused to a power grid. Chinese patent No. CN105763094A discloses a method for controlling an inverter based on voltage feedforward control and composite current control, which utilizes a predicted voltage value of PCC as a voltage feedforward and adopts composite current control in the process of obtaining a reference voltage according to deadbeat control, thereby avoiding resonance of an LCL filter and improving the control accuracy of a control algorithm. However, the method does not relate to the modulation of current fundamental wave signals, and does not mention the problem of grid voltage phase locking under the influence of grid voltage harmonics; a current control method for a photovoltaic grid-connected inverter is proposed in chinese patent with publication number CN 104037800A. According to the method, PID current control is utilized to remove differential components sensitive to interference signals and integral components incapable of realizing zero static difference of alternating current signals, so that the power grid distortion and harmonic interference resistance of the inverter are enhanced. However, this method does not mention the influence of grid voltage harmonics on the realization of accurate grid voltage fundamental amplitude, frequency and phase information extraction. Because the similar algorithms do not fully consider the influence of the grid voltage harmonic on the whole grid-connected system, especially the influence on the phase-locked link of the grid-connected current and the grid voltage, it is necessary to research a current control technology in the three-phase grid voltage harmonic environment to realize the immunity of the grid-connected current to the harmonic and can be widely applied to the power conversion technology, the distributed grid-connected system and other occasions.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a current control method for immune power grid voltage harmonic interference. The method solves the technical problems that under the influence of the voltage harmonic wave of the power grid, the grid-connected current is distorted and the phase information of the voltage of the power grid cannot be accurately acquired. The algorithm provided by the invention realizes the elimination of the waveform distortion of the grid-connected current, and the improved PLL module in the algorithm ensures the accuracy of obtaining the voltage information of the power grid and the synchronism of the grid-connected current and the phase information of the power grid. Thereby improving the robustness of the entire control algorithm.
The specific technical scheme of the invention is as follows: a current control method for immune power grid voltage harmonic interference specifically comprises the following steps:
s1, converting the power grid voltage E a 、E b 、E c As input signal for a three-phase-locked loop (PLL) module and converting it to a synchronous rotating coordinate systemLower to obtain a voltage E d 、E q
S2, establishing a Moving Average Filter (MAF) module in the PLL module, and then adding E to the MAF module d 、E q Respectively input into a moving average filter module for harmonic elimination, and filtered to obtain output voltage
Figure BDA0002011690120000021
And
Figure BDA0002011690120000022
furthermore, three-phase network voltage E in S1 and S2 a 、E b 、E c Conversion to synchronous rotating coordinate system E d 、E q The specific implementation method comprises the following steps:
Figure BDA0002011690120000023
wherein theta is the power grid voltage phasor theta sampled by the phase-locked loop PLL ,E 0 Is a zero sequence component. At E d 、E q The MAF module is established respectively later, and the transfer function is as follows:
Figure BDA0002011690120000024
Figure BDA0002011690120000025
equation (2) is a continuous domain expression, and equation (3) is a discrete domain expression. T is ω Is the window length of the MAF, where equation (3) is a discrete time domain expression, where T ω =NT S ,T S For the sampling time, N is the number of samples within one window length of MAF. Substituting s = j ω into (2) yields the following:
Figure BDA0002011690120000026
wherein | G m | is the gain factor of the MAF. From this, the following can be concluded from equation (4):
Figure BDA0002011690120000031
from equation (5), the gain of the MAF module is 1 when ω =0 and is 1 when f = k/T ω (k = + -1, + -2, + -3 \8230;) the gain is zero. In particular, simulation results show that when the window length value T is ω The filtering effect is obvious when the frequency is equal to T and T/2, and 5,7,11 and 13 harmonics are basically filtered.
S3, establishing a phase lead compensator, namely connecting a phase lead module behind the MAF module in series to solve the problem of phase delay caused by the MAF, so that the system response capacity is effectively accelerated, and certain phase compensation is performed on the positive sequence component of the power grid voltage;
the transfer function of the phase lead compensator shown is:
Figure BDA0002011690120000032
wherein r is a damping factor in the range r ∈ [0, 1), k = (1-r) N ) And/1-r is a normalized DC sample gain.
S4, inputting the grid voltage fundamental wave signal which passes through the Moving Average Filter (MAF) and the phase lead compensator into a Proportional Integral Controller (PI) to obtain the grid voltage frequency offset delta omega of the period i . Then delta omega is measured i With ideal grid voltage frequency omega 0 Adding to obtain the grid voltage frequency value omega of the period i After the frequency value is input into the integrator, the grid voltage phase value theta before the period compensation is obtained PLL Performing the following steps; using the grid voltage frequency offset Δ ω i Through a constant gain value k φ Method of implementing a phase compensating Park transformationBit error, namely the grid voltage phase value theta before the period compensation PLL ' and (k) φ *Δω i ) The difference of (a) is used as the phase of Park transformation;
the phase shift caused by MAF can be equivalent to:
Figure BDA0002011690120000033
since the system reaches steady state, the phase shift of PLL is θ = θ PLL `-k φ Δω i Change of rotation angle by Park transformation (theta) PLL `-k φ Δω i ) The input signal to achieve PI at steady state is equal to 0. Through the above control, the zero-error phase theta can be output when the steady state is reached PLL
S5, tracking the phase theta of the power grid voltage PLL As three-phase mains voltage E a 、E b 、E c Carrying out Park conversion on the rotating angle to obtain a voltage feedforward quantity E under a synchronous rotating coordinate system dq
S6, sampling the obtained three-phase inverter side current data i a 、i b 、i c Inverter side current i under alpha beta coordinate axis converted by Clark αβ And the phase theta of the grid voltage obtained in S3 PLL As i αβ Carrying out Park transformation to obtain current i in a synchronous rotating coordinate system dq Inverter side sampled i dq With ideal rated current i dq * Subtracting to obtain deviation amount Δ i dq Inputting the voltage into a proportional-integral controller (PI) to output a side-wave voltage modulation signal DeltaV of the inverter dq
Further, Δ V is obtained in step S6 dq The implementation mode of the method is as follows:
Figure BDA0002011690120000041
Figure BDA0002011690120000042
the expression of the s domain of the proportional controller is as follows: g PI (s)=K p +K i /s。
S7, the voltage feedforward quantity E obtained in the S5 is used dq And the inverter side-group wave voltage modulation signal DeltaV obtained in S6 dq After addition, park inverse transformation is carried out, and the grid voltage phase theta obtained in S4 is subjected to PLL As the phase of its transformation. Obtaining a voltage fundamental wave modulation signal V after inverse transformation αβ
S8, converting the ideal current i dq * Inverse Park transformation is carried out to convert the rotation coordinate into i under alpha beta coordinate axis αβ * Then i is αβ * And then with the current i sampled by the inverter side in S6 αβ Subtracting to obtain the current deviation delta i under the coordinate axis of alpha and beta αβ
S9, the current deviation delta i obtained in the S8 is used αβ And the network voltage phase theta obtained in S4 PLL As an input to the harmonic compensator. Deviation of current by an amount Δ i α With measured grid voltage phase theta PLL Is multiplied by the cosine value of-5 times, the current deviation delta i is obtained β Multiplying by-5 times sine value, and adding the two products to obtain delta i q (ii) a Deviation of current by an amount Δ i α With measured grid voltage phasor theta PLL Is multiplied by the sine value of-5 times, the current deviation Δ i is multiplied β5 Multiplying the cosine value by-5 times, and subtracting the two product values to obtain delta i d5
The implementation method of the S9 step comprises the following steps:
Figure BDA0002011690120000043
s10, converting the delta i obtained in S9 dq5 And inputting a proportional integral controller (PI), outputting a 5 th harmonic modulation signal under a rotating coordinate system, and inputting a modulation signal obtained in the period into a saturation limiter to ensure that the amplitude is within a certain range. If the amplitude is at the rated valueWithin the range, the output of the saturation limiter is zero, otherwise, the excess is regulated to be within the rated range by the proportional-integral controller to finally obtain a 5-order harmonic modulation signal delta V d5 A and Δ V q5 ^;
S10 step, the 5 th harmonic modulation signal delta V is obtained d5 ^ and Delta V q5 The concrete implementation mode is as follows:
Figure BDA0002011690120000051
wherein G is PI (t)=K p e(t)+K i [ integral ] e (t) dt, wherein K p Is a proportionality coefficient, K i Is the integration time constant.
The expression of the saturation limiter in the S9 step is as follows:
Figure BDA0002011690120000052
wherein u 1 The value is the feedback current value, u 2 Is a constant value of 40, the meaning of the formula (11) is if u 1 ∈(-u 2 ,u 2 ) If the feedback value u is zero, u 1 And (6) outputting an original value. Otherwise, u is 1 And u 2 PI regulation is carried out on the difference value of (u) until u 1 Is controlled to a limited range u 2 Until the end is reached.
S11, modulating signal delta V of 5 th harmonic obtained in S10 d5 ^ and measured grid voltage phasor theta PLL Is multiplied by the cosine value of-5 times to modulate the harmonic wave with a signal delta V q5 Multiplying the sine value by-5 times, and subtracting the two product values to obtain delta V α5 A; modulating the 5 th harmonic wave by a signal delta V d5 ^ and measured grid voltage phasor theta PLL Multiplies the sine value of-5 times, and modulates the signal delta V q5 Multiplying the cosine value of ^ 5 times, and obtaining the delta V by the two product values β5 ^;
The implementation manner of the step S11 is as follows:
Figure BDA0002011690120000053
further, combining the foregoing formulas (9), (10), (12) to obtain the implementation manner:
Figure BDA0002011690120000054
wherein k is 5,7,11 and 13 subharmonics, namely, the modulation modes of the harmonics are similar.
S12, obtaining a voltage fundamental wave modulation signal V by single current closed-loop control and voltage feedforward modulation signals αβ Harmonic modulation signal DeltaV obtained from harmonic compensator αβ And adding the phase values, performing Clark inverse transformation to obtain three-phase voltage modulation signals, and performing Pulse Width Modulation (PWM) to construct trigger signals required by the H-bridge IGBT of the inverter.
Compared with the prior art, the invention has the beneficial effects that:
1. in the traditional inverter grid-connected system, fundamental waves and harmonic waves of grid-connected current are respectively modulated, the fundamental wave modulation ensures the stability of the grid-connected current, and the harmonic wave modulation eliminates the influence of grid voltage harmonic waves on the grid-connected current;
2. the improved voltage phase-locked loop comprises an MAF module for eliminating the influence of power grid voltage harmonics, and a phase compensator is designed to compensate the phase, so that the accurate extraction of power grid voltage information is realized, the robustness of the phase-locked loop is enhanced, and the precision of current control of a grid-connected system is improved.
Drawings
FIG. 1 is an overall schematic block diagram of a grid-connected inverter grid-connected current control system;
FIG. 2 is a schematic diagram of fundamental frequency and phase extraction of grid voltage;
FIG. 3 is a schematic block diagram of a topology of a specific harmonic cancellation module;
FIG. 4 Moving Average Filter (MAF) when the window length value T ω A bode plot of the filtering effect when equal to T and T/2;
FIG. 5 is a Bode plot of the compensation effect of a MAF cascaded with three phase lead compensators of different r values on the phase;
FIG. 6 three phase grid tied current (I) before harmonic cancellation module and grid side voltage feed forward are added A ,I B ,I C ) Simulating a waveform;
FIG. 7 three phase grid tie current (I) before adding harmonic cancellation module A ,I B ,I C ) Simulating a waveform;
FIG. 8 three phase grid tied current (I) before adding grid side voltage feed forward quantity A ,I B ,I C ) Simulating a waveform;
FIG. 9 shows the three-phase grid-connected current (I) after the grid-side voltage feedforward quantity and the harmonic elimination module are added A ,I B ,I C ) Simulating a waveform;
fig. 10 is a comparison graph of simulation waveforms of three-phase grid-connected active power and reactive power before and after adding a grid-side voltage feed-forward quantity.
Detailed Description
The embodiments of the invention are described in detail below with reference to the drawings: the present embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation process are given, but the protection scope of the present invention is not limited to the following embodiments.
Fig. 1 shows an overall schematic block diagram of a grid-connected current control system of a three-phase grid-connected inverter. Under the condition of the influence of the voltage harmonic wave of the power grid, the waveform of the grid-connected current can be distorted, so that the tracking performance of the current is influenced, and finally the quality of the grid-connected current is reduced. It can be seen from fig. 1 that the overall system mainly comprises a modified phase-locked loop module on the grid side, a fundamental control loop for the inverter-side current and a specific harmonic regulation module. The improved phase-locked loop module is used for accurately and quickly extracting the phase of the power grid voltage; the current fundamental control loop corrects the deviation caused by the harmonic voltage; the specific harmonic wave adjusting module eliminates harmonic wave quantity in grid-connected current, and therefore the quality of the grid-connected current meets the grid-connected standard.
The functional block diagram according to fig. 1 is implemented as follows:
s1, converting the power grid voltage E a 、E b 、E c As an input signal of a three-phase-locked loop (PLL) module, and converting the input signal into a synchronous rotating coordinate system to obtain a voltage E d 、E q
S2, establishing a Moving Average Filter (MAF) module in the PLL module, and then setting E d 、E q Respectively input into a moving average filter module for harmonic elimination, and filtered to obtain output voltage
Figure BDA0002011690120000076
And
Figure BDA0002011690120000077
further, fig. 2 is a schematic diagram of extracting the fundamental frequency and phase of the grid voltage, that is, a control block diagram of the PLL module. Three-phase network voltage E in S1 and S2 a 、E b 、E c Conversion to synchronous rotating coordinate system E d 、E q The specific implementation method comprises the following steps:
Figure BDA0002011690120000071
wherein theta is the power grid voltage phasor theta sampled by the phase-locked loop PLL ,E 0 Is a zero sequence component. At E d 、E q The MAF module is established later, and the transfer function is as follows:
Figure BDA0002011690120000072
Figure BDA0002011690120000073
equation (2) is a continuous domain expression, and equation (3) is a discrete domain expression. T is ω Is the window length of the MAF, where equation (3) is a discrete time domain expression, where T ω =NT S ,T S For the sampling time, N is MNumber of samples within one window length of AF. Substituting s = j ω into (2) yields the following:
Figure BDA0002011690120000074
wherein | G m | is the gain factor of the MAF. From this, the following can be concluded from equation (4):
Figure BDA0002011690120000075
from equation (5), the gain of the MAF module is 1 when ω =0 and is 1 when f = k/T ω (k = + -1, + -2, + -3 \8230;) the gain is zero. In particular, the simulation results shown in FIG. 4 indicate when the window length value T is ω The filtering effect is obvious when the frequency is equal to T and T/2, and 5,7,11 and 13 harmonics are basically filtered.
S3, establishing a phase lead compensator, namely connecting a phase lead module behind the MAF module in series to solve the problem of phase delay caused by the MAF, so that the system response capacity is effectively accelerated, and certain phase compensation is performed on the positive sequence component of the power grid voltage;
the transfer function of the phase lead compensator shown is:
Figure BDA0002011690120000081
wherein r is a damping factor in the range r ∈ [0, 1), k = (1-r) N ) /(1-r), is a normalized dc sample gain.
S4, inputting the grid voltage fundamental wave signal which passes through the Moving Average Filter (MAF) and the phase lead compensator into a Proportional Integral Controller (PI) to obtain the grid voltage frequency offset delta omega of the period i . Then delta omega is measured i With ideal grid voltage frequency omega 0 Adding to obtain the grid voltage frequency value omega of the period i Frequency of the frequencyAfter the value is input into the integrator, the grid voltage phase value theta before the period compensation is obtained PLL Performing the following steps; using the grid voltage frequency offset Δ ω i By a constant gain value k φ The method realizes the compensation of the phase error of Park conversion, and the phase value theta of the grid voltage before the period compensation PLL ' and (k) φ *Δω i ) The difference of (a) is used as the phase of Park transformation;
the phase shift caused by MAF can be equivalent to:
Figure BDA0002011690120000082
since the system reaches steady state, the phase offset of the PLL is θ = θ PLL `-k φ Δω i Change of rotation angle by Park transformation (theta) PLL `-k φ Δω i ) The input signal to achieve PI at steady state is equal to 0. Through the above control, the zero-error phase theta can be output when the steady state is reached PLL
And S5, the jump amplitude of the active power is large, so that the grid-connected system is damaged due to the fact that energy impact is too large, and voltage feedforward is introduced. As shown in the overall schematic block diagram of the grid-connected inverter grid-connected current control system shown in fig. 1, the phase θ of the tracked grid voltage PLL As three-phase mains voltage E a 、E b 、E c The rotating angle of Park conversion is carried out to obtain the voltage feedforward quantity E under the synchronous rotating coordinate system dq
S6, sampling the obtained three-phase inverter side current data i a 、i b 、i c Inverter side current i converted into α β coordinate axis by Clark αβ And the phase theta of the grid voltage obtained in S3 PLL As i αβ Carrying out Park transformation to obtain current i in a synchronous rotating coordinate system dq Inverter side sampled i dq With ideal rated current i dq * Subtracting to obtain deviation amount Δ i dq Inputting the voltage into a proportional-integral controller (PI) to output an inverter-side fundamental waveVoltage modulated signal Δ V dq
Further, Δ V is obtained in step S6 dq The implementation mode of the method is as follows:
Figure BDA0002011690120000091
Figure BDA0002011690120000092
the expression of the s domain of the proportional controller is as follows: g PI (s)=K p +K i S, wherein K p Is a proportionality coefficient, K i In order to integrate the time constant,
Figure BDA0002011690120000093
and
Figure BDA0002011690120000094
is the rated amount of current in the dq coordinate system. i all right angle a 、i b And i c Is the three-phase current of the inverter end.
S7, the voltage feedforward quantity E obtained in the S5 is processed dq And the inverter side base wave voltage modulation signal delta V obtained in S6 dq After addition, park inverse transformation is carried out, and the grid voltage phase theta obtained in S4 is subjected to PLL As the phase of its transformation. Obtaining a voltage fundamental wave modulation signal V after inverse transformation αβ
S8, converting the ideal current i dq * Performing Park inverse transformation to convert the rotating coordinate to i under the alpha beta coordinate axis αβ * Then i is αβ * And then with the current i sampled by the inverter side in S6 αβ Subtracting to obtain the current deviation delta i under the alpha beta coordinate axis αβ
S9, the current deviation delta i obtained in the S8 is calculated αβ And the phase θ of the grid voltage obtained in S4 PLL As an input to the harmonic compensator. Deviation amount of current Δ i α With measured grid voltage phase theta PLL Cosine value of-5 timesMultiplying by the current deviation Δ i β Multiplying by-5 times sine value, and adding the two products to obtain delta i q5 (ii) a Deviation amount of current Δ i α Phasor theta with measured grid voltage PLL Is multiplied by the sine value of-5 times to offset the current by Δ i β5 Multiplying the cosine value by-5 times, and subtracting the two product values to obtain delta i d5
As shown in fig. 3, it is a 5,7,11,13 th harmonic compensation control block diagram, and the implementation method of the step S9 is:
Figure BDA0002011690120000095
s10, converting the delta i obtained in S9 dq5 And inputting a proportional integral controller (PI), outputting a 5 th harmonic modulation signal under a rotating coordinate system, and inputting a modulation signal obtained in the period into a saturation limiter to ensure that the amplitude is within a certain range. If the amplitude is in the rated range, the output of the saturation limiter is zero, otherwise, the excess is regulated to the rated range by the proportional-integral controller to finally obtain a 5-order harmonic modulation signal delta V d5 ^ and Delta V q5 ^;
S10 step, the 5 th harmonic modulation signal delta V is obtained d5 ^ and Delta V q5 The concrete implementation mode is as follows:
Figure BDA0002011690120000101
wherein, G PI (t)=K p e(t)+K i [ integral ] e (t) dt, wherein K p Is a proportionality coefficient, K i Is the integration time constant.
As shown in the control block diagram of fig. 3, the Fcn module is a saturation limiter, and the expression of the saturation limiter in step S9 is as follows:
Figure BDA0002011690120000102
wherein u is 1 The value is the value of the feedback current,u 2 is a constant value of 40, the meaning of the formula (11) is if u 1 ∈(-u 2 ,u 2 ) If the feedback value u is zero, u 1 And (6) outputting an original value. Otherwise, u is 1 And u 2 The difference of (d) is PI regulated until u 1 Is controlled to a limited range u 2 Until the end is reached.
S11, modulating signal delta V of 5 th harmonic obtained in S10 d5 ^ and measured grid voltage phasor theta PLL Multiplying the cosine value of-5 times to modulate the harmonic wave signal delta V q5 Multiplying the sine value by-5 times, and subtracting the two product values to obtain delta V α5 A; modulating the 5 th harmonic wave by a signal delta V d5 ^ and measured power grid voltage phasor theta PLL Multiplies the sine value of-5 times to modulate the signal Δ V q5 Multiplying ^ by-5 times of cosine value, and obtaining delta V by the two product values β5 ^;
The implementation manner of the step S11 is as follows:
Figure BDA0002011690120000103
further, combining the foregoing formulas (9), (10), (12) to obtain the implementation manner:
Figure BDA0002011690120000104
wherein k is 5,7,11 and 13 subharmonics, namely, the modulation modes of the harmonics are similar.
S12, obtaining a voltage fundamental wave modulation signal V by single current closed-loop control and voltage feedforward modulation signals αβ Harmonic modulation signal DeltaV obtained from harmonic compensator αβ And adding the phase values, performing Clark inverse transformation to obtain three-phase voltage modulation signals, and performing Pulse Width Modulation (PWM) to construct trigger signals required by the H-bridge IGBT of the inverter.
In order to verify that the improved PLL provided by the present invention can accurately obtain the phase and frequency information of the power grid voltage under the condition of containing the harmonic of the power grid voltage, fig. 4 to 5 are simulation effect diagrams of the MAF module and the phase lead compensation module of the PLL module. In order to verify the compensation effect of the specific harmonic compensation module on the harmonic and the influence of the grid-side voltage feedforward on the three-phase grid-connected current, fig. 6 is a waveform diagram of the three-phase grid-connected current before the specific harmonic compensation module and the grid-side voltage feedforward are added under the condition that other conditions are kept unchanged. Fig. 7 is a waveform diagram of three-phase grid-connected current before a specific harmonic compensation module is added under the condition that other conditions are kept unchanged. Fig. 8 is a waveform diagram of three-phase grid-connected current before grid-side voltage feedforward is added under the condition that other conditions are kept unchanged. Fig. 9 is a waveform diagram of three-phase grid-connected current after a specific harmonic compensation module and grid-side voltage feedforward are added. In order to verify the influence of the grid-side voltage feedforward on the three-phase grid-connected active power and reactive power, fig. 10 is a comparison of waveforms of the three-phase grid-connected active power and reactive power before and after the grid-side voltage feedforward amount is added under the condition that other conditions are kept unchanged.
Based on the description of the operating conditions of fig. 4-10, the dynamic effects and the contrast waveforms of fig. 4-10 will be described in detail below.
Fig. 4 shows a bode diagram of a voltage phase-locked loop system with an added MAF module, and it can be observed that a phase margin is 43.3 °, which indicates that the improved phase-locked loop system is stable, and meanwhile, harmonic components of a power grid are effectively filtered, but it can be obviously observed that the harmonic components are filtered and simultaneously have obvious phase delay. FIG. 5 shows a bode plot of a cascaded phase lead compensation module for a MAF module, where curve 1 is the frequency response without the cascaded phase lead compensation module and the other curves are the frequency response after the MAF module is cascaded with the phase lead compensation module. Where the r-value for curve 2 was taken to be 0.95, the r-value for curve 3 was taken to be 0.97, and the r-value for curve 4 was taken to be 0.99. It can be observed that the phase lead compensation module effectively cancels the delay in phase caused by the MAF module while also eliminating harmonics, and the compensation effect of curve 4 is optimal. FIG. 6 shows the three-phase grid-connected current (I) of the whole system lacking harmonic modulation signal and grid-side voltage feed-forward signal a ,I b ,I c ) In the output condition of the waveform diagram, the amplitudes of the three-phase currents a, b and c greatly fluctuate in the interval of t = 0-0.05 s. Meanwhile, due to the influence of voltage harmonics of a power grid, the current distortion of three phases is very highSevere and this distortion persists over time. FIG. 7 shows the three-phase grid-connected current (I) of the whole system in the absence of harmonic modulation signals a ,I b ,I c ) The output situation of (2) shows that under the influence of the voltage harmonic of the power grid, the three-phase current is obviously distorted. FIG. 8 shows the three-phase grid-connected current (I) for the case of a total system lacking grid-side voltage feed-forward a ,I b ,I c ) In the output situation of the waveform diagram, it can be seen that, in the absence of the grid-side voltage feedforward, the three-phase current amplitude jump is also serious in a time period of 0 to 0.05s, wherein the c-phase jump amplitude is the largest, and in a time period of t =0 to 0.04s, the three-phase current waveforms are distorted to a greater extent than that in the case of fig. 7, but due to the harmonic modulation signal, the distortion of the three-phase current waveforms is gradually eliminated after 0.4s, and the current waveforms of the three phases a, b and c become smooth and symmetrical. Fig. 9 shows the three-phase grid-connected current waveform output waveform of the whole system under the action of the harmonic modulation signal and the grid-side voltage feedforward. And the distortion of the current waveform is basically eliminated in the time period of t = 0-0.2 s, and the jump of the current amplitude is eliminated, so that the current waveforms of the three phases a, b and c become smooth and symmetrical.
Fig. 10 shows a comparison of three-phase grid-connected active power and reactive power waveforms in the case of a lack of grid-side voltage feed-forward of the whole system. The amplitude jump range of the active power and the reactive power in the time period of t = 0-0.03 s in the graph A is large, the graph B is the waveform of the active power and the reactive power after the voltage feedforward of the network side is added, the gradual stability of the active power and the reactive power along with the time is easy to observe, and the fluctuation is small.
The comparison of the three-phase current waveform and the power waveform under various different control conditions shows that the modulation of fundamental waves and harmonic waves of grid-connected current provided by the invention eliminates the influence of power grid harmonic waves on the current waveform; the voltage feedforward ensures that the whole system is more stable and reliable; the improved voltage phase-locked loop improves the control precision of the whole system. The current control mode for immune power grid voltage harmonic interference can be widely applied to a distributed power generation system.
It will be appreciated by those of ordinary skill in the art that the embodiments described herein are intended to assist the reader in understanding the principles of the invention and are to be construed as being without limitation to such specifically recited and practiced embodiments. Those skilled in the art, having the benefit of this disclosure, may effect numerous modifications thereto and changes may be made without departing from the scope of the invention in its aspects.

Claims (1)

1. A current control method for immune power grid voltage harmonic interference is characterized by comprising the following specific steps:
s1, converting the power grid voltage E a 、E b 、E c As input signal for three-phase-locked loop module and converting the network voltage into synchronous rotating coordinate system, i.e. E d 、E q
S2, establishing a moving average filter module in the PLL module, and converting the power grid voltage E d 、E q Respectively transmitting to a moving average filter MAF for harmonic elimination, and filtering to obtain output voltage
Figure FDA0003940987510000011
And
Figure FDA0003940987510000012
s3, a phase lead compensator is established for solving the problem of phase delay caused by the MAF, and a phase lead module is connected behind the MAF module in series, so that the response capability of the system is effectively accelerated, and in addition, the phase lead module also plays a certain phase compensation role in the positive sequence component of the grid voltage;
s4, inputting the grid voltage fundamental wave signal passing through the moving average filter and the phase lead compensator into a proportional integral controller PI to obtain the grid voltage frequency offset delta omega of the period i Then, Δ ω will be i With ideal grid voltage frequency omega 0 Adding to obtain the grid voltage frequency value omega of the period i The frequency value is transmitted to an integrator to obtain a grid voltage phase value theta before the period compensation PLL Performing the following steps; furthermore, a grid voltage frequency offset Δ ω is used i Through a constant gain value k φ If the compensation of the phase error of the Park conversion is realized, the phase value theta of the grid voltage before the period compensation PLL T and k φ *Δω i The difference of (a) is used as the phase of Park transformation;
s5, tracking the phase theta of the power grid voltage PLL As three-phase mains voltage E a 、E b 、E c Carrying out Park conversion on the rotating angle to obtain a voltage feedforward quantity E under a synchronous rotating coordinate system dq
S6, sampling the obtained three-phase inverter side current data i a 、i b 、i c Inverter side current i converted into α β coordinate axis by Clark αβ And the phase theta of the grid voltage obtained in S3 PLL As i αβ Carrying out Park transformation to obtain current i in a synchronous rotating coordinate system dq Inverter side sampled i dq With ideal rated current i dq * Subtracting to obtain deviation amount delta i dq Inputting the voltage into a proportional-integral controller PI to output a side-group wave voltage modulation signal delta V of the inverter dq
S7, the voltage feedforward quantity E obtained in the S5 is used dq And the inverter side-group wave voltage modulation signal DeltaV obtained in S6 dq Adding the voltage phases, performing Park inverse transformation, and performing grid voltage phase theta obtained in S4 PLL As the transformed phase, the inverse transform is carried out to obtain a voltage fundamental wave modulation signal V αβ
S8, converting the ideal current i dq * Performing Park inverse transformation to convert the rotating coordinate to i under the alpha beta coordinate axis αβ * Then i is αβ * And then with the current i sampled by the inverter side in S6 αβ Subtracting to obtain the current deviation delta i under the coordinate axis of alpha and beta αβ
S9, the current deviation delta i obtained in the S8 is used αβ And the network voltage phase theta obtained in S4 PLL AsInput to harmonic compensator, current deviation amount Δ i α With measured grid voltage phase theta PLL Is multiplied by the cosine value of-5 times, the current deviation delta i is obtained β Multiplying by-5 times sine value, and adding the two products to obtain delta i q (ii) a Deviation of current by an amount Δ i α Phasor theta with measured grid voltage PLL Is multiplied by the sine value of-5 times to offset the current by Δ i β5 Multiplying the cosine value by-5 times, and subtracting the two product values to obtain delta i d5
S10, converting the delta i obtained in the S9 dq5 Inputting a proportional integral controller PI, outputting a 5-order harmonic modulation signal under a rotating coordinate system, inputting the modulation signal obtained in the period into a saturation limiter, ensuring that the amplitude is within a certain range, if the amplitude is within a rated range, outputting zero by the saturation limiter, and if not, adjusting the excess to be within the rated range through the proportional integral controller to finally obtain a 5-order harmonic modulation signal delta V d5 A and Δ V q5 ^;
S11, modulating signal delta V of 5 th harmonic obtained in S10 d5 ^ and measured grid voltage phasor theta PLL Multiplying the cosine value of-5 times to modulate the harmonic wave signal delta V q5 Multiplying the sine value by-5 times, and subtracting the two product values to obtain delta V α5 A; modulating signal Δ V with 5 th harmonic d5 ^ and measured grid voltage phasor theta PLL Multiplies the sine value of-5 times to modulate the signal Δ V q5 Multiplying ^ by-5 times of cosine value, and obtaining delta V by the two product values β5 ^;
S12, obtaining a voltage fundamental wave modulation signal V by single current closed-loop control and voltage feedforward modulation signals αβ Harmonic modulation signal DeltaV obtained from harmonic compensator αβ Adding the phase signals, performing Clark inverse transformation to obtain three-phase voltage modulation signals, and performing Pulse Width Modulation (PWM) to construct trigger signals required by an inverter H bridge IGBT;
the steps S1 to S4 are processes of accurately tracking the voltage phase of the power grid, and the influence of the harmonic wave of the power grid on the control process is eliminated by adopting a moving average filter and a phase lead compensator, and the specific processes are as follows:
three-phase network voltage E in S1 and S2 a 、E b 、E c Conversion to synchronous rotating coordinate system E d 、E q The specific implementation method comprises the following steps:
Figure FDA0003940987510000021
wherein theta is the power grid voltage phasor theta sampled by the phase-locked loop PLL ,E 0 Is a zero sequence component, in E d 、E q The MAF module is established respectively later, and the transfer function is as follows:
Figure FDA0003940987510000022
Figure FDA0003940987510000023
expression (2) is a continuous domain expression, expression (3) is a discrete domain expression, T ω Is the window length of the MAF, where equation (3) is a discrete time domain expression, where T ω =NT S ,T S For a sampling time, N is the number of samples within one window length of MAF, substituting s = j ω into (2) yields the following:
Figure FDA0003940987510000031
wherein | G m I is the gain factor of MAF, and the following can be concluded from equation (4):
Figure FDA0003940987510000032
from equation (5), the gain of the MAF module is 1 when ω =0 and is 1 when f = k/T ω (k = + -1, +/-2, +/-3 \8230;)Advantageously zero, in particular, the simulation results show that when the window length value T is ω When the frequency is equal to T and T/2, the filtering effect is obvious, and 5,7,11,13 subharmonics are basically filtered;
the transfer function of the phase lead compensator in S3 is:
Figure FDA0003940987510000033
wherein r is a damping factor in the range r ∈ [0, 1), k = (1-r) N ) (1-r), is a normalized DC sample gain;
the phase shift caused by MAF in S4 may be equivalent to:
Figure FDA0003940987510000034
k in the formula φ Is a constant gain value, Δ ω i The deviation between the grid voltage frequency and the rated value is the phase deviation of the PLL as theta = theta when the system reaches the steady state PLL `-k φ Δω i Change of the rotation angle to θ using Park conversion PLL `-k φ Δω i The input signal of PI is equal to 0 in the steady state, and the control can output the theta with zero error phase when reaching the steady state PLL
Further, according to the simulation output, it can be known that the jump amplitude of the active power output by the system is too large, and the grid-connected system is damaged due to too large energy impact, so that the active power of the system is stabilized by introducing a voltage feedforward method in the step S5; S6-S7 are to obtain fundamental wave voltage modulation signal and voltage fundamental wave modulation signal V αβ In step S6, the fundamental voltage modulation signal Δ V dq The specific implementation mode is as follows:
Figure FDA0003940987510000041
the expression of the s domain of the proportional controller is as follows: g PI (s)=K p +K i S, wherein K p Is a proportionality coefficient, K i In order to be able to integrate the time constant,
Figure FDA0003940987510000042
and
Figure FDA0003940987510000043
is the rated amount of current in dq coordinate system, i a 、i b And i c Three-phase current at the inverter end;
steps S8 to S11 are to obtain 5,7,11 and 13 subharmonic modulation signals delta V αβ The implementation mode of each harmonic modulation signal is the same, and the 5 th harmonic modulation signal is taken as an example as follows:
step S9 obtaining Delta i q And Δ i d5 The specific implementation method comprises the following steps:
Figure FDA0003940987510000044
s10 step, the 5 th harmonic modulation signal delta V is obtained d5 A and Δ V q5 The specific implementation mode of ^ is as follows:
Figure FDA0003940987510000045
wherein G is PI (t)=K p e(t)+K i [ integral ] e (t) dt, wherein K p Is a proportionality coefficient, K i Is the integration time constant;
the expression of the saturation limiter in the S9 step is as follows:
Figure FDA0003940987510000046
wherein u 1 The value being the feedback currentValue u 2 Is a constant value of 40, the meaning of the formula (11) is if u 1 ∈(-u 2 ,u 2 ) If the feedback value u is zero, u 1 Outputting the original value, otherwise, outputting u 1 And u 2 The difference of (d) is PI regulated until u 1 Is controlled to a limited range u 2 Stopping until the inside;
s11 step obtaining Delta V α5 A and Δ V β5 The specific implementation mode of ^ is as follows:
Figure FDA0003940987510000047
further, the harmonic modulation signal obtained by combining the above formulas (9), (10) and (12) is implemented by:
Figure FDA0003940987510000051
wherein k is 5,7,11 and 13 subharmonics, namely, the modulation modes of the harmonics are similar;
finally, obtaining a voltage fundamental wave modulation signal V by single current closed-loop control and voltage feedforward modulation signals αβ Harmonic modulation signal DeltaV obtained from harmonic compensator αβ And adding the phase values, performing Clark inverse transformation to obtain three-phase voltage modulation signals, and performing Pulse Width Modulation (PWM) to construct trigger signals required by the H-bridge IGBT of the inverter.
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Publication number Priority date Publication date Assignee Title
CN110932587B (en) * 2019-12-18 2021-02-05 中国石油大学(华东) High-efficiency low-harmonic control method for high-switching-frequency silicon carbide inverter
CN111404200B (en) * 2020-04-17 2023-06-02 国网辽宁省电力有限公司鞍山供电公司 Phase-locked control method for photovoltaic grid-connected converter during distribution network voltage distortion of arc furnace
CN111541366B (en) * 2020-05-07 2021-06-25 上海交通大学 Grid-connected inverter and dead zone phase shift compensation method thereof
CN111541365B (en) * 2020-05-07 2021-06-29 上海交通大学 Unit modulation degree control method of variable-frequency speed-regulating inverter and application thereof
CN113644696B (en) * 2021-07-30 2024-03-15 华南理工大学 Three-phase power grid voltage phase-locked loop based on linear active disturbance rejection control and phase-locked method
CN113809948B (en) * 2021-08-10 2024-02-13 西安理工大学 Feedback current compensation method for grid-connected inverter under current sampling condition of shunt
CN117454155B (en) * 2023-12-26 2024-03-15 电子科技大学 IGBT acoustic emission signal extraction method based on SSAF and EMD
CN117791837A (en) * 2024-02-27 2024-03-29 苏州元脑智能科技有限公司 Control method, device and equipment for backup battery unit and storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105790758A (en) * 2016-04-07 2016-07-20 电子科技大学 Improved phase-locked loop algorithm based on time-delay filter under mixed coordinate system
CN106027038A (en) * 2016-05-13 2016-10-12 电子科技大学 Improved three-phase phase-locked loop technology based on delay signal cancellation method
CN107045082A (en) * 2017-06-12 2017-08-15 南京工程学院 The synchronized phase open loop detection method of high accuracy and anti-noise jamming
CN108599257A (en) * 2018-05-30 2018-09-28 电子科技大学 A kind of current control method suitable for high bandwidth of phase lock loop

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9853573B2 (en) * 2016-03-28 2017-12-26 The Aerospace Corporation Grid-tie inverter with active power factor correction

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105790758A (en) * 2016-04-07 2016-07-20 电子科技大学 Improved phase-locked loop algorithm based on time-delay filter under mixed coordinate system
CN106027038A (en) * 2016-05-13 2016-10-12 电子科技大学 Improved three-phase phase-locked loop technology based on delay signal cancellation method
CN107045082A (en) * 2017-06-12 2017-08-15 南京工程学院 The synchronized phase open loop detection method of high accuracy and anti-noise jamming
CN108599257A (en) * 2018-05-30 2018-09-28 电子科技大学 A kind of current control method suitable for high bandwidth of phase lock loop

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
A Method to Improve the Dynamic Performance of Moving Average Filter-Based PLL;Wang, Jinyu 等;《IEEE Transactions on Power Electronics》;20141218;全文 *
An Improved Delayed Signal Cancellation PLL for Fast Grid Synchronization Under Distorted and Unbalanced Grid Condition;Qicheng Huang 等;《IEEE Transactions on Industry Applications》;20170502;全文 *
Comparative performance evaluation of PLLs based on filtering techniques for grid-integration of renewable energy systems;Zhenyu Wu 等;《2017 2nd International Conference on Power and Renewable Energy》;20160621;全文 *
MAF-PLL With Phase-Lead Compensator;Saeed Golestan 等;《IEEE Transactions on Industrial Electronics》;20141224;全文 *
Performance Evaluations of Four MAF-Based PLL Algorithms for Grid-Synchronization of Three-Phase Grid-Connected PWM Inverters and DGs;Han Yang 等;《Journal of Power Electronics》;20160920;全文 *
Robust Control Scheme for Three-Phase Grid-Connected Inverters With LCL-Filter Under Unbalanced and Distorted Grid Conditions;Ngoc-Bao Lai 等;《IEEE Transactions on Energy Conversion》;20170927;全文 *
WPT中高效E类功率放大器的研究;蒋鹏 等;《电子元件与材料》;20170731;全文 *
实现相位和频率检测解耦的快速锁相环;李子林 等;《电力系统自动化》;20190310;全文 *

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