CN110046124A - A kind of redundance module synchronization method and device - Google Patents
A kind of redundance module synchronization method and device Download PDFInfo
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- CN110046124A CN110046124A CN201910209069.8A CN201910209069A CN110046124A CN 110046124 A CN110046124 A CN 110046124A CN 201910209069 A CN201910209069 A CN 201910209069A CN 110046124 A CN110046124 A CN 110046124A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
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Abstract
The embodiment of the invention provides a kind of redundance module synchronization method and devices, applied to more than two remaining modules, the described method includes: being directed to each remaining module, the start time point of duty cycle, the first synchronous circuit sending logic level of the first synchronous circuit of the remaining module to other remaining modules are reached every time；In the first preset time period after start time point, determining to shake hands for the first time synchronizes success；At the end of shaking hands for the first time, for each remaining module, the first synchronous circuit of the remaining module sends the opposite levels opposite with logic level expression logic to the first synchronous circuit of other remaining modules；In the second preset time period after finish time of shaking hands for the first time, determine that second handshake synchronizes success.Due to that at interval of a duty cycle, can synchronize to the first synchronous circuit of each remaining module during execution task, the accumulated error of remaining intermodule is reduced in this way.
Description
Technical field
The present invention relates to control computer fields, more particularly to a kind of redundance module synchronization method and device.
Background technique
Multiple identical functional modules can be used in redundancy technology, receive identical information, are decided by vote by remaining and are detected
To obtain the working condition of functional module.Redundance module applied to redundancy technology is to be used for multiple identical functional modules,
Terminate same task, to improve mission reliability.
The functional module (hereinafter referred to as remaining module) of multiple remainings is driven using the same clock source and reset source at present
The synchronous operation of remaining intermodule is realized to reach, and specific: the clock input of each remaining module is that the same clock source produces
Raw, then signal is issued by unified reset source, so that redundance module starts simultaneously at work.
This mode realizes the synchronous operation of remaining intermodule, however present inventor is realizing process of the invention
In, there are the following problems for meeting:
Synchronous clock source or reset source break down, and influence remaining intermodule synchronization degree and influence holding for entire synchronizing process
Row；Also, remaining intermodule, can be because of the waiting time of each remaining module and the difference in reaction time during execution task
Different, will lead to reduces in the synchronization degree for executing task process remaining intermodule, remaining in this way during prolonged execution task
Degree intermodule will lead to accumulated error, influence the operation of the system of entire synchronizing process.In short, the relevant technologies remaining intermodule is same
Step degree reduces, and influences the operation of entire synchronizing process.
Summary of the invention
The embodiment of the present invention is designed to provide a kind of redundance module synchronization method and device, to solve existing skill
The technical issues of remaining intermodule synchronization degree reduces in art, influences the operation of entire synchronizing process.Specific technical solution is as follows:
In a first aspect, present invention implementation provides a kind of redundance module synchronization method, it is applied to more than two remaining moulds
Block, which comprises
For each remaining module, the start time point of duty cycle is reached every time, and the first of the remaining module synchronizes electricity
First synchronous circuit sending logic level of other remaining modules of road direction, first synchronous circuit refer to each remaining module
Synchronous circuit in processor；
In the first preset time period after the start time point, if the first synchronous circuit of each remaining module
Receive the logic level that respective first synchronous circuit of other remaining modules is sent, then determine to shake hands for the first time it is synchronous at
Function；
At the end of shaking hands the first time, for each remaining module, the first synchronous circuit of the remaining module to its
First synchronous circuit of his remaining module sends the level opposite with logic level expression logic, and patrols described with described
Collecting level indicates the opposite level of logic, as opposite levels；
In the second preset time period after finish time of shaking hands for the first time, if the first of each remaining module is synchronous
Circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then determines second handshake
Synchronize success.
Further, it is directed to each remaining module described, reaches the start time point of duty cycle, the remaining mould every time
First synchronous circuit of block to before the first synchronous circuit sending logic level of other remaining modules, the method also includes:
For each remaining module, when the remaining module powers on, the first synchronous circuit of the remaining module is to more than other
Spend the first synchronous circuit sending logic level of module；
It is powering in the third preset time period after the moment, if the first synchronous circuit of each remaining module receives
The logic level sent to respective first synchronous circuit of other remaining modules, then determining to shake hands for the first time synchronizes success；
At the end of shaking hands the first time, for each remaining module, the first synchronous circuit of the remaining module to its
First synchronous circuit of his remaining module sends the level opposite with logic level expression logic, and patrols described with described
Collecting level indicates the opposite level of logic, as opposite levels；
In the 4th preset time period after finish time of shaking hands for the first time, if the first of each remaining module is synchronous
Circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then determines second handshake
Synchronize success.
Further, the method also includes:
If it is same that the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first
The logic level that step circuit is sent then determines synchronization failure of shaking hands for the first time, and records failure, wherein the failure includes: not
Receive the remaining module for the logic level that respective first synchronous circuit of other remaining modules is sent.
Further, the method also includes:
If it is same that the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first
The opposite levels that step circuit is sent, then determine second handshake synchronization failure, and record failure.
Second aspect, present invention implementation provide a kind of redundance module synchronization device, comprising:
First control module reaches the start time point of duty cycle, the remaining for being directed to each remaining module every time
To the first synchronous circuit sending logic level of other remaining modules, first synchronous circuit is first synchronous circuit of module
Refer to the synchronous circuit in the processor of each remaining module；
First judgment module, in the first preset time period after the start time point, if each remaining
First synchronous circuit of module receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines
It shakes hands for the first time and synchronizes success；
Second control module, at the end of shaking hands the first time, for each remaining module, the remaining module
First synchronous circuit sends the level opposite with logic level expression logic to the first synchronous circuit of other remaining modules,
And by the level opposite with logic level expression logic, as opposite levels；
Second judgment module, in the second preset time period after finish time of shaking hands for the first time, if each
First synchronous circuit of remaining module receives the opposite electricity that respective first synchronous circuit of other remaining modules is sent
It is flat, then determine that second handshake synchronizes success.
Further, described device further include:
Third control module, for reaching the start time point of duty cycle every time for each remaining module described,
First synchronous circuit of the remaining module is to before the first synchronous circuit sending logic level of other remaining modules, for each
Remaining module, when the remaining module powers on, the first synchronous circuit of the remaining module is synchronized to the first of other remaining modules
Circuit sending logic level；
Third judgment module, for powering in the third preset time period after the moment, if each remaining module
First synchronous circuit receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines for the first time
It shakes hands and synchronizes success；
4th control module, at the end of shaking hands the first time, for each remaining module, the remaining module
First synchronous circuit sends the level opposite with logic level expression logic to the first synchronous circuit of other remaining modules,
And by the level opposite with logic level expression logic, as opposite levels；
4th judgment module, in the 4th preset time period after finish time of shaking hands for the first time, if each
First synchronous circuit of remaining module receives the opposite electricity that respective first synchronous circuit of other remaining modules is sent
It is flat, then determine that second handshake synchronizes success.
Further, the first judgment module, if being also used to the first synchronous circuit of at least one remaining module
The logic level that respective first synchronous circuit of other remaining modules is sent is not received, then determines synchronous lose of shaking hands for the first time
It loses, and records failure, wherein the failure includes: not receiving what respective first synchronous circuit of other remaining modules was sent
The remaining module of logic level.
Further, second judgment module, is also used to:
If it is same that the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first
The opposite levels that step circuit is sent, then determine second handshake synchronization failure, and record failure.
The third aspect, present invention implementation provide a kind of electronic equipment, including processor, communication interface, memory and logical
Believe bus, wherein processor, communication interface, memory terminate mutual communication by communication bus；
Memory, for storing computer program；
Processor when for executing the program stored on memory, realizes method and step described in first aspect.
Fourth aspect, present invention implementation provide a kind of computer readable storage medium, the computer-readable storage medium
Instruction is stored in matter, when run on a computer, so that computer executes any method of above-mentioned first aspect.
A kind of redundance module synchronization method and device provided in an embodiment of the present invention, for the first of each remaining module
Synchronous circuit, reaches the start time point of duty cycle every time, and the first synchronous circuit of the remaining module is to other remaining modules
The first synchronous circuit sending logic level；In the first preset time period after start time point, if each remaining mould
First synchronous circuit of block receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines the
It once shakes hands and synchronizes success；At the end of shaking hands for the first time, for each remaining module, the first synchronous circuit of the remaining module
Opposite levels are sent to the first synchronous circuit of other remaining modules, when second after finish time of shaking hands for the first time is default
Between in section, if the first synchronous circuit of each remaining module receives the respective first synchronous circuit hair of other remaining modules
The opposite levels sent then determine that second handshake synchronizes success.
It can be seen that reaching the start time point in preset task period, the first synchronous circuit of each remaining module every time
It is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to executing task process
In, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way reduction remaining module
Between accumulated error.
Certainly, implement any of the products of the present invention or method it is not absolutely required at the same reach all the above excellent
Point.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the first pass schematic diagram of redundance module synchronization method provided in an embodiment of the present invention；
Fig. 2 is the second procedure schematic diagram of redundance module synchronization method provided in an embodiment of the present invention；
Fig. 3 is the third flow diagram of redundance module synchronization method provided in an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of redundance module synchronization device provided in an embodiment of the present invention；
Fig. 5 is that the first synchronous circuit of the embodiment of the present invention interacts schematic diagram with the first of central processing unit；
Fig. 6 is the second interaction signal corresponding with central processing unit interactive process of the first synchronous circuit of the embodiment of the present invention
Figure；
Fig. 7 is the structural schematic diagram of electronic equipment provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
For the problem that the remaining intermodule synchronization degree of the prior art reduces, the operation of entire synchronizing process, this hair are influenced
Bright embodiment provides a kind of redundance module synchronization method and device, and redundance module synchronization may be implemented using following steps:
For the first synchronous circuit of each remaining module, the start time point of duty cycle, the remaining mould are reached every time
First synchronous circuit sending logic level of first synchronous circuit of block to other remaining modules；After start time point
In one preset time period, if the first synchronous circuit of each remaining module receives other remaining modules respective first together
The logic level that step circuit is sent, then determining to shake hands for the first time synchronizes success；At the end of shaking hands for the first time, for each remaining
First synchronous circuit of module, the remaining module sends opposite levels to the first synchronous circuit of other remaining modules, first
In the second preset time period after secondary finish time of shaking hands, if the first synchronous circuit of each remaining module receives it
The opposite levels that respective first synchronous circuit of his remaining module is sent, then determine that second handshake synchronizes success.
It can be seen that reaching the start time point in preset task period, the first synchronous circuit of each remaining module every time
It is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to executing task process
In, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way reduction remaining module
Between accumulated error.
Redundance module synchronization method provided in an embodiment of the present invention is introduced first below.
A kind of redundance module synchronization method provided by the embodiment of the present invention can be applied to but be not limited to redundance point
Cloth flight control computer.
As shown in Figure 1, a kind of redundance module synchronization method provided by the embodiment of the present invention, is applied to more than two or more
Module is spent, this method may include steps of:
Step 110, for each remaining module, the start time point of duty cycle is reached every time, the of the remaining module
For one synchronous circuit to the first synchronous circuit sending logic level of other remaining modules, the first synchronous circuit refers to each remaining mould
Synchronous circuit in the processor of block.Here the first synchronous circuit is differentiation for convenience and uses, and the first synchronous circuit
In " first " do not do restriction sequentially.The first synchronous circuit in the embodiment of the present invention can be any can be realized originally
The synchronous circuit of inventive embodiments method, no longer illustrates one by one herein.
Wherein, duty cycle can refer to time point when each periodic duty starts.Duty cycle can be, but not limited to
It is to be configured according to user demand, general duty cycle can be to be executed according to the characteristic and control task of institute's control system
Time comprehensively considers determining.Generally for institute's control system is aircraft control system, duty cycle is generally a few tens of milliseconds.
As long as belonging to implementation of the present invention to eliminate the duty cycle of the accumulation clocking error of remaining intermodule periodic duty execution
The different citing herein of the protection scope of example.Illustratively, duty cycle can be, but not limited to be 20 milliseconds, every 20 milliseconds of
Begin time point.
Above-mentioned logic level may include high level and low level, and high level can indicate that low level can be used with " 1 "
" 0 " indicates.Exemplary illustration, the digital circuit that different components is formed, the corresponding logic level of voltage are also different.In logic
In gate circuit (Transistor-Transistor Logic, abbreviation TTL) gate circuit, it will be greater than 3.5 volts of voltage and be defined as height
Level is indicated with number 1；Voltage by voltage less than 0.3 volt is defined as low level, is indicated with number 0, but high level and low electricity
Flat voltage is not limited to this.Above-mentioned logic level is properly termed as discrete magnitude, and discrete magnitude facilitates control, can be in required time section
Inside monitor whether that there are these discrete magnitudes.
This step 110 can reach the start time point of duty cycle, the remaining using following any implementation every time
First synchronous circuit sending logic level of first synchronous circuit of module to other remaining modules:
In one implementation, the start time point of duty cycle is reached every time, and default logic level is high level, should
First synchronous circuit of remaining module sends low level to the first synchronous circuit of other remaining modules.
In another implementation, the start time point of duty cycle is reached every time, default logic level is low level,
First synchronous circuit of the remaining module sends high level to the first synchronous circuit of other remaining modules.In this way by the way that this is remaining
Spend module the first synchronous circuit sending logic level from the first synchronous circuit to other remaining modules, with default logic level into
Row is distinguished, and is adapted to different situations, so as to perceive new logic level, and then be may determine that the first of remaining module
Whether secondary shake hands synchronizes success.
Step 120, in the first preset time period after start time point, if the first of each remaining module is synchronous
Circuit receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines synchronization of shaking hands for the first time
Success.The remaining module is interacted with other remaining modules in this way, then unifies to determine all received logics of remaining module
Level can make all remaining intermodules synchronous.
Wherein, the remaining module and other remaining modules are both contained in all remaining modules.In the embodiment of the present invention
" first ", " second " in the second preset time period, " third " in third preset time period and in first preset time period
" the 4th " in four preset time periods is but not do restriction sequentially to distinguish and illustrate these preset time periods.These are pre-
It is depending on the circumstances if the period may be the same or different.Illustratively, the first preset time period can with but it is unlimited
In for 200 microseconds.The synchronization for completing remaining intermodule using duty cycle in this way, is properly termed as cycle synchronisation, compared to correlation
Technology, cycle synchronisation reach Microsecond grade, cycle synchronisation fast speed, and synchronization degree meets application demand.
In this step 120, it can produce two kinds at the end of shaking hands for the first time as a result, two of them result includes: for the first time
It shakes hands and synchronizes synchronization failure of successfully and for the first time shaking hands.Specific result can be depending on the execution of practical solution.
Step 130, at the end of shaking hands for the first time, for each remaining module, the first synchronous circuit of the remaining module
The level opposite with logic level expression logic is sent to the first synchronous circuit of other remaining modules, and will be with the logic electricity
The flat level for indicating that logic is opposite, as opposite levels.
End of shaking hands for the first time in this step 130, which can refer to, shakes hands for the first time when synchronizing successfully, is also possible to for the first time
Shake hands synchronization failure, specifically synchronize successfully or synchronization failure be according to the actual situation depending on.The embodiment of the present invention will be for the first time
Shake hands end, as second handshake entry condition and use.
Wherein, logic level can be high level, and the level opposite with logic level expression logic is low level；Logic electricity
Flat can be low level, and the level opposite with logic level expression logic is high level.This indicates logic phase with logic level
Anti- level is in order to which above-mentioned logic level distinguishes, so as to judge whether the second handshake of remaining module synchronizes
Success.
Step 140, in the second preset time period after finish time of shaking hands for the first time, if each remaining module
First synchronous circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then determines the
Secondary shake hands synchronizes success.
Two kinds be can produce in this step 140, at the end of second handshake as a result, two of them result includes: second
It shakes hands and synchronizes successfully and second handshake synchronization failure.Specifically as a result, depending on the execution of practical solution.
Each remaining module may be in same cabinet in the embodiment of the present invention, and the level used can be low voltage logic door
Circuit (Low Voltage Transistor-Transistor Logic, abbreviation LVTTL) level or Transistor-Transistor Logic level.Each remaining mould
Block may be in different cabinets, and for the anti-interference ability for improving transmission line, the reliability of improve data transfer can generally be adopted
With the mode interaction data of RS422 differential level, wherein EIA-422 (past is known as RS-422) is a series of regulation using 4
Line, full duplex, differential transfer, the Data Transport Protocol of multi-point.
In the embodiment of the present invention, the start time point in preset task period is reached every time, and the first of each remaining module is same
Step circuit is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to appointing in execution
During business, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way more than reduction
Spend the accumulated error of intermodule, guarantee subsequent each remaining module sampled in synchronization, operation, voting and output.And
Each remaining module has respective synchronous circuit, for the relevant technologies are using unified clock source, reduces single-point
Failure.
As shown in connection with fig. 1, on the basis of Fig. 1, the embodiment of the present invention can be powered up together when remaining module powers on
Step can also be synchronized when remaining module is powered on without power-up.In order to improve the synchronization degree of remaining intermodule, referring to figure
Shown in 2, the embodiment of the present invention also provides a kind of redundance module synchronization method, prior to step 110, the method also includes:
Step 101, for each remaining module, when the remaining module powers on, the first synchronous circuit of the remaining module
To the first synchronous circuit sending logic level of other remaining modules；
Step 102, it is powering in the third preset time period after the moment, if the first of each remaining module synchronizes electricity
Road receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determine to shake hands for the first time it is synchronous at
Function.
The synchronous purpose of power-up is to eliminate the asynchronous degree generated because each remaining module power-on time is inconsistent, third
Preset time period generally can be set to second grade, propose demand with specific reference to actual conditions.Illustratively, third preset time period
It can be, but not limited to are as follows: 1 second.
Step 103, at the end of shaking hands for the first time, for each remaining module, the first synchronous circuit of the remaining module
The level opposite with logic level expression logic is sent to the first synchronous circuit of other remaining modules, and will be with logic level table
Show the opposite level of logic, as opposite levels；
Step 104, in the 4th preset time period after finish time of shaking hands for the first time, if each remaining module
First synchronous circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then determines the
Secondary shake hands synchronizes success.It is any in the embodiment of the present invention once to shake hands unsuccessfully, then determine synchronization failure.
Restriction content of this step 101 into this step 104, with the restriction in above-mentioned steps 110 into above-mentioned steps 140
The identical content of content, details are not described herein, and can reach identical beneficial effect.
In the embodiment of the present invention, the start time point in preset task period is reached every time, and the first of each remaining module is same
Step circuit is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to appointing in execution
During business, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way more than reduction
Spend the accumulated error of intermodule；Also, the asynchronous degree generated because each remaining module power-on time is inconsistent is eliminated, and then is subtracted
The accumulated error of few remaining intermodule.
Shown in Figure 3 on the basis of Fig. 1 and Fig. 2, the embodiment of the present invention also provides a kind of redundance module synchronization
Method, after step 110, the method also includes:
Step 111, in the first preset time period after start time point, judge that the first of the remaining module synchronizes electricity
Whether road receives the logic level that respective first synchronous circuit of other remaining modules is sent；If so, thening follow the steps
120；If not, if the first synchronous circuit of at least one i.e. remaining module does not receive other remaining modules respective the
The logic level that one synchronous circuit is sent, thens follow the steps 112；
Step 112, determine synchronization failure of shaking hands for the first time, and record failure, wherein failure includes: not receiving other
The remaining module for the logic level that respective first synchronous circuit of remaining module is sent.
After step 130, the method also includes:
Step 131, in the second preset time period after finish time of shaking hands for the first time, judge the of the remaining module
Whether one synchronous circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent；If it is, holding
Row step 140；If not, if not receive other remaining modules each for the first synchronous circuit of at least one i.e. remaining module
From the first synchronous circuit send opposite levels, then follow the steps 132；
Step 132, determine second handshake synchronization failure, and record failure.
In the embodiment of the present invention, the start time point in preset task period is reached every time, and the first of each remaining module is same
Step circuit is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to appointing in execution
During business, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way more than reduction
Spend the accumulated error of intermodule；Further, it is possible to carry out record failure in time in synchronization failure, located in time so as to subsequent
Reason.
It continues with and redundance module synchronization device provided in an embodiment of the present invention is introduced.
As shown in figure 4, the embodiment of the present invention also provides a kind of redundance module synchronization device, described device further include:
First control module 21 reaches the start time point of duty cycle, this is remaining for being directed to each remaining module every time
Spend first synchronous circuit sending logic level of the first synchronous circuit of module to other remaining modules, first synchronous circuit
Refer to the synchronous circuit in the processor of each remaining module.
Shown in Figure 5, " the first synchronous circuit of remaining module is to other remaining modules in first control module 21
The first synchronous circuit sending logic level " be used as synchronization output signal, by remaining module processor 32 control output it is discrete
Amount generates synchronization signal output after the driving of the first synchronous circuit 31, processor or field-programmable gate array can be used herein
It arranges (Field-Programmable Gate Array, abbreviation FPGA) chip and realizes synchronization signal function, synchronize electricity through first
Road 31 externally exports after driving.
First judgment module 22, in the first preset time period after the start time point, if each remaining
First synchronous circuit of degree module receives the logic level that respective first synchronous circuit of other remaining modules is sent, then sentences
Fixed shake hands for the first time synchronizes success.
It is shown in Figure 6, by received " other remaining modules respective first of each remaining module in first judgment module 22
The logic level that synchronous circuit is sent " generates the processing that synchronization signal uploads remaining module after the driving of the first synchronous circuit 31
32 bus of device.The processor 32 of each remaining module is identical status, completes identical task processing.
Second control module 23, at the end of shaking hands the first time, for each remaining module, the remaining module
The first synchronous circuit sent and the opposite electricity of logic level expression logic to the first synchronous circuit of other remaining modules
It is flat, and by the level opposite with logic level expression logic, as opposite levels；
Second judgment module 24, in the second preset time period after finish time of shaking hands for the first time, if often
First synchronous circuit of a remaining module receives the described opposite of the respective first synchronous circuit transmission of other remaining modules
Level then determines that second handshake synchronizes success.
In the embodiment of the present invention, the start time point in preset task period is reached every time, and the first of each remaining module is same
Step circuit is shaken hands twice, if shake hands synchronizes success twice, realizes that redundance intermodule synchronizes success.Due to appointing in execution
During business, at interval of a duty cycle, the first synchronous circuit of each remaining module can be synchronized, in this way more than reduction
Spend the accumulated error of intermodule, guarantee subsequent each remaining module sampled in synchronization, operation, voting and output.And
Each remaining module has respective synchronous circuit, for the relevant technologies are using unified clock source, reduces single-point
Failure.
In one possible implementation, described device further include:
Third control module, for reaching the start time point of duty cycle every time for each remaining module described,
First synchronous circuit of the remaining module is to before the first synchronous circuit sending logic level of other remaining modules, for each
Remaining module, when the remaining module powers on, the first synchronous circuit of the remaining module is synchronized to the first of other remaining modules
Circuit sending logic level；
Third judgment module, for powering in the third preset time period after the moment, if each remaining module
First synchronous circuit receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines for the first time
It shakes hands and synchronizes success；
4th control module, at the end of shaking hands the first time, for each remaining module, the remaining module
First synchronous circuit sends the level opposite with logic level expression logic to the first synchronous circuit of other remaining modules,
And by the level opposite with logic level expression logic, as opposite levels；
4th judgment module, in the 4th preset time period after finish time of shaking hands for the first time, if each
First synchronous circuit of remaining module receives the opposite electricity that respective first synchronous circuit of other remaining modules is sent
It is flat, then determine that second handshake synchronizes success.
In one possible implementation, the first judgment module, if being also used at least one remaining module
The first synchronous circuit do not receive the logic level that respective first synchronous circuit of other remaining modules is sent, then determine first
Secondary synchronization failure of shaking hands, and record failure, wherein the failure includes: it is same not receive other remaining modules respective first
The remaining module for the logic level that step circuit is sent.
In one possible implementation, second judgment module, is also used to:
If it is same that the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first
The opposite levels that step circuit is sent, then determine second handshake synchronization failure, and record failure.
The device of the embodiment of the present invention further include: the reset circuit in the processor of each remaining module.The present invention is implemented
Reset circuit in example can be any reset circuit that can be realized present invention method, no longer illustrate one by one herein.
It, can be using respective reset electricity in remaining module because the operation starting time synchronization degree requirement of respective remaining module is not high
Single Point of Faliure is further eliminated without unified reset circuit in road.
It continues with and electronic equipment provided in an embodiment of the present invention is introduced.
The embodiment of the invention also provides a kind of electronic equipment, as shown in fig. 7, comprises processor 41, communication interface 42, depositing
Reservoir 43 and communication bus 44, wherein processor 41, communication interface 42, memory 43 are terminated each other by communication bus 44
Communication,
Memory 43, for storing computer program；
Processor 41 when for executing the program stored on memory 43, realizes following steps:
For each remaining module, the start time point of duty cycle is reached every time, and the first of the remaining module synchronizes electricity
First synchronous circuit sending logic level of other remaining modules of road direction, first synchronous circuit refer to each remaining module
Synchronous circuit in processor；
In the first preset time period after the start time point, if the first synchronous circuit of each remaining module
Receive the logic level that respective first synchronous circuit of other remaining modules is sent, then determine to shake hands for the first time it is synchronous at
Function；
At the end of shaking hands the first time, for each remaining module, the first synchronous circuit of the remaining module to its
First synchronous circuit of his remaining module sends the level opposite with logic level expression logic, and patrols described with described
Collecting level indicates the opposite level of logic, as opposite levels；
In the second preset time period after finish time of shaking hands for the first time, if the first of each remaining module is synchronous
Circuit receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then determines second handshake
Synchronize success.
The communication bus that above-mentioned electronic equipment is mentioned can be PCI (Peripheral Component
Interconnect, Peripheral Component Interconnect standard) bus or EISA (Extended Industry Standard
Architecture, expanding the industrial standard structure) bus etc..The communication bus can be divided into address bus, data/address bus, control
Bus etc..Only to be indicated with a thick line in figure convenient for indicating, it is not intended that an only bus or a type of total
Line.
Communication interface is for the communication between above-mentioned electronic equipment and other equipment.
Memory may include RAM (Random Access Memory, random access memory), also may include NVM
(Non-Volatile Memory, nonvolatile memory), for example, at least a magnetic disk storage.Optionally, memory may be used also
To be storage device that at least one is located remotely from aforementioned processor.
Above-mentioned processor can be general processor, including CPU (Central Processing Unit, central processing
Device), NP (Network Processor, network processing unit) etc.；Can also be DSP (Digital Signal Processing,
Digital signal processor), ASIC (Application Specific Integrated Circuit, specific integrated circuit),
FPGA (Field-Programmable Gate Array, field programmable gate array) or other programmable logic device are divided
Vertical door or transistor logic, discrete hardware components.
Method provided in an embodiment of the present invention can be applied to electronic equipment.Specifically, the electronic equipment can be with are as follows: desk-top
Computer, portable computer, server etc..It is not limited thereto, it is any that electronic equipment of the invention may be implemented, it belongs to
Protection scope of the present invention.
The embodiment of the invention provides a kind of computer readable storage medium, computer journey is stored in the storage medium
The step of sequence, the computer program realizes above-mentioned redundance module synchronization method when being executed by processor.
The embodiment of the invention provides a kind of computer program products comprising instruction, when run on a computer,
So that computer executes the step of above-mentioned redundance module synchronization method.
The embodiment of the invention provides a kind of computer programs, when run on a computer, so that computer executes
The step of above-mentioned redundance module synchronization method.
For device/server/electronic equipment/storage medium/computer program product/computer program comprising instruction
For embodiment, since it is substantially similar to the method embodiment, so being described relatively simple, related place is implemented referring to method
The part explanation of example.
It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
Each embodiment in this specification is all made of relevant mode and describes, same and similar portion between each embodiment
Dividing may refer to each other, and each embodiment focuses on the differences from other embodiments.Especially for device/
For server/electronic equipment/storage medium/computer program product/computer program embodiments comprising instruction, due to it
It is substantially similar to embodiment of the method, so being described relatively simple, the relevent part can refer to the partial explaination of embodiments of method.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the scope of the present invention.It is all
Any modification, equivalent replacement, improvement and so within the spirit and principles in the present invention, are all contained in protection scope of the present invention
It is interior.
Claims (8)
1. a kind of redundance module synchronization method, which is characterized in that be applied to more than two remaining modules, which comprises
For each remaining module, reach the start time point of duty cycle every time, the first synchronous circuit of the remaining module to
First synchronous circuit sending logic level of other remaining modules, first synchronous circuit refer to the processing of each remaining module
Synchronous circuit in device；
In the first preset time period after the start time point, if the first synchronous circuit of each remaining module connects
The logic level that respective first synchronous circuit of other remaining modules is sent is received, then determines to shake hands for the first time to synchronize success；
At the end of shaking hands the first time, for each remaining module, the first synchronous circuit of the remaining module is to more than other
The first synchronous circuit transmission of module level opposite with logic level expression logic is spent, and will be described electric with the logic
The flat level for indicating that logic is opposite, as opposite levels；
In the second preset time period after finish time of shaking hands for the first time, if the first synchronous circuit of each remaining module
The opposite levels that respective first synchronous circuit of other remaining modules is sent are received, then determine that second handshake is synchronous
Success.
2. the method as described in claim 1, which is characterized in that be directed to each remaining module described, reach task week every time
First synchronous circuit sending logic of the start time point of phase, the first synchronous circuit to other remaining modules of the remaining module is electric
Before flat, the method also includes:
For each remaining module, when the remaining module powers on, the first synchronous circuit of the remaining module is to other remaining moulds
First synchronous circuit sending logic level of block；
It is powering in the third preset time period after the moment, if the first synchronous circuit of each remaining module receives it
The logic level that respective first synchronous circuit of his remaining module is sent, then determining to shake hands for the first time synchronizes success；
At the end of shaking hands the first time, for each remaining module, the first synchronous circuit of the remaining module is to more than other
The first synchronous circuit transmission of module level opposite with logic level expression logic is spent, and will be described electric with the logic
The flat level for indicating that logic is opposite, as opposite levels；
In the 4th preset time period after finish time of shaking hands for the first time, if the first synchronous circuit of each remaining module
The opposite levels that respective first synchronous circuit of other remaining modules is sent are received, then determine that second handshake is synchronous
Success.
3. method according to claim 1 or 2, which is characterized in that the method also includes:
If the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first and synchronizes electricity
The logic level that road is sent then determines synchronization failure of shaking hands for the first time, and records failure, wherein the failure includes: not receiving
The remaining module of the logic level sent to respective first synchronous circuit of other remaining modules.
4. method according to claim 1 or 2, which is characterized in that the method also includes:
If the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first and synchronizes electricity
The opposite levels that road is sent, then determine second handshake synchronization failure, and record failure.
5. a kind of redundance module synchronization device, which is characterized in that described device further include:
First control module reaches the start time point of duty cycle, the remaining module for being directed to each remaining module every time
The first synchronous circuit to the first synchronous circuit sending logic level of other remaining modules, first synchronous circuit refers to often
Synchronous circuit in the processor of a remaining module；
First judgment module, in the first preset time period after the start time point, if each remaining module
The first synchronous circuit receive the logic level that respective first synchronous circuit of other remaining modules is sent, then determine first
Secondary shake hands synchronizes success；
Second control module, at the end of shaking hands the first time, for each remaining module, the first of the remaining module
Synchronous circuit sends the level opposite with logic level expression logic to the first synchronous circuit of other remaining modules, and will
The level opposite with logic level expression logic, as opposite levels；
Second judgment module, in the second preset time period after finish time of shaking hands for the first time, if each remaining
First synchronous circuit of module receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then
Determine that second handshake synchronizes success.
6. device as claimed in claim 5, which is characterized in that described device further include:
Third control module reaches the start time point of duty cycle, this is remaining for being directed to each remaining module described every time
The first synchronous circuit of module is spent to before the first synchronous circuit sending logic level of other remaining modules, for each remaining
Module, when the remaining module powers on, the first synchronous circuit of the first synchronous circuit of the remaining module to other remaining modules
Sending logic level；
Third judgment module, for powering in the third preset time period after the moment, if the first of each remaining module
Synchronous circuit receives the logic level that respective first synchronous circuit of other remaining modules is sent, then determines to shake hands for the first time
Synchronize success；
4th control module, at the end of shaking hands the first time, for each remaining module, the first of the remaining module
Synchronous circuit sends the level opposite with logic level expression logic to the first synchronous circuit of other remaining modules, and will
The level opposite with logic level expression logic, as opposite levels；
4th judgment module, in the 4th preset time period after finish time of shaking hands for the first time, if each remaining
First synchronous circuit of module receives the opposite levels that respective first synchronous circuit of other remaining modules is sent, then
Determine that second handshake synchronizes success.
7. such as device described in claim 5 or 6, which is characterized in that the first judgment module, if being also used at least one
First synchronous circuit of a remaining module does not receive the logic level that respective first synchronous circuit of other remaining modules is sent,
Then determine synchronization failure of shaking hands for the first time, and record failure, wherein the failure includes: it is each not receive other remaining modules
From the first synchronous circuit send logic level remaining module.
8. such as device described in claim 5 or 6, which is characterized in that second judgment module is also used to:
If the first synchronous circuit of at least one remaining module does not receive other remaining modules respective first and synchronizes electricity
The opposite levels that road is sent, then determine second handshake synchronization failure, and record failure.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910209069.8A CN110046124A (en) | 2019-03-19 | 2019-03-19 | A kind of redundance module synchronization method and device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910209069.8A CN110046124A (en) | 2019-03-19 | 2019-03-19 | A kind of redundance module synchronization method and device |
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| CN110046124A true CN110046124A (en) | 2019-07-23 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114779881A (en) * | 2021-12-07 | 2022-07-22 | 北京科银京成技术有限公司 | Synchronous detection method, device, equipment and storage medium for redundancy computer |
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2019
- 2019-03-19 CN CN201910209069.8A patent/CN110046124A/en active Pending
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| Title |
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| 吴厚航: "《深入浅出玩转FPGA 第3版》", 30 June 2017, 北京航空航天大学出版社 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114779881A (en) * | 2021-12-07 | 2022-07-22 | 北京科银京成技术有限公司 | Synchronous detection method, device, equipment and storage medium for redundancy computer |
| CN114779881B (en) * | 2021-12-07 | 2023-07-04 | 北京科银京成技术有限公司 | Synchronous detection method, device, equipment and storage medium for redundancy computer |
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