CN110010182B - Programming method of nonvolatile memory - Google Patents

Programming method of nonvolatile memory Download PDF

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Publication number
CN110010182B
CN110010182B CN201910266095.4A CN201910266095A CN110010182B CN 110010182 B CN110010182 B CN 110010182B CN 201910266095 A CN201910266095 A CN 201910266095A CN 110010182 B CN110010182 B CN 110010182B
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programming
current
memory
margin
verification
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CN110010182A (en
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徐顺强
许浩
许铁元
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Hunan Dajia Data Technology Co ltd
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Hunan Dajia Data Technology Co ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a programming method of a nonvolatile memory. The programming method comprises the steps of: (S1) setting a margin current value and a maximum number of programming times given programming data; (S2) program verification: verifying whether the data in all cells of the memory are consistent with the given programming data and whether the memory cell current meets the margin current requirement; (S3) if the requirement in the step (S2) is met, the program verification is passed and the verification process is ended, otherwise, the step (S4) is carried out; (S4) judging whether the maximum programming times are reached, if so, not passing the programming verification, and ending the verification process; otherwise, the memory is programmed according to the given programming data, and the process proceeds to step (S2). The invention can ensure that the programming window is larger than a certain margin, and the margin can be changed along with the change of the programming verification voltage; the power consumption can be reduced under low voltage, and the power consumption is suitable for different working voltage requirements.

Description

Programming method of nonvolatile memory
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a programming method of a nonvolatile memory.
Background
The nonvolatile memory means that the data of the memory can still be stored after the power is turned off, and the structure of the nonvolatile memory comprises a memory array, a sense amplifier, a decoder and other external circuits.
The nonvolatile memory may be classified into a one-time programmable nonvolatile memory (OTP), a limited time programmable nonvolatile memory (FTP), and a multiple time programmable nonvolatile Memory (MTP) according to the number of programmable times, and may be further classified into an independent memory and an embedded memory.
The cell structure of the nonvolatile memory is of two types, namely a single-ended structure and a differential structure.
The nonvolatile memory stores data by changing the threshold voltage of the memory cell, programming and erasing operations change the charge of the floating gate of the memory cell, thereby adjusting the threshold voltage of the memory cell, the change of the threshold voltage of the memory cell causes the change of the cell current, and the data of the memory cell is read by comparing the magnitude of the cell current with the magnitude of the reference current or the magnitude of the currents at both ends of the differential cell. Due to leakage, read noise, data retention time, and read speed requirements during storage, memory cells need to have a certain threshold window, and in addition, program erase rate differences between memory cells result in a certain distribution of threshold voltages of the cells, program verification is required to ensure that the threshold voltage of each programmed memory cell reaches a certain threshold window.
The usual program verification method is that the cell current is compared with the reference current through the sense amplifier, and the cell current is larger than the reference current, namely verification is passed, and the defect of program verification is that a certain window allowance requirement cannot be guaranteed compared with the reference current. In order to overcome the above shortcomings, the present invention proposes a new programming method.
Disclosure of Invention
The method for programming and verifying the nonvolatile memory has the defects that the reference current cannot be guaranteed to have certain window requirements compared with the reference current, and the reference current is not generally changed with voltage, but the cell current is changed with the voltage. The invention provides a programming method, which comprises the following specific technical scheme:
a method of programming a non-volatile memory, comprising the steps of:
(S1) setting a margin current value and a maximum number of programming times given programming data;
(S2) program verification: verifying whether the data in all cells of the memory are consistent with the given programming data and whether the memory cell current meets the margin current requirement;
(S3) if the requirement in the step (S2) is met, the program verification is passed and the verification process is ended, otherwise, the step (S4) is carried out;
(S4) judging whether the maximum programming times are reached, if so, not passing the programming verification, and ending the verification process; otherwise, the memory is programmed according to the given programming data, and the process proceeds to step (S2).
Further, the program verification in the step (S2) is performed on the single-ended memory cell structure and the differential memory cell structure by the following steps:
for a single-ended memory cell structure, verifying whether data in all cells of the memory are consistent with given programming data, and verifying whether a difference between a cell current and a reference current is greater than a current residual value, the reference current being a preselected current value;
for a differential memory cell structure, it is checked whether the data in all cells of the memory are consistent with given programming data, and whether the difference between the currents at both ends of the differential cells is greater than a margin current value.
Further, the margin current is changed with the change of the program verification voltage, and the margin current value is determined according to the program verification voltage. The reference current is selected as the current value corresponding to the intermediate state of two adjacent programmed states of the cell.
The beneficial effects obtained by adopting the invention are as follows: the programming method can ensure that the programming window is larger than a certain margin, and the margin current can be changed along with the change of the programming verification voltage; the power consumption can be reduced under low voltage, and the power consumption is suitable for different working voltage requirements; the requirements of read time and data storage on a programming window are guaranteed, repeated and excessive programming of the unit can be avoided, and the programming state distribution is more concentrated; both single ended and differential memory cell structures are applicable.
Drawings
FIG. 1 is a reference flow chart of a programming method of the present invention;
FIG. 2 is a programming pulse diagram;
FIG. 3 is a schematic circuit diagram of the programming process of the present invention;
FIG. 4 is a current distribution of the cell and the added margin current i margin Wherein (a) is a case where the memory cell is of a single-ended structure and (b) is a case where the memory cell is of a differential structure.
Detailed Description
The invention will be further described with reference to the drawings and the specific examples. This detailed embodiment may be embodied in many alternate forms and is not limited to the embodiments set forth herein.
As shown in fig. 1, which is a reference flowchart of the programming method of the present invention, the data to be programmed is set by initializing before the programming is started, the required margin current is set according to the programming data, and the maximum number of programming times.
Program verification is performed to determine whether the data in the memory has been consistent with the given program data, and if the program verification data is consistent and satisfies the state of the margin current window, programming is ended. If the data are inconsistent, comparing the given programming data with the existing data of the memory, finding out different data, resetting the programming data, programming inconsistent memory units, and avoiding repetition and over programming. Here, the step of resetting the programming data is an optional step, and in an embodiment, the step of comparing the given programming data with the existing data of the memory may be omitted, and all the memory cells are programmed using the given programming data. Whether the memory cell current meets the margin current requirement is different for the differential memory cell and the single-ended memory cell, and although the margin current changes along with the change of the program verification voltage, the margin current value is a determined value after the program verification voltage is determined; the differential memory cell refers to whether the difference between the currents at two ends of the differential cell is larger than the residual current, and the single-ended memory cell refers to whether the difference between the cell current and the reference current is larger than the residual current.
The process of programming a memory cell using programming data is: programming is performed by pulses according to programming data, and programming operation is performed, wherein the programming pulses can be highly fixed pulses, as shown in fig. 2 # a ) As shown, a pulse of ramp up is also possible, as shown in fig. 2 (b).
Counting programming pulses, as shown in fig. 2, setting the number of pulses as N, and considering that programming fails when N exceeds a certain total number of pulses and programming verification is not passed, ending programming.
After programming, programming verification is carried out again, if the programming verification is passed, programming is finished, otherwise, the data are reset for programming until the data of the programming verification are consistent with the programming data (the data in all units of the memory are consistent with the given programming data and meet the requirement of the residual current), the programming is successful, or the programming is finished after a certain number of times of programming, the programming is failed, and the programming is finished.
As shown in fig. 3, a schematic circuit diagram of a programming process of a nonvolatile memory. For the differential memory cell, whether the difference between the currents at the two ends of the differential cell is larger than the residual current is compared, and one input end of the sense amplifier SA is set as one end i of the differential cell current cell The other input terminal is the other terminal i of the differential cell current * cell And the residual current i margin As shown in fig. 3 (a); for single-ended memory cells, it is compared whether the difference between the cell current and the reference current is greater than the margin current, and the sense amplifier SA is provided with one input connected in parallel with the reference current and the margin current, as shown in FIG. 3 (b), or vice versa, with one input connected in parallel with the reference current and the other input connected in parallel with the cell current and the margin current. Residual current i margin The magnitude of (2) is changed along with the voltage of programming verification, so that the different requirements of the residual current under different voltages can be realized. Since the cell current varies with voltage, and if the margin current does not correspondingly vary, program verification may not pass in this reasonable case, continuing programming, resulting in over programming, the current margin needs to vary with voltage. In an embodiment, the margin current i margin This can be achieved by selecting the same structure as the memory cell, ensuring consistency of the current margin variation with the cell current variation.
As shown in FIG. 4, the cell current distribution and the program verify added margin current i margin Is described. In the case of the memory cell shown in FIG. 4 (a) having a single-ended structure, the reference current I ref Typically, the reference current I is selected at the center of two adjacent programmed states P1 and P2 of the memory cell ref In parallel with the margin current, during program verification, comparing whether the cell current corresponding to the program state and the reference current have a certain margin gap, namely the margin current i margin . Memory cell shown in FIG. 4 (b)In the case of the differential structure, the programming states at two ends of the differential memory cell are respectively P1 and P2, the total current distribution after the memory cell with one end of the programming state P1 is connected in parallel with the margin current is P1, and during program verification, it is checked whether P1 and P1 are both on the same side of P2, that is, whether the programming states P1 and P2 have a certain margin gap, that is, the margin current i margin
The foregoing is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the foregoing examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the present invention may occur to one skilled in the art without departing from the principles of the present invention and are intended to be within the scope of the present invention.

Claims (2)

1. A method of programming a non-volatile memory, comprising the steps of:
(S1) setting a margin current value and a maximum programming frequency according to programming data, wherein the margin current value changes along with the change of a programming verification voltage;
(S2) program verification: checking whether the data in all the cells of the memory are consistent with the given programming data and whether the memory cell current meets the margin current requirement, wherein the judging method of whether the memory cell current meets the margin current requirement is as follows:
for a single-ended memory cell, checking whether the difference between the cell current and a reference current is greater than a current residual value, wherein the reference current is a preselected current value;
for the differential memory cell, checking whether the difference of the currents at two ends of the differential memory cell is larger than the residual current value;
(S3) if the requirement in the step (S2) is met, the program verification is passed and the verification process is ended, otherwise, the step (S4) is carried out;
(S4) judging whether the maximum programming times are reached, if so, not passing the programming verification, and ending the verification process; otherwise, the memory is programmed according to the given programming data, and the process proceeds to step (S2).
2. The method for programming a nonvolatile memory according to claim 1, wherein the step (S4) of programming the memory according to the given programming data comprises: according to the programming data, a programming operation is performed using pulses that select either a highly fixed pulse or a ramp-up pulse.
CN201910266095.4A 2019-04-03 2019-04-03 Programming method of nonvolatile memory Active CN110010182B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1791941A (en) * 2003-04-14 2006-06-21 桑迪士克股份有限公司 Read and erase verify methods and circuits suitable for low voltage non-volatile memories
CN107919158A (en) * 2016-10-10 2018-04-17 成都锐成芯微科技股份有限公司 Keep the method and system of non-volatility memorizer memory cell current detection window

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101671326B1 (en) * 2010-03-08 2016-11-01 삼성전자주식회사 Nonvolatile memory using interleaving technology and program method thereof
KR102128466B1 (en) * 2014-04-14 2020-06-30 삼성전자주식회사 Memory System, Method of Programming the Memory System and Method of Testing the Memory System

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1791941A (en) * 2003-04-14 2006-06-21 桑迪士克股份有限公司 Read and erase verify methods and circuits suitable for low voltage non-volatile memories
CN107919158A (en) * 2016-10-10 2018-04-17 成都锐成芯微科技股份有限公司 Keep the method and system of non-volatility memorizer memory cell current detection window

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