CN110008726B

CN110008726B - Runtime access control device and method

Info

Publication number: CN110008726B
Application number: CN201910278179.XA
Authority: CN
Inventors: 杨力祥
Original assignee: Individual
Current assignee: Individual
Priority date: 2019-04-09
Filing date: 2019-04-09
Publication date: 2021-08-20
Anticipated expiration: 2039-04-09
Also published as: CN113626843A; CN110008726A

Abstract

The invention discloses a device and a method for access control during operation, which relate to the information technology, in particular to the information security technology, wherein the device comprises a security device and a guarantee device, and the security device performs access control on a memory area based on hardware; the securing means ensures, on the basis of hardware, that only in a specific state can control state data for validating the security means be set and specific instructions for validating the security means be executed; the safety device provides a legal mode of crossing the boundary of the memory area, and comprises a mode of executing a special cross-area transfer instruction or transferring to a transfer area when interruption/abnormity occurs, and then codes in the transfer area are subjected to boundary switching and transferred to a final target address; in particular, if both branch to a common code location of the same branch region, identification information is provided by the hardware to distinguish whether the branch was caused by execution of a cross-region branch instruction or by generation of an interrupt/exception; interrupting the return also results in a cross-region transfer.

Description

Runtime access control device and method

Technical Field

The present application relates to the field of information technologies, and in particular, to a runtime isolation method, a runtime access control method, and a computing device.

Background

In the prior art, especially in the existing operating system and processor architecture technology, more considerations are given to the design of the memory and the use thereof, such design causes the code of each function to have an intricate and complex interconnection, the data has almost no package, or only has a limited package in the syntax compiling stage of the high-level language, and the data can be accessed freely without any check in the operation.

Specifically, the syntax check can only ensure that the source code does not contain illegal access which is not allowed by the syntax, but at the time of operation, an attacker may change the execution sequence of the program or data access objects by some means, thereby breaking the encapsulation of the syntax rules. For example, the C + + language specifies that private members of a class are not accessible to other class objects, but if a program is attacked, an attacker changes the branch target of the function at runtime, breaking the protection.

In particular, for an operating system kernel, the above-mentioned defects of the prior art result in the kernel space being substantially flat, and once an attacker utilizes the design defects of kernel-mode codes in data transmission and processing if the attacker utilizes data transmission between a user mode and a kernel mode, the data and the codes of the kernel can be almost arbitrarily modified by the data prepared by the attacker, so that the attack can be initiated.

The most dangerous of these is that attacks result in overriding authorizations, such as:

1. user data (including memory and peripheral data) is read beyond authorization.

2. Write (including tamper, delete) user data beyond authorization.

3. The system call is executed beyond authorization.

4. The application is executed beyond authorization.

Once the attacker has completed the above actions, the attacker essentially gains access to the computer as there are only very limited checking mechanisms in the existing operating systems.

Especially, in the hardware design level, the security problem is considered in the early stage of design without the framework level, and the information security risk is further increased. The realization of the existing system architecture only considers the problems of function realization, efficiency improvement and other use aspects, and does not specially consider the safety problem from the design base point of the system architecture; even though some designs, such as privilege level, paging and the like, objectively provide security guarantee for calculation to some extent, the starting point of the design is still for use rather than security, which leads to the fact that the security guarantee is not systematic, and further, the necessary conditions for attack establishment are not sufficiently eliminated. Under attack conditions, significant safety hazards still exist.

Disclosure of Invention

In order to solve the problem that the design of the existing system framework is originally designed without systematic consideration of safety, the invention discloses a safety device which solves the safety problem systematically on the basis of the design base point, and preferably discloses a guarantee device which can guarantee that the safety device can be kept effective even in an attack state.

Furthermore, the implementability of the technical scheme, the design of the safety device and the guarantee device are considered, and the safety device is matched with the pipeline mechanism of the existing hardware system to the maximum extent, so that the overall design of the pipeline is not influenced while the safety problem is solved, and the execution efficiency is further ensured.

An apparatus, characterized by:

comprises a safety device and/or a guarantee device;

the safety device performs access control on the memory area based on hardware; the securing means ensures, on the basis of hardware, that only in certain states can control state data be set which makes the security means active and certain instructions be executed which make the security means active.

Preferably, the device may be referred to as a memory system device.

The safety device includes: intercepting illegal access crossing the boundary of the memory area; a manner is provided for legally crossing memory region boundaries.

The memory area boundary is as follows: the processor identifies the boundaries of the region defined by the memory address values and/or the processor identifies the boundaries of the region defined by the page identification information.

The intercepting of illegal access crossing the boundary of the memory area comprises the following steps: if the instruction address to be executed exceeds the memory area boundary determined by the processor, the processor reports an exception; and if the address matched with the data read-write target exceeds the boundary of the memory area corresponding to the read-write instruction, the processor reports the exception.

The method for legally crossing the boundary of the memory area comprises the following steps: when a special trans-regional transfer instruction is executed or interruption/abnormity occurs, the special trans-regional transfer instruction must be transferred to a transfer region, and then codes in the region are subjected to boundary switching and transferred to a final target address; in particular, if both branch to a common code location of the same branch region, identification information is provided by the hardware to distinguish whether the branch was caused by execution of a cross-region branch instruction or by generation of an interrupt/exception; interrupting the return also results in a cross-region transfer.

The safeguard device includes: only in the staging area, and/or across-area transfer instruction execution, and/or interrupt/exception generation, and/or interrupt return, can access the information required to ensure that the security device is functional and the state data required to ensure that the device is functional; only a cross-region branch instruction executes, and/or an interrupt/exception is generated, and/or an interrupt return causes a cross-region branch.

Preferably, a safety function is provided in the device and/or a switch is provided to safeguard the function, e.g. if the switch is closed, the device fails.

A method of making a security device comprising: methods of making a border check device and methods of providing a legal cross-memory region border.

The method for manufacturing the boundary check device comprises the following steps: a method of manufacturing a command boundary checking device and a method of manufacturing a command data boundary checking device.

The method for manufacturing the instruction boundary checking device comprises the following steps: the processor determines the range of the current memory area and judges whether the address of the instruction to be executed is in the range of the area, if so, the address can be normally fetched, and if not, the processor reports an exception;

specifically, the processor determines the current memory area range and determines whether the address of the instruction to be executed is within the range, and various methods can be adopted, one preferred method is as follows: the processor sets a special storage facility to store the boundary address value of the current memory area, and when executing an instruction, judges whether the address value of a program counter of the processor is in a boundary range, if so, indicates that the address value is not beyond the range, and if not, indicates that the address value is beyond the range; another preferred method is: adding identification information in the attribute of the memory page, recording the current page identification information by the processor, and judging whether the page identification information of the address stored by the program counter in the processor is consistent with the current page identification information when executing the instruction, wherein if the page identification information is consistent, the page identification information does not exceed the range, otherwise, the page identification information exceeds the range.

The method for manufacturing the data boundary inspection device comprises the following steps: the processor determines a plurality of groups of data storage area boundaries, different read-write instructions are matched for each group of data areas, when the memory is read and written, whether an operation address is in the matched data boundaries or not is judged according to the different read-write instructions, if the operation address is in the matched data boundaries, normal access can be performed, and if the operation address is not in the matched data boundaries, an exception is reported. The purpose of the sets of data areas is to distinguish the data area, stack area, and independent data area for other purposes of the program.

Specifically, the processor determines whether the data operation target is within the matching boundary, and various methods may be adopted: one preferred method is: the processor sets a plurality of groups of special storage facilities to store boundary address values of different types of data areas, and judges whether an operation target address is in a boundary range matched with an instruction or not when executing a read-write instruction, if so, the operation target address does not exceed the range, and if not, the operation target address exceeds the range; another preferred method is: adding identification information in the attribute of the memory page, recording page identification information of a plurality of groups of accessible data areas by the processor, judging whether the page identification information of the operation target address is consistent with the page identification information of the matched area type when executing a read-write instruction, indicating that the page identification information is in the readable and writable data area, or else, not in the area.

Preferably: a switch is provided in the safety device, and when the switch is in an off state, the instruction boundary check and the data boundary check are not performed.

The method for legally crossing the boundary of the memory area comprises the following steps: providing a special cross-region transfer instruction, and transferring to a transfer region when executing the instruction; providing a special transfer instruction, and completing the transfer from the transfer area to the target area when executing the instruction; when the interrupt/exception occurs, transferring to a transfer area through a processor hardware mechanism; and when the interrupt returns, returning the interrupt site from the transit area through the execution of the interrupt instruction, and recovering the site information.

The providing of the dedicated cross-region transfer instruction is transferred to a transfer region when executing the instruction; providing a special transfer instruction, and completing the transfer from the transfer area to the target area when executing the instruction; further comprising:

the cross-region transfer instruction is called a first type of instruction for short, when the cross-region transfer instruction is executed, the cross-region transfer instruction is transferred to a transfer region entry position, the instruction switches the boundary of a current region into the boundary of a transfer region and/or simultaneously switches the boundary of a data region which can be accessed currently into the boundary of a data region which can be accessed by codes in the transfer region, if the boundary of the current region is not switched in the first type of instruction, a processor needs to ignore the instruction boundary check after the first type of instruction is executed, and preferably, the transfer region entry position can be stored through a default fixed storage facility and does not need to appear in the first type of instruction; preferably, the branch target address may be specified by an operand of the first type of instruction, or may be specified by a specific special register;

the special branch instruction is called a second type of instruction for short, and the instruction is used for transferring from a transfer area to a specified address; and/or, the instruction switches the boundary of the current area to the boundary of the area to which the target address belongs at the same time, and/or simultaneously switches the boundary of the data area accessible by the transit area to the boundary of the data area accessible by the code in the target area; preferably, the target address of the second type of instruction is a branch target address specified by the first type of instruction, and the branch target address cooperate to complete the branch between the regions, preferably, if the execution of the first type of instruction causes the processor not to perform the instruction boundary check, the second type of instruction specifies whether to resume the instruction boundary check, and preferably, the branch target address may be specified by an operand of the second type of instruction, or may be specified by a specific dedicated register.

Preferably: if the safety device comprises a switch, the first class instruction and the second class instruction cannot be executed when the switch is in an off state, and the execution can report the abnormity.

When the interrupt/exception occurs, the processor is transferred to the transfer area through a hardware mechanism of the processor, and the method further comprises the following steps: after the interruption/abnormality occurs, information required by the fact that the security device on the interruption site is valid is stored, then the boundary of the current area is set as a transfer area boundary, and/or the boundary of a data area accessible to the current area is switched to the boundary of a data area accessible to a transfer area code and transferred to a specified instruction position, preferably, if the boundary of the current area is not switched when the interruption/abnormality occurs, the processor needs to ignore the instruction boundary check in the transfer area.

There are many options for the designated transfer location of the interrupt/exception, one option being: transferring to the same transfer area as the first type of instruction, and optionally, transferring to the same address, the processor needs to provide information to identify which triggering mode currently causes execution to the specified transfer position; another alternative is: a transit area is set for the interrupt/exception individually, and then the entry address of this transit area should be logged into the specific storage facility.

When the interrupt returns, the interrupt instruction is executed to return to the interrupt site, and the method further comprises the following steps: the information needed to restore the actual security device at the site of the interruption to be valid is recorded in the specific storage facility at the time of the interruption.

Preferably: if the safety device includes a switch, the above operations regarding the interrupt, the exception, and the interrupt return are performed only when the switch is in the on state.

A manufacturing method of a security device comprises the following steps: storing information required for ensuring the effectiveness of the safety device and state data required for ensuring the effectiveness of the safety device in a special storage facility; setting the special storage facilities to mark the access state of each special storage facility; the processor ensures, based on the access status information, that access to these storage facilities is only possible in the staging area, and/or across-area branch instruction execution, and/or interrupt/exception generation, and/or interrupt return; the second class of instructions may only be executed in the staging area to which the first class of instructions is transferred.

The information required to ensure that the security device is valid includes: boundary information of a memory area where the global data is located; boundary information of a memory area where stack data is located; boundary information of memory areas where other kinds of data are located; the first address of the transfer code needed by the branch instruction; transferring boundary information of a transfer area required by the instruction; the first address of the code to be relayed for interruption/exception; boundary information of a transfer area required by the interrupt/abnormal service program; security device on/off identification information; preferably, the branch instruction and the interrupt/exception forwarding fields may be the same, and the first address of the forwarding code required may also be the same.

The first address of the required transfer code refers to a position to which the transfer is necessary when the first type of instruction is executed or an interrupt/exception occurs.

The transfer area is as follows: when executing instructions of the first type or when an interrupt/exception occurs, the branch address is recorded in the device, in particular: instructions in the staging area execute without instruction bounds checking.

The state data required by the safeguard device includes: whether the branch instruction is in a transfer area required by the branch instruction; whether it is in the staging area required for the interrupt/exception.

According to the invention, the guarantee device is used for guaranteeing that the safety device is not damaged in an attack state, so that the manufacturing methods of the safety device are different, and the manufacturing method of the guarantee device can be correspondingly adjusted; in terms of intercepting illegal access crossing the boundary of a memory area, the security device has the design difference: the processor recognizes the boundary information, one is the boundary surrounded by the address value, and the other is the page identification information; in terms of providing a legal mode of crossing the boundary of the memory area, the design difference is embodied as a transfer area for transferring after a specific instruction for transferring and interruption/exception are generated, and the transfer area can be the same memory area or different memory areas; the guarantee device is correspondingly adjusted according to the four design differences in the two aspects, so that 4 sets of safety device manufacturing methods and guarantee device manufacturing methods matched with the safety device manufacturing methods are formed.

Four manufacturing methods for realizing the safety device and the security device are listed below:

a method M1 for manufacturing a security device and/or a security device adapted to the security device:

the manufacturing method M1 is characterized in that: the boundary information of the memory area is composed of memory address values, the first class of instruction execution and interruption/exception generation are respectively transferred to different transfer areas, and the information required by the safety device and the state data required by the guarantee device are recorded by a special storage facility, and the preferred storage facility of the manufacturing method is as follows: a special purpose register.

The manufacturing method of the safety device comprises the following steps:

M-A-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by cross-region, and the on/off identification information of security device

Setting a special register, recording an instruction and/or boundary information of a memory area where data is located, and checking whether the instruction and the data access cross the boundary or not by the processor according to the boundary information;

setting a special register, recording the boundary of a memory area where stack data is located, and checking whether stack data access crosses the boundary by a processor according to the boundary;

setting a special register, recording the boundary of a memory area where other use data are located, and accordingly checking whether the access of the other use data crosses the boundary by a processor;

setting a special register, temporarily recording field boundary information when the interruption/abnormity occurs, and restoring the field boundary information by a processor when the interruption returns;

setting a special register and recording the boundary information of a memory area where an interrupt/abnormal service program is located;

setting a special register and recording the identification information of the opening/closing of the safety device;

setting a special register and recording the address value of the specific position of the first class instruction transfer;

setting a special register and recording the boundary information of the memory area where the specific position address of the first type instruction is transferred.

M-A-A2, adding function for checking whether address of instruction to be executed crosses boundary in safety device

The processor carries out addressing according to the value in the program counter, and judges whether the value exceeds the boundary value of the memory area stored in the special register, if so, the processor reports an exception, and if not, the processor can carry out normal addressing.

Preferably, if the security device contains a dedicated register for switch setting, the instruction bound check is only performed if the dedicated register is identified as on.

Checking the time: preferably, the processor checks the validity of the instruction address value of the current processing and the instruction address value of the last processing when recognizing that the instruction address value and the instruction address value of the current processing are not in the same page through the tlb (translation Lookaside buffer) or each time the value of the program counter is used, and selects one of the two.

M-A-A3, adding function for checking whether daA access crosses boundary in safety device

The special boundary register is used for storing the boundaries of the data areas of different types, and comprises the following steps: the method comprises the steps that a common data area, a stack area, other data areas and the like are matched with different read-write instructions, when the read-write instructions of the memory are executed, the matched area boundary is selected according to the type of the data area matched with the instructions, whether the current address to be operated is in the matched area is judged, and if yes, the method can be executed; if not, the processor declares an exception.

Preferably, if the security device contains a dedicated register for switch setting, the data boundary check is only performed if the dedicated register is identified as on.

M-A-A4, adding a first type of instruction in the safety device, initiating a transfer action across regions and setting information required for ensuring the safety device to be effective:

preferably, the instruction operand comprises: transfer target

The instruction function: initiating a transfer across regions

The instruction actions include: automatically saving the next instruction address; setting the value of a special boundary register in the device as the boundary value of a transfer area required by a branch instruction, and/or setting the value of the corresponding special register as the boundary value of a stack area accessible by the area program, and/or setting the value of the corresponding special register as the boundary value of an area where the area program can access other use data; the value of the program counter is set to the head address of the intermediate code, which is recorded in a special register of the secure device.

Preferably, the boundary value is not switched during the execution of the first type of instruction, and for this purpose, identification information is added to indicate that instruction boundary checking is not required in the transition area, and the identification information is stored in a special register.

Preferably, if the security device includes a dedicated register specifying whether the security function is enabled, execution of the first type of instruction is not permitted when the register identifies that the security function is disabled, and an exception is raised upon execution.

M-a 5, adding a second type of command to the security device to complete the transfer to the target area and set the information needed to ensure the security device is valid:

preferably, the instruction operand comprises: transfer target

The instruction function: out-of-transit-area transfer to which instruction of a first type executes a transfer

The instruction actions include: the value of the branch target is assigned to a program counter and/or a simultaneous switch region boundary value, which includes an instruction and/or a data region boundary value and/or an accessible stack region boundary value and/or a region boundary value at which other use data is accessible.

Preferably, if the first type of instruction executes to indicate that instruction bounds checking is not required in the staging area, the second type of instruction executes to indicate that bounds checking is resumed, and the identification information is stored in a dedicated register.

Preferably, if the security device includes a dedicated register specifying whether the security function is enabled, execution of the second class of instructions is not permitted when the register identifies that the security function is disabled, and an exception is raised upon execution.

M-A-A6, adding the function when the interrupt/abnormal occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; setting the value of a special boundary register in the device as the boundary information of an interrupt/abnormal transfer area; and/or, setting the value of the corresponding special register to the boundary value of the stack region accessible by the relay region program, and/or setting the value of the corresponding special register to the boundary value of the region where the relay region program can access other use data, and transferring to the entry address of the interrupt service program; the rest of the operation is consistent with the handling of existing interrupts/exceptions.

Preferably, if the security device includes a dedicated register to specify whether the security function is enabled, a portion different from the existing interrupt, exception handling is performed only when the register identifies that the security function is enabled.

M-A-A7, adding the function of interruption return to the safety device, and restoring the site information which ensures the safety device is valid:

the processor restores the interruption/abnormal field information required for ensuring the safety device to be effective to the corresponding special register according to the field information stored in the special register, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormality occurs is also restored.

Preferably, if the security device includes a special register specifying whether the security function is enabled, the interrupt/exception field information required to ensure that the security device is functional is restored only if the register identifies that the security function is enabled.

The manufacturing method of the guarantee device comprises the following steps:

M-A-A8, a special register set for setting and recording status daA required by the security device, and recording whether the current device is in the transfer area:

setting a special register and recording whether the special register is in a transfer area to which the first class of instructions are transferred currently;

setting a special register and recording whether the special register is in a transfer area to which interrupt/exception generation is transferred currently;

m-a 9, manner of identifying registers that need to be secured:

the attribute of the same kind of register is identified by identifying the addressing information of the register. Preferably, the homogeneous registers are arranged in a continuous addressing range, and the homogeneous registers are identified by identifying high and low end addressing information. Preferably, the registers are arranged in a particular contiguous addressing range, and the register attributes are identified by identifying a particular bit class in the addressing information.

M-A-A10, function of adding access control when accessing special register:

by accessing the special register through a specific instruction, preferably, the existing register access instruction is still used, and functions are added to the existing register access instruction, so that the existing access rule can be compatible and the register access rule can be considered.

Further: the processor asserts whether the special purpose register is currently accessible by determining whether the special purpose register is currently accessible, and if so, allows the particular instruction to execute, otherwise, raises an exception.

Preferably, if the security device contains a special register for switch setting, the modified instruction execution rule is only fulfilled if the special register is identified as on, otherwise the existing rule is followed.

M-a 11, setting conditions to allow and restrict access to the secure and guarded devices' special registers and to execute cross-region transfer execution and special register access instructions:

special registers allowing the setting of the safety device and the securing device when the safety device is switched off;

allowing a first class instruction, a second class instruction, interruption/exception, interruption return and special register access instructions, and setting special registers of a safety device and a guarantee device;

allowing the interruption/exception to store the information in the special registers of the safety device and the guarantee device on the interruption site;

otherwise, the special registers of the security and security devices must not be overwritten.

In a transfer area to which execution of the first type of instruction is transferred, the first type of instruction is not allowed to be executed; allowing execution of the second class of instructions; allowing execution of a special purpose register access instruction; preferably, the interrupt return instruction is not allowed to execute;

in the transfer area to which the interrupt/exception generation is transferred, not allowing the second class of instructions to be executed; allowing execution of a first class of instructions; allowing execution of a special purpose register access instruction; allowing execution of the interrupt return instruction;

in the non-staging area, instructions of the first type are allowed to execute, instructions of the second type are not allowed to execute, and special register access instructions are not allowed to execute. Preferably, the interrupt return instruction is not allowed to execute;

a method M2 for manufacturing a security device and/or a security device adapted to the security device:

the manufacturing method M2 is characterized in that: the boundary information of the memory area is composed of memory address values, the first class of instruction execution and interruption/exception generation are respectively transferred to the same transfer area, preferably, to a common code position, and the information required by the safety device and the state data required by the guarantee device are recorded by a special storage facility, and the preferred storage facility of the manufacturing method is as follows: a special purpose register.

The manufacturing method of the safety device comprises the following steps:

M-B-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by cross-region, and the on/off identification information of security device

setting a special register, and recording common address values of the first class instruction transfer and the interrupt/abnormal transfer;

setting special register, recording the boundary information of the first class instruction transfer and interrupt/abnormal transfer common transfer area.

M-B-A2, adding function for checking whether address of instruction to be executed crosses boundary in safety device

M-B-A3, adding function for checking whether data access crosses boundary in safety device

M-B-A4, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

preferably, the instruction operand comprises: transfer target

The instruction function: initiating a transfer across regions

The instruction actions include: automatically saving the next instruction address; setting the value of a special boundary register in the device as the boundary value of a common transfer region of the first type instruction transfer and the interrupt/exception transfer, and/or setting the value of the corresponding special register as the boundary value of a stack region which can be accessed by the region program, and/or setting the value of the corresponding special register as the boundary value of a region which can be accessed by the region program and used for other purpose data; the processor needs to provide an information identifier indicating that the transfer is currently caused by the execution of the first type of instruction, the identifier information being recorded in a special register of the security device; the value of the program counter is set to the first address of the intermediate code, which is recorded in a special register of the security device, i.e. the common address value of the first type of instruction branch and the interrupt/exception branch.

M-B-a5, adding a second type of command to the security device to complete the transfer to the target area and set the information needed to ensure that the security device is valid:

preferably, the instruction operand comprises: transfer target

The instruction function: out-of-transit-area branching common to instruction branches of the first type and interrupt/exception branching

Preferably, if the first type of instruction executes to indicate that instruction bounds checking is not required in the common staging area, the second type of instruction executes to indicate that bounds checking is resumed, and the identification information is stored in a dedicated register.

M-B-A6, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; the processor needs to provide an information identifier indicating that the transfer is currently caused by the interrupt/exception generation, and the identifier information is recorded in a special register of the security device; setting the value of a special boundary register in the device as the boundary value of a common transfer region of the first type instruction transfer and the interrupt/exception transfer, and/or setting the value of the corresponding special register as the boundary value of a stack region accessible by a transfer region program, and/or setting the value of the corresponding special register as the boundary value of a region accessible by the transfer region program for other use data; transferring to a common transfer address of a first type instruction transfer and an interrupt/exception transfer; the rest of the operation is consistent with the existing interrupt and exception handling.

M-B-A7, adding the function of interruption return to the safety device, and restoring the site information which ensures the safety device is valid:

The manufacturing method of the guarantee device comprises the following steps:

M-B-A8, a special register set for setting and recording status data required by the security device, and recording whether the current device is in the transfer area:

setting a special register and recording whether the special register is in a common transfer area of the first class instruction transfer and the interrupt/abnormal transfer;

M-B-A9, the manner of identifying the registers that need to be secured:

M-B-A10, function of adding access control when accessing special register:

M-B-A11, setting conditions to allow and restrict access to the secure and guarded devices' special registers and to execute cross-region transfer execution and special register access instructions:

In a common transition area of the first type instruction execution transition and the interrupt/exception generation transition, the first type instruction is not allowed to be executed; allowing execution of the second class of instructions; allowing execution of a special purpose register access instruction; allowing execution of the interrupt return instruction;

a method M3 for manufacturing a security device and/or a security device adapted to the security device:

the manufacturing method M3 is characterized in that: the boundary information of the memory area is composed of memory address values and/or page identification values, the execution of a first type of instruction and the generation of interruption/abnormity are respectively transferred to different transfer areas, and the information required by the safety device and the state data required by the guarantee device are recorded by a special storage facility, and the preferred storage facility of the manufacturing method is as follows: a special purpose register. In particular: the boundary information of the memory area can be recorded in a memory address value and/or in a page identification mode, and the preferred recording mode of the manufacturing method is as follows: the boundary information of the memory area where the instruction and/or the data are located is recorded in a page identification mode, and the boundary information of the memory area where the stack area and other data are located is recorded in a memory address value mode.

The manufacturing method of the safety device comprises the following steps:

M-C-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by cross-region, and the on/off identification information of security device

Setting a special register, recording an instruction and/or page identification information of a memory area where data is located, and checking whether the instruction and the data access cross a boundary or not by a processor according to the instruction and the page identification information;

setting a special register, temporarily recording the field boundary and/or the page identification information when the interrupt/exception occurs, and restoring the field boundary and/or the page identification information by the processor when the interrupt returns;

setting a special register and recording page identification information of a memory area where an interrupt/abnormal service program is located;

setting a special register and recording the page identification information of the memory area where the specific position address transferred by the first class of instructions is located.

M-C-A2, adding page table entry content

On the basis of the existing page table structure, a data structure corresponding to the page table structure is established, wherein each item corresponds to a page table entry, and page identification information corresponding to the page table entry is recorded in the structure. This structure is present in the TLB of the processor.

M-C-A3, adding function for checking whether address of instruction to be executed crosses boundary in safety device

The processor carries out address fetching according to the numerical value in the program counter, and judges whether the page identification value of the value is inconsistent with the page identification value of the memory area stored in the special register, if so, the processor reports an exception, and if not, the processor can fetch the address normally.

M-C-A4, adding function for checking whether data access crosses boundary in safety device

The special boundary register is used for storing the boundaries of the data areas of different types, and comprises the following steps: the system comprises a common data area, a stack area, other data areas and the like, wherein each data area corresponds to different read-write instructions, and when the read-write instructions of the common data area are executed, whether the page identification information of the current address to be operated is consistent with the page identification value of the memory area where the data area is stored in a special register or not is judged, and if yes, the system can be executed; if not, the processor reports an exception; when reading and writing instructions such as a stack area, other data areas and the like are executed, a matched area boundary is selected according to the type of the data area matched with the instruction, and whether the current address to be operated is in the matched area is judged, if yes, the method can be executed; if not, the processor reports an exception;

M-C-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

preferably, the instruction operand comprises: transfer target

The instruction function: initiating a transfer across regions

The instruction actions include: automatically saving the next instruction address; setting the value of a special boundary register in the device as a page identification value of a transfer area required by a transfer instruction, and/or setting the value of the corresponding special register as a boundary value of a stack area accessible by the area program, and/or setting the value of the corresponding special register as a boundary value of an area where the area program can access other use data; the value of the program counter is set to the head address of the intermediate code, which is recorded in a special register of the secure device.

Preferably, the page identification value is not switched when the first type of instruction is executed, and for this purpose, identification information is added to indicate that instruction boundary checking is not required in the transfer region, and the identification information is stored in a special register.

M-C-a6, adding a second type of command to the security device to complete the transfer to the target area and set the information needed to ensure the security device is valid:

preferably, the instruction operand comprises: transfer target

The instruction actions include: the value of the branch target is assigned to a program counter and/or a simultaneous switch region boundary value, which includes an instruction and/or a data region page identification value and/or an accessible stack region boundary address value and/or a region boundary address value at which other usage data is accessible.

M-C-A7, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; setting the value of a special boundary register in the device as page identification information of an interrupt/abnormal transfer area; and/or, setting the value of the corresponding special register to the stack area boundary value accessible by the relay area program, and/or setting the value of the corresponding special register to the area boundary value accessible by the relay area program for other purpose data; transferring to an entry address of an interrupt service routine; the rest of the operation is consistent with the existing interrupt and exception handling.

M-C-A8, adding the function of interruption return to the safety device, and restoring the site information which ensures the safety device is valid:

Preferably, if the security device includes a dedicated register specifying whether the security function is enabled, the interrupt/exception field information required to ensure that the security device is functional is restored only when the register identifies that the security function is enabled, and/or the page identification information.

The manufacturing method of the guarantee device comprises the following steps:

M-C-A9, a special register set for setting and recording status data required by the security device, and recording whether the current device is in the transfer area:

M-C-A10, the manner of identifying the registers that need to be secured:

M-C-A11, function of adding access control when accessing special register:

M-C-A12, setting conditions to allow and restrict access to the secure and guarded devices' special registers and to execute cross-region transfer execution and special register access instructions:

a method M4 for manufacturing a security device and/or a security device adapted to the security device:

the manufacturing method M4 is characterized in that: the boundary information of the memory area is composed of memory address values and/or page identification values, the execution of the first type of instruction and the generation of interruption/exception are respectively transferred to the same transfer area, preferably to a common code position, and the information required by the safety device and the state data required by the security device are recorded by a special storage facility, and the preferred storage facility of the manufacturing method is as follows: a special purpose register. In particular: the boundary information of the memory area can be recorded in a memory address value and/or in a page identification mode, and the preferred recording mode of the manufacturing method is as follows: the boundary information of the memory area where the instruction and/or the data are located is recorded in a page identification mode, and the boundary information of the memory area where the stack area and other data are located is recorded in a memory address value mode.

The manufacturing method of the safety device comprises the following steps:

M-D-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by cross-region, and the on/off identification information of security device

setting a special register, and recording page identification information of a common transfer area of the first class instruction transfer and the interrupt/abnormal transfer.

M-D-A2, adding page table entry content

M-D-A3, adding function for checking whether address of instruction to be executed crosses boundary in safety device

M-D-A4, adding function for checking whether data access crosses boundary in safety device

The special boundary register is used for storing the boundaries of the data areas of different types, and comprises the following steps: the system comprises a common data area, a stack area, other data areas and the like, wherein each data area is matched with different read-write instructions, and when the read-write instructions of the common data area are executed, whether the page identification information of the current address to be operated is consistent with the page identification value of the memory area where the data area is stored in a special register or not is judged, and if yes, the system can be executed; if not, the processor reports an exception; when reading and writing instructions such as a stack area, other data areas and the like are executed, a matched area boundary is selected according to the type of the data area matched with the instruction, and whether the current address to be operated is in the matched area is judged, if yes, the method can be executed; if not, the processor reports an exception;

M-D-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

preferably, the instruction operand comprises: transfer target

The instruction function: initiating a transfer across regions

The instruction actions include: automatically saving the next instruction address; setting the value of a special boundary register in the device as the page identification value of a common transfer area of the first type instruction transfer and the interrupt/exception transfer, wherein the value is recorded in the special register of the safety device, and/or setting the value of the corresponding special register as the boundary value of a stack area which can be accessed by the area program, and/or setting the value of the corresponding special register as the boundary value of an area which can be accessed by the area program and used for other data; the processor needs to provide an information identifier indicating that the transfer is currently caused by the execution of the first type of instruction, the identifier information being recorded in a special register of the security device; the value of the program counter is set to the first address of the intermediate code, which is recorded in a special register of the security device, i.e. the common address value of the first type of instruction branch and the interrupt/exception branch.

M-D-a6, adding a second type of command to the security device to complete the transfer to the target area and set the information needed to ensure the security device is valid:

preferably, the instruction operand comprises: transfer target

M-D-A7, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; the processor needs to provide an information identifier indicating that the transfer is currently caused by the interrupt/exception generation, and the identifier information is recorded in a special register of the security device; setting the value of a special boundary register in the device as a page identification value of a common transfer area of the first type instruction transfer and the interrupt/exception transfer, and/or setting the value of the corresponding special register as a stack area boundary value accessible by a transfer area program, and/or setting the value of the corresponding special register as an area boundary value accessible by the transfer area program for other use data; transferring to a common transfer address of a first type instruction transfer and an interrupt/exception transfer; the rest of the operation is consistent with the existing interrupt and exception handling.

M-D-A8, adding the function of interruption return to the safety device, and restoring the site information which ensures the safety device is valid:

The manufacturing method of the guarantee device comprises the following steps:

M-D-A9, a special register set for setting and recording status data required by the security device, and recording whether the current device is in the transfer area:

M-D-a10, manner of identifying registers that need to be secured:

M-D-A11, function of adding access control when accessing special register:

M-D-a12, setting conditions to allow and restrict access to the secure and guarded devices' special registers, and to execute cross-region transfer execution and special register access instructions:

in the non-staging area, instructions of the first type are allowed to execute, instructions of the second type are not allowed to execute, and special register access instructions are not allowed to execute. Preferably, execution of the interrupt return instruction is not permitted.

Through the method, the invention can achieve the following technical effects:

the special register set is set for recording boundary information of various memory areas, interruption field information, specific address information required by cross-area, and opening/closing identification information of the safety device, and the processor acquires the information from time to time through the register, so that the safety device is ensured to be effective. In particular, the dedicated register set provides a more convenient and efficient identification feature for access control based on the purpose of ensuring information security.

By obtaining the boundary information of the memory area from the register, the processor can compare the boundary information with the address value in the current program counter to check the instruction boundary.

By means of the boundary information of the data memory area obtained from the register and the set read-write instructions matched with the data areas of different types, the processor can judge whether the data access exceeds the area boundary or not.

The security device also proposes a legal transfer mode between the regions: by adding the first type of instruction, a cross-region transfer action can be initiated and transferred to a transfer region; the system can be transferred from the transfer area to the target area through the added second type of instructions; the field information of the safety device is protected when the interruption/abnormity occurs, and the field information of the safety device is recovered when the interruption returns, so that the safety device can be ensured to be effective on the interruption field.

The transfer area can be provided by transferring the legality checking work of the inter-area transfer completed by the first type of instruction to a software program in the transfer area, so that the execution period of the first type of instruction is greatly reduced, and a foundation is created for integrating the existing production line overall design.

The core task of the guarantee device is to record whether the device is currently in the transition area, ensure that the special registers for ensuring the safety device and the guarantee device are valid can be accessed only in the transition area, and simultaneously limit whether the first type and the second type of instructions can be executed in the transition area and the non-transition area.

Detailed Description

The technical solutions in the embodiments of the present invention are clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The technical means of the present invention will be specifically described below by way of specific embodiments.

Example 1:

in the RISC-V architecture, an embodiment of a security device, and/or, and its associated safeguarding device S1:

the embodiment S1 is characterized in that: under the RISC-V system, the boundary information of the memory area is composed of memory address values, the first class of instruction execution and interrupt/exception generation are transferred to different transfer areas, and the information required by the security device and the status data required by the security device are recorded by the special storage facility, the preferred storage facility of this embodiment is: a special purpose register.

Embodiment of the safety device:

S-A-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by crossing regions, and the on/off identification information of security device

The processor needs to dynamically obtain some data during the operation process to ensure the normal operation of the safety device, so some registers are added for the processor to use. In the reduced instruction set RSIC-V, 4096 default control state registers are available, some of which are selected as the added control state registers. For compatibility with RSIC, in addition to satisfying the encoding rules and usage specifications of its registers, a property is added to the registers, namely the dependence on the security device, which is: if the register is associated with a secure device, the access attribute to the register is augmented with: only when the current mode safety device is invalid or the current mode safety device is effective and is currently in a transfer area, the access can be performed, otherwise, the access report is abnormal; if the register is not associated with the security device, the register is accessed according to the RSIC-V existing rules.

Adding a register: CSR _ EMSUR (32/64 bit)

And accessing the attribute: R/W: can be read and written; privillege: s; standard/not: non-standard; correlation with safety devices: correlation

Description of the function: to identify whether the security device is in effect in different modes.

The meaning of each bit of information in the register:

bit 0 (indicating whether the security device is turned on in U mode):

is 0, indicating closure

Is 1, indicates opening

1 position: (indicating whether the safety device is turned on in S mode)

Is 0, indicating closure

Is 1, indicates opening

Adding a register: CSR _ CMSATTR (32/64 bit)

And accessing the attribute: R/W: can be read and written; privillege: u; standard/not: non-standard; correlation with safety devices: correlation

Description of the function: for identifying whether instruction boundaries are currently checked

The meaning of each bit of information in the register:

0 bit (check instruction boundary identification bit):

is 0, indicating that inspection is required

1, indicates that inspection is not required

Adding a register: CSR _ CMSLSIDE (32/64 bit)

Description of the function: for storing the low address value of the continuous memory area.

Adding a register: CSR _ CMSHSIDE (32/64 bit)

Description of the function: used for storing the high-end address value of the continuous memory area.

Adding a register: CSR _ CMSEBP (32/64 bit)

Description of the function: for saving the stack area upper address value.

Adding a register: CSR _ CMSESP (32/64 bit)

Description of the function: for saving the stack area low end address value.

Adding a register: CSR _ CBMSEBP (32/64 bit)

Description of the function: used for storing the high address value of the continuous memory area where other kinds of data are located.

Adding a register: CSR _ CBMSESP (32/64 bit)

Description of the function: used for storing the low address value of the continuous memory area where other kinds of data are located.

Adding a register: CSR _ MSCHADDR (32/64 bit)

Description of the function: for storing a first type instruction branch target address value.

Adding a register: CSR _ UTMSLSIDE (32/64 bit)

Description of the function: when an interrupt or exception is generated in U mode, it is used to temporarily save the CSR _ CMSLIDE register value.

Adding a register: CSR _ UTMSHSIDE (32/64 bit)

Description of the function: when an interrupt or exception occurs in U mode, it is used to temporarily save the CSR _ CMSHSIDE register value.

Adding a register: CSR _ UTMSATTR (32/64 bit)

Description of the function: when an interrupt or exception occurs in U mode, it is used to temporarily save the CSR _ CMSATTR register value.

Adding a register: CSR _ STMSLSIDE (32/64 bit)

Description of the function: when an interrupt or exception is generated in S mode, it is used to temporarily save the CSR _ CMSLIDE register value.

Adding a register: CSR _ STMSHSIDE (32/64 bit)

Description of the function: when an interrupt or exception is generated in S mode, it is used to temporarily save the CSR _ CMSHSIDE register value.

Adding a register: CSR _ STMSATTR (32/64 bit)

Description of the function: when an interrupt or exception occurs in S mode, it is used to temporarily save the CSR _ CMSATTR register value.

Adding a register: CSR _ SMSIRLADDR (32/64 bit)

Description of the function: used to save the low address value of the interrupt service program memory area in S mode.

Adding a register: CSR _ SMSIRHADDR (32/64 bit)

Description of the function: used for saving the high-end address value of the interrupt service program memory area under the S mode.

Adding a register: CSR _ UMSIRLADDR (32/64 bit)

Description of the function: used for saving the low address value of the interrupt service program memory area in the U mode.

Adding a register: CSR _ UMSIRHADDR (32/64 bit)

Description of the function: used for saving the high-end address value of the interrupt service program memory area under the U mode.

S-A-A2, adding function for checking whether address of instruction to be executed crosses boundary in safety device

And only when the safety device is started in the current mode and the instruction boundary check is required currently, performing the boundary check, namely checking whether the value in the current program counter is within the range of the memory area determined by the processor, if the value is not beyond the range, allowing the execution, otherwise, reporting an exception. The method specifically comprises the following steps:

only in the case where the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1 and the CSR _ CMSATTR register 0 bit is 0, a boundary check is performed, the check contents being: if the PC is smaller than the value in the CSR _ CMSLSIDE register or larger than or equal to the value in the CSR _ CMSHSIDE register, an exception is reported, otherwise, the execution is normal.

Preferably: when the boundary check is carried out, the actions of the safety mechanism opening/closing check, the CSR _ CMSATTR register attribute bit check and the comparison of the high-end address and the low-end address can be simultaneously carried out by increasing the pipeline function, so that the aims of not increasing the instruction execution period in the pipeline and further not reducing the overall execution efficiency of the pipeline are fulfilled.

S-A-A3, adding function for checking whether datA access crosses boundary in safety device

Only when the security device is started in the current mode, performing boundary check on a specific instruction for accessing the ordinary data area, namely checking whether a data access target address is in the ordinary data area, if the data access target address does not exceed the range, allowing execution, otherwise reporting an exception, specifically comprising:

adding load and store instruction functions:

the added functions are as follows:

only in case the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, a bounds check is performed, the check contents being: if the data access memory address value is less than the value in the CSR _ CMSLIDE register or more than or equal to the value in the CSR _ CMSHSIDE register, reporting an exception, otherwise, executing normally.

Only when the security device is started in the current mode, performing boundary check on a specific instruction for accessing the stack area, namely checking whether a data access target address is in the stack area, if the data access target address does not exceed the range, allowing execution, otherwise reporting an exception, specifically comprising:

add sload, sstore instruction:

the format and the function are consistent with the load and store instructions under the existing risc-v system.

The added functions are as follows:

only in case the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, a bounds check is performed, the check contents being: and if the accessed memory address value is smaller than the numerical value in the CSR _ CMSESP register or larger than or equal to the numerical value in the CSR _ CMSEBP register, reporting an exception, otherwise, executing normally. When the CSR _ EMSUR register is 0, the execution is carried out, and an exception is reported.

Only when the security device is started in the current mode, performing boundary check on a specific instruction for accessing the area where other types of data are located, namely checking whether a data access target address is located in the area where other types of data are located, if the data access target address is not beyond the range, allowing execution, otherwise reporting an exception, specifically comprising:

adding a load instruction and a bstore instruction:

The added functions are as follows:

only in case the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, a bounds check is performed, the check contents being: if the accessed memory address value is less than the value in the CSR _ CBMSESP register or more than or equal to the value in the CSR _ CBMSEBP register, reporting an exception, otherwise, executing normally. When the CSR _ EMSUR register is 0, the execution is carried out, and an exception is reported.

Preferably: when the boundary check is carried out, the actions of the safety device for opening/closing the check and comparing the high-end address and the low-end address can be simultaneously carried out by increasing the functions of the pipeline, so that the aims of not increasing the instruction execution period in the pipeline and further not reducing the overall execution efficiency of the pipeline are fulfilled.

S-A-A4, adding A first type of instruction in the safety device, initiating A transregional transfer action and setting information required for ensuring the safety device to be effective:

by adopting the preferred scheme, on the premise of starting the safety device, the first class of instructions can be executed, the boundary value is not switched, the instruction boundary check is not carried out in the transfer region, the next instruction address is stored, and the value of the program counter is set as the initial address of the transfer code. The method specifically comprises the following steps:

the instruction format is as follows: jarrmsu ra rs

The functions are as follows:

only on the premise of starting the safety device in the current mode, namely only when the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, the instruction can be executed, otherwise, an exception is reported; when the instruction is executed, register 0 of CSR _ CMSATTR is set to position 1, rd is set by PC +4 and defaults to x1, namely ra, and PC is set by the value in the CSR _ MSCHADDR register. rs is used to specify the target address value.

S-A-A5, adding A second type of instruction in the safety device to complete the transfer to the target areA and set the information required for ensuring the safety device to be effective:

by adopting the preferred scheme, on the premise of starting the safety device, the second class of instructions can be executed, the boundary value is not switched, after the mark is transferred from the transit area to the external area, instruction boundary check is carried out, and outward transfer of the transferred transit area is executed. The method specifically comprises the following steps:

the instruction format is as follows: jalrchmsu ra rs

The functions are as follows:

only on the premise of starting the safety device in the current mode, namely only when the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, the instruction can be executed, otherwise, an exception is reported; when the instruction is executed, the value in the rs register is used to set the PC at position 0 of the CSR _ CMSATTR register 0.

Preferably, the target address value specified in the B instruction is saved in rs.

S-A-A6, adding the function when the interrupt/abnormal occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; setting the value of a special boundary register in the device as the boundary information of an interrupt/abnormal transfer area; transferring to an entry address of an interrupt service routine; the rest of the operation is consistent with the existing interrupt and exception handling. The method specifically comprises the following steps:

when an interrupt or exception occurs:

if the current mode is U, the mode to which the interrupt delegated is checked:

if the security device is entrusted to the U mode, checking whether the security device is opened in the U mode, namely checking whether the bit 0 of the CSR _ EMSUR register is 1, if so, using the CSR _ UTMSATTR register to store the value of the CSR _ CMSATTR register, using the value of the CSR _ CMSATTR register 0 at the position 1, respectively using the CSR _ UTMSLSIDE and CSR _ UTMSHSIDE registers to store the values of the CSR _ CMSLSIDE and CSR _ CMSHSIDE registers, then respectively using the values of the two registers of CSR _ UMSIRLADDR and CSR _ UMSIRHADDR to set the CSR _ CMSLSIDIDE and CSR _ CMSHSIDE registers, and finally transferring to the entry address of the interrupt service program by using the existing RISC-V rule;

if the security device is delegated to the S mode, whether the security device is opened in the S mode is checked, namely whether the 1 bit of the CSR _ EMSUR register is 1 is checked, if the 1 bit is 1, the CSR _ STMSATTR register is used for storing the value of the CSR _ CMSATTR register, the 0 position 1 of the CSR _ CMSATTR register is used for storing the values of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register by the CSR _ STMSLSIDE, CSR _ STMSHSIDE register respectively, then the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register are set by the values of the two registers of CSR _ SMSIRLADDR, CSR _ SMSIRHADDR respectively, and finally the security device is transferred to the entry address of the interrupt service program by the existing rules of RISC-V;

if the current mode is S and the committed mode is S or U, checking whether the S mode opens the security device, namely checking whether the 1 bit of the CSR _ EMSUR register is 1, if so, using the CSR _ STMSATTR register to store the value of the CSR _ CMSATTR register at the 0 position 1 of the CSR _ CMSATTR register, using the CSR _ STMSLSIDE, CSR _ STMSHSIDE register to store the values of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register respectively, then using the values of the two registers CSR _ SMSIRLADDR, CSR _ SMSIRHADDR to set the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register respectively, and finally transferring to the entry address of the interrupt service program along the RISC-V existing rule.

S-A-A7, adding the function when the interruption returns to the safety device, and restoring the site information which ensures the safety device to be effective:

the processor restores the interruption/abnormal field information required for ensuring the safety device to be effective to the corresponding special register according to the field information stored in the special register, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormality occurs is also restored. The method specifically comprises the following steps:

on the premise that the security device is opened in the current mode, namely on the premise that a CSR _ EMSUR register (1 bit if the current S mode, and 0 bit if the current U mode) is 1, when an instruction is executed, if the current mode is S, the value of the CSR _ CMSATTR register is set by using the value of the CSR _ STMSATTR register, and the values of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register are restored by using a CSR _ STMSLSIDE, CSR _ STMSHSIDE register; if the current mode is U, the value of CSR _ CMSATTR register is set by the value of CSR _ UTMSATTR register, and the values of CSR _ CMSLIDE and CSR _ CMSHSIDE registers are restored by the values of CSR _ UTMSLSIDE and CSR _ UTMSHSIDE.

Implementation of the safeguard device:

S-A-A8, setting A special register group for recording state datA required by the guarantee device, and recording whether the device is in A transfer areA:

register of the security device is used: CSR _ CMSATTR (32/64 bit)

And accessing the attribute: R/W: can be read and written; privillege: u; standard/not: non-standard; correlation with safeguarding devices: correlation

Description of the function: the method is used for identifying whether the instruction is currently in a transfer area to which the first type of instruction is transferred or not and whether the instruction is currently in the transfer area to which the interrupt/exception generation is transferred or not.

The meaning of each bit of information in the register:

0 bit (whether currently in the transit area flag bit):

is 0, indicating that the current is not in the transit area

Is 1, indicates that the current transit area is

1 bit (currently in the transit area type flag):

is 0, indicating that the instruction currently in the first class is transferred to the transfer area

1, indicating that the interrupt/exception is in the transition area to which the interrupt/exception is generated and transited

In particular: the security device and the support device share the CSR _ CMSATTR register because, in the security device, it is specified that instruction boundary checking is not performed only in the staging area; the security device also limits whether to access the register related to the security device and whether to execute the legal cross-region transfer execution by judging whether the security device is currently in the transfer region, so that the CSR _ CMSATTR register 0 bit can identify whether the instruction check is not needed currently or not and can identify whether the security device is currently in the transfer region or not by using the same value, and the CSR _ CMSATTR register and the security device do not conflict with each other.

S-A-A9, and the mode of identifying the register needing to be guaranteed:

in order to conveniently identify whether the control status register is related to the safety device, the specific processing method is as follows:

the first method comprises the following steps:

in the "R/W: can be read and written; privillege: s; standard/not: non-standard attribute combination is adopted, and at a certain vacant continuous addressing position of 64 preset register spaces corresponding to the attribute combination, R/W: can be read and written; privillege: s; standard/not: non-standard "corresponding safety device related control status registers;

when the hardware equipment identifies the control state register, the control state register related to the safety device can be distinguished as long as whether the control state register is in a specific continuous addressing range is judged.

And the second method comprises the following steps:

in order to simplify the decision logic more than the first, the addressing locations of the control state registers associated with the safety device are arranged consecutively from the upper address to the lower address, e.g. (bits 0 to 5: from 111111 to the lower address row), so that as long as bit 5 is recognized as 1, it can be recognized as being associated with the safety device.

S-A-A10, function of adding access control when accessing special register:

the method continues to use and increase csrr, csrw and csrwi instruction functions under the RISC-V system, and the specific implementation mode comprises the following steps:

the processor executes the correlation rule by adding the record information in the register, and the access rule of the existing control state register in RISC-V: only when the current mode safety device is closed or the current mode safety device is opened and is currently in a transfer region, the register related to the safety device can be accessed through csrr, csrw and csrw instructions, otherwise, the access report is abnormal, namely, only when the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 0, or the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1 and the CSR _ CMSATTR register 0 bit is 1, the related register can be accessed through csrr, csrw and csrw instructions;

in particular: if the current mode is M, the default security device is disabled.

S-A-A11, conditions to allow and restrict access to the secure and secured device' S special registers, and to execute cross-region transfer execution and special register access instructions:

the special register allowing to set the safety device and the securing device when the safety device is closed specifically comprises: in the case where the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 0, the setting is allowed.

Allowing a first class instruction, a second class instruction, an interrupt/exception, an interrupt return, a special register access instruction, and setting a special register of a security device and a guarantee device, specifically comprising: when the jarrmsu instruction is executed and an interrupt/exception is generated, the CSR _ CMSATTR register 0 is positioned at position 1; when a jalrchmsu instruction is executed, a CSR _ CMSATTR register is set by using a numerical value in an rd register, the rd is defaulted to be x1, namely ra, preferably, if a target area is a non-transfer area, the ra register is 0 position 0 and 1 position 0, and if the target area is an interrupt/abnormal transfer area, the ra register is 0 position 1 and 1 position 1; when the interruption returns, the CSR _ CMSATTR register value is restored; access to the add-on registers is allowed through csrr, csrw, csrwi instructions.

The information in the special registers of the safety device and the guarantee device which allow the interrupt/exception to save the interrupt site specifically comprises the following steps: the saved information of the additional register is consistent with the information of the additional register saved in the safety device and the guarantee device.

The special registers of the security device and the security device must not be rewritten under other conditions, and the method specifically comprises the following steps: on the premise that the security device is turned on, if the security device is in the non-transfer area, the registers related to the security device and the security device are not allowed to be set, that is, if the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 0, the related registers are not allowed to be set.

In a transfer area to which execution of the first type of instruction is transferred, the first type of instruction is not allowed to be executed; allowing execution of the second class of instructions; the method for allowing the special register access instruction to be executed and not allowing the interrupt return instruction to be executed specifically includes: on the premise that the safety device is started, namely under the condition that a CSR _ EMSUR register (if the current S mode, 1 bit and if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 1 and the 1 bit is 0, a jarrmsu instruction is not allowed to be executed, a jarrchmsu instruction is allowed to be executed, a csrr instruction, a csrw instruction and a csrwi instruction are allowed to be executed, and an interrupt return instruction is not allowed to be executed;

in the transfer area to which the interrupt/exception generation is transferred, not allowing the second class of instructions to be executed; allowing execution of a first class of instructions; allowing execution of a special register access instruction, allowing execution of an interrupt return instruction, including; on the premise that the safety device is started, namely under the condition that a CSR _ EMSUR register (if the current S mode, 1 bit and if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 1 and the 1 bit is 1, the execution of a jarrchmsu instruction is not allowed, the execution of a jarrmsu instruction is allowed, the execution of csrr, csrw and csrwi instructions is allowed, and the execution of an interrupt return instruction is allowed;

in the non-transition region, the method allows execution of the first type of instruction, disallows execution of the second type of instruction, disallows execution of the special register access instruction, and disallows execution of the interrupt return instruction, specifically including: on the premise that the security device is turned on, i.e., in the case that the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, if the CSR _ CMSATTR register 0 bit is 0, execution of the jarrmsu instruction is permitted, execution of the jarrchmsu instruction is not permitted, execution of the csrr, csrw, csrwi instructions is not permitted, and execution of the interrupt return instruction is not permitted.

Example 2:

in the RISC-V architecture, an embodiment of a security device, and/or, and its associated safeguarding device S2:

the embodiment S2 is characterized in that: under the RISC-V system, the boundary information of the memory area is composed of memory address values, the first class of instruction execution and interruption/exception generation are respectively transferred to the same transfer area, preferably to a common code position, and the information required by the safety device and the state data required by the guarantee device are recorded by a special storage facility, the preferred storage facility of the embodiment is as follows: a special purpose register. Both can be transferred to the same address or different addresses of a common forwarding area, the manufacturing method preferably being transferred to a common address.

Embodiment of the safety device:

S-B-A1, special register set for recording the information needed by security device to record the boundary information of memory region, interrupt site information, special address information needed by crossing regions, and the on/off identification information of security device

Based on the contents described in S-A-A1 in example 1

Will:

"register is added: CSR _ CMSATTR (32/64 bit)

The meaning of each bit of information in the register:

0 bit (check instruction boundary identification bit):

is 0, indicating that inspection is required

Is 1, indicating no check is required "

Replacing the steps as follows:

"register is added: CSR _ CMSATTR (32/64 bit)

Description of the function: for identifying whether instruction boundaries are currently checked, and for identifying reasons for transitions to the staging area

The meaning of each bit of information in the register:

0 bit (check instruction boundary identification bit):

is 0, indicating that inspection is required

1, indicates that inspection is not required

1 bit (reason for transfer to transit region):

0, since the first type of instruction execution is transferred to the staging area

1, transition to the staging area due to interrupt/exception Generation "

Will:

"register is added: CSR _ MSCHADDR (32/64 bit)

Description of the function: for storing a first type instruction branch target address value. "

Replacing the steps as follows:

"register is added: CSR _ UMSCHADDR (32/64 bit)

Description of the function: used for saving the common target address value of the first type instruction branch and the interrupt/exception branch in the U mode.

Adding a register: CSR _ SMSCHADDR (32/64 bit)

Description of the function: for saving a target address value common to the first type of instruction branch and the interrupt/exception branch in S mode. "

Will:

"register is added: CSR _ SMSIRLADDR (32/64 bit)

Adding a register: CSR _ SMSIRHADDR (32/64 bit)

Adding a register: CSR _ UMSIRLADDR (32/64 bit)

Adding a register: CSR _ UMSIRHADDR (32/64 bit)

Description of the function: used for saving the high-end address value of the interrupt service program memory area under the U mode. "

Replacing the steps as follows:

"register is added: CSR _ SMSCHLADDR (32/64 bit)

Description of the function: the low-end address value of the transit area for the first type of instruction branch and interrupt/exception branch in S mode is saved.

Adding a register: CSR _ SMSCHHADDR (32/64 bit)

Description of the function: for saving the high-end address values of the mid-transfer areas of the first type of instruction branch and interrupt/exception branches in S mode.

Adding a register: CSR _ UMSCHLADDR (32/64 bit)

Description of the function: the low-end address value of the transfer region of the first type instruction transfer and the interrupt/exception transfer in the U mode is saved.

Adding a register: CSR _ UMSCHHADDR (32/64 bit)

Description of the function: for saving the high-end address values of the mid-transfer areas of the first type instruction branches and interrupt/exception branches in U-mode. "

The rest is consistent.

S-B-A2, adding function for checking whether address of instruction to be executed crosses boundary in safety device

In accordance with the description of S-A-A2 in example 1.

S-B-A3, adding function for checking whether data access crosses boundary in safety device

In accordance with the description of S-A-A3 in example 1.

S-B-A4, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

by adopting the preferred scheme, on the premise of starting the safety device, the first class instruction can be executed, the boundary value is not switched, the instruction boundary check is not carried out in the transfer region, the current transfer caused by the execution of the first class instruction is identified, the next instruction address is stored, and the value of the program counter is set as the initial address of the transfer code. The method specifically comprises the following steps:

the instruction format is as follows: jarrmsu ra rs

The functions are as follows:

only on the premise of starting the safety device in the current mode, namely only when the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, the instruction can be executed, otherwise, an exception is reported; when the instruction is executed, register 0, position 1, position 0 of CSR _ CMSATTR, rd is set by PC +4, rd defaults to x1, namely ra, and PC is set by the value in the CSR _ MSCHADDR register. rs is used to specify the target address value.

S-B-A5, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective:

in accordance with the description of S-A-A5 in example 1.

S-B-A6, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; the processor needs to provide an information identifier indicating that the transfer is currently caused by the interrupt/exception generation, and the identifier information is recorded in a special register of the security device; setting the value of a special boundary register in the device as the boundary value of a common transfer region of the first class instruction transfer and the interrupt/abnormal transfer; transferring to a common transfer address of a first type instruction transfer and an interrupt/exception transfer; the rest of the operation is consistent with the existing interrupt and exception handling. The method specifically comprises the following steps:

when an interrupt or exception occurs:

if the current mode is U, the mode to which the interrupt delegated is checked:

if the security device is entrusted to the U mode, whether the security device is opened in the U mode is checked, namely whether the bit 0 of the CSR _ EMSUR register is 1 is checked, if the bit is 1, the CSR _ UTMSATTR register is used for storing the value of the CSR _ CMSATTR register, the value of the CSR _ CMSATTR register is stored in the position 1 and the position 1 of the CSR _ CMSATTR register, the value of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register are respectively stored in the CSR _ UTMSLSIDE register and the CSR _ UTMSHSIDE register, then the CSR _ CMSLSIDE register and the CSR _ UMSCHHADDR register are respectively set by the value of the CSR _ UMSCHLADDR register and the CSR _ CMSHSIDE register, and finally the PC is set by the value in the CSR _ UMSCHADDR register;

if the security device is entrusted to the S mode, whether the security device is opened in the S mode is checked, namely whether the 1 bit of the CSR _ EMSUR register is 1 is checked, if the 1 bit of the CSR _ EMSUR register is 1, the CSR _ STMSATTR register is used for storing the value of the CSR _ CMSATTR register, the 0 position 1 and the 1 position 1 of the CSR _ CMSATTR register are respectively used for storing the values of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register by the CSR _ STMSLSIDE, CSR _ STMSHSIDE register, then the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register are respectively set by the values of the two registers of CSR _ SMSCHLADDR, CSR _ SMSCHHADDR, and finally the PC is set by the value in the CSR _ SMSCHADDR register;

if the current mode is S and the committed mode is S or U, checking whether the S mode opens the security device, namely checking whether the 1 bit of the CSR _ EMSUR register is 1, if so, using the CSR _ STMSATTR register to store the value of the CSR _ CMSATTR register, using the CSR _ CMSATTR register to store the 0 bit 1 and the 1 bit 1 of the CSR _ CMSATTR register, using the CSR _ STMSLSIDE, CSR _ STMSHSIDE register to store the value of the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register, using the 0 bit 1 and the 1 bit 1 of the CSR _ CMSATTR register, then using the values of the two registers CSR _ SMSCHLADDR, CSR _ SMSCHHADDR to set the CSR _ CMSLSIDE register and the CSR _ CMSHSIDE register, and finally using the value in the CSR _ SMSCHADDR register to set the PC.

S-B-A7, adding the function when the interruption returns to the safety device, and restoring the site information which ensures the safety device to be effective:

Implementation of the safeguard device:

S-B-A8, setting a special register group for recording state data required by the guarantee device, and recording whether the device is in a transfer area:

register of the security device is used: CSR _ CMSATTR (32/64 bit)

Description of the function: to identify whether it is currently in a common transit area.

The meaning of each bit of information in the register:

0 bit (whether currently in the transit area flag bit):

is 0, indicating that it is not currently in the common transit area

Is 1, indicates that the current is in the common transit area

In particular: the security device and the securing device share the CSR _ CMSATTR register because, in the security device, it is provided that no instruction boundary check is performed only in the common transition region; the security device also limits whether to access the register related to the security device and whether to execute the legal cross-region transfer execution by judging whether the security device is currently in the common transfer region, so that the CSR _ CMSATTR register 0 bit can identify whether the instruction check is not needed currently or not and can identify whether the security device is currently in the common transfer region by using the same value, and the CSR _ CMSATTR register and the security device do not conflict with each other.

S-B-A9, and the mode of identifying the register needing to be guaranteed:

in accordance with the description of S-A-A9 in example 1.

S-B-A10, function of adding access control when accessing special register:

in accordance with the description of S-A-A10 in example 1.

S-B-A11, conditions to allow and restrict access to the secure and secured device' S special registers, and to execute cross-region transfer execution and special register access instructions:

based on the contents described in example 1 for S-A-A11:

will:

preferably, if the target area is a non-relay area, the ra register 0 is at position 0 and position 1 is at position 0, and if the target area is an interrupt/abnormal transfer area, the ra register 0 is at position 1 and position 1 is at position 1; "

Replacing the steps as follows:

"preferred, ra register 0 position 0; "

Will:

"in the transition area to which execution of the first type of instruction is transferred, execution of the first type of instruction is not allowed; allowing execution of the second class of instructions; the method for allowing the special register access instruction to be executed and not allowing the interrupt return instruction to be executed specifically includes: on the premise that the safety device is started, namely under the condition that a CSR _ EMSUR register (if the current S mode, 1 bit and if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 1 and the 1 bit is 0, a jarrmsu instruction is not allowed to be executed, a jarrchmsu instruction is allowed to be executed, a csrr instruction, a csrw instruction and a csrwi instruction are allowed to be executed, and an interrupt return instruction is not allowed to be executed;

in the transfer area to which the interrupt/exception generation is transferred, not allowing the second class of instructions to be executed; allowing execution of a first class of instructions; allowing execution of a special register access instruction, allowing execution of an interrupt return instruction, including; on the premise that the security device is turned on, namely under the condition that a CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 1 and the 1 bit is 1, the execution of the jarrchmsu instruction is not allowed, the execution of the jarrmsu instruction is allowed, the execution of the csrr, csrw and csrwi instructions is allowed, and the execution of the interrupt return instruction is allowed. "

Replacing the steps as follows:

"in a common staging area where the first type of instruction performs a branch and the interrupt/exception-generating branch, the first type of instruction is not allowed to execute; allowing execution of the second class of instructions; the method for allowing the special register access instruction to be executed and the interrupt return instruction to be executed specifically includes: on the premise that the security device is turned on, i.e., under the condition that the CSR _ EMSUR register (1 bit if the current S mode, 1 bit if the current U mode, 0 bit) is 1, if the CSR _ CMSATTR register 0 bit is 1, the execution of the jarrmsu instruction is not allowed, the execution of the jarrchmsu instruction is allowed, the execution of the csrr, csrw and csrwi instructions is allowed, and the execution of the interrupt return instruction is allowed. "

The rest is consistent.

Example 3:

in the RISC-V architecture, an embodiment of a security device, and/or, and its associated safeguarding device S3:

the embodiment S3 is characterized in that: under RISC-V system, the boundary information of memory area is formed by memory address value and/or page identification value, the first class of instruction execution and interruption/abnormal generation are transferred to different transfer areas, and the information needed by safety device and the state data needed by guarantee device are recorded by special storage device, the preferred storage device of the making method is: a special purpose register. In particular: the boundary information of the memory area can be recorded in a memory address value and/or in a page identification mode, and the preferred recording mode of the manufacturing method is as follows: the boundary information of the memory area where the instruction and/or the data are located is recorded in a page identification mode, and the boundary information of the memory area where the stack area and other data are located is recorded in a memory address value mode.

Embodiment of the safety device:

S-C-A1, special register set for recording information needed by security device to record boundary information, interrupt site information, special address information, and opening/closing identification information of security device

Based on the contents described in example 1 for S-A-A1:

will:

CSR _ CMSLSIDE, CSR _ CMSHSIDE, CSR _ UTMSLSIDE, CSR _ UTMSHSIDE, CSR _ STMSLSIDE, CSR _ STMSHSIDE, CSR _ SMSIRLADDR, CSR _ SMSIRHADDR, CSR _ UMSIRLADDR, CSR _ UMSIRHADDR register delete.

Adding a register: CSR _ SMSIRID (32/64 bit)

Description of the function: the method is used for saving the page identification information of the branch address after the interruption/exception generation in the S mode.

Adding a register: CSR _ UMSIRID (32/64 bit)

Description of the function: the method is used for saving the page identification information of the branch address after the interruption/exception generation in the U mode.

Adding CSR _ CMSATTR register information:

besides the bits 0, 1 and 2, other bits are used to record the page identification information of the address value in the PC, i.e. the program counter.

The rest is consistent.

S-C-A2, adding page table entry content

S-C-A3, adding function for checking whether address of instruction to be executed crosses boundary in safety device

Based on the contents described in example 1 for S-A-A2:

will:

the method comprises the steps of starting a safety device only in a current mode, carrying out boundary check when instruction boundary check is required currently, namely checking whether a value in a current program counter is in a memory space range determined by a processor, if the value is not beyond the range, allowing execution, and otherwise, reporting an exception. The method specifically comprises the following steps:

only in the case where the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1 and the CSR _ CMSATTR register 0 bit is 0, a boundary check is performed, the check contents being: if the PC is smaller than the value in the CSR _ CMSLSIDE register or larger than or equal to the value in the CSR _ CMSHSIDE register, an exception is reported, otherwise, the execution is normal. "

Replacing the steps as follows:

the method comprises the steps of starting a safety device only in a current mode, carrying out boundary check when an instruction boundary check is needed currently, and judging whether a page identification value of an instruction address value is inconsistent with a page identification value of an internal memory area stored in an additional register, if so, reporting an exception by a processor, and if not, normally fetching the address. The method specifically comprises the following steps:

only in the case where the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1 and the CSR _ CMSATTR register 0 bit is 0, a boundary check is performed, the check contents being: if the page identification information recorded in the data structure corresponding to the page table entry corresponding to the page where the PC is located is inconsistent with the page identification information recorded in the CSR _ CMSATTR register, reporting an exception, otherwise, executing normally. "

The rest is consistent.

S-C-A4, adding function for checking whether data access crosses boundary in safety device

Based on the contents described in example 1 for S-A-A3:

will:

"only in the case of the security device being turned on in the current mode, the boundary check is performed on the specific instruction accessing the normal data area, that is, whether the data access memory address is in the normal data area is checked, if the data access memory address does not exceed the range, the execution is allowed, otherwise, an exception is reported, which specifically includes:

adding load and store instruction functions:

the added functions are as follows:

only in case the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, a bounds check is performed, the check contents being: if the data access memory address value is less than the value in the CSR _ CMSLIDE register or more than or equal to the value in the CSR _ CMSHSIDE register, reporting an exception, otherwise, executing normally. "

Replacing the steps as follows:

only when the safety device is started in the current mode, boundary check is carried out on a specific instruction for accessing a common data area, namely, whether the page identification information of the current address to be operated is consistent with the page identification value of the memory area where the data area is stored in the additional register is checked, and if yes, the operation is executable; if not, the processor reports the exception, and specifically comprises the following steps:

adding load and store instruction functions:

the added functions are as follows:

only in case the CSR _ EMSUR register (1 bit if the current S mode, 0 bit if the current U mode) is 1, a bounds check is performed, the check contents being: and accessing whether the page identification information recorded in the data structure corresponding to the page table entry corresponding to the page where the memory address value is located is consistent with the page identification information recorded in the CSR _ CMSATTR register or not, executing normally, otherwise, reporting an exception. "

The rest is consistent.

S-C-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

in accordance with the description of S-A-A4 in example 1.

S-C-A6, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective:

in accordance with the description of S-A-A5 in example 1.

S-C-A7, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; setting the value of a boundary register in the device as page identification information of an interrupt/abnormal transfer area; transferring to an entry address of an interrupt service routine; the rest of the operation is consistent with the existing interrupt and exception handling. The method specifically comprises the following steps:

when an interrupt or exception occurs:

if the current mode is U, the mode to which the interrupt delegated is checked:

if the mode is entrusted to the U mode, whether a safety device is opened in the U mode is checked, namely whether the bit 0 of the CSR _ EMSUR register is 1 is checked, if so, the value of the CSR _ CMSATTR register is stored by the CSR _ UTMSATTR register, then the page identification information of the transfer address after the interruption/abnormal generation in the U mode stored in the CSR _ UMSIRID register is used, the corresponding bit of the page identification information in the CSR _ CMSATTR register is set, and the position 1 of the CSR _ CMSATTR register 0 is set; finally, the existing rules of RISC-V are used to transfer to the entry address of the interrupt service program;

if the mode is entrusted to the S mode, whether a safety device is opened in the S mode is checked, namely whether the 1 bit of the CSR _ EMSUR register is 1 is checked, if so, the CSR _ STMSATTR register is used for storing the value of the CSR _ CMSATTR register, then the page identification information of the transfer address after interruption/abnormal generation in the S mode stored in the CSR _ SMSIRID register is used for setting the corresponding bit of the page identification information in the CSR _ CMSATTR register, and setting the 0 position 1 of the CSR _ CMSATTR register; finally, the existing rules of RISC-V are used to transfer to the entry address of the interrupt service program;

if the current mode is S and the committed mode is S or U, checking whether the S mode opens a safety device, namely checking whether a bit of a CSR _ EMSUR register 1 is 1, if so, storing a numerical value of the CSR _ CMSATTR register by using the CSR _ STMSATTR register, then setting a bit corresponding to page identification information in the CSR _ CMSATTR register by using page identification information of a transfer address after interruption/abnormal generation in the S mode stored in the CSR _ SMSIRID register, and setting the position of the CSR _ CMSATTR register 0 to 1; finally, the existing rules of RISC-V are used to transfer to the interrupt service program entry address.

S-C-A8, adding the function when the interruption returns to the safety device, and restoring the site information which ensures the safety device to be effective:

on the premise that the security device is opened in the current mode, namely on the premise that the CSR _ EMSUR register (if the current S mode, 1 bit, if the current U mode, 0 bit) is 1, if the current mode is S, the value of the CSR _ CMSATTR register is restored by using the value of the CSR _ STMSATTR register; if the current mode is U, the value of the CSR _ CMSATTR register is restored with the value of the CSR _ UTMSATTR register.

Implementation of the safeguard device:

S-C-A9, setting a special register group for recording state data required by the guarantee device, and recording whether the device is in a transfer area:

in accordance with the description of S-A-A8 in example 1.

S-C-A10, and the mode of identifying the register needing to be guaranteed:

in accordance with the description of S-A-A9 in example 1.

S-C-A11, function of adding access control when accessing special register:

in accordance with the description of S-A-A10 in example 1.

S-C-A12, conditions to allow and restrict access to the secure and secured device' S special registers, and to execute cross-region transfer execution and special register access instructions:

in accordance with the description of S-A-A11 in example 1.

Example 4:

in the RISC-V architecture, an embodiment of a security device, and/or, and its associated safeguarding device S4:

the embodiment S4 is characterized in that: the boundary information of the memory area is composed of memory address values and/or page identification values, the execution of the first type of instruction and the generation of interruption/exception are respectively transferred to the same transfer area, preferably to a common code position, and the information required by the safety device and the state data required by the security device are recorded by a special storage facility, and the preferred storage facility of the manufacturing method is as follows: a special purpose register. In particular: the boundary information of the memory area can be recorded in a memory address value and/or in a page identification mode, and the preferred recording mode of the manufacturing method is as follows: the boundary information of the memory area where the instruction and/or the data are located is recorded in a page identification mode, and the boundary information of the memory area where the stack area and other data are located is recorded in a memory address value mode.

Embodiment of the safety device:

S-D-A1, special register set for recording information needed by security device to record boundary information, interrupt site information, special address information, and opening/closing identification information of security device

Based on the contents described in S-B-A1 in example 1:

will:

CSR _ CMSLSIDE, CSR _ CMSHSIDE, CSR _ UTMSLSIDE, CSR _ UTMSHSIDE, CSR _ STMSLSIDE, CSR _ STMSHSIDE, CSR _ SMSCHLADDR, CSR _ SMSCHHADDR, CSR _ UMSCHLADDR, CSR _ UMSCHHADDR register delete.

Adding a register: CSR _ SMSCHID (32/64 bit)

Description of the function: the method is used for saving the common page identification information of the branch address after the first class instruction branch and the interrupt/exception generation in the S mode.

Adding a register: CSR _ UMSCHID (32/64 bit)

Description of the function: the method is used for saving the common page identification information of the branch address after the first class instruction branch and the interrupt/exception generation in the U mode.

Adding CSR _ CMSATTR register information:

The rest is consistent.

S-D-A2, adding page table entry content

In accordance with the description of S-C-A2 in example 3.

S-D-A3, adding function for checking whether address of instruction to be executed crosses boundary in safety device

In accordance with the description of S-C-A3 in example 3.

S-D-A4, adding function for checking whether data access crosses boundary in safety device

In accordance with the description of S-C-A4 in example 3.

S-D-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective:

in accordance with the description of S-B-A4 in example 2.

S-D-A6, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective:

in accordance with the description of S-B-A5 in example 2.

S-D-A7, adding the function when the interruption/abnormity occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective:

when the interruption/abnormity occurs, the field information required for ensuring the effectiveness of the safety device is stored in a corresponding special register in the safety device, and preferably, whether the instruction boundary identification information needs to be checked when the interruption/abnormity occurs is also stored; the processor needs to provide an information identifier indicating that the transfer is currently caused by the interrupt/exception generation, and the identifier information is recorded in a special register of the security device; setting the value of a special boundary register in the device as page identification information of a common transfer area of the first class instruction transfer and the interruption/abnormal transfer; transferring to a common transfer address of a first type instruction transfer and an interrupt/exception transfer; the rest of the operation is consistent with the existing interrupt and exception handling. The method specifically comprises the following steps:

when an interrupt or exception occurs:

if the current mode is U, the mode to which the interrupt delegated is checked:

if the mode is entrusted to the U mode, whether a safety device is opened in the U mode is checked, namely whether the bit 0 of the CSR _ EMSUR register is 1 is checked, if the bit is 1, the CSR _ UTMSATTR register is used for storing the value of the CSR _ CMSATTR register, the position 1 and the position 1 of the CSR _ CMSATTR register are set, then common page identification information of a transfer address after the first type of instruction transfer and interruption/abnormal generation in the U mode stored in the CSR _ UMSIRID register is used for setting the corresponding bit of the page identification information in the CSR _ CMSATTR register, and finally, the value in the CSR _ UMSCHADDR register is used for setting the PC;

if the mode is entrusted to the S mode, whether a safety device is opened in the S mode is checked, namely whether the 1 bit of a CSR _ EMSUR register is 1 is checked, if the 1 bit is 1, the CSR _ STMSATTR register is used for storing the value of the CSR _ CMSATTR register, the 0 position 1 and the 1 position 1 of the CSR _ CMSATTR register are used for storing common page identification information of a transfer address after the first type of instruction transfer and interruption/abnormal generation in the S mode in the CSR _ SMSIRID register, the corresponding bit of the page identification information in the CSR _ CMSATTR register is set, and finally the PC is set by the value in the CSR _ SMSCHADDR register;

if the current mode is S and the committed mode is S or U, checking whether the security device is opened in the S mode, namely checking whether a bit 1 of a CSR _ EMSUR register is 1, if so, saving the value of the CSR _ CMSATTR register by using the CSR _ STMSATTR register, setting a bit corresponding to the page identification information in the CSR _ CMSATTR register at a position 1 and a position 1 of the CSR _ CMSATTR register 0, then using the common page identification information of the transfer address after the transfer and the interruption/abnormal generation of the first class of instructions in the S mode saved in the CSR _ SMSIRID register, and finally setting the PC by using the value in the CSR _ SMSCHADDR register.

S-D-A8, adding the function when the interruption returns to the safety device, and restoring the site information which ensures the safety device to be effective:

in accordance with the description of S-C-A8 in example 3.

Implementation of the safeguard device:

S-D-A9, setting a special register group for recording state data required by the guarantee device, and recording whether the device is in a transfer area:

in accordance with the description of S-B-A8 in example 2.

S-D-A10, mode of identifying registers that need to be secured:

in accordance with the description of S-B-A9 in example 2.

S-D-A11, function of adding access control when accessing special register:

in accordance with the description of S-B-A10 in example 2.

S-D-A12, conditions to allow and restrict access to the secure and secured device' S special registers, and to execute cross-region transfer execution and special register access instructions:

in accordance with the description of S-B-A11 in example 2.

Claims

1. A computing device, characterized by: comprises a safety device and a guarantee device;

the safety device performs access control on the memory area based on hardware; the securing means ensures, on the basis of hardware, that only in a specific state can control state data for validating the security means be set and specific instructions for validating the security means be executed;

the safeguard device includes: only when cross-region branch instruction execution, interrupt/exception generation, or interrupt return occurs in the staging region, the information required to ensure the validity of the security device and the state data required to ensure the validity of the security device can be accessed.

2. The apparatus of claim 1, wherein: the safety device includes: intercepting illegal access crossing the boundary of the memory area; providing a legal mode of crossing the boundary of the memory area;

the memory area boundary is as follows: the processor identifies the boundary of the region formed by the memory address values or the processor identifies the boundary of the region marked by the page identification information.

3. The apparatus of claim 2, wherein: the intercepting of illegal access crossing the boundary of the memory area comprises the following steps: if the instruction address to be executed exceeds the memory area boundary determined by the processor, the processor reports an exception; and if the address of the data read-write target exceeds the boundary of the memory area matched with the read-write instruction, the processor reports an exception.

4. The apparatus of claim 2, wherein: the method for legally crossing the boundary of the memory area comprises the following steps: when a special cross-region transfer instruction is executed or an interrupt/exception occurs, the special cross-region transfer instruction must be transferred to a transfer region, and then boundary switching is performed on codes in the transfer region and the codes are transferred to a final target address.

5. The apparatus of claim 4, wherein if both branch to a common code location of the same branch region, identification information is provided by hardware to distinguish whether the branch was caused by execution of a cross-region branch instruction or by generation of an interrupt/exception; interrupting the return also results in a cross-region transfer.

6. The apparatus of claim 1, wherein: only a cross-region branch instruction executes, and/or an interrupt/exception is generated, and/or an interrupt return causes a cross-region branch.

7. The apparatus of claim 1, wherein: the safety device is provided with a safety function, and/or the safety device is provided with a switch for ensuring the function, and when the switch is closed, the device is disabled.

8. A method of making a security device comprising: a method for manufacturing a boundary checking device and a method for providing legal boundary crossing memory area;

the method for manufacturing the boundary check device comprises the following steps: a method of manufacturing a command boundary checking device and a method of manufacturing a command data boundary checking device;

the method for legally crossing the boundary of the memory area comprises the following steps: dedicated cross-region branch instructions are provided that, when executed, branch to the staging region.

9. The method of claim 8, wherein: the method for manufacturing the instruction boundary checking device comprises the following steps: the processor determines the current memory area range and judges whether the address of the instruction to be executed is in the area range, if so, the instruction can be normally accessed, and if not, the processor reports an exception.

10. The method of claim 8, wherein: the method for manufacturing the instruction data boundary checking device comprises the following steps: the processor determines a plurality of groups of data storage area boundaries, different reading and writing instructions are matched for each group of data areas, when the memory is read and written, whether an operation address is in the matched data boundaries or not is judged according to the different reading and writing instructions, if yes, the memory can be normally accessed, and if not, an exception is reported; the purpose of the sets of data areas is to distinguish the data area, stack area, and independent data area for other purposes of the program.

11. The method of claim 9, wherein: determining the current memory area range by the processor, and judging whether the address of the instruction to be executed is in the range, wherein the address can be adopted as follows:

the processor sets a special storage facility to store the boundary address value of the current memory area, and when executing an instruction, judges whether the address value of a program counter of the processor is in a boundary range, if so, indicates that the address value is not beyond the range, and if not, indicates that the address value is beyond the range;

or the like, or, alternatively,

adding identification information in the attribute of the memory page, recording the current page identification information by the processor, and judging whether the page identification information of the address stored by the program counter in the processor is consistent with the current page identification information when executing the instruction, wherein if the page identification information is consistent, the page identification information does not exceed the range, otherwise, the page identification information exceeds the range.

12. The method of claim 11, wherein: a switch is provided in the safety device, and when the switch is in an off state, the instruction boundary check and the data boundary check are not performed.

13. The method of claim 8, wherein: providing a special transfer instruction, and completing the transfer from the transfer area to the target area when executing the instruction; and when the interrupt returns, returning the interrupt site from the transit area through the execution of the interrupt instruction, and recovering the site information.

14. The method of claim 8, wherein:

the cross-region transfer instruction is called a first type instruction for short, when the cross-region transfer instruction is executed, the cross-region transfer instruction is transferred to an entry position of a transfer region, the instruction simultaneously switches a current region boundary into a transfer region boundary, and/or simultaneously switches a currently accessible data region boundary into a data region boundary accessible by codes in the transfer region, and if the current region boundary is not switched in the first type instruction, the processor needs to ignore instruction boundary check after the first type instruction is executed.

15. The method of claim 14, wherein the transit zone entry location is stored by a default fixed storage facility and does not necessarily appear in the first type of instruction.

16. The method of claim 14, wherein the branch target address is specified by an operand of the first type of instruction, or by a specific special purpose register.

17. The method of claim 13, wherein:

the special branch instruction is called a second type of instruction for short, and the instruction is used for transferring from a transfer area to a specified address; and/or the instruction switches the boundary of the current area to the boundary of the area to which the target address belongs at the same time, and/or simultaneously switches the boundary of the data area accessible by the transit area to the boundary of the data area accessible by the code in the target area.

18. The method of claim 17 wherein the target address of the second type of instruction is a branch target address specified by the first type of instruction, the branch target address and the branch target address cooperating to complete the inter-domain branch.

19. The method of claim 17 wherein the second type of instruction specifies whether instruction bounds checking is to be resumed if execution of the first type of instruction would result in the processor not performing instruction bounds checking.

20. The method of claim 17, wherein the branch target address is specified by an instruction operand of the second type or by a specific special register.

21. The method of claim 13, wherein: when the interrupt and the exception occur, the interrupt and the exception are transferred to a transfer area through a processor hardware mechanism, and the method further comprises the following steps: after the interruption/abnormity occurs, information required by the fact that the security device on the interruption site is valid is saved, then the boundary of the current area is set as the boundary of the transfer area, and meanwhile, the boundary of the data area accessible to the current area is switched to the boundary of the data area accessible to the code of the transfer area and is transferred to a designated instruction position.

22. The method of claim 21, wherein the processor ignores instruction bounds checking in the staging area if the current area bounds are not switched when the interrupt/exception is generated.

23. The method of claim 13, wherein: if the safety device comprises a switch, the first class instruction and the second class instruction cannot be executed when the switch is in an off state, and the execution can report the abnormity.

24. A manufacturing method of a security device is characterized by comprising the following steps:

storing information required for ensuring the effectiveness of the safety device and state data required for ensuring the effectiveness of the safety device in a special storage facility;

setting the special storage facilities to mark the access state of each special storage facility; the processor ensures that the storage facilities can be accessed only when cross-region transfer instruction execution, interruption/exception generation or interruption return occurs in the transfer region according to the access state information; the second type of instruction is executable only in the staging area to which the first type of instruction is transferred;

the information required to ensure that the security device is valid includes: boundary information of a memory area where the global data is located; boundary information of a memory area where stack data is located; boundary information of memory areas where other kinds of data are located; the first address of the transfer code needed by the branch instruction; transferring boundary information of a transfer area required by the instruction; the first address of the code to be relayed for interruption/exception; boundary information of a transfer area required by the interrupt/abnormal service program; the security device turns on/off the identification information.

25. The method of claim 24, wherein: the first address of the required transfer code refers to a position to which the transfer is necessary when the first type of instruction is executed or an interrupt/exception occurs.

26. The method of claim 25, wherein: the transfer area is as follows: when a first type of instruction is executed or an interrupt/exception occurs, the branch address is recorded in the device in the area where the branch address is located.

27. The method of claim 26, wherein instructions in the staging area are executed without instruction bounds checking.

28. The method of claim 25, wherein: the state data required by the safeguard device includes: transferring areas required by the transfer instructions; or, a staging area required for the interrupt/exception.

29. A safety device and a manufacturing method of a guarantee device matched with the safety device are characterized in that: the boundary information of the memory area is composed of memory address values, the execution of the first class of instructions and the generation of interruption/abnormity are respectively transferred to different transfer areas, and the information required by the safety device and the state data required by the guarantee device are recorded through a special storage facility;

the manufacturing method of the safety device comprises the following steps:

M-A-A1, setting special register group for recording information needed by security device to record boundary information of memory region, interrupt field information, special address information needed by cross region, and opening/closing identification information of security device;

M-A-A2, adding a function of checking whether the address of the instruction to be executed crosses the boundary in the safety device;

M-A-A3, adding a function for checking whether the daA access crosses the boundary in the security device;

M-A-A4, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective;

M-A-A5, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective;

M-A-A6, adding the function when interrupt/abnormal occurs in the safety device, storing the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective;

M-A-A7, adding the function when the interruption returns to the safety device, and recovering the effective site information of the safety device;

the manufacturing method of the guarantee device comprises the following steps:

M-A-A8, setting a special register group for recording status daA required by the security device, and recording whether the device is in a transfer area currently;

M-A-A9, identifying the mode of a register needing to be guaranteed;

M-A-A10, when accessing special register, adding access control function;

m-a 11, sets conditions to allow and restrict access to the secure and guarded devices' special registers, and to execute cross-region transfer execution and special register access instructions.

30. A safety device and a manufacturing method of a guarantee device matched with the safety device are characterized in that: the boundary information of the memory area is composed of memory address values, and the first class of instruction execution and interruption/exception generation are respectively transferred to the same transfer area; transferring to a common code position, and recording information required by the safety device and state data required by the security device through a special storage facility;

the manufacturing method of the safety device comprises the following steps:

M-B-A1, setting a special register group for recording information required by ensuring the safety device to be effective, and recording boundary information of various memory areas, interruption field information, specific address information required by cross-area, and opening/closing identification information of the safety device;

M-B-A2, adding a function of checking whether the address of the instruction to be executed crosses the boundary in the safety device;

M-B-A3, adding a function for checking whether the data access crosses the boundary in the security device;

M-B-A4, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective;

M-B-A5, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective;

M-B-A6, adding the function when interrupt/abnormal occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective;

M-B-A7, adding the function when the interruption returns to the safety device, and recovering the effective site information of the safety device;

the manufacturing method of the guarantee device comprises the following steps:

M-B-A8, setting a special register group for recording status data required by the security device, and recording whether the current device is in a transfer area;

M-B-A9, identifying a register needing to be guaranteed;

M-B-A10, when accessing special register, adding access control function;

M-B-a11, sets conditions to allow and restrict access to the secure and guarded devices' special registers, and to execute cross-region transfer execution and special register access instructions.

31. A safety device and a manufacturing method of a guarantee device matched with the safety device are characterized in that:

the boundary information of the memory area consists of memory address values and/or page identification values, the execution of the first class of instructions and the generation of interruption/abnormity are respectively transferred to different transfer areas, and the information required by the safety device and the state data required by the guarantee device are recorded through a special storage facility;

the manufacturing method of the safety device comprises the following steps:

M-C-A1, setting a special register group for recording information required by ensuring the safety device to be effective, and recording boundary information of various memory areas, interruption field information, specific address information required by cross-area, and opening/closing identification information of the safety device;

M-C-A2, adding page table entry content;

M-C-A3, adding a function of checking whether the address of the instruction to be executed crosses the boundary in the safety device;

M-C-A4, adding a function for checking whether the data access crosses the boundary in the security device;

M-C-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective;

M-C-A6, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective;

M-C-A7, adding the function when interrupt/abnormal occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective;

M-C-A8, adding the function when the interruption returns to the safety device, and recovering the effective site information of the safety device;

the manufacturing method of the guarantee device comprises the following steps:

M-C-A9, setting a special register group for recording state data required by the security device, and recording whether the current device is in a transfer area;

M-C-A10, identifying a register needing to be guaranteed;

M-C-A11, when accessing special register, adding access control function;

M-C-a12, sets conditions to allow and restrict access to the secure and guarded devices' special registers, and to execute cross-region transfer execution and special register access instructions.

32. A safety device and a manufacturing method of a guarantee device matched with the safety device are characterized in that:

the boundary information of the memory area consists of memory address values and/or page identification values, and the first class of instruction execution and interruption/exception generation are respectively transferred to the same transfer area; transferring to a common code position, and recording information required by the safety device and state data required by the security device through a special storage facility;

the manufacturing method of the safety device comprises the following steps:

M-D-A1, setting special register group for recording information needed by security device to record boundary information, interrupt field information, special address information needed by cross-region, and opening/closing identification information of security device;

M-D-A2, adding page table entry content;

M-D-A3, adding a function of checking whether the address of the instruction to be executed crosses the boundary in the safety device;

M-D-A4, adding a function for checking whether the data access crosses the boundary in the security device;

M-D-A5, adding a first type of instruction in the safety device, initiating a transregional transfer action and setting information required for ensuring the safety device to be effective;

M-D-A6, adding a second type of instruction in the safety device to complete the transfer to the target area and set the information required for ensuring the safety device to be effective;

M-D-A7, adding the function when interrupt/abnormal occurs in the safety device, saving the on-site information for ensuring the safety device to be effective and setting the information required for ensuring the safety device to be effective;

M-D-A8, adding the function when the interruption returns to the safety device, and recovering the effective site information of the safety device;

the manufacturing method of the guarantee device comprises the following steps:

M-D-A9, setting a special register group for recording status data required by the security device, and recording whether the current device is in a transfer area;

M-D-A10, identifying a register needing to be guaranteed;

M-D-A11, when accessing special register, adding access control function;

M-D-a12, sets conditions to allow and restrict access to the secure and guarded devices' special registers, and to execute cross-region transfer execution and special register access instructions.