CN109998536A - A kind of epilepsy detection integrated circuit and its training method based on support vector machines - Google Patents
A kind of epilepsy detection integrated circuit and its training method based on support vector machines Download PDFInfo
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Abstract
The present invention discloses a kind of epilepsy detection integrated circuit and its training method based on support vector machines, uses distributed lookup table filter in characteristic extraction part, reduces circuit complexity；Increase frequency domain Variance feature, can preferably react EEG signals feature, improve detection accuracy；The design of vector machine drill circuit is supported using the sequential minimum algorithm of modified version, the sequential minimum algorithm of original version is avoided to find the erroneous judgement for being unsatisfactory for generating when the Lagrange multiplier of optimal conditions, less the number of iterations can be used and reach similar performance, further improve efficiency.Simultaneously by the way that kernel function computing module is carried out the pipeline design, the training speed of on piece support vector machines is improved.The portability of epilepsy detection system can be improved in the present invention, provides the on piece training function of more high energy efficiency.
Description
Technical field
The invention belongs to technical field of integrated circuits, and in particular to a kind of integrated electricity of epilepsy detection based on support vector machines
Road and its training method.
Background technique
Cerebral neuron paradoxical discharge can cause epilepsy, influence on the life health of people serious.Scalp non-invasive electroencephalogram,
Important role is play in epileptic attack diagnosis.People is carried out to the EEG signals of patient however, relying primarily on doctor at present
Work point analysis, this method is not only time-consuming, but also ununified judgment basis, not can guarantee its accuracy.With medical electronics
The continuous development of technology, intelligent algorithm starts to be used in during the automatic diagnosis of epilepsy, however most algorithm
It needs to realize on computers, it is still not convenient enough.Therefore, artificial intelligence learning algorithm is integrated on circuit, make it is entire from
Dynamic diagnostic system can be portable, and can relearn for the change of EEG signals state, to the daily life matter for improving patient
Amount has very important significance.
Support vector machines learning method applicability is relatively wide, precision is higher, can use for unbalanced data set, therefore
It is used in portable epilepsy auto-check system.Support vector machine method can be divided into as the classification method supervised entirely
Two processes of training and classification: it in the training process, using the sample set marked, finds and is in the borderline feature of sample set
Vector classifies to input sample using supporting vector in assorting process as supporting vector.Training Support Vector Machines are
The quadratic programming problem of solution standard, however when data volume is larger, computation complexity is high, needs higher energy consumption and biggish
Memory space, therefore training has certain difficulty with low power in real time on chip.More the most commonly used is sequential minimum algorithms
Training Support Vector Machines, the sequential minimum algorithm of modified version can further speed up training process, reduce power consumption.
Using support vector machine method, need first to carry out feature extraction to EEG signals to obtain feature vector.Use band
Bandpass filter carries out frequency domain filtering to EEG signals, then calculates frequency domain energy, is a kind of common feature extracting method.However
The circuit complexity of the relatively narrow bandpass filter of passband is high；In addition, frequency domain energy is only capable of the one aspect of reaction signal, need more
More features characterize EEG signals.
By the retrieval discovery to available data document, the existing portable epilepsy based on support vector machines diagnoses automatically
IC system, filter realization is complex, and frequency domain character generally only has energy value, is unable to the variation model of reaction signal
It encloses, does not in addition have the training function of support vector machines generally.
Summary of the invention
The present invention in view of the above shortcomings of the prior art, proposes a kind of integrated electricity of epilepsy detection based on support vector machines
Road reduces circuit complexity, improves detection accuracy.
The present invention is to be achieved through the following technical solutions:
A kind of epilepsy detection integrated circuit based on support vector machines, including characteristic extracting module and support vector machines；
Characteristic extracting module is for obtaining training sample, and the training sample that will acquire is input to support vector machines；
Support vector machines include control scheduler module, error update module, sample selection module, kernel function computing module and
Lagrange multiplier optimization module；
The sample selection module, the sample for selecting to be unsatisfactory for KKT condition, by the corresponding Lagrange multiplier of sample
It is delivered to Lagrange multiplier optimization module；
The Lagrange multiplier optimization module is carried out for the Lagrange multiplier to the sample for being unsatisfactory for KKT condition
Optimization, and by the sample error originated from input update module after optimization；
The error update module, for updating the prediction error F of sample after all optimizationsi, then to sample after optimization
Subset boundary is updated, until all samples terminate when meeting KKT condition；
Kernel function computing module, for accelerating the kernel function of Lagrange multiplier optimization module and error update module to calculate
Process；
Scheduler module is controlled, for controlling the on piece training process of support vector machines.
Preferably, the characteristic extracting module includes filter module and feature calculation module；
Filter module, for being filtered calculating, and the filtered brain telecommunications that will be obtained to the EEG signals of input
Number x [i] is input to feature calculation module, and EEG signals x [i] is as follows；
Wherein, EEGb[p] represents b of p-th of EEG EEG signals, and C [p] is filter parameter；
Feature calculation module includes variance counting circuit and mean value computation circuit, is respectively used to calculate filtered brain telecommunications
The mean value mean and variance yields variance of number x [i], obtains a multidimensional characteristic vectors, and the multidimensional characteristic vectors that will be obtained
Support vector machines is input to as sample；
The mean value of EEG signals x [i] is as follows；
Wherein, l indicates the length of filtered signal；
The variance yields of EEG signals x [i] is as follows；
Preferably, the characteristic extracting module includes 8 filter modules and 8 feature calculation modules；The brain telecommunications of input
Number it is divided into 8 frequency ranges, is separately input into 8 filter modules and is filtered, each filter module connects a feature meter
Module is calculated, 16 features are obtained in 8 feature calculation modules, and the feature vector as 16 dimensions is input to support vector machines.
Preferably, the filter is distributed lookup table filter.
Preferably, the sample selection module includes demultplexer DEMUX1, multiple selector MUX1, medium well in first
At circuit and register BL, register BU, register IL and register IU；First interruption generative circuit includes comparator
COM1 and comparator COM2；
The input terminal error originated from input F of demultplexer DEMUX1i2, the output of 0 end and the negative terminal of comparator COM1 input company
It connects, the anode of the output of 1 end and comparator COM2, which input, to be connected；
The 0 end input of multiple selector MUX1 is connect with register IL, and the input of 1 end is connect with register IU, multichannel choosing
Select the sample address i that the output of device MUX1 is chosen1；
The input of comparator COM1 anode is connect with register BL, and the input of comparator COM2 negative terminal is connect with register BU；Than
Interrupt signal INT1, which is exported, compared with device COM1 and comparator COM2 gives control scheduler module；
Register BL and register BU stores sample set boundary b respectivelylowAnd bup, register IL and register IU distinguish
Deposit blowAnd bupCorresponding indexed address ilowAnd iup。
Preferably, the Lagrange multiplier optimization module includes Lagrange multiplier memory, αi2Optimize circuit, αi1
Optimize circuit and second and interrupts generative circuit；
Wherein, αi1It is expressed as sample i1Lagrange multiplier, αi2It is expressed as sample i2Lagrange multiplier；
Lagrange multiplier memory stores the corresponding Lagrange multiplier α of samplei；αi2Optimize circuit input end respectively with
Kernel function computing module is connected with Lagrange multiplier memory, αi2α after optimizing circuit output optimizationi2 newIt is bright that glug is written
Day memory, and output αi2Knots modification Δ αi2To αi1Optimize circuit and second and interrupts generative circuit；
αi1Optimize circuit and receives αi2Optimize the knots modification Δ α of circuit outputi2, and read from Lagrange multiplier memory
αi1 old, to Lagrange multiplier αi1It optimizes, the α after being optimizedi1Lagrangian memory is written, finally exports αi1's
Knots modification Δ αi1；
Second, which interrupts generative circuit, generates INT2 signal input control scheduler module, controls scheduler module according to INT2 signal
The transfer of judgement state.
Preferably, the kernel function computing module includes multiplier MUL1—MULn, adder ADD2—ADDn, sample deposits
Reservoir XMem [1]-XMem [n], XiReg [1]-XiReg [n] and XjReg [1]-XjReg [n]；
When calculating kernel function for Lagrange multiplier optimization module, multiplier MULdm replaces input sample memory
XMem [dm] and sample register XiReg [dm], sample storage XMem [dm] and sample register XjReg [dm]；
When calculating kernel function for error update module, multiplier MULdm inputs XiReg [dm] and XjReg [dm]；
ADD2—ADDnIt is sequentially connected, ADDnExport kernel function Ki,j=XiXj；
Wherein, X is expressed as sample, and i and j are respectively the subscript of sample.
Preferably, the error update module includes multiplier MUL0, adder ADD1, register Temp, error storage
Device and third interrupt generative circuit；
Wherein, multiplier MUL0 successively receives the calculated kernel function K of kernel function computing modulei,i1And Ki,i2, kernel function
Ki,i1With the calculated y of Lagrange multiplier optimization modulei1Δαi1It is multiplied, kernel function Ki,i2With Lagrange multiplier optimization module
Calculated yi2Δαi2It is multiplied, output connection ADD1；Output intermediate result is stored in register Temp to ADD1 for the first time, for the second time
Export updated error Fi new, write error memory, and input third and interrupt generative circuit, judge whether to meet KKT item
Part exports interrupt signal INT3.
Preferably, the support vector machines was trained using the sequential minimum algorithm completion on piece based on modified version
Journey.
The epilepsy based on support vector machines that the present invention also provides a kind of detects the on piece training method of integrated circuit, including
Following steps；
EEG signals are divided into several frequency ranges by step 1, if being then input to the EEG signals correspondence of several frequency ranges
It is filtered in dry filter, obtains filtered EEG signals x [i]；
Step 2 will obtain that several filtered EEG signals are corresponding to be input to several feature calculation modules, calculate filter
The mean value mean and variance yields variance of EEG signals x [i] after wave, obtain a multidimensional characteristic vectors, and will obtain
Multidimensional characteristic vectors are input to support vector machines as sample；
Sample is divided into five subsets: I by step 30={ i:0 < αi<C},I1={ i:yi=+1, αi=0 }, I2={ i:yi
=-1, αi=C }, I3={ i:yi=+1, αi=C }, I4={ i:yi=-1, αi=0 }；
Wherein, C is the constant that can be set, upper set I0∪I1∪I2, label value is denoted as 0, and next part is combined into I0∪I3∪I4
Label value is denoted as 1, prediction error F corresponding to upper setiIn the smallest error be denoted as bup, prediction error corresponding to lower set
In maximum error be denoted as blow, bupAnd blowCorresponding address is denoted as iupAnd ilow；
Step 4. initializes Lagrange multiplier αiIt is 0, predicts error FiThe sample label (- y being negativei)；
Step 5. sample selection module selects the sample i for being unsatisfactory for formula KKT optimal conditions2, KKT optimal conditions is as follows:
i∈I0∪I1∪I2,and Fi≥blow-τ,i∈I0∪I3∪I4,and Fi≤bup+τ
Wherein, τ=2-10It is allowed error；Sample i2Corresponding sample i1It is as follows:
i1=iup,if i2∈I0∪I3∪I4
i1=ilow,if i2∈I0∪I1∪I2
Step 6. Lagrange multiplier optimization module updates sample i selected by step 52Corresponding Lagrange multiplier αi2,
It obtains updatedUpdate method is as follows；
Wherein η=2Ki1i2–Ki1i1–Ki2i2；L and H limits αi2Effective range；
To selected sample i2Corresponding sample i1Lagrange multiplier αi1It is updated, obtains updated
Step 7. update module updates all i ∈ I0Prediction error Fi, obtain updated
Updating error FiAfterwards, b is updatedup、blow、iupAnd ilow；If blow–bup>=τ, then enable αi1=iup、αi2=ilow,
Return step 6；Otherwise i ∈ I0Sample meet optimal conditions, return step 5, until entirely collecting the sample closed all meets KKT
Training terminates after optimal conditions.
Compared with prior art, the invention has the following beneficial technical effects:
A kind of epilepsy based on support vector machines provided by the invention detects integrated circuit, uses and divides in characteristic extraction part
Cloth look-up table filter, reduces circuit complexity；Increase frequency domain Variance feature, can preferably react EEG signals spy
Sign, improves detection accuracy；It is supported the design of vector machine drill circuit using the sequential minimum algorithm of modified version, keeps away
The sequential minimum algorithm for exempting from original version finds the erroneous judgement for being unsatisfactory for generating when the Lagrange multiplier of optimal conditions, can make
Reach similar performance with less the number of iterations, further improves efficiency.Simultaneously by flowing kernel function computing module
Waterline design, improves the training speed of on piece support vector machines.
Detailed description of the invention
Fig. 1 is circuit structure block diagram of the present invention；
Fig. 2 is the structural block diagram that feature of present invention extracts part；
Fig. 3 is filter module figure of the present invention；
Fig. 4 is feature of present invention computing module figure；
Fig. 5 is the structural block diagram of support vector machines part of the invention；
Fig. 6 is present invention control scheduler module state transition diagram；
Fig. 7 is sample of the present invention selecting module figure；
Fig. 8 is Lagrange multiplier optimization module figure of the present invention；
Fig. 9 is error update module map of the present invention；
Figure 10 is kernel function computing module figure of the present invention.
Specific embodiment
Present invention will be described in further detail below with reference to the accompanying drawings, described to be explanation of the invention rather than limit
It is fixed.
Referring to Fig. 1, a kind of epilepsy detection integrated circuit based on support vector machines, including feature extraction and support vector machines
Two large divisions.EEG signals are handled by characteristic extraction part, obtain feature vector；By support vector machines part to feature
Vector is trained and classifies, and obtains testing result.
Referring to Fig.2, characteristic extraction part of the invention include eight filter modules and with eight feature calculation modules, often
One filter module connects a feature calculation module.
Wherein, the structure of eight filter modules is identical, and the bandpass filter of respectively eight different passbands is used for brain
Electric signal is divided into 8 frequency ranges in frequency domain；Eight feature calculation modules are respectively used to calculate the mean value and side of 8 frequency range EEG signals
Difference obtains the feature vector of 16 dimensions.
Refering to Fig. 3, the filtering calculating process of filter module is specific as follows, since 8 filter module structures are identical, because
This is only illustrated by taking one of filter module as an example.
Distributed lookup table filter is completed filtering using following methods and is calculated, specific as follows:
Wherein, EEGb[p] represents b of p-th of EEG EEG signals, and C [p] is filter parameter.It is complete according to look-up table
At product C [p] × EEGb[p], then by each corresponding product addition of 16 EEG signals, obtain final filtered brain electricity
Signal x [i]=C × EEG.
With continued reference to Fig. 4, filtered EEG signals x [i]=C × EEG derived above is input to respective filter
The feature calculation module of module connection, obtains the mean value and variance yields of brain wave, since 8 feature calculation module structures are identical,
Therefore it is only illustrated by taking one of feature calculation module as an example, circular is as follows；
Feature calculation module includes mean value computation circuit and variance counting circuit；
Mean value computation circuit according toCompleting length is 2 seconds EEG signals by filtered equal
The calculating of value, wherein l indicates the length of filtered signal；
Variance counting circuit according toCalculate signal variance.
8 feature calculation modules generate 16 features in total, are input to supporting vector using 16 dimensional feature vectors as sample
Machine is learnt and is classified, to complete epilepsy detection.
Please continue to refer to Fig. 5, support vector machines of the invention is bright including control scheduler module, sample selection module, glug
Day multiplier optimization module, error update module and kernel function computing module.
The vector dimension of support vector machines is 16 dimensions, and data type is to have 16 fixed-point numbers of symbol, wherein sign bit 1,
Integer part 7, fractional part 8.
Control scheduler module control is for completing the sequential minimum algorithm based on modified version to the piece of support vector machines
Upper training process.
Kernel function computing module is for calculating 16 dimensional feature vectors；
Lagrange multiplier optimization module is for calculating the corresponding Lagrange multiplier data of sample；
Error update module is for calculating error；
It is the state transition diagram for controlling scheduler module with continued reference to Fig. 6, Fig. 6.Control scheduler module is finite state machine, should
There are five states altogether for module: original state, samples selection state, multiplier Optimal State, error update state terminate state.Respectively
State is switched over according to the feedback information of other modules.
After the completion of initialization, into samples selection state；Under samples selection state, sample address is obtained using counter,
To traverse entire sample set, the sample of optimal conditions is unsatisfactory for until finding, into multiplier Optimal State, if it can not find
Illustrate that sample set has optimized completion, training terminates；Multiplier optimization has the case where can not successfully optimizing, and (knots modification of multiplier is less than
Predetermined value), then it needs to return to samples selection state, if successfully optimizing, enters error update state；Error update goes out new sample
Behind subset boundary, judge whether subset meets optimal conditions, be unsatisfactory for, entering the optimization of multiplier Optimal State, boundary is corresponding multiplies
Son closes searching in entire collection and is unsatisfactory for optimal conditions until entering back into samples selection state after meeting local optimum condition
Sample；Training terminates after entirely collecting the sample closed and all meeting optimal conditions, into end state.
According to the label y of sampleiValue and the corresponding Lagrange multiplier α of sampleiSize, training sample is divided into five
A subset: I0={ i:0 < αi<C},I1={ i:yi=+1, αi=0 }, I2={ i:yi=-1, αi=C }, I3={ i:yi=+1, αi
=C }, I4={ i:yi=-1, αi=0 }.
Wherein C is the constant that can be set.Upper set is I0∪I1∪I2, label value is denoted as 0, and next part is combined into I0∪I3∪I4Mark
Label value is denoted as 1.Prediction error F corresponding to upper setiIn the smallest error be denoted as bup, in prediction error corresponding to lower set
Maximum error is denoted as blow, corresponding address is denoted as iupAnd ilow。
The sequential minimum algorithm steps of specific modified version are as follows:
Step 1. initializes Lagrange multiplier αiIt is 0, predicts error FiThe sample label (- y being negativei)。
Step 2. selects the sample i for being unsatisfactory for KKT (Karush-Kuhn-Tucker) optimal conditions shown in formula (1)2:
i∈I0∪I1∪I2,and Fi≥blow-τ,i∈I0∪I3∪I4,and Fi≤bup+τ(1)
Wherein, τ=2-10It is allowed error, corresponding sample i1It is determined according to formula (2):
If all samples meet KKT condition, algorithm is terminated.
Step 3. updates selected sample i according to formula (3) and (4)2Corresponding Lagrange multiplier αi2。
Wherein, η=2Ki1i2–Ki1i1–Ki2i2；L and H limits αi2Effective range, pass through formula (5) and (6) and calculate:
Lagrange multiplier α i1 is updated by formula (7):
Step 4. updates all i ∈ I according to formula (8)0Prediction error Fi。
Updating error FiAfterwards, b is updated according to definitionup、blow、iupAnd ilow.If blow–bup>=τ, then enable αi1=iup、
αi2=ilow, return step 3 continues to update；Otherwise i ∈ I0Sample meet optimal conditions, return step 2 find new sample into
Row updates, until entirely collecting training after the sample closed all meets optimal conditions terminates.
Fig. 7 is the sample selection module, refers to according to improved sequential minimum algorithm, utilizes the side of sample set
Boundary judges that the optimization characteristics of sample, selection is unsatisfactory for the sample of KKT condition, its corresponding Lagrange multiplier is sent
Enter Lagrange multiplier optimization module to optimize.
The module includes register BL, BU, IL, IU, demultplexer DEMUX1, multiple selector MUX1, comparator
COM1 and comparator COM2 composition first interrupts generative circuit.
Register BL, BU, IL and IU store sample set boundary b respectivelylow、bup、ilowAnd iup.The input terminal of DEMUX1
Meet error Fi2, 0 end output connect COM1 negative terminal input, 1 end output connect COM2 anode input.0 end of multiple selector MUX1
Input meets sample boundary address register IL, and the input of 1 end meets register IU, exports the sample address i chosen1.COM1 anode is defeated
Enter boundary register BL, COM2 negative terminal inputs boundary register BU；COM1 and COM2 exports interrupt signal INT1 and gives control scheduling
Module.
According to the value i of control scheduler module counter2, the reading error data F from error memoryi2And Fi2It is affiliated
The label of sample set (0 represents upper set, and 1 represents lower set)；Error information Fi2It inputs DEMUX1 (demultplexer), label
It controls DEMUX1 gating: if sample belongs to upper set, F being compared by COM1 (comparator)i2With the value size in register BL,
Conversely, if sample belongs to lower set, by COM2 compared with the value in register BU size, BL, BU store respectively lower set with
The value of upper set error boundary；
COM1 and COM2, which is constituted, interrupts generative circuit, exports and (represents i-th for interrupt signal INT1 for 02A sample meets most
Excellent condition is represented for 1 and is unsatisfactory for), control scheduler module selects the switching direction of state according to the value judgement sample of INT1.
Referring to Fig. 8, the Lagrange multiplier optimization module includes Lagrange multiplier memory, αi2Optimize circuit, αi1
Optimize circuit and second and interrupts generative circuit.
Lagrange multiplier memory stores the corresponding Lagrange multiplier of sample；αi2Optimization circuit input end connects kernel function
Computing module and α from Lagrange multiplier memory read data, after output optimizationi2 newLagrangian memory is written, with
And output Δ αi2To αi1Optimize circuit and second and interrupts generative circuit；αi1Optimize circuit and receives αi2Optimize the Δ of circuit output
αi2, α is read from Lagrange multiplier memoryi1 old, and by the α after optimizationi1Lagrangian memory is written, finally exports Δ
αi1；Second interruption generative circuit generates INT2 signal and judges that state transfer uses for control scheduler module.
αi2Optimize circuit and receives the calculated kernel function K of kernel function computing modulei1i2、Ki1i1、Ki2i2, and from Lagrange
Old α is read in multiplier memoryi2, carry out αi2Optimization, then by the α after optimizationi2Lagrange multiplier memory is written, together
When calculate αi2Knots modification Δ αi2, for αi1Optimize circuit, the second interruption generative circuit and error update module to use；αi1Optimization
Circuit receives Δ αi2, and old α is read from Lagrange multiplier memoryi1, complete αi1Optimization, then by the α after optimizationi1
Lagrange multiplier memory is written, while calculating αi1Knots modification Δ αi1, used for error update module；It interrupts and generates electricity
Road 2 is according to αi2Knots modification Δ αi2The size of absolute value, judges whether optimization succeeds, and exports interrupt signal INT2, represents for 0
Optimize successfully, 1 represents failure.
The αi2Optimize circuit, completes α according to formula (3)-(6)i2Optimization.
The αi1Optimize circuit, completes α according to formula (7)i1Optimization.
The second interruption generative circuit is by judging Δ αi2The size of absolute value determines the value of interrupt signal INT2.If
Δαi2Absolute value be less than register τ value, then interrupt signal INT2 be 1, indicate Lagrange multiplier optimization failure, by controlling
The transfer of scheduler module state of a control, continually looks for sample into samples selection state；If Δ αi2Absolute value greater than register τ
Value, then interrupt signal INT2 is 0, indicates that Lagrange multiplier optimizes successfully, is shifted, entered by control scheduler module state of a control
Error update state.
Referring to Fig. 9, the error update module includes multiplier MUL0, adder ADD1, register Temp, error storage
Device and third interrupt generative circuit.
Wherein, multiplier MUL0 is sequentially input by the calculated kernel function K of kernel function computing modulei,i1And Ki,i2, and by drawing
The calculated y of Ge Lang multiplier optimization modulei1Δαi1And yi2Δαi2Successively it is multiplied, output connection ADD1；ADD1 is exported for the first time
Intermediate result is stored in register Temp, exports updated error F for the second timei new, write error memory, and input in third
Disconnected generative circuit judges whether to meet KKT condition, exports interrupt signal INT3.
The error update module completes the update of error according to formula (8).The K read in by kernel function computing modulei,i1、
Ki,i2, i ∈ I0∪{i1,i2, multiplier MUL0 is sequentially input, with the y read in by Lagrange multiplier optimization modulei1Δαi1、
yi2Δαi2Successively it is multiplied；Obtained yi1Δαi1Ki,i1With Fi oldIt is added by ADD1, is as a result stored in register Temp；yi2Δαi2Ki,i2Next it is added with the value in Temp, updated error F is calculated in perfect (6)i new, write error deposits
Reservoir, and input third and interrupt generative circuit, complete the judgement of interrupt signal INT3 and the boundary b of sample up-down error setlow
And bupUpdate.If blow-bupThen INT3 is 1 to < τ, indicates i ∈ I0∪{i1,i2Sample meet optimal conditions, pass through control
Mode of operation is transferred to samples selection state by scheduler module；Otherwise INT3 is 0, indicates i ∈ I0∪{i1,i2Corresponding sample
Do not meet optimal conditions yet, state is transferred to multiplier Optimal State, continues to optimize blowAnd bupWith corresponding αilowAnd αiup。
Referring to Figure 10, the kernel function computing module includes multiplier MUL1—MUL16, adder ADD2—ADD16, sample
Memory XMem [1]-XMem [16], sample register XiReg [1]-XiReg [16] and XjReg [1]-XjReg [16].
Multiplier MULdm input XMem [dm] and XiReg [dm], XMem [dm] and XjReg [dm] or XiReg [dm] and
XjReg[dm]；MUL16 inputs XMem [16] and XiReg [16], XMem [16] and XjReg [16] or XiReg [16] and XjReg
[16] value, output connect ADD16；ADD2—16It is sequentially connected, ADD16Export kernel function Ki,j=XiXj。
Kernel function computing module completes kernel function Ki,jCalculating process.Used sample vector is tieed up for 16, therefore Ki,j
=Xi[1]Xj[1]+Xi[2]Xj[2]+…+Xi[d]Xj[d]+…+Xi[16]Xj[16], d ∈ Z+,1≤d≤16.In XMem [d]
Store Xi[d], i ∈ I0；X is stored in XiReg [d]i1[d]；X is stored in XjReg [d]i2[d].Kernel function computing module exists
Use is under error update state with accelerating circuit calculating formula (6).
Under error update state, need to calculate Ki,i1And Ki,i2With calculating formula (6), error F is updatedi,i∈I0∪{i1,
i2}.Due to there is multiple errors to need to update, calculation amount is larger, takes a long time, therefore kernel function computing module is designed as
ADD2—ADD16The assembly line of composition, to accelerate numerous FiRenewal process.Below with two-stage (MUL before assembly line1And MUL2)
First five clock cycle illustrates the operating process of assembly line:
First clock cycle: MUL1Export Xi[1]Xi1[1]；
Second clock cycle: MUL1Export Xi[1]Xi2[1]；MUL2Export Xi[2]Xi1[2], and pass through ADD2, with upper one
Period MUL1The X of outputi[1]Xi1[1] it is added, obtains Xi[1]Xi1[1]+Xi[2]Xi1[2]；
The third clock cycle: MUL1Export Xi+1[1]Xi1[1]；MUL2Export Xi[2]Xi2[2], and pass through ADD2, and it is upper
One period MUL1The X of outputi[1]Xi2[1] it is added, obtains Xi[1]Xi2[1]+Xi[2]Xi2[2]；
4th clock cycle: MUL1Export Xi+1[1]Xi2[1]；MUL2Export Xi+1[2]Xi1[2], and pass through ADD2, with
Upper period MUL1The X of outputi+1[1]Xi1[1] it is added, obtains Xi+1[1]Xi1[1]+Xi+1[2]Xi1[2]；
5th clock cycle: MUL1Export Xi+2[1]Xi2[1]；MUL2Export Xi+1[2]Xi2[2], and pass through ADD2, with
The X of upper period MUL1 outputi+1[1]Xi2[1] it is added, obtains Xi+1[1]Xi2[1]+Xi+1[2]Xi2[2]。
It can see by above five periods, ADD2Alternately output Xi, i ∈ I0∪{i1,i2Before bidimensional and Xi1、Xi2Preceding two
The dot product result of dimension；ADD3—ADD16Output similar to ADD2, but dimension is increased, ADD16Export the dot product knot of 16 dimensions in total
Fruit, alternating obtain Xi, i ∈ I0∪{i1,i2And Xi1、Xi2Complete dot product result.I.e. each clock cycle exports a kernel function
Value.
A kind of epilepsy based on support vector machines provided by the invention detects integrated circuit, including feature extraction and support to
Amount machine two large divisions.Wherein feature extraction includes filter module and feature calculation module.Filter module is by EEG signals etc.
Frequency interval filtering, feature calculation module calculate feature according to filtered signal, and obtain feature vector makes for support vector machines
With.Support vector machines includes controlling scheduler module, sample selection module, Lagrange multiplier optimization module, error update module,
Kernel function computing module.Control scheduler module is based on training algorithm and controls entire circuit according to the feedback information of remaining each module
Training process.Sample selection module finds the sample for being unsatisfactory for optimal conditions by the boundary of sample set, transfers to glug bright
The corresponding Lagrange multiplier of day multiplier optimization module more new samples, then Lagrange multiplier update is calculated with error update module
Error afterwards is prepared to continually look for being unsatisfactory for the sample of optimal conditions.Kernel function computing module is used to accelerate Lagrange
The calculating process of multiplier optimization module and error update module.Whole process iteration is multiple, meets optimal conditions in all samples
When stop.The portability of epilepsy detection system can be improved in the present invention, provides the on piece training function of more high energy efficiency.
The above content is merely illustrative of the invention's technical idea, and this does not limit the scope of protection of the present invention, all to press
According to technical idea proposed by the present invention, any changes made on the basis of the technical scheme each falls within claims of the present invention
Protection scope within.
Claims (10)
1. a kind of epilepsy based on support vector machines detects integrated circuit, which is characterized in that including characteristic extracting module and support
Vector machine；
Characteristic extracting module is for obtaining training sample, and the training sample that will acquire is input to support vector machines；
Support vector machines includes control scheduler module, error update module, sample selection module, kernel function computing module and glug
Bright day multiplier optimization module；
The sample selection module, the sample for selecting to be unsatisfactory for KKT condition convey the corresponding Lagrange multiplier of sample
To Lagrange multiplier optimization module；
The Lagrange multiplier optimization module, optimizes for the Lagrange multiplier to the sample for being unsatisfactory for KKT condition,
And by the sample error originated from input update module after optimization；
The error update module, for updating the prediction error F of sample after all optimizationsi, then to sample set side after optimization
Boundary is updated, until all samples terminate when meeting KKT condition；
Kernel function computing module, for accelerating Lagrange multiplier optimization module and the kernel function of error update module to calculate
Journey；
Scheduler module is controlled, for controlling the on piece training process of support vector machines.
2. the epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that the feature mentions
Modulus block includes filter module and feature calculation module；
Filter module, for being filtered calculating, and the filtered EEG signals x that will be obtained to the EEG signals of input
[i] is input to feature calculation module, and EEG signals x [i] is as follows；
Wherein, EEGb[p] represents b of p-th of EEG EEG signals, and C [p] is filter parameter；
Feature calculation module includes variance counting circuit and mean value computation circuit, is respectively used to calculate filtered EEG signals x
The mean value mean and variance yields variance of [i], obtain a multidimensional characteristic vectors, and using obtained multidimensional characteristic vectors as
Sample is input to support vector machines；
The mean value of EEG signals x [i] is as follows；
Wherein, l indicates the length of filtered signal；
The variance yields of EEG signals x [i] is as follows；
。
3. the epilepsy based on support vector machines detects integrated circuit according to claim 2, which is characterized in that the feature mentions
Modulus block includes 8 filter modules and 8 feature calculation modules；The EEG signals of input are divided into 8 frequency ranges, are separately input into 8
It is filtered in a filter module, each filter module connects a feature calculation module, and 8 feature calculation modules are obtained
16 features, the feature vector as 16 dimensions are input to support vector machines.
4. the epilepsy based on support vector machines detects integrated circuit according to claim 2, which is characterized in that the filter
For distributed lookup table filter.
5. the epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that the sample choosing
Selecting module includes demultplexer DEMUX1, multiple selector MUX1, the first interruption generative circuit and register BL, deposit
Device BU, register IL and register IU；First interruption generative circuit includes comparator COM1 and comparator COM2；
The input terminal error originated from input F of demultplexer DEMUX1i2, the negative terminal input connection of the output of 0 end and comparator COM1,1
The anode of end output and comparator COM2, which input, to be connected；
The end the O input of multiple selector MUX1 is connect with register IL, and the input of 1 end is connect with register IU, multiple selector
The sample address i that the output of MUX1 is chosen,；
The input of comparator COM1 anode is connect with register BL, and the input of comparator COM2 negative terminal is connect with register BU；Comparator
COM1 and comparator COM2 exports interrupt signal INT1 and gives control scheduler module；
Register BL and register BU stores sample set boundary b respectivelylowAnd bup, register IL and register IU deposit b respectivelylow
And bupCorresponding indexed address ilowAnd iup。
6. the epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that the glug is bright
Day multiplier optimization module includes Lagrange multiplier memory, αi2Optimize circuit, αi1Optimize circuit and second and interrupts generation electricity
Road；
Wherein, αi1It is expressed as sample i1Lagrange multiplier, αi2It is expressed as sample i2Lagrange multiplier；
Lagrange multiplier memory stores the corresponding Lagrange multiplier α of samplei；αi2Optimize circuit input end respectively with core letter
Number computing module is connected with Lagrange multiplier memory, αi2α after optimizing circuit output optimizationi2 newWrite-in Lagrange is deposited
Reservoir, and output αi2Knots modification Δ αi2To αi1Optimize circuit and second and interrupts generative circuit；
αi1Optimize circuit and receives αi2Optimize the knots modification Δ α of circuit outputi2, and α is read from Lagrange multiplier memoryi1 old,
To Lagrange multiplier αi1It optimizes, the α after being optimizedi1Lagrangian memory is written, finally exports αi1Knots modification
Δαi1；
Second, which interrupts generative circuit, generates INT2 signal input control scheduler module, and control scheduler module judges according to INT2 signal
State transfer.
7. the epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that the kernel function
Computing module includes multiplier MUL1-MULn, adder ADD2-ADDn, sample storage XMem [1]-XMem [n], XiReg
[1]-XiReg [n] and XjReg [1]-XjReg [n]；
When calculating kernel function for Lagrange multiplier optimization module, multiplier MULdm replaces input sample memory XMem
[dm] and sample register XiReg [dm], sample storage XMem [dm] and sample register XjReg [dm]；
When calculating kernel function for error update module, multiplier MULdm inputs XiReg [dm] and XjReg [dm]；
ADD2-ADDnIt is sequentially connected, ADDnExport kernel function KI, j=XiXj；
Wherein, X is expressed as sample, and i and j are respectively the subscript of sample.
8. the epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that the error is more
New module includes that multiplier MUL0, adder ADD1, register Temp, error memory and third interrupt generative circuit；
Wherein, multiplier MUL0 successively receives the calculated kernel function K of kernel function computing moduleI, i1And KI, i2, kernel function KI, ilWith
The calculated y of Lagrange multiplier optimization moduleilΔαilIt is multiplied, kernel function KI, i2It is calculated with Lagrange multiplier optimization module
Yi2Δαi2It is multiplied, output connection ADD1；Output intermediate result is stored in register Temp to ADD1 for the first time, and second of output is more
Error F after newi new, write error memory, and input third and interrupt generative circuit, judge whether to meet KKT condition, export
Interrupt signal INT3.
9. epilepsy based on support vector machines detects integrated circuit according to claim 1, which is characterized in that it is described support to
Amount machine completes on piece training process using the sequential minimum algorithm based on modified version.
10. a kind of on piece training method based on any epilepsy detection integrated circuit based on support vector machines of claim 1-9,
It is characterized by comprising the following steps；
EEG signals are divided into several frequency ranges by step 1, and the EEG signals correspondence of several frequency ranges is then input to several
It is filtered in filter, obtains filtered EEG signals x [i]；
Step 2 will obtain that several filtered EEG signals are corresponding to be input to several feature calculation modules, after calculating filtering
EEG signals x [i] mean value mean and variance yields variance, obtain a multidimensional characteristic vectors, and the multidimensional that will be obtained
Feature vector is input to support vector machines as sample；
Sample is divided into five subsets: I by step 30={ i:0 < αi< C }, I1={ i:yi=+1, αi=0 }, I2={ i:yi=-
1, αi=C }, I3={ i:yi=+1, αi=C }, I4={ i:yi=-1, αi=0 }；
Wherein, C is the constant that can be set, upper set I0UI1∪I2, label value is denoted as 0, and next part is combined into I0UI3UI4Label value note
It is 1, prediction error F corresponding to upper setiIn the smallest error be denoted as bup, maximum in prediction error corresponding to lower set
Error is denoted as blow, bupAnd blowCorresponding address is denoted as iupAnd ilow；
Step 4. initializes Lagrange multiplier αiIt is 0, predicts error FiThe sample label (- y being negativei)；
Step 5. sample selection module selects the sample i for being unsatisfactory for formula KKT optimal conditions2, KKT optimal conditions is as follows:
i∈I0∪I1∪I2, and Fi≥blow- τ, i ∈ I0∪I3∪I4, and Fi≤bup+ τ wherein, τ=2-10It is allowed mistake
Difference；Sample i2Corresponding sample i1It is as follows:
i1=iup, if i2∈I0∪I3∪I4
i1=ilow, if i2∈I0∪I1∪I2
Step 6. Lagrange multiplier optimization module updates sample i selected by step 52Corresponding Lagrange multiplier αi2, obtain
It is updatedUpdate method is as follows；
Wherein η=2Ki1i2-Ki1i1-Ki2i2；L and H limits αi2Effective range；
To selected sample i2Corresponding sample i1Lagrange multiplier αi1It is updated, obtains updated
Step 7. update module updates all i ∈ I0Prediction error Fi, obtain updated
Updating error FiAfterwards, b is updatedup、blow、iupAnd ilow；If blow-bup>=τ, then enable αil=iup、αi2=ilow, return
Step 6；Otherwise i ∈ I0Return step 5, until entirely collecting training after the sample closed all meets KKT optimal conditions terminates.
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