CN109979871A - Chip and the electronic device for using it - Google Patents
Chip and the electronic device for using it Download PDFInfo
- Publication number
- CN109979871A CN109979871A CN201711446365.7A CN201711446365A CN109979871A CN 109979871 A CN109979871 A CN 109979871A CN 201711446365 A CN201711446365 A CN 201711446365A CN 109979871 A CN109979871 A CN 109979871A
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- China
- Prior art keywords
- metal layer
- layer
- contraposition
- chip
- contraposition part
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
Abstract
The present invention discloses a kind of chip and the electronic device using it, which includes substrate, the first metal layer, the first separation layer and second metal layer.The first metal layer is set on substrate, and includes first line portion and the first contraposition part, and wherein first line portion and the first contraposition part are electrically isolated from one another.First separation layer covers the first metal layer.Second metal layer is set on the first separation layer, it and include the second line part and the second contraposition part, wherein the second line part and the second contraposition part are electrically isolated from one another, first contraposition part of the first metal layer is Chong Die in the perpendicular projection of substrate in the upright projection of substrate and the second contraposition part of second metal layer, and the first contraposition part of the first metal layer is greater than the second contraposition part of second metal layer in the planimetric area of substrate in the planimetric area of substrate.
Description
Technical field
The present invention relates to a kind of chip and use its electronic device.
Background technique
In development scientific and technological now, consumer electrical product has become mainstream, is such as household displays, portable
Electronic device or the electronic board for having interaction function.For these consumer electrical products, have mostly display with
And touch function, in this regard, mainstream electronic product is all with display panel or touch panel as main in order to reach these functions
Framework.Other than being provided with display panel or touch panel, to control or the chip of driving panel also can be by fitting
Mode is arranged on panel.If shifting during chip splice panel, it would be possible to can make electronic product can not be just
Often running simultaneously and then faces the problem of scrapping.
On the other hand, the detection mode whether deviated for detection chip is also classified into various ways, however, in chip
Contraposition mark design method it is different, chip may be only applicable to single kind of detection mode, this is but also when testing conditions become
To it is harsh when, chip has the problem of can not detecting its alignment.Therefore, how effectively to solve the above problems, it is real to belong to
One of current important research and development project also becomes currently associated field and needs improved target.
Summary of the invention
One embodiment of the content of present invention provides a kind of electronic device, includes panel and the core being fitted on panel
Piece.Chip includes the first metal layer and second metal layer, and wherein the first metal layer and second metal layer, which separately include, is located at
The first contraposition part and the second contraposition part in the contraposition area of chip.Second contraposition part is as made of similar dot pattern arrangement
Array pattern, and the second contraposition part is located at the surface of the first contraposition part and falls in the profile of the first contraposition part.First contraposition
Portion and the second contraposition part can align the Main Factors of detection and reflective contraposition detection as penetration respectively, to make chip
It is applicable to penetration contraposition detection and reflective contraposition detection.
One embodiment of the content of present invention provides a kind of chip, comprising substrate, the first metal layer, the first separation layer and
Second metal layer.The first metal layer is set on substrate, and includes first line portion and the first contraposition part, wherein first line
Portion and the first contraposition part are electrically isolated from one another.First separation layer covers the first metal layer.Second metal layer is set to the first isolation
It on layer, and include the second line part and the second contraposition part, wherein the second line part and the second contraposition part are electrically isolated from one another, the
First contraposition part of one metal layer is in the upright projection of substrate and the second contraposition part of second metal layer in the upright projection of substrate
It partly overlaps, and the first contraposition part of the first metal layer is greater than the second contraposition of second metal layer in the planimetric area of substrate
Portion is in the planimetric area of substrate.
In some embodiments, the second contraposition part of second metal layer falls within the first gold medal in the upright projection of substrate completely
Belong to the first contraposition part of layer in the upright projection of substrate.
In some embodiments, the second contraposition part of second metal layer is arranged by multiple metal patterns.
In some embodiments, the second contraposition part is in the partial contour of the upright projection of substrate and the first contraposition part in base
The partial contour of the upright projection of plate trims.
In some embodiments, the first separation layer has an at least through-hole in wherein, and the second line of second metal layer
Road portion is connected to the first line portion of the first metal layer by the through-hole of the first separation layer.
In some embodiments, chip also includes third metal layer, and third metal layer is set on the first separation layer simultaneously
Between the first line portion of the first metal layer and the second line part of second metal layer, wherein the first separation layer has at least
One through-hole is in wherein, and third metal layer is connected to the first line of the first metal layer by the through-hole of first separation layer
Portion.
In some embodiments, between the first contraposition part of the first metal layer and the second contraposition part of second metal layer
Layer body all has translucency.
In some embodiments, the first line portion of the first metal layer and the first contraposition part are by the one of the first separation layer
Spaced-apart.
In some embodiments, the first contraposition part of the first metal layer is at least one first metal pattern layer, the second gold medal
The second contraposition part for belonging to layer is to be arranged by multiple second metal pattern layers, and at least two second metal pattern layers are in substrate
Upright projection fall within single first metal pattern layer in the upright projection of substrate.
One embodiment of the content of present invention provides a kind of electronic device, includes panel and chip, wherein chip is arranged
In on panel, and the first line portion of the first metal layer of chip is electrically connected with panel.
Detailed description of the invention
Figure 1A is that the first embodiment of the content of present invention is painted the schematic elevation view of electronic device；
Figure 1B is the schematic elevation view of the chip of the electronic device of Figure 1A；
Fig. 1 C is the diagrammatic cross-section of the line segment 1C-1C along Figure 1B；
Fig. 2 is that the second embodiment of the content of present invention is painted the diagrammatic cross-section of chip, and profile position is with Fig. 1 C's
Profile position is identical.
Symbol description
100 electronic devices
102 panels
110A, 110B chip
112 substrates
114 line areas
116,118 contraposition area
120 the first metal layers
122 first line portions
124 first contraposition parts
130 second metal layers
132 second line parts
134 second contraposition parts
140 first separation layers
142,154 through-hole
150 third metal layers
152 second separation layers
1C-1C line segment
Specific embodiment
Multiple embodiments that the content of present invention will be disclosed with attached drawing below, as clearly stated, in many practices
Details will be explained in the following description.It should be appreciated, however, that the details in these practices is not applied to limit in the present invention
Hold.That is, the details in these practices is non-essential in this part of the disclosure embodiment.In addition, to simplify
For the sake of attached drawing, some existing usual structures and element will be painted it in a manner of simply illustrating in the accompanying drawings.
Herein, using the vocabulary of first, second and third etc., be used to describe various elements, component, region,
Layer be it is understood that.But these elements, component, region, layer should not be limited by these terms.These vocabulary only limit
In be used to distinguish single element, component, region, layer.Therefore, a first element hereinafter, component, region, layer can also quilts
Referred to as second element, component, region, layer, without departing from the original idea of the content of present invention.
Please first see that Figure 1A, Figure 1A are that the first embodiment of content according to the present invention is painted facing for electronic device 100
Schematic diagram.Electronic device 100 includes panel 102 and chip 110A, and wherein chip 110A can be electrically connected with panel 102, and be done
For the driving chip of panel 102.Chip 110A can be set on panel 102 by way of fitting, and wherein chip 110A can lead to
It crosses its contraposition mark and carries out coordinate pair position after fitting, to detect whether its position of fitting on face 102 has
It shifts.In this regard, the coordinate contraposition carried out can be penetration contraposition detection or reflective contraposition detection.In the present invention
Rong Zhong is either detected using penetration contraposition detection or reflective contraposition by aligning mark possessed by chip 110A,
It all can detect that whether the chip 110A of fitting on face 102 shifts, look at following explanation.
Please see that Figure 1B and Fig. 1 C, Figure 1B be painted the chip 110A of the electronic device 100 of Figure 1A faces signal simultaneously
Figure.Fig. 1 C is painted the diagrammatic cross-section of the line segment 1C-1C along Figure 1B.Chip 110A may be logically divided into line areas 114 and a pair is right
Position area 116 and 118, wherein contraposition area 116 and 118 can be located separately the edge of the two sides chip 110A.In addition, chip 110A packet
Containing substrate 112, the first metal layer 120, second metal layer 130 and the first separation layer 140, in order not to keep attached drawing excessively complicated,
The line pattern drawn in the line areas 114 of the chip 110A of Figure 1B is only to illustrate, and conjunction is first chatted bright.
The first metal layer 120 is set on substrate 112, and includes first line portion 122 and electrically isolated from one another
One contraposition part 124, wherein first line portion 122 and the first contraposition part 124 can be by the way that same metal membrane material is patterned
After formed.First line portion 122 is located in line areas 114, and the first line portion 122 of the first metal layer 120 can be with panel 102
(see Figure 1A) electrical connection.
First contraposition part 124 is located in contraposition area 116 and 118.Align 124 institute of the first contraposition part in area 116 and 118
The pattern of presentation can be the pattern that profile is closed boundary.That is, in single contraposition area 116 or 118, the first contraposition part
124 patterns that are presented are the pattern that single a profile is closed boundary.For example, being aligned in area 116 and 118 for Figure 1B
The first contraposition part 124 cruciform pattern that profile is closed boundary is presented respectively, that is, the first contraposition part 124 may include at least
One the first metal pattern layer, and the quantity in the corresponding contraposition area 116 and 118 of quantity of the first metal pattern layer.
In present embodiment, since the quantity in contraposition area 116 and 118 is two, therefore the first metal of the first contraposition part 124
Pattern layer number also corresponds to two, and the profile of these the first metal pattern layers is the cruciform pattern of closed boundary, however,
In other embodiments, the first metal pattern layer number that the first contraposition part 124 is included can also be done with the quantity in contraposition area
Adjustment, or, the first metal pattern layer that the first contraposition part 124 is included is also possible to other figures that profile is closed boundary
Case seems polygon, circle or ellipse.
First separation layer 140 is set on substrate 112, and covers the first metal layer 120.First separation layer 140 can be used as
Isolation characteristic between first line portion 122 and the first contraposition part 124, for example, first line portion 122 and the first contraposition part
Can have gap between 124, and this gap can be inserted by a part of the first separation layer 140 and separate first line portion 122 with
First contraposition part 124.
Second metal layer 130 is set on the first separation layer 140, and includes the second line part 132 electrically isolated from one another
And second contraposition part 134, wherein the second line part 132 and the second contraposition part 134 can be by by same metal membrane material
It is formed after patterned.Second line part 132 is located in line areas 114, and the first line portion 122 of the first metal layer 120 in
The upright projection of substrate 112 can be Chong Die in the perpendicular projection of substrate 112 with the second line part 132 of second metal layer 130.
Second line part 132 of second metal layer 130 can be electrically connected with the first line portion 122 of the first metal layer 120, for example,
First separation layer 140 has an at least through-hole 142 in wherein, and the second line part 132 can pass through the through-hole of the first separation layer 140
142 are connected to the first line portion 122 of the first metal layer 120.
Second contraposition part 134 be located at contraposition area 116 and 118 in, and the first contraposition part 124 of the first metal layer 120 in
The upright projection of substrate 112 can also be with the second contraposition part 134 of second metal layer 130 in the perpendicular projection weight of substrate 112
It is folded, wherein the first contraposition part 124 can be greater than the second contraposition part 134 in the vertical throwing of substrate in the planimetric area of substrate 112
Shadow area.The pattern that the second contraposition part 134 in contraposition area 116 and 118 is presented can be the pattern of similar spotted array.Example
Such as, for Figure 1B, the second contraposition part 134 in contraposition area 116 and 118 is presented respectively is arranged as criss-cross spotted array figure
Case, that is, the second contraposition part 134 may include multiple second metal pattern layers, wherein these second metal pattern layers can be arranged in battle array
Column, and the quantity in the corresponding contraposition area 116 and 118 of formed array quantity.In addition, each first gold medal of the first contraposition part 124
The size of metal patterns layer can be greater than the size of each the second metal pattern layer of the second contraposition part 134.
In addition to this, the second metal pattern layer of the second contraposition part 134 can fall in the upright projection of substrate 112 completely
First metal pattern layer of one contraposition part 124 is in the upright projection of substrate 112, and the second metal figure of the second contraposition part 134
Pattern layer is that the top of the first metal pattern layer of the first contraposition part 124 is set in a manner of many-to-one.On the other hand, second pair
Second metal pattern layer in position portion 134 also can be with the first of the first contraposition part 124 in the partial contour of the upright projection of substrate 112
Metal pattern layer is trimmed in the partial contour of the upright projection of substrate 112.For example, in the contraposition area 116 of Figure 1B, to hang down
It is seen in the visual angle of straight chip 110A, cross array pattern made of the second metal pattern layer of the second contraposition part 134 arranges
It can fall in the first metal pattern layer of the first contraposition part 124, and the partial contour of cross array pattern also can be with the first gold medal
The partial contour of metal patterns layer trims.
In present embodiment, due to second pair of the first contraposition part 124 and the second metal layer 130 of the first metal layer 120
Layer body between position portion 134 only has the first separation layer 140, therefore the layer body between it has translucency, by such configuration mode,
When chip 110A is fitted on panel 102 (see Figure 1A) and carries out coordinate pair position, the coordinate no matter carried out is aligned
It is penetration contraposition detection or reflective contraposition detection, chip 110A can align the metal figure in area 116 and 118 by it
Whether pattern layer shifts to detect it in the position on panel 102 (see Figure 1A).
For penetration contraposition detection, light source and photosensitive coupling element (charge-coupled device；CCD)
It may be provided at the opposite sides (such as upside and downside that chip 110A is set) of chip 110A.Pass through source emissioning light beam
To chip 110A, and the metal pattern layer in the contraposition area 116 and 118 for passing through chip 110A covers light beam, can make not hidden
The light beam covered marches to photosensitive coupling element, to form image.
By the first contraposition part 124 in the contraposition area 116 and 118 of chip 110A, it is formed by by photosensitive coupling element
Image will appear similar criss-cross pattern, and specifically, this criss-cross pattern is formed by covering light beam, so cross
Contrast of the pattern and context of shape in image can not be identical, for example, criss-cross pattern be present black and arround ring
Border is that white is presented, to whether generate the judgment basis of offset as chip.Due to the in each contraposition area 116 or 118
One contraposition part 124 is to be formed by the criss-cross pattern that single a profile is closed boundary, therefore can promote criss-cross pattern and exist
Contrast in image.Further, since the second contraposition part 134 in each contraposition area 116 or 118 is located at the first contraposition part 124
Surface and fall in the profile of the first contraposition part 124, therefore the second contraposition part 134 will not to penetration align detection result
It has an impact.
For reflective contraposition detection, light source and photosensitive coupling element may be provided at the same side of chip 110A.It is logical
Source emissioning light beam is crossed to chip 110A, the metal pattern layer in the contraposition area 116 and 118 of chip 110A can be made to reflex to light beam
Photosensitive coupling element, to form image.
By the second contraposition part 134 in the contraposition area 116 and 118 of chip 110A, it is formed by by photosensitive coupling element
Image will appear similar criss-cross pattern, and wherein this criss-cross pattern is reflected to form by light beam, so criss-cross
The contrast of pattern and context in image can not be identical, for example, criss-cross pattern be present white and context is
Black is presented, to whether generate the judgment basis of offset as chip.It is designed as in the second contraposition part 134 by similar scattergram
Under pattern made of case arrangement, photosensitive coupling element, which is formed by image, can be presented preferable contrast.Though in addition, every a pair
The first contraposition part 124 in the area 116 or 118 of position is single a pattern to be presented rather than spotted array, however, due to the first contraposition part
124 and second at least have the first separation layer 140 and at a distance between contraposition part 134, therefore can reduce the first contraposition part
The result of 124 pairs of reflective contraposition detections impacts.
That is, the first contraposition part 124 and second metal layer of the first metal layer 120 in contraposition area 116 and 118
130 the second contraposition part 134 can align the Main Factors of detection and reflective contraposition detection as penetration respectively, to make core
Piece 110A is applicable to penetration contraposition detection and reflective contraposition detection, and in penetration contraposition detection, can pass through arrangement
The precision of testing result is promoted at the second contraposition part of spotted array.
Please see that Fig. 2, Fig. 2 are the section signal that the second embodiment of content according to the present invention is painted chip 110B again
Figure, profile position are identical as the profile position of Fig. 1 C.At least one of present embodiment and first embodiment discrepancy exist
In, the chip 110B of present embodiment also include third metal layer 150 and the second separation layer 152, wherein third metal layer 150
And second separation layer 152 be set between the first separation layer 140 and second metal layer 130.
Third metal layer 150 is set on the first separation layer 140 and is located in line areas 114, that is to say, that third metal
Layer 150 is located between the first line portion 122 of the first metal layer 120 and the second line part 132 of second metal layer 130, and not
It extends between the first contraposition part 124 of the first metal layer 120 and the second contraposition part 134 of second metal layer 130.Third metal
Layer 150 can by by metal membrane material it is patterned after formed, and used as route, such as the third metal that route uses
Layer 150 can be connected to the first line portion 122 of the first metal layer 120 by the through-hole 142 of the first separation layer 140.Second isolation
Layer 152 covers third metal layer 150, and has an at least through-hole 154, so that the second line part 132 of second metal layer 130 can
Third metal layer 150 is connected to by the through-hole 154 of the second separation layer 152.
In present embodiment, due to second pair of the first contraposition part 124 and the second metal layer 130 of the first metal layer 120
Layer body between position portion 134 only has the first separation layer 140 and the second separation layer 152, therefore the layer body between it is all with light transmission
Property, under this configuration, when carrying out penetration contraposition detection or reflective contraposition detection to chip 110B, it can still pass through contraposition
Metal pattern layer in area 116 and 118 detects whether it shifts in the position on panel 102 (see Figure 1A).
In addition, although the metal layer quantity between the first metal layer 120 in present embodiment and second metal layer 130 is only
There is one layer, however, the content of present invention those of ordinary skill in the art, can adjust the first metal layer according to actual demand
Metal layer quantity between 120 and second metal layer 130.
In conclusion the electronic device of the content of present invention includes panel and the chip that is fitted on panel, wherein chip
Include the first metal layer and second metal layer.The first metal layer and second metal layer are separately included positioned at the contraposition area of chip
Interior the first contraposition part and the second contraposition part, wherein the second contraposition part is the array of figure as made of similar dot pattern arrangement
Case, and the second contraposition part is located at the surface of the first contraposition part and falls in the profile of the first contraposition part.First contraposition part and
Second contraposition part can align the Main Factors of detection and reflective contraposition detection as penetration respectively, to keep chip applicable
Detection and reflective contraposition detection are aligned in penetration, and in penetration contraposition detection, it can be by being arranged in spotted array
The precision of second contraposition part promotion testing result.
Although the content of present invention is disclosed as above with numerous embodiments, it is not intended to limit the invention content,
Any skilled person can be used for a variety of modifications and variations in the spirit and scope for not departing from the content of present invention, therefore this
The protection scope of summary of the invention should be subject to what the appended claims were defined.
Claims (10)
1. a kind of chip, characterized by comprising:
Substrate；
The first metal layer is set on the substrate, and includes first line portion and at least one first contraposition part, wherein this first
Line part and first contraposition part are electrically isolated from one another；
First separation layer covers the first metal layer；And
Second metal layer is set on first separation layer, and includes the second line part and at least one second contraposition part, wherein
Second line part and second contraposition part are electrically isolated from one another, first contraposition part the hanging down in the substrate of the first metal layer
It delivers directly shadow and second contraposition part of the second metal layer is Chong Die in the perpendicular projection of the substrate, and the first metal layer
First contraposition part is greater than second contraposition part the hanging down in the substrate of the second metal layer in the planimetric area of the substrate
Straight projected area.
2. chip as described in claim 1, wherein second contraposition part of the second metal layer is in the upright projection of the substrate
First contraposition part of the first metal layer is fallen within completely in the upright projection of the substrate.
3. chip as claimed in claim 2, wherein second contraposition part of the second metal layer is arranged by multiple metal patterns
It arranges.
4. chip as claimed in claim 3, wherein second contraposition part is in the partial contour of the upright projection of the substrate and this
First contraposition part is trimmed in the partial contour of the upright projection of the substrate.
5. chip as described in claim 1, wherein first separation layer has an at least through-hole in wherein, and second metal
Second line part of layer is connected to the first line portion of the first metal layer by the through-hole of first separation layer.
6. chip as described in claim 1, also includes:
Third metal layer is set on first separation layer and is located at the first line portion and second gold medal of the first metal layer
Between second line part for belonging to layer, wherein first separation layer has an at least through-hole in wherein, and the third metal layer is logical
The through-hole for crossing first separation layer is connected to the first line portion of the first metal layer.
7. chip as claimed in claim 6, wherein first contraposition part of the first metal layer and the second metal layer should
Layer body between second contraposition part all has translucency.
8. chip as described in claim 1, wherein the first line portion of the first metal layer and first contraposition part be by
A part of first separation layer separates.
9. chip as described in claim 1, wherein first contraposition part of the first metal layer is at least one first metal figure
Pattern layer, second contraposition part of the second metal layer be arranged by multiple second metal pattern layers, and at least two those
Second metal pattern layer falls within single first metal pattern layer in the upright projection of the substrate in the upright projection of the substrate.
10. a kind of electronic device, characterized by comprising:
Panel；And
Any chip such as claim 1 to 9, is set on the panel, wherein the first metal layer of the chip this first
Line part is electrically connected with the panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711446365.7A CN109979871B (en) | 2017-12-27 | 2017-12-27 | Chip and electronic device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711446365.7A CN109979871B (en) | 2017-12-27 | 2017-12-27 | Chip and electronic device using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109979871A true CN109979871A (en) | 2019-07-05 |
| CN109979871B CN109979871B (en) | 2021-08-24 |
Family
ID=67071639
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711446365.7A Active CN109979871B (en) | 2017-12-27 | 2017-12-27 | Chip and electronic device using the same |
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| Country | Link |
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| CN (1) | CN109979871B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101510548A (en) * | 2008-02-14 | 2009-08-19 | 株式会社瑞萨科技 | Semiconductor device and a method of manufacturing the same |
| US20130009328A1 (en) * | 2011-07-08 | 2013-01-10 | Orise Technology Co., Ltd. | Alignment mark, semiconductor having the alignment mark, and fabricating method of the alignment mark |
| CN104282658A (en) * | 2013-07-01 | 2015-01-14 | 奇景光电股份有限公司 | Semiconductor element |
-
2017
- 2017-12-27 CN CN201711446365.7A patent/CN109979871B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101510548A (en) * | 2008-02-14 | 2009-08-19 | 株式会社瑞萨科技 | Semiconductor device and a method of manufacturing the same |
| US20130009328A1 (en) * | 2011-07-08 | 2013-01-10 | Orise Technology Co., Ltd. | Alignment mark, semiconductor having the alignment mark, and fabricating method of the alignment mark |
| CN104282658A (en) * | 2013-07-01 | 2015-01-14 | 奇景光电股份有限公司 | Semiconductor element |
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| Publication number | Publication date |
|---|---|
| CN109979871B (en) | 2021-08-24 |
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