CN109977516B - Automatic modeling logic node processing method - Google Patents

Automatic modeling logic node processing method Download PDF

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CN109977516B
CN109977516B CN201910208856.0A CN201910208856A CN109977516B CN 109977516 B CN109977516 B CN 109977516B CN 201910208856 A CN201910208856 A CN 201910208856A CN 109977516 B CN109977516 B CN 109977516B
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modeling
symbol
group
description file
processed
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CN109977516A (en
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刘坤
陈宏君
文继锋
曾凯
徐睿
谭林丰
谭良良
顾熹
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NR Electric Co Ltd
NR Engineering Co Ltd
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NR Engineering Co Ltd
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Abstract

The application provides an automatic modeling logic node processing method. The method comprises the following steps: defining a group title of a modeling symbol and a mapping relation between the group title and a logical node class name; defining an automatic modeling rule; creating the modeling symbol, and storing a time stamp of the modeling symbol; summarizing the modeling symbols based on the automatic modeling rules to form each group to be processed; and creating a logic node instance based on each group to be processed, and forming a device capability description file and a modeling symbol description file. According to the technical scheme provided by the embodiment of the application, the allocation of the logical node instance numbers and the naming mechanism of the data objects are optimized and improved, the maintenance workload is greatly reduced, and the engineering implementation efficiency is improved.

Description

Automatic modeling logic node processing method
Technical Field
The application relates to the field of modeling, in particular to an automatic modeling logic node processing method.
Background
The IEC61850 standard is the only global universal standard in the field of power system automation. The standardization of engineering operation of the intelligent substation is realized through standard realization. The engineering implementation of the intelligent substation becomes standard, uniform and transparent.
In current dc control systems, communication has started to be performed using the IEC61850 protocol. No matter which system integrator establishes the intelligent substation project, the structure and layout of the whole substation can be known through the SCD (substation configuration file) file, and the method has irreplaceable effect on the development of the intelligent substation. IEC61850 requires a capability description file for each device, and defines the contents of the logic devices, logic nodes, data sets, report control blocks, data models, etc. of the intelligent devices in the model file.
The inventor finds that in the modeling process, in the conventional automatic modeling scheme, format errors often occur in manual writing, and great time and energy are consumed. In addition, in the engineering maintenance stage, when a symbol is newly added or deleted, the sequential scanning of the grouped instance numbers is adopted, so that the instance numbers of the existing symbols are influenced, the measurement points need to be correlated at the background again, and a large maintenance work is brought.
Disclosure of Invention
The embodiment of the application provides a method for processing an automatic modeling logic node, which is characterized by comprising the following steps: defining a group title of a modeling symbol and a mapping relation between the group title and a logical node class name in a visualization device project; defining an automatic modeling rule; creating the modeling symbol, and storing a time stamp of the modeling symbol; summarizing the modeling symbols based on the automatic modeling rules to form each group to be processed; and creating logic node instances based on the groups to be processed, and forming a device capability description file and a modeling symbol description file.
Further, if the device capability description file is not formed for the first time, before creating a logical node instance based on the respective pending groups and forming a device capability description file and a modeling symbol description file, the method further includes: and repairing each group to be processed based on the last modeling symbol description file.
Further, the repairing each group to be processed based on the last modeling notation description file includes: aiming at the modeling symbol which is the same as that in the last modeling symbol description file, acquiring an instance number corresponding to the same modeling symbol through the last modeling symbol description file; and aiming at the modeling symbol newly added compared with the last modeling symbol description file, forming a logic node by the modeling symbol with the same class name as the logic node, sequencing according to the timestamp, and adding the sequencing in an additional mode behind the logic node to update the group to be processed.
Further, the modeling notation includes event, remote control, remote signaling, remote regulation, remote measurement, and fixed value.
Further, the automatic modeling rules include: the visualization device engineering comprises at least one element; each of said elements comprising at least one page; one modeling symbol in the page corresponds to one data object; at least one modeling symbol with the same group header corresponds to one logical node.
Further, the summarizing the modeling notation based on the automatic modeling rule to form each group to be processed includes: reading pages of each element in sequence based on the automatic modeling rules; and classifying and summarizing the modeling symbols with the same logical node class name of the element based on the mapping relation to form each group to be processed.
Further, the classifying and summarizing the modeling signs of the elements with the same logical node class name based on the mapping relationship to form each group to be processed includes: classifying and summarizing the modeling symbols with the same logical node class name of the element according to the ascending order of the time stamps on the basis of the mapping relation to form each group to be processed; and the data object name of the modeling symbol is subjected to uniqueness processing by adopting the name of the page where the modeling symbol is located and a checking and splicing rule of related attributes.
Further, the data object name of the modeling symbol is subjected to uniqueness processing by adopting the checking and splicing rule of the page name where the modeling symbol is located and the related attribute, and the uniqueness processing comprises the following steps: the name of a data object of the modeling symbol is a page name splicing checksum of the modeling symbol, and the checksum is a globally unique data object splicing number; and if the data object name is repeated, adding a repeated number value as a suffix at the tail of the data object name.
Further, the checksum uses a 32-bit CRC check code.
Further, the creating a logical node instance based on each to-be-processed group, and forming a device capability description file and a modeling notation description file include: each group to be processed in the element is divided by managing at least one modeling symbol according to one logic node; creating at least one logical node instance; each logic node instance is allocated with an instance number; forming the device capability description file and a modeler description file storing a globally unique number and a corresponding instance number for each of the modelers.
According to the technical scheme provided by the embodiment of the application, the allocation of the logical node instance numbers and the naming mechanism of the data objects are optimized and improved, the maintenance workload is greatly reduced, and the engineering implementation efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic flow chart diagram illustrating a method for processing an automatic modeling logical node according to an embodiment of the present application;
FIG. 2 is a schematic flow chart diagram illustrating a method for automatically modeling logical node processing according to another embodiment of the present application;
FIG. 3 is a flow chart of a method for processing an automated modeling logical node according to an embodiment of the present application;
fig. 4 is a schematic diagram of a corresponding relationship in a modeling symbol hierarchy according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, specific embodiments of the technical solutions of the present application will be described in more detail and clearly in the following with reference to the accompanying drawings and the embodiments. However, the specific embodiments and examples described below are for illustrative purposes only and are not limiting of the present application. It is intended that the present disclosure includes only some embodiments and not all embodiments, and that other embodiments may be devised by those skilled in the art with various modifications as fall within the scope of the appended claims.
Fig. 1 is a schematic flow chart of a processing method for an automatic modeling logic node according to an embodiment of the present application, and fig. 3 is a flow chart of a processing method for an automatic modeling logic node according to an embodiment of the present application, which is described with reference to fig. 1 and fig. 3.
In step S110, as shown in fig. 1, a group title of a modeling symbol and a mapping relationship between the group title and a logical node class name are defined in the visualization device project.
As shown in FIG. 3, the modeling notation includes, but is not limited to, event, remote signaling, remote tuning, telemetry, fixed value, and the like. The modeling notation includes, but is not limited to, attributes such as group title, DO (Data object class or instance) description, and the like. One group header corresponds to one incoclass (logical node class name). The mapping relation between the group header and the InClass can be recorded in an XML (Extensible Markup Language) File, an INI (Initialization File) text File and a database mode, and the candidate DO description can be recorded.
Specifically, an example of defining the group header and the logical node mapping in a textual manner is as follows.
lnClass ═ IBFT; title ═ BFT measurement and control cabinet;
lnClass ═ ACFS; title ═ latch order;
lnClass ═ ACSW; title is "converter transformer switching" ….
In a visual programming environment, a visual page double-click on an editing interface with a modeler popped up well can display and select a group title and modify and edit DO description.
In step S120, an automatic modeling rule is defined.
The automatic modeling rules include: the visualization device project comprises at least one element, each element comprises at least one page, one modeling symbol in each page corresponds to one data object, and at least one modeling symbol with the same group title corresponds to one logic node.
Fig. 4 is a schematic diagram of a corresponding relationship in a modeling symbol hierarchical structure provided by an embodiment of the present application, and the corresponding relationship in the hierarchical structure of the IEC61850 modeling symbol is as shown in fig. 4. In particular, the visualization device project consists of several elements, which consist of several pages. One visualization Device project corresponds to one IED (Intelligent Electronic Device) and one element corresponds to one LDevice (Logical Device). One modeling symbol in the visualization page corresponds to one DO. The modeling notation of the same title for N groups corresponds to one LN (Logical Node). And automatically creating an Access Point (connection access point) management LDevice under the IED.
In step S130, a modeling symbol is created, and a time stamp of the modeling symbol is stored.
The time stamp records the newly-built time of each symbol, and the symbols to be modeled can be sorted according to the time stamp when the program configuration is modified, so that the newly-added symbol modeling data is added behind the corresponding LN in an adding mode, and the LN instance number of the existing data object in the model can not be changed when the modeling symbol is added.
As shown in fig. 3, based on visual programming software, events, remotes, signals, remotes, telemetry, fixed values, etc. are created, and time stamps are stored for such modeling symbols, which are assigned a UUID (Universally Unique Identifier) at the time of creation.
In step S140, the modeling notation is summarized based on the automatic modeling rule to form each group to be processed.
The automatic modeling rules include: the visualization device project comprises at least one element, each element comprises at least one page, one modeling symbol in each page corresponds to one data object, and at least one modeling symbol with the same group title corresponds to one logic node.
As shown in fig. 3, a visualization device project is created by using element names as instance names of logic devices, pages of each element are sequentially read, modeling symbols of the pages in the elements are summarized based on automatic modeling rules, and classification and summarization are performed based on mapping relationships, that is, classification and summarization are performed according to mapping relationships between group titles of the modeling symbols and lnclasses (logical node class names) corresponding to the group titles. And the lnClass are same and are arranged according to the ascending order of the time stamps to form each group to be processed.
And the data object name of the modeling symbol is subjected to uniqueness processing by adopting the page name of the modeling symbol and a checking and splicing rule of related attributes.
Further, the DO name of the modeling symbol is the page name + CheckSum (DO description and modeling symbol UUID) where the modeling symbol is located. Wherein CheckSum is a CheckSum, preferably but not limited to using a 32-bit CRC check code. If the DO name repeats within a single LN, a number of repetitions is suffixed to the end of the name. The DO within the same page describes the same modeling notation and no duplicate names are formed because the UUIDs created are different. For example, a title is a modeling symbol of "BFT measurement and control cabinet", and corresponding to lnClass is IBFT, such symbols form a group within one element.
In step S150, a logical node instance is created based on each group to be processed, and a device capability description file and a modeling symbol description file are formed.
If the device capability description file device.icd is formed for the first time, each to-be-processed group in an element is divided by managing N modeling symbols according to one LN (logical node), where 1 ═ N ═ 50, and preferably N ═ 35, as shown in fig. 3. Several LN instances are created. Each logical node instance is assigned an instance number, starting with 1. Map, a modeling symbol description file UUID is created in the memory, and the UUID (globally unique number) and the corresponding instance number of each modeling symbol are stored.
And finally, outputting a device capability description file device.icd and a modeling symbol description file UUID.map, wherein the modeling symbol description file stores the globally unique number and the corresponding instance number of each modeling symbol.
And storing the memory UUID.map file into the engineering directory. The method comprises the steps of forming a hierarchy of a default Header, an Intelligent Electronic Device (IED), an access point (access point), a Server (Server), a logical Device (logical Device) and the like, forming a necessary logical node of LLN0 (zero node) and LPHD (logical Device node) under each LDevice, creating a data set and a report block under LLN0, dividing an event state quantity data set, a telemetering quantity data set and a constant value data set into corresponding report blocks, and obtaining most attribute setting values by reading an INI file. And forming a corresponding LNodeType (logical node class) according to the formed LN instance. 1 LNodeType corresponds to 1 LN. Each type of symbol pre-defines an associated DOType model, which may form a DataTypetemplates data template.
According to the technical scheme provided by the embodiment of the application, the allocation of the logical node instance numbers and the naming mechanism of the data objects are optimized and improved, the maintenance workload is greatly reduced, and the engineering implementation efficiency is improved.
Fig. 2 is a schematic flowchart of a processing method for automatically modeling a logical node according to another embodiment of the present application, including the following steps.
In step S110, a group header of the modeling notation and a mapping relationship between the group header and the logical node class name are defined.
In step S120, an automatic modeling rule is defined.
In step S130, a modeling symbol is created, and a time stamp of the modeling symbol is stored.
In step S140, modeling symbols are collected based on the automatic modeling rules to form each group to be processed.
In step S141, if the device capability description file is not formed for the first time, each pending group is trimmed based on the last modeling notation description file.
And aiming at the modeling symbols which are the same as those in the last modeling symbol description file, acquiring instance numbers corresponding to the same modeling symbols through the last modeling symbol description file.
And aiming at the newly added modeling symbol compared with the last modeling symbol description file, the modeling symbol with the same class name as the logical node forms a logical node, and the modeling symbol is added behind the logical node in an additional mode after being sorted according to the timestamp so as to update the group to be processed.
As shown in fig. 3, if device.icd is not formed for the first time, the last uuid.map file is read, and for the undeleted modeling symbol, the corresponding lnnst (instance number) is obtained through the last uuid.map file. And aiming at the newly added modeling symbols, the newly added modeling symbols are sequentially distributed at the tail part after being sorted according to the time stamps, the newly added symbols form an LN according to N modeling symbols which are the same as the lnClass, and lnInst values are sequentially increased.
Map can be cleared of already existing uuid by forcing a setting to the first generation mode through a visualization symbol.
In step S150, a logical node instance is created based on each group to be processed, and a device capability description file and a modeling symbol description file are formed.
In this embodiment, S110, S120, S130, S140, and S150 are the same as those in the above embodiment, and are not described again.
According to the technical scheme provided by the embodiment of the application, the allocation of the logic node instance numbers and the naming mechanism of the data objects are optimized and improved, the consistency is kept to the maximum extent, the background only needs to perform correlation processing on newly added/deleted modeling symbols, the maintenance workload is greatly reduced, and the engineering implementation efficiency is improved.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present application and not to limit the scope of the present application, and those skilled in the art should understand that modifications or equivalent substitutions made on the present application without departing from the spirit and scope of the present application should be included in the scope of the present application. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.

Claims (8)

1. A method for automatically modeling logical node processing, the method comprising:
defining a group title of a modeling symbol and a mapping relation between the group title and a logical node class name in a visualization device project;
defining an automatic modeling rule;
creating the modeling symbol, and storing a time stamp of the modeling symbol;
summarizing the modeling symbols based on the automatic modeling rules to form each group to be processed;
repairing each group to be processed based on the last modeling symbol description file;
creating a logic node instance based on each group to be processed, and forming a device capability description file and a modeling symbol description file; wherein
The repairing each group to be processed based on the last modeling symbol description file comprises the following steps:
aiming at the same modeling symbol in the last modeling symbol description file, obtaining an instance number corresponding to the same modeling symbol through the last modeling symbol description file;
and aiming at the modeling symbol newly added compared with the last modeling symbol description file, forming a logic node by the modeling symbol with the same class name as the logic node, sequencing according to the timestamp, and adding the sequencing to the back of the logic node in an additional mode to update the group to be processed.
2. The method of claim 1, wherein the modeling notation includes event, remote signaling, remote tuning, telemetry, fixed value.
3. The method of claim 1, wherein the automatic modeling rules comprise:
the visualization device engineering comprises at least one element;
each of said elements comprising at least one page;
one modeling symbol in the page corresponds to one data object;
at least one modeling symbol having the same group title corresponds to one logical node.
4. The method according to claim 3, wherein the aggregating the modeling notation based on the automatic modeling rule to form each pending group comprises:
sequentially reading pages of each element based on the automatic modeling rule;
and classifying and summarizing the modeling symbols with the same logical node class name of the element based on the mapping relation to form each group to be processed.
5. The method according to claim 4, wherein the classifying and summarizing the modeling symbols of the elements with the same logical node class name based on the mapping relationship to form each to-be-processed group comprises:
classifying and summarizing the modeling symbols with the same logical node class name of the element according to the ascending order of the time stamps on the basis of the mapping relation to form each group to be processed;
and the data object name of the modeling symbol is subjected to uniqueness processing by adopting the page name of the modeling symbol and the checking and splicing rule of the related attribute.
6. The method of claim 5, wherein the data object name of the modeling symbol is treated uniquely by a check-and-splice rule of the page name and the related attribute where the modeling symbol is located, and the method comprises the following steps:
the data object name of the modeling symbol is a page name splicing checksum of the modeling symbol, and the checksum is a globally unique data object splicing number;
and if the data object name is repeated, adding a repeated number value as a suffix at the tail of the data object name.
7. The method of claim 6, wherein the checksum uses a 32-bit CRC check code.
8. The method of claim 1, wherein creating logical node instances based on the respective pending groups, forming a device capability description file and a modeler descriptor description file comprises:
each group to be processed in the element is divided by managing at least one modeling symbol according to one logic node;
creating at least one logical node instance;
each logic node instance is allocated with an instance number;
forming the device capability description file and a modeler description file storing a globally unique number and a corresponding instance number for each of the modelers.
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CN102646112A (en) * 2012-02-17 2012-08-22 南京南瑞继保电气有限公司 Visual modeling method for capability description file of direct-current protection control device
CN106202149A (en) * 2016-06-22 2016-12-07 南京南瑞继保电气有限公司 A kind of IEC61850 model file conversion method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102646112A (en) * 2012-02-17 2012-08-22 南京南瑞继保电气有限公司 Visual modeling method for capability description file of direct-current protection control device
CN106202149A (en) * 2016-06-22 2016-12-07 南京南瑞继保电气有限公司 A kind of IEC61850 model file conversion method

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