CN109972204A - Ultra-thin super optical flat and the method for preparing the ultra-thin super optical flat - Google Patents
Ultra-thin super optical flat and the method for preparing the ultra-thin super optical flat Download PDFInfo
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- CN109972204A CN109972204A CN201711458484.4A CN201711458484A CN109972204A CN 109972204 A CN109972204 A CN 109972204A CN 201711458484 A CN201711458484 A CN 201711458484A CN 109972204 A CN109972204 A CN 109972204A
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/16—Oxides
- C30B29/18—Quartz
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/16—Oxides
- C30B29/22—Complex oxides
- C30B29/30—Niobates; Vanadates; Tantalates
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- C—CHEMISTRY; METALLURGY
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- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
- C30B29/64—Flat crystals, e.g. plates, strips or discs
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/08—Etching
- C30B33/10—Etching in solutions or melts
Abstract
A kind of ultra-thin super optical flat and a kind of method for preparing ultra-thin super optical flat are provided, the method may include following steps: the underlay substrate and aimed wafer substrate for all having burnishing surface are provided；Glue-line is protected in spin coating on the burnishing surface of underlay substrate, is then carried out grinding to the back side opposite with the burnishing surface of underlay substrate and is thinned；Underlay substrate after aimed wafer substrate and grinding are thinned cleans；The burnishing surface of aimed wafer substrate is directly contacted with the burnishing surface of underlay substrate, to form bonding body；Aimed wafer substrate in para-linkage body carries out grinding and is thinned, and is processed by shot blasting, so that aimed wafer substrate reaches target thickness；And the bonding body after polishing is immersed into selective corrosion solvent soln, to remove underlay substrate, to obtain ultra-thin super optical flat.
Description
Technical field
The present invention relates to a kind of ultra-thin super optical flats and preparation method thereof, in particular, be related to it is a kind of with a thickness of 1 μm~
100 μm, two-sided mirror finish, 0.005~1 μm of general thickness deviation, the self-supporting quartz having a size of 2~12 inches, lithium tantalate,
The ultra-thin super optical flat of lithium niobate and a kind of method for preparing ultra-thin super optical flat using abrasive polishing process.
Background technique
In order to adapt to electronic component micromation, intelligent, integrated, energy-saving demand, focus is placed on by packaging industry
On three-dimensional encapsulation, encapsulation volume is not only reduced in this way, and also improve device performance.In the trend that encapsulated space reduces
Under, ultrathin direction is also had increasingly been towards to the thickness requirement of chip and is developed.Under normal circumstances, relatively advanced stacked package institute
The chip thickness used is all at 100 μm or less.With the development of encapsulation technology and the increase in demand of electronic device, the number of plies of stacking
It is more and more, it is desirable that the thickness of chip will be more and more thinner.Therefore ultra-thin super optical flat will play the part of more in following encapsulation industry
Important role, application prospect are boundless.In pyroelectricity sensory field, since the sensitivity of device is inversely proportional to the thickness, institute
To need ultra-thin lithium tantalate.In crystal oscillator field, since frequency is related with thickness, so needing down to 10 μm or even quartz below
Chip is just able to achieve the application of 100MHz or more.In true zero-th order waveplates field, phase delay is directly related with thickness, according to making
With the difference of wavelength, it is also desirable to the ultra-thin quartz wafer of 10~60 μ m thicks.
It wafer spin is all based on to the prevailing technology of chip thinning at present goes round and round a millstone and cut, i.e., using vacuum chuck being added
The chip of work is fixed on the porous ceramics sucker of rotation, and high-speed rotating emery wheel is downwards ground chip since surface layer
Processing is thinned.Then, the thinned surface that is ground of chip is processed by shot blasting, surface damage caused by removal grinding,
Obtain the surface of mirror effect.When under normal circumstances, common wafer thinning techniques only need to complete the process chip from chip
Thickness is thinned to 200 μm~400 μm.In the range of the thickness, since chip has sufficiently large thickness, have enough
Intensity come tolerate be thinned and polishing process in damage to chip and stress, meanwhile, rigidity is also enough that chip is made to keep original
Formation state.
However, ultra-thin wafer thinning techniques need for wafer thickness to be thinned to 100 μm hereinafter, even up to several microns.
With the reduction of wafer thickness, intensity is decreased, and influence of the micro-crack formed in thinning process to chip also becomes
It is increasing, and very big deformation, curling will occur under its own gravity, any stiffened edge contact is likely to
Fatefulue damage is caused to it.The preparation and industrialization processing of ultra-thin super optical flat plate base are currently the difficult point in industry,
The processing method of current ultra-thin super optical flat is mainly: chip to be ground wax or other binders first being fitted to a substrate
On chip, then top wafer is thinned and is polished, the modes such as heating or chemical solution dissolution is recycled to remove binder,
Then ultra-thin super optical flat is taken off, and cleans up.The greatest difficulty that the technique is faced, mainly arrives wafer grinding
Several microns to after tens micron thickness, the mechanical strength of chip substantially reduces, and grinds, polishes, takes piece clear subsequent
Wash etc. in technical process and require to apply wafer surface mechanicals efforts, chip be very easy to it is chipping, so as to cause at
Product rate is low.Need some expensive equipment that can just solve these problems thus, a variety of factors cause ultra-thin super optical flat
Price is very expensive.Moreover, because wax or other binders during patch, so the thickness uniformity of chip is by viscous
The influence for tying agent uniformity, is difficult to accomplish the general thickness deviation less than 3 μm.First with thickness test equipment testing film thickness
Distribution, then the method being thinned with ion beam, can obtain the thickness uniformity down to several microns or tens nanometers of zero point of super optical flat
Piece, but processing cost is very high, low efficiency.
In addition, the method that lithium niobate and lithium tantalate wafer is thinned using corrosion, since the chemistry of lithium niobate, lithium tantalate is living
Property low and extremely difficult corrosion, therefore processing efficiency is low, and the wafer surface roughness of etching process preparation is high, will cause light and dissipates
Projection rings the strong noise in optical property and electricity use, therefore is unsuitable for preparing ultra-thin super optical flat.
Summary of the invention
In order to solve above-mentioned problem existing in the prior art, the purpose of the present invention is to provide a kind of ultra-thin super optical flats
With the method for preparing the ultra-thin super optical flat.
According to the present invention, provide a kind of ultra-thin super optical flat, the thickness range of the ultra-thin super optical flat can for 1~
100 μm, general thickness deviation can be 0.005~1 μm, and two-sided is all mirror finish, and surface roughness can be lower than 1nm, ruler
Very little can be 2~12 inches.
According to the present invention, a kind of method for preparing ultra-thin super optical flat is provided, the method may include following steps:
The underlay substrate and aimed wafer substrate for all having burnishing surface are provided；Glue-line is protected in spin coating on the burnishing surface of underlay substrate, so
Grinding is carried out to the back side opposite with the burnishing surface of underlay substrate afterwards to be thinned；After aimed wafer substrate and grinding are thinned
Underlay substrate is cleaned；The burnishing surface of aimed wafer substrate is directly contacted with the burnishing surface of underlay substrate, to form bonding
Body；Aimed wafer substrate in para-linkage body carries out grinding and is thinned, and is processed by shot blasting, so that aimed wafer substrate reaches mesh
Mark thickness；And the bonding body after polishing is immersed into selective corrosion solvent soln, to remove underlay substrate, to obtain ultra-thin
Super optical flat.
In the exemplary embodiment, the diameter of ultra-thin super optical flat can be 2 inches~12 inches, thickness can for 1 μm~
100 μm, and general thickness deviation can be 0.005~1 μm.
In the exemplary embodiment, aimed wafer substrate can be monocrystalline lithium tantalate substrate, mono-crystalline lithium niobate substrate, quartzy base
Plate, silicon carbide substrate or GaAs substrate etc., the underlay substrate can be silicon substrate, quartz base plate or glass substrate etc., institute
The material for stating aimed wafer substrate and the underlay substrate is different, and glue-line may include hardening agent, photoresist and liquid wax
At least one of.
In the exemplary embodiment, the step of underlay substrate after aimed wafer substrate and grinding are thinned cleans
In, the cleaning is that semiconductor grade cleaning is cleaned.
In the exemplary embodiment, the thinned step of grinding is carried out at the back side opposite with the burnishing surface to underlay substrate
In, the thickness of the thinned removal at the back side opposite with the burnishing surface of underlay substrate can be greater than 2 μm.
In the exemplary embodiment, the method can also be included in form bonding body after annealing process is executed to it, anneal
Temperature can be 100 DEG C~300 DEG C, and annealing time can be 0.5h~4h.
In the exemplary embodiment, it carries out in the thinned step of grinding, can incite somebody to action in the aimed wafer substrate in para-linkage body
The thickness of the aimed wafer substrate of bonding body is thinned to 0.3 μm~10 μm bigger than target thickness.
In the exemplary embodiment, grinding is carried out at the back side opposite with the burnishing surface to underlay substrate to be thinned and to key
Aimed wafer substrate in zoarium carries out in the thinned step of grinding, can be using same grinder main shaft angle and same cone
The vacuum chuck of degree is ground, to obtain self-consistent face type.
In the exemplary embodiment, the method can also include: that the target base plate after grinding is thinned carries out polishing it
Before, can carry out trimming processing to the one of the edge of aimed wafer substrate circle, the width of trimming processing excision can for 0.3mm~
3mm。
It in the exemplary embodiment, can be by substrate base before the bonding body after polishing immerses selective corrosion solution
Plate is thinned to 50~200 μm, the time needed for removing underlay substrate with reduction.
The advantageous effect of the invention is: the method according to the present invention for preparing ultra-thin super optical flat can prepare 2 inches
~12 inches of large scale diameter, 1 μm~100 μm of micron order thickness, TTV are less than 1 μm, low residual stress and low-defect-density
The two-sided mirror finish of self-supporting ultra-thin super optical flat.
Detailed description of the invention
By the description below in conjunction with attached drawing to embodiment, these and/or other aspects will be apparent and be easier to manage
Solution, in the accompanying drawings:
Fig. 1 is to show the flow chart of the method according to an exemplary embodiment of the present invention for preparing ultra-thin super optical flat.
Fig. 2 is to show the structure of the spin coating glue-line according to an exemplary embodiment of the present invention on the burnishing surface of underlay substrate
Schematic diagram.
Fig. 3 is to show the structural schematic diagram according to an exemplary embodiment of the present invention for forming bonding body.
Fig. 4 is that the aimed wafer substrate for showing in para-linkage body according to an exemplary embodiment of the present invention carries out grinding and subtracts
Thin structural schematic diagram.
Fig. 5 is that the aimed wafer substrate shown in para-linkage body according to an exemplary embodiment of the present invention carries out at trimming
The structural schematic diagram of reason.
Fig. 6 is that the aimed wafer substrate shown in para-linkage body according to an exemplary embodiment of the present invention carries out at polishing
The structural schematic diagram of reason.
Fig. 7 is to show the structural schematic diagram of ultra-thin super optical flat according to an exemplary embodiment of the present invention.
Specific embodiment
Now with reference to the attached drawing embodiment that the present invention is more fully described, the invention is shown in the accompanying drawings exemplary
Embodiment.However, the present invention can be embodied in many different forms, and it should not be construed as being limited to implementation set forth herein
Example；On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and these embodiments will be to this field
Those of ordinary skill fully communicates the design of the embodiment of the present invention.In detailed description below, by way of example
It elaborates many places concrete details, relevant teachings is fully understood with providing.However, it should be clear to a person skilled in the art that
It is that can practice this introduction without such details.In other cases, it without details is described with relatively high level
Well known method, step and component, to avoid making many aspects of this introduction unnecessarily thicken.It is same in attached drawing
Label indicate same element, therefore description of them will not be repeated.In the accompanying drawings, for clarity, it may overstate
The size and relative size of big layer and region.
Ultra-thin super optical flat is prepared to according to an exemplary embodiment of the present invention hereinafter with reference to Fig. 1 to Fig. 7 now
Method be described in detail.
Fig. 1 is to show the flow chart of the method according to an exemplary embodiment of the present invention for preparing ultra-thin super optical flat.
Referring to Fig.1, an exemplary embodiment of the present invention the method for preparing ultra-thin super optical flat the following steps are included:
The underlay substrate and aimed wafer substrate for all having burnishing surface are provided；Glue-line is protected in spin coating on the burnishing surface of underlay substrate, so
Grinding is carried out to the back side opposite with the burnishing surface of underlay substrate afterwards to be thinned；After aimed wafer substrate and grinding are thinned
Underlay substrate is cleaned；The burnishing surface of aimed wafer substrate is directly contacted with the burnishing surface of underlay substrate, to form bonding
Body；Aimed wafer substrate in para-linkage body carries out grinding and is thinned, and is processed by shot blasting, so that aimed wafer substrate reaches mesh
Mark thickness；And the bonding body after polishing is immersed into selective corrosion solvent soln, to remove underlay substrate, to obtain ultra-thin
Super optical flat.
Method shown in Fig. 1 is described in detail below with reference to Fig. 2 to Fig. 7.Fig. 2 is to show root to Fig. 7
According to the cross-sectional view of the method for preparing ultra-thin super optical flat of exemplary embodiment of the present.Specifically, Fig. 2 is shown according to this
The structural schematic diagram of spin coating glue-line on the burnishing surface of underlay substrate of invention exemplary embodiment, Fig. 3 are shown according to this
Invention exemplary embodiment formation bonding body structural schematic diagram, Fig. 4 be show it is according to an exemplary embodiment of the present invention
Aimed wafer substrate in para-linkage body carries out the thinned structural schematic diagram of grinding, Fig. 5 be show it is exemplary according to the present invention
Aimed wafer substrate in the para-linkage body of embodiment carries out the structural schematic diagram of trimming processing, and Fig. 6 is shown according to this hair
The structural schematic diagram that aimed wafer substrate in the para-linkage body of bright exemplary embodiment is processed by shot blasting, Fig. 7 are to show
The structural schematic diagram of ultra-thin super optical flat according to an exemplary embodiment of the present invention.
Firstly, providing the underlay substrate and aimed wafer substrate for all having burnishing surface.
An exemplary embodiment of the present invention, underlay substrate can be the silicon substrate mirror-finished with single or double
Plate, quartz base plate or glass substrate etc., but the invention is not restricted to this.An exemplary embodiment of the present invention, aimed wafer
Substrate can be monocrystalline lithium tantalate substrate, mono-crystalline lithium niobate substrate, the quartz base plate, carbonization mirror-finished with single or double
Silicon substrate or GaAs substrate etc., but the invention is not restricted to this.An exemplary embodiment of the present invention, aimed wafer substrate
It is different with material selected by the underlay substrate, as long as the combination of target base plate, underlay substrate and corrosion dissolution solution
Meet and only removes underlay substrate without corroding the principle with solubilized target substrate.An exemplary embodiment of the present invention,
Surface polishing treatment can be carried out to underlay substrate and aimed wafer substrate for example, by the mode of chemically mechanical polishing, so that lining
The surface roughness of substrate and aimed wafer substrate is lower than 1nm, so as to meet the requirement of Direct Bonding.
Then, the spin coating glue-line on the burnishing surface of underlay substrate, then to the opposite with the burnishing surface of underlay substrate
The back side carries out grinding and is thinned；Underlay substrate after aimed wafer substrate and grinding are thinned cleans.
Referring to Fig. 2, in an exemplary embodiment of the present invention, spin coating glue-line 1, optional on the burnishing surface of underlay substrate 2
Ground is selected, glue-line 1 is heated, glue-line and underlay substrate 2 heat simultaneously to obtain the protective layer with some strength.Glue-line 1
Including at least one of hardening agent, photoresist and atoleine, it is preferable that it may include hardening agent and photoresist, but this
It invents without being limited thereto.Protective layer can prevent the burnishing surface of underlay substrate 2 to be scratched or damage, to avoid to subsequent bonding work
Skill adversely affects.Then, the surface of matcoveredn is fixed on downward on the porous ceramics sucker of grinder, to substrate base
The back side opposite with the burnishing surface of plate 2 carries out grinding and is thinned, and removal is greater than the thickness of 2 μm (for example, 10 μm or so), passes through
The inclination angle of grinder main shaft is adjusted, the thickness uniformity of underlay substrate 2 is adjusted, to obtain the lining with specific thicknesses distribution face type
Substrate.
Then, the underlay substrate after aimed wafer substrate and grinding being thinned cleans.
In an exemplary embodiment of the present invention, in order to obtain the clean surface for being conducive to subsequent bonding technology, to lining
Substrate and aimed wafer substrate are cleaned.It is, for example, possible to use semiconductor grade cleaning cleaning processes to underlay substrate and mesh
Mark wafer substrate is cleaned, and but the invention is not restricted to this.
Selectively, underlay substrate and aimed wafer substrate are being carried out cleaning it using semiconductor grade cleaning cleaning process
Before, first the substrate after grinding can be impregnated with ethanol solution again with acetone, to remove organic matter protective layer, still
The invention is not limited thereto.
Then, the burnishing surface of aimed wafer substrate 3 is directly contacted with the burnishing surface of underlay substrate 2, to form bonding body.
In an exemplary embodiment of the present invention, pass through the legal target that will all have clean surface at room temperature of direct key
The burnishing surface of wafer substrate 3 is directly contacted with the burnishing surface of underlay substrate 2, passes through the throwing of aimed wafer substrate 3 and underlay substrate 2
The intermolecular active force (for example, Van der Waals force) on the surface of smooth surface, being formed includes aimed wafer substrate 3 and underlay substrate 2
The bonding body of double-layer structure, as shown in Figure 3.
In an exemplary embodiment of the present invention, selectively, annealing process is executed to the bonding body of formation.For example, can
Annealing process 0.5h~4h (preferably, 3h~4h) is executed with the at a temperature of para-linkage body at 100 DEG C~300 DEG C, by target crystalline substance
Intermolecular active force between plate base 3 and underlay substrate 2 is converted into the stronger oxygen key of bond energy, this will greatly increase target
Bonding force between wafer substrate 3 and underlay substrate 2, even if if so that being in the next steps thinned to aimed wafer substrate 3
The thickness of dry micron can also guarantee the integrality of bonding body well.However, exemplary embodiment of the present invention is without being limited thereto.Example
Such as, in the stronger situation of bonding force between aimed wafer substrate 3 and underlay substrate 2, it is convenient to omit the execution of para-linkage body is moved back
The step of fire process.
Then, it is thinned to carry out grinding for the aimed wafer substrate in para-linkage body, and is processed by shot blasting, so that aimed wafer
Substrate reaches target thickness.
In an exemplary embodiment of the present invention, as shown in Figure 4, in order to which aimed wafer substrate 3' is thinned as much as possible,
Can be ground be thinned to it is 0.3 μm~10 μm bigger than target thickness, for example, aimed wafer substrate 3' is thinned to 2 μm~101
μm.While grinding is thinned, using identical when being ground with the back side opposite with the burnishing surface to underlay substrate 2
The vacuum chuck of grinder main shaft angle and same taper is ground, to guarantee that the face type ground twice is consistent.
In an exemplary embodiment of the present invention, selectively, as shown in Figure 5, after grinding being thinned as needed
Aimed wafer substrate 3' carries out trimming processing.Since aimed wafer substrate 3' is thinned to thickness from a thickness of 250 μm~1000 μm
After 5 μm~100 μm, edge corner may become sharp keen, this, which will will lead to, sliver occurs in subsequent polishing process and ask
Topic, the circle that therefore, it is necessary to be 0.3mm~3mm by the size of the edge of aimed wafer substrate 3' with scribing machine or beveler
Excision, to improve yield rate.
In an exemplary embodiment of the present invention, as shown in Figure 6, the aimed wafer substrate 3 " after grinding being thinned carries out
Surface polishing treatment, the thickness of 0.5 μm~2 μm of removal, to reach target thickness, while obtaining the surface of mirror finish.When right
When aimed wafer substrate 3 " carries out surface polishing treatment, it should be ensured that enough polishing removal amounts, to completely remove grinding for abradant surface
Line is ground, relatively good ultra-thin super optical flat surface quality is obtained.An exemplary embodiment of the present invention, surface polishing treatment can
In a manner of using chemically mechanical polishing, but the invention is not restricted to this.
Finally, the bonding body after polishing is immersed selective corrosion solvent soln, to remove underlay substrate, to be surpassed
Thin super optical flat 3 ".
In an exemplary embodiment of the present invention, as shown in Figure 7, the bonding body immersion selective corrosion after polishing is molten
Solution is solved, which, which can be, has apparent selectivity to underlay substrate 2 and aimed wafer substrate 3 "
The chemical solution of corrosion dissolution, that is, can soon corrosion dissolution underlay substrate 2, and do not corrode or very slight corrode
Aimed wafer substrate 3 ".Selective corrosion solvent soln thoroughly dissolves underlay substrate 2, super with the double throwings for obtaining ultra-thin self-supporting
Thin super optical flat.An exemplary embodiment of the present invention, selective corrosion solvent soln can be tetramethylammonium hydroxide
(TMAH) solution, HF:HNO3: CHECOOH solution, ethanedioic acid catechol solution, sodium hydroxide (NaOH) solution and hydroxide
Potassium (KOH) strong base solution etc., but exemplary embodiment of the present invention is without being limited thereto.
The ultra-thin super optical flat of the method preparation for preparing ultra-thin super optical flat of an exemplary embodiment of the present invention
Diameter can be 2 inches~12 inches, and thickness can be 1 μm~100 μm, and general thickness deviation can be 0.005~1 μm.
In addition, underlay substrate can be thinned before the bonding body after polishing immerses selective corrosion solvent soln
To 50~200 μm, then corrosion dissolution removes underlay substrate 2.So, it is possible to reduce removal required for corrosion dissolution underlay substrate 2
Amount improved efficiency to reduce the corrosion dissolution time.
The specific embodiment according to the present invention for preparing ultra-thin super optical flat is detailed below.
Embodiment 1
A piece of 3 inches of Z are provided and cut the lithium tantalate wafer with a thickness of 0.2mm~1mm as aimed wafer substrate, are provided a piece of
Photoresist is heated silicon single crystal wafer surface spin coating hardening agent and photoresist solid as underlay substrate by 3 inches of silicon single crystal wafers
Change, downward by protective layer is placed on the porous ceramics sucker of grinder, adjusting is ground with forming a protective layer in burnishing surface
The main shaft angle of grinding machine, grinding remove 10 μm of thickness, the TTV of substrate are adjusted less than 1 μm, to obtain the slightly higher edge in center slightly
The silicon single crystal wafer of low face type.First the silicon single crystal wafer after grinding is impregnated with ethanol solution again with acetone, with
Remove organic matter protective layer；Grade cleaning cleaning is carried out to silicon single crystal wafer and lithium tantalate wafer, acquisition can be with the clean of Direct Bonding
Net surface.
It is at room temperature that the burnishing surface of the burnishing surface of lithium tantalate wafer and silicon single crystal wafer is direct using Direct Bonding technique
Contact, obtaining the silicon single crystal wafer, top layer that a piece of bottom is 3 inches is the composite substrate bonding body that Z cuts lithium tantalate wafer.
This composite substrate bonding body is made annealing treatment, annealing temperature is 220 DEG C, and annealing time 4h, environment is big
Gas atmosphere, to enhance the bonding force of bonding body.
Grinder main shaft angle is adjusted to main shaft angle value identical with main shaft angle when grinding silicon single crystal wafer, is used
Lithium tantalate wafer is thinned to 21 μm by wafer grinding technique.
Trimming processing is carried out to the bonding body after grinding, with the edge size of the lithium tantalate wafer of bead cutter removal top layer
For a circle of 1mm.Surface polishing treatment is carried out using chemically mechanical polishing, lithium tantalate wafer is polished to a thickness of 20 μm；It will
Bonding body after polishing immerses the TMAH solution that mass fraction is 25%, 90 DEG C at a temperature of corrode 5h, complete corrosion dissolution
Silicon single crystal wafer, to obtain with a thickness of the ultra-thin super optical flat of self-supporting that 20 μm, TTV are 0.5 μm, diameter is 74.2 ± 0.5mm
Piece.
Embodiment 2
A piece of 6 inches of X are provided and cut the mono-crystalline lithium niobate chip with a thickness of 0.2mm~1mm as aimed wafer substrate, are provided
A piece of 6 inches of single crystal silicon bulk wafer is as underlay substrate, spin coating hardening agent and photoetching on single crystal silicon bulk wafer surface
Photoresist is heating and curing by glue, to form a protective layer on burnishing surface, downward by protective layer, is placed on the porous of grinder
On ceramic sucker, the main shaft angle of grinder is adjusted, grinding removes 10 μm of thickness, and the TTV for adjusting single crystal silicon bulk wafer is small
In 1 μm, the single crystal silicon bulk wafer of the slightly lower face type in the slightly higher edge in center is obtained.First with acetone again with ethanol solution to grinding
Single crystal silicon bulk wafer after mill is impregnated, to remove organic matter protective layer；To single crystal silicon bulk wafer and mono-crystalline lithium niobate
Chip carries out grade cleaning cleaning, and acquisition can be with the clean surface of Direct Bonding.
The burnishing surface of the burnishing surface of mono-crystalline lithium niobate chip and silicon wafer is directly fitted using bonding technology at room temperature,
To obtain bonding body.
Para-linkage body is made annealing treatment, and annealing temperature is 180 DEG C, and annealing time 4h, environment is air atmosphere.
Mono-crystalline lithium niobate chip in para-linkage body is ground, its thickness is thinned to 12 μm.
After the bonding body trimming processing after grinding, surface polishing treatment is carried out by the way of chemically mechanical polishing, it will
The thickness of mono-crystalline lithium niobate chip reduces to 10 μm, and is dipped in HF:HNO3: in the solution of CHECOOH=3:1.5:0.5,
Corrode 4h at room temperature, thoroughly dissolve single crystal silicon bulk wafer, to obtain the chip with a thickness of 10 μm.
Embodiment 3
A kind of single crystal quartz chip with a thickness of 0.2~1mm is provided as aimed wafer substrate, a kind of 3 inches of lists are provided
Photoresist is heated the polished surface spin coating hardening agent and photoresist of silicon single crystal wafer solid as underlay substrate by crystal silicon chip
Change, forms a protective layer in burnishing surface and downward by protective layer be placed on the porous ceramics sucker of grinder, adjust grinding
The main shaft angle of machine, grinding remove 10 μm of thickness, adjust the TTV of silicon single crystal wafer less than 1 μm, obtain the slightly higher edge in center slightly
The substrate wafer substrate of low face type.First the silicon single crystal wafer after grinding is impregnated with ethanol solution again with acetone,
To remove organic matter protective layer；Grade cleaning cleaning is carried out to silicon single crystal wafer and single crystal quartz chip, acquisition can be with Direct Bonding
Clean surface.
The burnishing surface of the burnishing surface of single crystal quartz chip and silicon single crystal wafer is bonded using bonding technology at room temperature, is obtained
To bonding body.
Para-linkage body is made annealing treatment, and annealing temperature is 250 DEG C, and annealing time 4h, environment is air atmosphere.
Single crystal quartz chip in para-linkage body is ground, its thickness is thinned to 22 μm.
After carrying out trimming processing to the bonding body after grinding, carried out at surface polishing by the way of chemically mechanical polishing
Reason, by single crystal quartz wafer grinding to NaOH solution of the mass fraction for 30% with a thickness of 20 μm, is then immersed in, at 80 DEG C
Corrode 3h at~90 DEG C, thoroughly to dissolve silicon single crystal wafer, to obtain the chip with a thickness of 20 μm.
By embodiment 1 to 3 as can be seen that according to the present invention, can be prepared using bonding techniques and etching technique
2 inches out~12 inches of large scale diameter, 1 μm~100 μm of micron order thickness, TTV are less than 1 μm, low residual stress and low
The ultra-thin super optical flat of the two-sided mirror finish of the self-supporting of defect concentration.
Although the present invention is specifically illustrated in and described referring to exemplary embodiment of the present invention, this field is general
It is logical the skilled person will understand that, do not departing from spirit and model of the invention as defined by the appended claims and their equivalents
It, can be in form and details can be made herein various changes in the case where enclosing.Should only in the sense that descriptive rather than
Consider embodiment for purposes of limitation.Therefore, the scope of the present invention is limited by a specific embodiment of the invention,
But be defined by the claims, all differences within the scope of this are to be interpreted as being included in the invention.
Claims (11)
1. the thickness range of a kind of ultra-thin super optical flat, the ultra-thin super optical flat is 1~100 μm, general thickness deviation is
0.005~1 μm, two-sided is all mirror finish, and surface roughness is lower than 1nm, having a size of 2~12 inches.
2. a kind of method for preparing ultra-thin super optical flat, the described method comprises the following steps:
The underlay substrate and aimed wafer substrate for all having burnishing surface are provided；
On the burnishing surface of underlay substrate spin coating protect glue-line, then to the back side opposite with the burnishing surface of underlay substrate into
Row grinding is thinned；
Underlay substrate after aimed wafer substrate and grinding are thinned cleans；
The burnishing surface of aimed wafer substrate is directly contacted with the burnishing surface of underlay substrate, to form bonding body；
Aimed wafer substrate in para-linkage body carries out grinding and is thinned, and is processed by shot blasting, so that aimed wafer substrate reaches
Target thickness；And
Bonding body after polishing is immersed into selective corrosion solvent soln, to remove underlay substrate, to obtain ultra-thin super optical flat
Piece.
3. according to the method described in claim 2, wherein, the diameter of the ultra-thin super optical flat is 2~12 inches, with a thickness of 1 μ
M~100 μm, and general thickness deviation is 0.005~1 μm.
4. according to the method described in claim 2, wherein,
The aimed wafer substrate is monocrystalline lithium tantalate substrate, mono-crystalline lithium niobate substrate, quartz base plate, silicon carbide substrate or arsenic
Gallium substrate,
The underlay substrate be silicon substrate, quartz base plate or glass substrate,
The material of the aimed wafer substrate and the underlay substrate is different,
The glue-line includes at least one of hardening agent, photoresist and atoleine.
5. according to the method described in claim 2, wherein, the underlay substrate after aimed wafer substrate and grinding are thinned carries out
In the step of cleaning, the cleaning is that semiconductor grade cleaning is cleaned.
6. according to the method described in claim 2, wherein, being ground at the back side opposite with the burnishing surface to underlay substrate
It wears away in thin step, the thickness of the thinned removal at the back side opposite with the burnishing surface of underlay substrate is greater than 2 μm.
7. according to the method described in claim 2, being moved back the method also includes executing annealing process to it after forming bonding body
Fiery temperature is 100 DEG C~300 DEG C, and annealing time is 0.5h~4h.
8. according to the method described in claim 2, wherein, the aimed wafer substrate in para-linkage body carries out the thinned step of grinding
In rapid, the thickness of the aimed wafer substrate of bonding body is thinned to 0.3 μm~10 μm bigger than target thickness.
9. according to the method described in claim 2, wherein, being ground at the back side opposite with the burnishing surface to underlay substrate
The aimed wafer substrate in thin and para-linkage body is worn away to carry out in the thinned step of grinding, with same grinder main shaft angle and
The vacuum chuck of same taper is ground, to obtain self-consistent face type.
10. according to the method described in claim 2, the method also includes: to grinding be thinned after target base plate throw
Before light, trimming processing is carried out to a circle at the edge of aimed wafer substrate,
Wherein, the width of trimming processing excision is 0.3mm~3mm.
11. according to the method described in claim 2, the method also includes:
Before the bonding body after polishing immerses selective corrosion solvent soln, underlay substrate is thinned to 50~200 μm, with
Time needed for reducing removal underlay substrate.
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| CN112201566A (en) * | 2020-09-22 | 2021-01-08 | 武汉电信器件有限公司 | Wafer thinning method and device and wafer unloading clamp |
| CN115951509A (en) * | 2023-03-13 | 2023-04-11 | 济南晶正电子科技有限公司 | Electro-optical crystal film, preparation method and electronic element |
| WO2023246612A1 (en) * | 2022-06-20 | 2023-12-28 | 四川智翔翼科技有限公司 | Ultra-thin chip manufacturing and packaging method |
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