CN109950394B - Method for realizing quantum conductance effect of resistive random access memory in electroless forming process - Google Patents

Method for realizing quantum conductance effect of resistive random access memory in electroless forming process Download PDF

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CN109950394B
CN109950394B CN201910248076.9A CN201910248076A CN109950394B CN 109950394 B CN109950394 B CN 109950394B CN 201910248076 A CN201910248076 A CN 201910248076A CN 109950394 B CN109950394 B CN 109950394B
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CN109950394A (en
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魏凌
王晓娟
李若平
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Henan University
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Abstract

The invention provides a method for realizing quantum conductance effect of a resistive random access memory in a non-electrical forming process, which comprises the following steps: at a temperature of 380 ℃ and 410 ℃ and an oxygen partial pressure of 1 multiplied by 10‑3Depositing a NiO film by a pulse laser deposition process under the environment of Pa, preparing an Au electrode on the upper part of the NiO film as an Au upper electrode, and taking an FTO film which is not covered by the NiO film as an FTO lower electrode; in the temperature range of 295-; the voltage-conductance curve in the process of multi-step current jump in the RESET process shows that at least 6 quantized resistance change steps are displayed. The invention realizes the quantum conductance effect, can reduce the energy consumption of the resistive random access memory in the electroless forming process, avoids the breakdown or damage of different degrees, and improves the working stability of the device; the realization of the quantum conductance effect can greatly increase the storage density, and can be applied to the field of ultrahigh-density storage of a multilevel memory.

Description

Method for realizing quantum conductance effect of resistive random access memory in electroless forming process
Technical Field
The invention relates to the technical field of novel nonvolatile memories, in particular to a method for realizing quantum conductance effect of a resistive random access memory in an electroless forming process.
Background
The NiO-based resistive random access memory has rich electrical characteristics and good repeatability, and has great potential application value in the next generation of resistive random access memory (ReRAM), logic circuits and neural morphology. The resistance change mechanism of the metal oxide/metal device resistance change memory is generally based on the formation and breakage of conductive filaments of an oxide layer. When the conductive filament size approaches the nano-atomic scale, comparable to the conduction electron mean free path, there is no scattering, resulting in ballistic electron transport and quantized conductance. Albeit in ZnO and TaOx、HfOxAnd other oxide-based ReRAM devices find the resistance change effect based on the quantum conductance effect, but the resistance change memories based on the quantum conductance effect in the materials all need an electrical forming process, so that the devices are electrically damaged to a certain extent, the retentivity and the cyclicity are affected, and the stability and the reliability of the devices are required to be improved.
Disclosure of Invention
Aiming at the technical problems that the existing resistive random access memory based on the conductance effect needs an electricity forming process and the stability and reliability of a device are affected, the invention provides a method for realizing the quantum conductance effect of the resistive random access memory based on the electricity-free forming process, which utilizes the pulse laser deposition technology to directly control in the preparation process, can introduce oxygen vacancies without annealing to avoid the electricity forming process, can realize the bipolar resistance switching behavior of the electricity-free forming process within the temperature range of 295 plus 373K, not only saves the process cost, but also avoids the devices from being broken down or damaged to different degrees, reduces the energy consumption and greatly improves the cycle maintenance characteristic of the resistive random access memory.
In order to achieve the purpose, the technical scheme of the invention is realized as follows: a method for realizing quantum conductance effect of a resistive random access memory in the electroless forming process comprises the following steps:
the method comprises the following steps: preparing an Au/NiO/FTO device: using fluorine-doped tin oxide (FTO) film as substrate, covering a mask plate on one side of the top of the FTO film, and performing oxygen partial pressure of 1 × 10 at 380--3Depositing a NiO film by a pulse laser deposition process under the Pa environment, preparing an Au electrode on the upper part of the NiO film, taking the FTO film which is not covered by the NiO film as an FTO lower electrode, and taking the Au electrode as an Au upper electrode;
step two: voltage scan mode preparation: a current meter and a variable power supply are connected in series between the FTO lower electrode and the Au upper electrode, and a voltmeter is connected in parallel at two ends of the current meter and the variable power supply;
step three: in the temperature range of 295-: limiting the current to be 1mA, drawing a voltage-current test curve of the Au/NiO/FTO device in a voltage scanning mode of 0V → 3V → 0V, wherein the voltage-current test curve is in a 8-shaped form, which indicates that the Au/NiO/FTO device can realize a bipolar switch; and the Au/NiO/FTO device in the voltage-current test curve has multi-step current jump in the RESET process with the voltage range from-1V to-3V;
step four: drawing a voltage-conductance curve in the multi-step current jump process in the RESET process, wherein the voltage-conductance curve has at least 6 quantized resistance change steps, and the resistance change steps areThe conductance value of the variable step can be nG0Is represented by, wherein n is an integer or half-integer, G0Is a unit of quantum conductance;
step five: in the RESET process, in a voltage scanning mode in the three steps of multiple cycles, the conductance values of the resistance change steps are concentrated in a quantum conductance unit G0Integer multiples and half integer multiples of regions.
The preparation method of the Au/NiO/FTO device comprises the following steps:
1) selecting transparent conductive glass with a fluorine-doped FTO film with the thickness of 200-300nm as a substrate;
2) covering a part of the FTO film by using a first type of mask plate, and preparing a NiO film on the exposed FTO film by using a pulse laser deposition process;
3) and covering the NiO film by using a second mask plate with patterns, and preparing an Au upper electrode on the NiO film.
4) And removing the first type of mask plate and the second type of mask plate to expose the Au upper electrode and the FTO film as FTO lower electrodes.
The pulse laser deposition process is realized by KrF excimer laser with a laser wavelength of 240-300nm, a laser frequency of 3-4 Hz, and an energy density of 2-3J/cm2(ii) a The deposition environment is as follows: the deposition temperature is 380--3Pa, the thickness of the NiO film is 40-60 nm.
The Au/NiO/FTO device has at least 6 quantized resistance change steps at the temperature of 295K, and the 6 quantized resistance change steps are changed into 9G0→8G0→6.5G0→5G0→3G0→2G0→1G0
In the fifth step, the smaller the current difference between the adjacent quantum conductivity states of the Au/NiO/FTO device, the higher the frequency of quantum conductivity, and vice versa, which means that the quantum conductivity always occurs in a concentrated manner and decreases logarithmically with the linear increase of the current difference.
And continuously cycling the voltage scanning mode of 0V → 3V → 0V 650 cycles in the third step, and statistically analyzing the curve of the voltage-current relation, wherein the Au/NiO/FTO device has stable at least 6 quantized resistance change steps in the RESET process.
In the first scanning of the voltage scanning mode from 0V, the positive voltage between the Au upper electrode and the FTO lower electrode is low, oxygen vacancies in the Au/NiO/FTO device move from the Au upper electrode to the FTO lower electrode through the NiO film, and the Au/NiO/FTO device is shown as an SET process; under the drive of positive voltage, the space barrier between the NiO film and the FTO lower electrode becomes narrower and narrower, and the relation of voltage and current follows the P-F emission mechanism; when the voltage is close to 1.2V, the multiple quasi-conductive filaments are conducted from the Au upper electrode to the FTO lower electrode, the current is suddenly increased, the Au/NiO/FTO device enters a Low Resistance State (LRS), and the Au/NiO/FTO device can jump from the High Resistance State (HRS) to a low resistance state without large electricity forming voltage in the SET process; and continuing to reversely increase the voltage, displaying the Au/NiO/FTO device as a RESET process, gradually changing the Au/NiO/FTO device from a low-resistance state to a high-resistance state, and displaying the RESET process as a gradual change process.
In the SET process of the Au/NiO/FTO device, carriers of a quasi-conductive filament between an Au upper electrode and an FTO lower electrode migrate to form a complete conductive filament under the action of an electric field; when the RESET process is driven by negative feedback, the conductive filaments between the Au upper electrode and the FTO lower electrode have the tendency of gradual reduction and disappearance, and the conductive filaments are gradually thinned until the filaments are completely broken; conductivity at G before break of adjacent conductive filament0The step of the conductivity appears at the integral multiple and half integral multiple; the quantum conductance occurs in the finest part of the filament, and the quantum conductance effect can be observed through the voltage-current test curve of the Au/NiO/FTO device.
When the Au/NiO/FTO device is measured by the detection station and the semiconductor device parameter analyzer, the number of conductive current carriers of the conductive filament is obviously increased along with the increase of the temperature, so that the diameter of the conductive filament in the Au/NiO/FTO device is increased, and the conductance of the high resistance of the Au/NiO/FTO device is gradually increased along with the increase of the temperature.
The invention has the beneficial effects that: the Au/NiO/FTO device prepared by the PLD process can be used as a bipolar quantum conductance resistance change multi-stage memory in the electroless forming process, and the voltage-current relation property before the SET process conforms to a P-F mechanism; the behavior of the electroless forming process can be explained as that in the low-oxygen-pressure atmosphere, oxygen vacancies exist at the grain boundary of the NiO film to form a plurality of quasi-conductive filaments, and the oxygen vacancies are connected under the driving of positive voltage and are discretely broken strip by strip under negative voltage. The bipolar quantum conductance effect resistive random access memory in the electroless forming process not only can reduce energy consumption, but also can prevent devices from being broken down or damaged to different degrees, and can realize ultrahigh-density storage application of multi-level resistive random access and application of a nerve form computing system. .
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of an Au/NiO/FTO device according to the present invention.
FIG. 2 is a TEM image of the cross-section of the Au/NiO/FTO device shown in FIG. 1.
FIG. 3 is a schematic representation of the bipolar voltage-current behavior of the electroless formation process of the Au/NiO/FTO device of the present invention.
FIG. 4 is a voltage-current curve of an Au/NiO/FTO device for 10 consecutive cycles.
FIG. 5 is a schematic voltage-conductance diagram of the RESET process of the Au/NiO/FTO device of the present invention.
FIG. 6 is a diagram showing the statistical law of quantum conductance for 650 RESET processes of the Au/NiO/FTO device.
FIG. 7 is a graph of current variation versus relative distribution frequency for the quantum conductivity state in Au/NiO/FTO devices.
FIG. 8 is a graph of voltage-current relationship during RESET in the temperature range of 295-373K for Au/NiO/FTO devices.
FIG. 9 shows that the conducting state of the Au/NiO/FTO device gradually increases corresponding to the last quantum step in the RESET process within the temperature range of 295-373K.
FIG. 10 is a quasi-conductor in Au/NiO/FTO deviceA schematic diagram of electrical filament conduction and discrete breaking one by one, wherein (a) is conductance G in a low resistance state>nG0And (b) is a conductance G ═ 2G0And (c) is the conductance G ═ G0(d) is the conductance in the high resistance state G<G0
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive effort based on the embodiments of the present invention, are within the scope of the present invention.
As shown in fig. 1, a method for realizing quantum conductance effect of a multilevel resistive random access memory formed without electricity includes the following steps:
the method comprises the following steps: preparing an Au/NiO/FTO device: using FTO film as substrate, covering a mask plate on one side of the top of the FTO film, depositing at 380--3Depositing a NiO film by a pulse laser deposition process under the Pa environment, preparing an Au electrode on the upper part of the NiO film, taking the FTO film which is not covered by the NiO film as an FTO lower electrode, and taking the Au electrode as an upper electrode.
An electric field needs to be added between an upper electrode and a lower electrode of a common memristor, so that after the device is subjected to soft breakdown, a conductive filament is formed, and the process is an electrical forming process. The Au/NiO/FTO device uses the FTO film as an FTO lower electrode, the Au electrode as an upper electrode, the NiO film is positioned between the upper electrode and the lower electrode, the NiO film covers a part of the FTO film as an FTO layer, and the exposed FTO film serves as the FTO lower electrode. The FTO lower electrode is transparent and can be used for displays, solar integrated circuits and the like.
The preparation method of the Au/NiO/FTO device comprises the following steps:
1) transparent conductive glass with a 200-300nm thick FTO film was selected as the substrate.
2) Covering a part of the FTO film by using a first type of mask plate, and preparing a NiO film on the exposed FTO film by using a pulse laser deposition process; said pulseThe laser deposition process is realized by KrF excimer laser with a laser wavelength of 240-300nm, a laser frequency of 3-4 Hz, and an energy density of 2-3J/cm2(ii) a The deposition environment is as follows: the deposition temperature is 380--3Pa, the thickness of the NiO film is 40-60 nm.
3) And covering the NiO film by using a second mask plate with a circular or square electrode pattern, and preparing an Au upper electrode on the NiO film.
4) And removing the first type of mask plate and the second type of mask plate to expose the Au upper electrode and the FTO film as lower electrodes. The first type of mask plate and the second type of mask plate are used for respectively shielding part of the FTO thin film and the NiO thin film.
And depositing a fluorine-doped tin oxide film on the common glass to form FTO glass so as to form an FTO film, wherein the FTO film which is not covered by the NiO film is used as an FTO lower electrode. The structure of the prepared Au/NiO/FTO device is shown in FIG. 1, the TEM image of the cross section of the Au/NiO/FTO device in FIG. 1 is shown in FIG. 2, the Buffer layer in FIG. 2 represents the Buffer layer between the FTO film and the Glass layer, and Glass represents the Glass layer.
Specifically, a NiO film is prepared on a 300nm FTO film substrate by using a pulse laser deposition technology. The pulse laser deposition technology adopts KrF excimer laser pulse laser with wavelength lambda of 248nm, repetition rate of 3 Hz and energy density of 2J/cm2Deposition temperature 380 deg.C, oxygen partial pressure 1X 10-3Pa, NiO film thickness is about 50 nm.
Step two: voltage scan mode preparation: and a current meter and a variable power supply are connected in series between the FTO lower electrode and the Au upper electrode, and two ends of the current meter and the variable power supply are connected with a voltmeter in parallel.
The current between the FTO lower electrode and the Au upper electrode is detected through the ammeter, and the voltage between the FTO lower electrode and the Au upper electrode is detected through the voltmeter in real time, so that a curve of the relation between the voltage and the current is conveniently drawn subsequently, and a support is provided for the subsequent research on the performance of the Au/NiO/FTO device.
Step three: in the temperature range of 295-: the limiting current is 1mA, the voltage scanning mode is 0V → 3V → 0V, a voltage-current test curve of the Au/NiO/FTO device is drawn, the voltage-current test curve is in a 8-shaped form, which indicates that the Au/NiO/FTO device can realize a bipolar switch, and the voltage scanning test process of the Au/NiO/FTO device has no electric forming process, so that breakdown and damage of the electric forming process to the Au/NiO/FTO device to a certain extent can be reduced. The Au/NiO/FTO device in the voltage-current test curve has multi-step current jump steps in the RESET process when the voltage ranges from-1V to-3V, as shown in FIG. 3. This jump step was consistently observed during RESET for 10 consecutive cycles of fig. 4, exhibiting a ubiquitous conductance step.
As shown in FIG. 3, the voltage scanning pattern is a voltage-current test curve at 0V → 3V → 0V → -3V → 0V, a typical curve of the bipolar switching process of the Au/NiO/FTO device. The Au/NiO/FTO devices showed bipolar switching behavior with no electrical formation. After the voltage sweep mode is set, the ammeter detects multi-step current jumps in the voltage range from-1V to-3V during RESET. The sections 1, 2, 3 and 4 in fig. 3 indicate the direction of the voltage current test curve cycle. FIG. 4 is a current-voltage relationship curve of the Au/NiO/FTO device for 10 continuous cycle periods, and a plurality of current jump steps appear on the voltage-current curve of each cycle. Each step of the voltage-current test curve of fig. 3 is based on the quantum conductance phenomenon, which is shown more clearly in the voltage-current diagram of fig. 5. FIG. 5 shows a unit G of conductance by ordinate and quantum on the basis of FIG. 30And obtaining the result of quotient finding. It is clear from fig. 5 that the step in the voltage-current test curve of fig. 3 is a quantum conductance effect.
Step four: and drawing a voltage-conductance curve of the relation between the quantum conductance and the voltage in the multi-step current jump process in the RESET process. As shown in FIG. 5, when the temperature is 295-0→8G0→6.5G0→5G0→3G0→2G0→1G0. nG is available for the conductance value of the resistance change step0Is represented by, wherein n is an integer or half-integer, G0Is the unit of quantum conductance, equal to 2e2H, whereinE is the electron charge and h is the Planckian constant. The Au/NiO/FTO resistive random access memory provided by the invention can realize ultrahigh-density storage application of multi-stage resistive random access and application of a nerve morphology computing system.
Step five: 650 groups of data can be obtained by continuously cycling the voltage scan mode test of 0V → 3V → 0V → -3V → 0V in the third step for 650 periods. The data can be used for drawing a variation histogram of the quantum conductance statistical law of the Au/NiO/FTO resistive random access memory, as shown in FIG. 6. From FIG. 6, it can be seen that during RESET, the conductance values of the multi-cycle RESET process are concentrated in the quantum conductance unit G0Integral multiple and half integral multiple areas, and most of the areas are in low value areas, which shows that the Au/NiO/FTO device has the characteristic of low energy consumption. The observed statistical laws show that the quantum conductance is often at nG0The peak value appears at the position (n is an integer or a half integer), which shows that the Au/NiO/FTO resistive random access memory has excellent quantum conductance cycle characteristics.
As shown in fig. 7, the current variation of two adjacent quantum conductive states is different from the current variation of two adjacent quantum conductive states of the Au/NiO/FTO device according to the relationship between the current variation and the relative distribution frequency, which indicates that the current varies between the two adjacent quantum conductive states. The less the current difference between adjacent quantum conduction states, the higher the frequency at which quantum conduction occurs and vice versa. This indicates that quantum conduction always occurs centrally and decreases logarithmically with a linear increase in current difference. The current variation of each two adjacent quantum conduction states indicates the difference between the adjacent conduction states, and can provide additional information for understanding the quantum conduction effect mechanism in the Au/NiO/FTO device.
In the first scanning of the voltage scanning mode from 0V, the positive voltage between the Au upper electrode and the FTO lower electrode is low, oxygen vacancies in the Au/NiO/FTO device move from the Au upper electrode to the FTO lower electrode through the NiO film, and the Au/NiO/FTO device is shown as an SET process; the spatial barrier between the NiO film and the substrate FTO film becomes narrower and narrower under the driving of positive voltage, and the voltage-current relation of the Au/NiO/FTO device follows the P-F emission mechanism at 295-; when the voltage is close to 1.2V, the multiple quasi-conductive filaments are conducted from the Au upper electrode to the FTO lower electrode, the current is suddenly increased, the Au/NiO/FTO device enters a low-resistance state, the Au/NiO/FTO device can jump from the high-resistance state to the low-resistance state without large electricity forming voltage in the SET process of the Au/NiO/FTO device, and the device enters an ON state, namely a low-resistance state (LRS); and continuing to increase the voltage reversely, displaying a RESET process by the Au/NiO/FTO device, gradually changing the Au/NiO/FTO device from a low-resistance state to a high-resistance state (HRS), gradually entering a closing state (HRS) by the Au/NiO/FTO device, and taking the RESET process as a gradual change process. However, during SET, the Au/NiO/FTO device abruptly transitions from the HRS state to the LRS state, as shown in FIG. 3. The SET process occurs suddenly due to the positive feedback relationship between the hole generation rate and the joule heating effect. Therefore, it is difficult to observe the progress of the quantum conductance.
In the SET process of the Au/NiO/FTO device, carriers of a quasi-conductive filament between an Au upper electrode and an FTO lower electrode migrate to form a complete conductive filament under the action of an electric field; when the RESET process is driven by negative feedback, the conductive filaments between the Au upper electrode and the FTO lower electrode have the tendency of gradual reduction and disappearance, and the conductive filaments are gradually thinned until the filaments are completely broken; conductivity at G before break of adjacent conductive filament0A step of conductivity appears at the integral multiple of the conductivity; the quantum conductance occurs in the finest part of the filament, and the quantum conductance effect can be observed by the voltage-current test curve of the Au/NiO/FTO device in FIG. 3.
By controlling preparation and test conditions, a bipolar resistance switching phenomenon in the electroless forming process is found in the multi-stage resistive random access memory composed of Au/NiO/FTO devices, and the resistive random access memory in the electroless forming process not only can reduce energy consumption, but also can avoid breakdown or damage of the device in different degrees. Au/NiO/FTO devices fabricated at fabrication temperatures below 350 ℃ and in high oxygen pressure environments still require the electrical formation process to trigger resistive switching behavior. The method controls proper preparation temperature and oxygen atmosphere pressure, directly controls the content of oxygen vacancies of the NiO layer in the preparation process, and avoids the electricity forming process; compared with the prior art that the electric forming process is avoided by introducing oxygen vacancies through annealing, the preparation method disclosed by the invention has the advantages that an additional annealing process is not needed, so that the process cost is saved, the damage to the device caused by the annealing process is avoided, and the cycle maintenance characteristic of the resistive random access memory is greatly improved. The Au/NiO/FTO device not only can reduce energy consumption, but also can reduce the heating of the device and avoid the device from being broken down or damaged in different degrees.
The electrical performance and the temperature dependence of the device are measured by adopting a Signateone 1160 series detection station and a Keysight B1500A semiconductor device parameter analyzer, so that the consistency of the resistive switching behavior of the device is researched. All measurements were performed in an environment of 295-373K, with at least 10 consecutive voltage sweeps per temperature. In the measurement, a voltage offset is applied to the probe, while the bottom FTO bottom electrode is grounded.
And testing the resistance change characteristics of the Au/NiO/FTO device at different temperatures from 295K to 373K, and calculating the temperature resistance switching characteristics and voltage-current data (V is more than or equal to 0 and less than or equal to 1V) before the SET process. As shown in FIG. 8, the applied voltage is low (0V <0.3V), the current and voltage increase linearly, and at high voltage (0.3V < 1V), the current and voltage increase exponentially. The Pool-french (P-F) conduction can well describe temperature and field dependent conduction:
Figure GDA0002407806660000071
wherein the factor α depends on the trap density, EaIs the activation energy, β is a field enhancement factor, F is the local electric field, kBDenotes the boltzmann constant and T is the absolute temperature. In the specific application example, different values can be selected for different oxide materials according to the situation. P-F emission is due to electrons being emitted from high density traps to conduction bands or other traps under an electric field. The lower the field barrier, the greater the probability of electron emission when an electric field is applied. The analysis results well explain the shape of the voltage-current characteristic and its dependence on temperature.
As shown in FIG. 9, the conductivity is at G before the adjacent conductive filament breaks0A step of conductivity occurs at an integral multiple of. For 295K, 333K, 353K and 363K, the last steps of the four voltage-conductance curves correspond to the first step of the four voltage-conductance curves respectivelyQuantum electric conductivity of 1G0、2G0、3G0And 4G0. When the Au/NiO/FTO device is tested by a Signaton 1160 series detection station and a Keysight B1500A semiconductor device parameter analyzer, the number of conductive carriers of the conductive filament is obviously increased along with the increase of the temperature, so that the diameter of the conductive filament in the Au/NiO/FTO device is increased, and the high-resistance conductance of the Au/NiO/FTO device is gradually increased along with the increase of the temperature.
Therefore, the bipolar quantum conductance effect resistive random access memory of the electroless formation process of the Au/NiO/FTO structure can be understood as being caused by the fracture of multiple quasi-conductive filaments in the prepared NiO film one by one, as shown in FIG. 10. The literature has reported that conductive filaments are easily formed at NiO grain boundaries. The NiO thin film is a semiconductor whose electrical properties are influenced by the stoichiometric ratio, point defects (such as vacancies and interstitials), and the like in general. Due to the control of oxygen pressure in the PLD fabrication process, oxygen vacancies will occur at the NiO film grain boundaries and a plurality of quasi-conducting filaments are formed, represented by the chain of circles in fig. 10. When the positive voltage is relatively low, oxygen vacancies move from the Au/NiO to the FTO lower electrode. Under positive voltage drive, the spatial barrier becomes narrower and narrower, and the voltage-current relationship follows the P-F emission mechanism. Finally, when the voltage is close to 1.2V, the multiple quasi-conductive filaments are conducted from the Au upper electrode to the FTO lower electrode. In this case, the Au/NiO/FTO device can jump from the high resistance state to the low resistance state without a large electrical forming voltage during the SET process. When a negative voltage is applied, the plurality of conductive filaments are discretely broken, resulting in a stepwise reaching of a high resistance state, exhibiting a quantum conductance effect. The behavior of the electroless forming process can be explained as that a plurality of quasi-conductive filaments formed by oxygen vacancies exist at the grain boundary of the NiO film in the low-oxygen-pressure atmosphere, and the oxygen vacancies are communicated under the drive of positive voltage and are discretely broken one by one under negative voltage; the electroless forming process is mainly based on the fact that the original quasi-conductive filament forms a complete conductive filament after carrier migration under the action of an electric field, and the point is different from that of a common memristor. An electric field needs to be added between an upper electrode and a lower electrode of a common memristor, so that after the device is subjected to soft breakdown, a conductive filament is formed, and the process is an electrical forming process. The process of electroforming causes the device to suffer a degree of electrical damage, which affects the instrument's retention and cyclability.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (9)

1. A method for realizing quantum conductance effect of a resistive random access memory in the electroless forming process is characterized by comprising the following steps:
the method comprises the following steps: preparing an Au/NiO/FTO device: using FTO film as substrate, covering mask plate on one side of the top of FTO film, at temperature of 380--3Depositing a NiO film by a pulse laser deposition process under the Pa environment, preparing an Au electrode on the upper part of the NiO film, taking the FTO film which is not covered by the NiO film as an FTO lower electrode, and taking the Au electrode as an Au upper electrode;
step two: voltage scan mode preparation: a current meter and a variable power supply are connected in series between the FTO lower electrode and the Au upper electrode, and a voltmeter is connected in parallel at two ends of the current meter and the variable power supply;
step three: in the temperature range of 295-: limiting the current to be 1mA, drawing a voltage-current test curve of the Au/NiO/FTO device in a voltage scanning mode of 0V → 3V → 0V, wherein the voltage-current test curve is in a 8-shaped form, which indicates that the Au/NiO/FTO device can realize a bipolar switch; and the Au/NiO/FTO device in the voltage-current test curve has multi-step current jump in the RESET process with the voltage range from-1V to-3V;
step four: drawing a voltage-conductance curve in the multi-step current jump process in the RESET process, wherein at least 6 quantized resistance change steps are arranged in the voltage-conductance curve, and the conductance values of the resistance change steps can be usednG0Is shown in whichnIs an integer or half-integer, G0Is a unit of quantum conductance;
step five: in the RESET process, in a voltage scanning mode in the three steps of multiple cycles, the conductance values of the resistance change steps are concentrated in a quantum conductance unit G0Integer multiples and half integer multiples of regions.
2. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process according to claim 1, wherein the preparation method of the Au/NiO/FTO device comprises the following steps:
1) selecting transparent conductive glass with an FTO film with the thickness of 200-300nm as a substrate;
2) covering a part of the FTO film by using a first type of mask plate, and preparing a NiO film on the exposed FTO film by using a pulse laser deposition process;
3) covering the NiO film by using a second mask plate with patterns, and preparing an Au upper electrode on the NiO film;
4) and removing the first type of mask plate and the second type of mask plate to expose the Au upper electrode and the FTO film as FTO lower electrodes.
3. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process as claimed in claim 2, wherein the pulsed laser deposition process is realized by KrF excimer laser having a laser wavelength of 240-300nm, a laser frequency of 3-4 Hz, and an energy density of 2-3J/cm2(ii) a The deposition environment is as follows: the deposition temperature is 380--3Pa, the thickness of the NiO film is 40-60 nm.
4. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process according to claim 1, wherein the Au/NiO/FTO device has at least 6 quantized resistive random steps at the temperature of 295K, and the 6 quantized resistive random steps are changed to 9G0→8 G0→6.5 G0→5 G0→3 G0→2 G0→1 G0
5. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process according to claim 1, wherein the smaller the current difference between the adjacent quantum conductance states of the Au/NiO/FTO device in the fifth step, the higher the frequency of occurrence of quantum conductance, and vice versa; indicating that quantum conductance always occurs centrally and decreases logarithmically with linear increase in current difference.
6. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process according to claim 1, wherein the voltage scanning mode of 0V → 3V → 0V is continuously cycled for 650 periods in the third step, the curve of the voltage-current relationship is statistically analyzed, and the Au/NiO/FTO device has at least 6 stable quantized resistive step changes in each period in the RESET process.
7. The method for realizing the quantum conductance effect of the resistive random access memory according to claim 1, wherein in a first scan of a voltage scan mode starting from 0V, a positive voltage between the Au upper electrode and the FTO lower electrode is low, oxygen vacancies in the Au/NiO/FTO device move from the Au upper electrode to the FTO lower electrode through the NiO thin film, and the Au/NiO/FTO device shows a SET process; under the drive of positive voltage, the space barrier between the NiO film and the FTO lower electrode becomes narrower and narrower, and the relation of voltage and current follows the P-F emission mechanism; when the voltage is close to 1.2V, the multiple quasi-conductive filaments are conducted from the Au upper electrode to the FTO lower electrode, the current is suddenly increased, the Au/NiO/FTO device enters a low-resistance state, and the Au/NiO/FTO device can jump and transition from the high-resistance state to the low-resistance state without large electricity forming voltage in the SET process; and continuing to increase the voltage reversely, displaying a RESET process by the Au/NiO/FTO device, and gradually jumping from a low-resistance state to a high-resistance state step by the Au/NiO/FTO device.
8. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless formation process according to claim 7, wherein in the SET process of the Au/NiO/FTO device, carriers migrate to form a complete conductive filament under the action of an electric field in a quasi-conductive filament between an Au upper electrode and an FTO lower electrode; when the RESET process is driven by negative feedback, the conductive filaments between the Au upper electrode and the FTO lower electrode have a tendency to gradually decrease and disappear, the conductive filaments become thinner,until the filament is completely broken; conductivity at G before break of adjacent conductive filament0The step of the conductivity appears at the integral multiple and half integral multiple; the quantum conductance occurs in the finest part of the filament, and the quantum conductance effect can be observed through the voltage-conductance curve of the Au/NiO/FTO device.
9. The method for realizing the quantum conductance effect of the resistive random access memory in the electroless forming process according to claim 1 or 8, wherein the Au/NiO/FTO device is measured by a detection station and a semiconductor device parameter analyzer, the number of conductive carriers of the conductive filament is remarkably increased along with the increase of temperature, so that the diameter of the conductive filament in the Au/NiO/FTO device is increased, and the conductance of the high resistance of the Au/NiO/FTO device is gradually increased along with the increase of temperature.
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