CN109947580A - Interruption processing method, device, equipment and storage medium - Google Patents
Interruption processing method, device, equipment and storage medium Download PDFInfo
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- CN109947580A CN109947580A CN201910239307.XA CN201910239307A CN109947580A CN 109947580 A CN109947580 A CN 109947580A CN 201910239307 A CN201910239307 A CN 201910239307A CN 109947580 A CN109947580 A CN 109947580A
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Abstract
The embodiment of the invention discloses a kind of interruption processing method, device, equipment and storage mediums, this method comprises: receiving the interrupt message for interrupting initiating equipment and issuing by versabus, the interrupt message is including interrupting device number and interrupting transaction information；The interrupt message is written via versabus and interrupts caching；Interrupt processing signal is sent to central processing unit, reads the interrupt message stored in the interruption caching for the central processing unit.The technical solution of the embodiment of the present invention receives the interrupt message that each interruption initiating equipment issues by versabus, had both avoided due to arranging signal wire bring congestion problems, and in turn ensured the timing closure of each interrupt message；Meanwhile central processing unit reads interrupt message from interrupting in caching, avoids and carry out interrupt inquiry operation to each interruption initiating equipment after receiving interrupt processing signal, significantly reduces interrupt processing delay.
Description
Technical field
The present embodiments relate to computer technology more particularly to interruption processing method, device, equipment and storage mediums.
Background technique
There are multiple interruption initiating equipments in integrated circuit design, interrupt requests can be issued by interrupting initiating equipment,
In, in middle severed finger equipment running process, when certain situations occur needs CPU to intervene, the program being currently running can be automatically stopped and turned
Enter processing and interrupt affairs, returns to the process that the former program being suspended continues to run after being disposed again.
In the prior art, interrupt control unit receives the interrupt signal interrupting initiating equipment and sending by signal wire, interrupts letter
Number form can be pulse, low and high level, central processing unit after receiving interruption, read interrupt initiating equipment state with
Obtain more information relevant with affairs are interrupted.In above scheme, interruption initiating equipment quantity is more and is dispersed on chip
Everywhere, interrupt signal reaches interrupt control unit, when chip area is very big, the timing of interrupt signal by different paths
It is difficult to restrain, interrupt signal quantity increases the complexity for increasing chip-scale cabling, will lead to the generation of routing congestion problem.
In addition to this, it after central processing unit receives interruption, then reads and interrupts the state confirmation of initiating equipment and interrupt the specific origin of an incident and will lead to
Interrupt processing delay dramatically increases.
Summary of the invention
The embodiment of the invention provides interruption processing method, device, equipment and storage mediums, to handle in integrated circuit
Interrupt requests.
In a first aspect, the embodiment of the invention provides a kind of interruption processing methods, comprising:
The interrupt message for interrupting initiating equipment and issuing is received by versabus, the interrupt message includes interrupting device number
And interrupt transaction information；
The interrupt message is written via versabus and interrupts caching；
Interrupt processing signal is sent to central processing unit, reads in the interruption caching and stores for the central processing unit
Interrupt message.
Second aspect, the embodiment of the invention provides a kind of interrupt processing devices, comprising:
Message reception module, for receiving the interrupt message for interrupting initiating equipment and issuing, the interruption by versabus
Message includes interrupting device number and interruption transaction information；
Message writing module interrupts caching for the interrupt message to be written via versabus；
Interrupt notification sending module is used for the central processing unit for sending interrupt processing signal to central processing unit
Read the interrupt message for interrupting and storing in caching.
The third aspect, the embodiment of the invention also provides a kind of equipment, the equipment includes:
Processor, memory and storage on a memory and the computer program that can run on a processor, the place
Reason device realizes interruption processing method described in any embodiment of that present invention when executing the computer program.
Fourth aspect, it is described to set the embodiment of the invention also provides a kind of storage medium comprising machine executable instructions
Standby executable instruction realizes interruption processing method described in any embodiment of that present invention when being executed as device handler.
The technical solution of the embodiment of the present invention receives the interrupt message that each interruption initiating equipment issues by versabus,
Both it had avoided due to arranging signal wire bring congestion problems, and had in turn ensured the timing closure of each interrupt message；Meanwhile it interrupting slow
Setting is deposited from the closer position of central processing unit, so that central processing unit is after receiving interrupt processing signal, it can be therefrom
Interrupt message is quickly read in disconnected caching, central processing unit is avoided and interrupt inquiry operation is carried out with true to each interruption initiating equipment
Recognize the process for interrupting the specific origin of an incident, significantly reduces interrupt processing delay.
Detailed description of the invention
Fig. 1 is a kind of flow chart for interruption processing method that the embodiment of the present invention one provides；
Fig. 2 is a kind of flow chart of interruption processing method provided by Embodiment 2 of the present invention；
Fig. 3 is a kind of flow chart for interruption processing method that the embodiment of the present invention three provides；
Fig. 4 is a kind of structural block diagram for interrupt processing device that the embodiment of the present invention four provides；
Fig. 5 is a kind of structural block diagram for equipment that the embodiment of the present invention five provides.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just
Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
Embodiment one
Fig. 1 is a kind of flow chart for interruption processing method that the embodiment of the present invention one provides, and the present embodiment is applicable to locate
The interrupt requests in integrated circuit are managed, this method can be executed by the interrupt processing device in the embodiment of the present invention, the device
It can be realized, and be integrated in integrated circuits by way of software and/or hardware, the method for the embodiment of the present invention specifically includes
Following steps:
S110, the interrupt message for interrupting initiating equipment and issuing is received by versabus, the interrupt message includes interrupting
Device number and interruption transaction information.
Underlying bus of the versabus as integrated circuit is the just fixed bus at the beginning of IC design.With
The prior art by signal wire receive interrupt initiating equipment send interrupt signal compare, due to without it is scattered, various and across
Therefore the more signal wire of modules will not bring the congestion problems being additionally routed；Meanwhile using existing versabus, i.e.,
Keep interruption initiating equipment quantity more and disperses the interruption that can still guarantee that each interruption initiating equipment is sent in integrated circuits
Convergence of the message in timing.
Optionally, in embodiments of the present invention, versabus includes existing bus in information transmission path multiplex system.
Information transmission path multiplex system is realized in a communication line more to improve information transfer efficiency and bus utilization
Transmission；For example, frequency division multiplexing can be used, i.e., believed according to the son that the carrier bandwidths of bus are divided into multiple and different frequency bands
Road, every sub-channels can transmit signal all the way parallel；It can also be using time division multiplexing, i.e., same in interaction time interval
Multiple signals are transmitted on channel.In embodiments of the present invention, the multiplex mode of information transmission path is not especially limited.
Multiple interruption initiating equipments present in integrated circuit, the interruption source initiated is not fully identical, may come
Derived from IC interior, for example, the clock signal interruption etc. that crystal oscillator generates；Integrated circuit external may also be derived from, for example,
External equipment request interruption and fault data channel interrupt etc..In embodiments of the present invention, it is initiated for interrupting initiating equipment
Interruption source be not especially limited.Meanwhile in order to distinguish each interruption initiating equipment, each interruption initiating equipment is assigned certainly
Oneself number, i.e. interruption device number；It interrupts transaction information and interrupts affairs, such as interrupt requests information for characterizing.
S120, the interrupt message is written via versabus and interrupts caching.
After interrupt control unit receives the interrupt message for interrupting initiating equipment sending by versabus, do not directly transmit
To in central processing unit (Central Processing Unit, abbreviation CPU), but interrupt message is written to interruption caching,
Cache each interrupt message.Particularly, buffer setting will be interrupted in the closer position distance CPU, to facilitate CPU quickly to obtain nearby
Take interrupt message.
S130, interrupt processing signal is sent to central processing unit, read the interruption caching for the central processing unit
The interrupt message of middle storage.
In embodiments of the present invention, optionally, after interrupt message is written to interruption caching by interrupt control unit, can pass through
The multi-signals such as sideband signals, MSI or MSIX transmission mode sends interrupt processing signal to CPU.Sideband signals transmission, that is, believing
Number the two sides up and down of center carrier frequence respectively generate a frequency band, pass through frequency band and carry out signal transmission；MSI(Message
Signaled Interrupt) and MSIX be applied to PCI (Peripheral Component Interconnect, peripheral hardware portion
Part interconnection standard) one of bus and PCIe (Peripheral Component Interconnect Express) bus
Interrupt signal mechanism allows equipment by the way that a specific value is written to a specific address to allow to interrupt, rather than makes
Interruption is triggered with a proprietary pin, wherein MSI can support 32 interrupt requests, and MSIX can be supported at most
2048 interrupt requests.
After CPU receives interrupt processing signal, do not need to obtain in by reading the state of interruption initiating equipment again
The disconnected relevant information of affairs, and then just can confirm that and interrupt the specific origin of an incident；But it directly reads the interruption interrupted and stored in caching and disappears
Breath can confirm and interrupt the specific origin of an incident, reduce CPU and operate to each interrupt inquiry for interrupting initiating equipment, reduce at interruption
Reason delay.
In embodiments of the present invention, optionally, the interruption caching is that ring interruption caches, in the ring interruption caching
Write pointer increase after interrupt message is written, the read pointer in the Circular buffer central processing unit read interrupt message after
Increase.Interrupt control unit to ring interruption cache in one interrupt message of every write-in, ring interruption cache in will increase by one
Write pointer, for indicating the position of deposit；CPU one interrupt message of every reading into ring interruption caching, ring interruption caching
In will increase a read pointer, for indicate read position.
The technical solution of the embodiment of the present invention receives the interrupt message that each interruption initiating equipment issues by versabus,
Both it had avoided due to arranging signal wire bring congestion problems, and had in turn ensured the timing closure of each interrupt message；Meanwhile it interrupting slow
It deposits and is arranged on from the closer position CPU, it, can be from interrupting in caching quickly so that CPU is after receiving interrupt processing signal
Interrupt message is read, CPU is avoided and interrupt inquiry operation is carried out to each interruption initiating equipment, significantly reduce interrupt processing and prolong
Late.
Embodiment two
Fig. 2 is the flow chart of one of the embodiment of the present invention two interruption processing method, and the present embodiment is with above-described embodiment
Based on embodied, in the present embodiment, versabus includes AXI bus, and by the awuser signal of AXI bus and
Wdata signal distinguishes Transmission device number and interrupts transaction information, and the method for the embodiment of the present invention specifically comprises the following steps:
S210, the interrupt message for interrupting initiating equipment and issuing is received by AXI bus, the interrupt message includes interrupting to set
Standby number and interruption transaction information；Wherein, the device number that interrupts is transmitted by the awuser signal of AXI bus；The interruption
Transaction information is embedded in 32 bit data flows, is transmitted by the wdata signal of AXI bus.
AXI (Advanced eXtensible Interface) bus is a kind of with high-performance, high bandwidth and low latency
Etc. performances on-chip bus.As a kind of channel transmission bus, can by address, read data and write data in different channels
Middle transmission, sequence can also be upset between different access, especially in burst transfer, it is only necessary to which first address can separate reading
Write data channel.Awuser signal is the write address Channels user signal of AXI bus, is used to transmit in embodiments of the present invention
Disconnected device number；Wdata signal is the write data channel signal of AXI bus, highway width can for 8,16,32,64,
128,256,512 or 1024, in embodiments of the present invention, the interruption transaction information is embedded in 32 bit data flows,
Transaction information is interrupted to transmit in such a way that highway width is 32.
Optionally, in embodiments of the present invention, when the highway width of wdata signal is larger, for example, when being 64, it is described
Interrupt message further includes interrupt type information and interrupts self-defined information, and the interrupt type information and the interruption are customized
Information is transmitted by the wdata signal of the AXI bus.Self-defined information is interrupted to be used to transmit the spy that user defines as needed
Different information enhances the flexibility ratio of signal transmission；Interrupt type information may include the severity and fundamental type of Transmission,
Whether for example, the type of error interrupted, interrupting is general type.
S220, the interrupt message is written via versabus and interrupts caching；
S230, interrupt processing signal is sent to central processing unit, read the interruption caching for the central processing unit
The interrupt message of middle storage.
AXI bus is received as versabus and is interrupted in initiating equipment sending by the technical solution of the embodiment of the present invention
Disconnected message is utilized its read address channel, reads the transmission mode that data channel, write address channel and write data channel separate,
Transmission performance is greatly improved, meanwhile, as half-duplex channel structure, AXI bus makes the interrupt processing on integrated circuit only
It transmits in one direction, reduces interrupt processing delay.
Embodiment three
Fig. 3 is the flow chart of one of the embodiment of the present invention three interruption processing method, and the present embodiment is with above-described embodiment
Based on embodied, in the present embodiment, interrupt message interrupt receiving register in be coupled and with traffic channel
Transmission, the method for the embodiment of the present invention specifically comprise the following steps:
S310, the interrupt message for interrupting initiating equipment and issuing is received by versabus, and be stored in interruption and receive deposit
In device, the interruption receiving register is the corresponding memory of preset address.
It sets the partial address in the address space of interrupt control unit to interrupt receiving register, interrupts hair for saving
Play the interrupt message that equipment issues.
S320, multiple interrupt messages are coupled, in the form of data burst by the interrupt message of multiple connections via
Caching is interrupted in versabus write-in.
In embodiments of the present invention, optionally, after according to device number progress interruption masking is interrupted, by multiple interrupt messages
It is coupled, the interrupt message after connection is written via versabus in the form of data burst and is interrupted in caching.Burst is
With in a line, adjacent storage unit is carried out continuously the mode of data transmission, and the periodicity continuously transmitted is exactly burst-length.Number
It is a kind of data transfer mode that high bandwidth is carried out in the short time according to burst, i.e. burst transfer.
Particularly, when versabus is AXI bus, by the awaddr signal of AXI bus by interrupt message by interrupting
Caching is interrupted in receiving register write-in；Awaddr signal is the write address channel signal of AXI bus, provides and writes in burst transfer
First transmission address, relevant control signal wire are used to determine the address of residue transmission in burst transfer.
S330, interrupt processing signal is sent to central processing unit, read the interruption caching for the central processing unit
The interrupt message of middle storage.
The technical solution of the embodiment of the present invention, by setting interrupt receiving register, by multiple interrupt messages of preservation into
Row is coupled, and caching, compared with the independent transmission mode of traditional each unit, data burst are interrupted in write-in in the form of data burst
It is transmitted multiple data cells as a unit, greatly improves efficiency of transmission.
Example IV
Fig. 4 is that a kind of structural block diagram of interrupt processing device, the device provided by the embodiment of the present invention four specifically include:
Message reception module 410, message writing module 420 and interrupt notification sending module 430.
Message reception module 410, for by versabus receive interrupt initiating equipment issue interrupt message, it is described in
Disconnected message includes interrupting device number and interruption transaction information；
Message writing module 420 interrupts caching for the interrupt message to be written via versabus；
Interrupt notification sending module 430 is used for the central processing for sending interrupt processing signal to central processing unit
Device reads the interrupt message for interrupting and storing in caching.
The technical solution of the embodiment of the present invention receives the interrupt message that each interruption initiating equipment issues by versabus,
Both it had avoided due to arranging signal wire bring congestion problems, and had in turn ensured the timing closure of each interrupt message；Meanwhile it interrupting slow
It deposits and is arranged on from the closer position CPU, it, can be from interrupting in caching quickly so that CPU is after receiving interrupt processing signal
Interrupt message is read, CPU is avoided and interrupt inquiry operation is carried out to each interruption initiating equipment, significantly reduce interrupt processing and prolong
Late.
Optionally, based on the above technical solution, the device number that interrupts is passed by the awuser signal of AXI bus
Defeated, the interruption transaction information is embedded in 32 bit data flows, is transmitted by the wdata signal of AXI bus.
Optionally, based on the above technical solution, the interrupt message further includes interrupt type information and interruption
Self-defined information, the interrupt type information and the self-defined information that interrupts are passed by the wdata signal of the AXI bus
It is defeated.
Optionally, based on the above technical solution, message writing module 420, specifically can be used for:
Multiple interrupt messages are coupled, by the interrupt message of multiple connections via general total in the form of data burst
Caching is interrupted in line write-in.
Optionally, based on the above technical solution, message reception module 410 specifically can be used for:
The interrupt message for interrupting initiating equipment and issuing is received by versabus, and is stored in and is interrupted in receiving register,
The interruption receiving register is the corresponding memory of preset address.
Optionally, based on the above technical solution, the interruption caching is that ring interruption caches, the ring interruption
Write pointer in caching increases after interrupt message is written, and the read pointer in the Circular buffer reads in central processing unit and interrupts
Increase after message.
Interruption processing method provided by any embodiment of the invention can be performed in above-mentioned apparatus, and it is corresponding to have execution method
Functional module and beneficial effect.The not technical detail of detailed description in the present embodiment, reference can be made to any embodiment of that present invention mentions
The method of confession.
Embodiment five
Fig. 5 is a kind of structural schematic diagram for equipment that the embodiment of the present invention five provides, as shown in figure 5, the equipment includes place
Manage device 50, memory 51, input unit 52 and output device 53；The quantity of processor 50 can be one or more in equipment,
In Fig. 5 by taking a processor 50 as an example；Device handler 50, memory 51, input unit 52 and output device 53 can pass through
Bus or other modes connect, in Fig. 5 for being connected by bus.
Memory 51 is used as a kind of computer readable storage medium, can be used for storing software program, journey can be performed in computer
Sequence and module, as the corresponding module of interrupt processing device in the embodiment of the present invention four (write by message reception module 410, message
Enter module 420 and interrupt notification sending module 430).Processor 50 is by running the software program being stored in memory 51, referring to
It enables and module thereby executing the various function application and data processing of equipment realizes above-mentioned interruption processing method.
Memory 51 can mainly include storing program area and storage data area, wherein storing program area can store operation system
Application program needed for system, at least one function；Storage data area, which can be stored, uses created data etc. according to terminal.This
Outside, memory 51 may include high-speed random access memory, can also include nonvolatile memory, for example, at least a magnetic
Disk storage device, flush memory device or other non-volatile solid state memory parts.In some instances, memory 51 can be further
Including the memory remotely located relative to processor 50, these remote memories can pass through network connection to equipment.It is above-mentioned
The example of network includes but is not limited to internet, intranet, local area network, mobile radio communication and combinations thereof.
Input unit 52 can be used for receiving the number or character information of input, and generate with the user setting of equipment and
The related key signals input of function control.Output device 53 may include that display screen etc. shows equipment.
Embodiment six
The embodiment of the present invention six also provides a kind of storage medium comprising machine executable instructions, and the equipment is executable to be referred to
It enables when being executed by device handler for executing a kind of interruption processing method, this method comprises:
The interrupt message for interrupting initiating equipment and issuing is received by versabus, the interrupt message includes interrupting device number
And interrupt transaction information；
The interrupt message is written via versabus and interrupts caching；
Interrupt processing signal is sent to central processing unit, reads in the interruption caching and stores for the central processing unit
Interrupt message.
Certainly, a kind of storage medium comprising machine executable instructions provided by the embodiment of the present invention, the equipment can
It executes instruction the method being not limited to the described above when being executed by device handler to operate, any implementation of the invention can also be performed
Relevant operation in interruption processing method provided by example.
By the description above with respect to embodiment, it is apparent to those skilled in the art that, the present invention
It can be realized by software and required common hardware, naturally it is also possible to which by hardware realization, but in many cases, the former is more
Good embodiment.Based on this understanding, technical solution of the present invention substantially in other words contributes to the prior art
Part can be embodied in the form of software products, which can store in computer readable storage medium
In, floppy disk, read-only memory (Read-Only Memory, ROM), random access memory (Random such as computer
Access Memory, RAM), flash memory (FLASH), hard disk or CD etc., including some instructions are with so that a computer is set
Standby (can be personal computer, server or the network equipment etc.) executes method described in each embodiment of the present invention.
It is worth noting that, included each unit and module are only pressed in the embodiment of above-mentioned interrupt processing device
It is divided, but is not limited to the above division according to function logic, as long as corresponding functions can be realized；In addition,
The specific name of each functional unit is also only for convenience of distinguishing each other, the protection scope being not intended to restrict the invention.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention
It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also
It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.
Claims (10)
1. interruption processing method characterized by comprising
By versabus receive interrupt initiating equipment issue interrupt message, the interrupt message include interrupt device number and
Interrupt transaction information；
The interrupt message is written via versabus and interrupts caching；
Interrupt processing signal is sent to central processing unit, is read for the central processing unit in being stored in the interruption caching
Disconnected message.
2. the method according to claim 1, wherein the versabus includes information transmission path multiplex system
In existing bus.
3. according to the method described in claim 2, it is characterized in that, the device number that interrupts is believed by the awuser of AXI bus
Number transmission, the interruptions transaction information are embedded in 32 bit data flows, pass through the wdata signal transmission of AXI bus.
4. according to the method described in claim 3, it is characterized in that, the interrupt message further include interrupt type information and in
Disconnected self-defined information, the interrupt type information and the self-defined information that interrupts are passed by the wdata signal of the AXI bus
It is defeated.
5. the interrupt message is written via versabus the method according to claim 1, wherein described
Disconnected caching includes:
Multiple interrupt messages are coupled, the interrupt message in the form of data burst by multiple connections is write via versabus
Enter to interrupt caching.
6. according to the method described in claim 5, it is characterized in that, described received by versabus interrupts initiating equipment sending
Interrupt message include:
The interrupt message for interrupting initiating equipment and issuing is received by versabus, and is stored in and is interrupted in receiving register, it is described
Interruption receiving register is the corresponding memory of preset address.
7. method according to claim 1 to 6, which is characterized in that the interruption caching is slow for ring interruption
It deposits, the write pointer in the ring interruption caching increases after interrupt message is written, and the read pointer in the Circular buffer is in
Central processor increases after reading interrupt message.
8. interrupt processing device characterized by comprising
Message reception module, for receiving the interrupt message for interrupting initiating equipment and issuing, the interrupt message by versabus
Including interrupting device number and interrupting transaction information；
Message writing module interrupts caching for the interrupt message to be written via versabus；
Interrupt notification sending module is read for sending interrupt processing signal to central processing unit for the central processing unit
It is described to interrupt the interrupt message stored in caching.
9. a kind of equipment, comprising: processor, memory and storage are on a memory and the computer that can run on a processor
Program, which is characterized in that the processor is realized when executing the computer program as of any of claims 1-7
Interruption processing method.
10. a kind of storage medium comprising machine executable instructions, which is characterized in that the machine executable instructions are by equipment
For executing such as interruption processing method of any of claims 1-7 when processor executes.
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| CN110674075A (en) * | 2019-09-27 | 2020-01-10 | 山东华芯半导体有限公司 | Method and system for realizing AXI bus broadcasting mechanism |
| CN112286657A (en) * | 2020-10-23 | 2021-01-29 | 海光信息技术股份有限公司 | Electronic device and interrupt processing method |
| WO2022022250A1 (en) * | 2020-07-29 | 2022-02-03 | 中兴通讯股份有限公司 | Interrupt processing method, apparatus and system, and device and storage medium |
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Application publication date: 20190628 |