CN109947231A - A kind of low-power consumption mode switching method based on system on chip - Google Patents

A kind of low-power consumption mode switching method based on system on chip Download PDF

Info

Publication number
CN109947231A
CN109947231A CN201910427211.6A CN201910427211A CN109947231A CN 109947231 A CN109947231 A CN 109947231A CN 201910427211 A CN201910427211 A CN 201910427211A CN 109947231 A CN109947231 A CN 109947231A
Authority
CN
China
Prior art keywords
clock frequency
task
duration
cpu
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910427211.6A
Other languages
Chinese (zh)
Other versions
CN109947231B (en
Inventor
朱永会
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Core Wing Information Technology (nanjing) Co Ltd
Core Wing Information Technology (shanghai) Co Ltd
Original Assignee
Core Wing Information Technology (nanjing) Co Ltd
Core Wing Information Technology (shanghai) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Core Wing Information Technology (nanjing) Co Ltd, Core Wing Information Technology (shanghai) Co Ltd filed Critical Core Wing Information Technology (nanjing) Co Ltd
Priority to CN201910427211.6A priority Critical patent/CN109947231B/en
Publication of CN109947231A publication Critical patent/CN109947231A/en
Application granted granted Critical
Publication of CN109947231B publication Critical patent/CN109947231B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Power Sources (AREA)

Abstract

The present embodiments relate to electronic information technical fields, disclose a kind of low-power consumption mode switching method based on system on chip.It include: the first clock frequency request for obtaining first task to be run and sending, wherein the first clock frequency request is for characterizing the first task needs at least cpu clock frequency of the first clock frequency and needing to complete in the first duration to execute;Obtain the second clock frequency request that the second task to be run is sent, wherein, the priority of second task is higher than the priority of first task, and second clock frequency request is for characterizing the second task needs at least cpu clock frequency of second clock frequency and needing to complete in the second duration to execute;According to the clock frequency for having executed duration adjustment CPU of the first clock frequency, the first duration, second clock frequency, the second duration and first task.Low-power consumption mode switching method provided by the invention based on system on chip, the low-power consumption mode that can be realized system on chip automatically switch, and reduce human cost.

Description

A kind of low-power consumption mode switching method based on system on chip
Technical field
The present embodiments relate to electronic information technical field, in particular to a kind of low-power consumption mode based on system on chip Switching method.
Background technique
Currently, system on chip has been widely used in the portable and stronger product of mobility, and these products are often It powers by limited battery, therefore, when designing system on chip, how to reduce power consumption, extend system as much as possible Just become to those skilled in the art using the time extremely important.Traditional low power dissipation design mode generally requires low-power consumption Which kind of implementor any state fitted into, is then existed again firstly the need of the operating mode for understanding each module level under the conditions of One unified position, which is made, once summarizes again how artificial decision switches.
At least there are the following problems in the prior art for inventor's discovery: the method for above-mentioned realization low-power consumption mode switching is main Dependence is manually designed according to the software and hardware difference of system on chip, is compared and is difficult to realize, non-to the challenge of low-power consumption implementor Chang Gao, human cost are very big.
Summary of the invention
Embodiment of the present invention is designed to provide a kind of low-power consumption mode switching method based on system on chip, can It realizes that the low-power consumption mode of system on chip automatically switches, reduces human cost.
In order to solve the above technical problems, embodiments of the present invention provide a kind of low-power consumption mode based on system on chip Switching method, comprising: obtain the first clock frequency request that first task to be run is sent, wherein the first clock frequency For characterizing, the first task needs at least cpu clock frequency of the first clock frequency and needs are in the first duration for rate request Interior completion executes;The clock frequency of CPU is adjusted to first clock frequency, under first clock frequency described in operation First task;When obtaining the execution of second clock frequency request and the first task that the second task wait run is sent It is long, wherein the priority of second task is higher than the priority of the first task, and the second clock frequency request is used for Second task is characterized to need at least cpu clock frequency of second clock frequency and need to complete in the second duration to execute; According to first clock frequency, first duration, the second clock frequency, second duration and described first The clock frequency for having executed duration adjustment CPU of business.
Embodiment of the present invention in terms of existing technologies, by obtain that first task wait run sends first when Clock frequency request, and the clock frequency of CPU is adjusted to first clock frequency, institute is run under first clock frequency State first task, obtain the second clock frequency request that the second task to be run is sent, wherein second task it is preferential Grade is higher than the priority of the first task, according to first clock frequency, first duration, second clock frequency The clock frequency for having executed duration adjustment CPU of rate, second duration and the first task, that is to say, that the present invention The clock frequency request sent by obtaining task, and the clock frequency request dynamic sent according to task adjusts system on chip Clock frequency is realized without redesigning low-power consumption handover scheme according to the software and hardware difference of each system on chip The low-power consumption mode of system on chip automatically switches, and reduces human cost;Simultaneously as in the getting higher priority of the task When, when comprehensively considering the execution of the first clock frequency, the first duration, second clock frequency, the second duration and first task The long clock frequency to adjust CPU, thus in the clock frequency requirement and deadline need that meet first task and the second task Under the premise of asking, system on chip power consumption is reduced.
In addition, when the second clock frequency is less than or equal to first clock frequency, it is described according to described first Clock frequency, first duration, the second clock frequency, second duration and the first task execution when The clock frequency of long adjustment CPU, specifically, calculating the third clock frequency: f according to the following formula1*t1+f2*t2=f1*T+ X*(t1- T);Wherein, (t1- T) it is greater than the first preset threshold, f1For the first clock frequency, t1For the first duration, f2For second clock Frequency, t2For the second duration, T is the execution duration of first task, and X is third clock frequency;Suspend the first task, adjusts The clock frequency of whole CPU is third clock frequency, and second task is run under the third clock frequency;When described second When task execution finishes, continued to run at the pause of the first task under the third clock frequency described first Business.
In addition, when the second clock frequency is greater than first clock frequency, it is described according to the first clock frequency The duration of the execution adjustment of rate, first duration, the second clock frequency, second duration and the first task The clock frequency of CPU, specifically, calculating the third clock frequency: f according to the following formula1*t1=f1* T+X*(t1-t2- T); Wherein, (t1-t2- T) it is greater than the second preset threshold, f1For the first clock frequency, t1For the first duration, t2For the second duration, T The execution duration of one task, X are third clock frequency;Suspend the first task, when the clock frequency for adjusting CPU is second Clock frequency runs second task under the second clock frequency;When second task execution finishes, CPU is adjusted Clock frequency be third clock frequency, institute is continued to run at the pause of the first task under the third clock frequency State first task.
In addition, before first clock frequency request for obtaining first task transmission to be run, further includes: work as CPU When being in idle condition, the clock frequency for controlling CPU is initial clock frequency, wherein the initial clock frequency is less than described First clock frequency.So set, clock frequency excessively high when avoiding operation idle task causes the power consumption mistake of system on chip Big problem.
In addition, further includes: when the first task is finished, obtain the clock frequency that the first task is sent Rate ending request and the clock frequency for controlling CPU are initial clock frequency.By when first task is completed, control CPU when Clock frequency is initial clock frequency, and excessively high clock frequency causes the power consumption of system on chip when so as to avoid operation idle task Excessive problem.
In addition, the initial clock frequency is 32K or 0.Due in the state that original state and task are completed, nothing Deadline requires, and by setting a very small clock frequency or directly cutting off system clock, can reduce the power consumption of system.
Detailed description of the invention
One or more embodiments are illustrated by the picture in corresponding attached drawing, these exemplary theorys The bright restriction not constituted to embodiment, the element in attached drawing with same reference numbers label are expressed as similar element, remove Non- to have special statement, composition does not limit the figure in attached drawing.
Fig. 1 is the process for the low-power consumption mode switching method based on system on chip that first embodiment of the invention provides Figure;
Fig. 2 is the flow chart for the low-power consumption mode switching method based on system on chip that second embodiment of the invention provides;
Fig. 3 is the flow chart for the low-power consumption mode switching method based on system on chip that third embodiment of the invention provides;
Fig. 4 is the signal transmission knot for the low-power consumption mode switching method based on system on chip that third embodiment of the invention provides Structure schematic diagram;
Fig. 5 is the structural schematic diagram for the system on chip that four embodiment of the invention provides.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with attached drawing to the present invention Each embodiment be explained in detail.However, it will be understood by those skilled in the art that in each embodiment party of the present invention In formula, in order to make the reader understand this application better, many technical details are proposed.But even if without these technical details And various changes and modifications based on the following respective embodiments, the application technical solution claimed also may be implemented.
The first embodiment of the present invention is related to a kind of low-power consumption mode switching method based on system on chip, such as Fig. 1 institute Show, comprising the following steps:
S11: when system on chip is in idle condition, the clock frequency of system on chip is controlled as initial clock frequency.
Specifically, in this step, under original state, idle task is running in system, at this point, in control sheet The clock frequency of system is initial clock frequency, wherein initial clock frequency is 32K or 0.Due in original state and task In the state of completing, no deadline is required, by setting a very small clock frequency or directly cutting off system clock, energy Enough reduce the power consumption of system.
S12: the first clock frequency request that first task to be run is sent is obtained.
Specifically, in this step, the first clock frequency request needs at least first for characterizing the first task The cpu clock frequency and needs of clock frequency are completed to execute in the first duration, and the first clock frequency is greater than initial clock frequency Rate indicates that first task needs at least cpu clock frequency of the first clock frequency and must complete to hold in the first duration Row.
S13: the clock frequency of system on chip is adjusted to the first clock frequency, is run under the first clock frequency first Business.
Specifically, in this step, since system clock frequency is clock frequency needed for first task, also, At this time again without other task requests, system clock is completely used for first task, it therefore meets the demand of first task, meanwhile, it is That unites is least in power-consuming.
S14: when obtaining the execution of second clock frequency request and first task that the second task wait run is sent It is long.
Specifically, in this step, the priority of the second task is higher than the priority of first task, so that system can be excellent First carry out the second task;Second clock frequency request is used to characterize the CPU that second task needs at least second clock frequency Clock frequency and needs are completed to execute in the second duration;Occupying cpu clock frequency in the operation of known first task is first Under the premise of clock frequency, by obtaining the execution duration of first task, the completed task of first task can be calculated Amount, to obtain the task amount that first task residue needs to complete.
S15: according to having held for the first clock frequency, the first duration, second clock frequency, the second duration and first task The clock frequency of row duration adjustment CPU.
Embodiment of the present invention in terms of existing technologies, by obtain that first task wait run sends first when Clock frequency request, and the clock frequency of system on chip is adjusted to the first clock frequency, first is run under the first clock frequency Task obtains the second clock frequency request that the second task to be run is sent, wherein the priority of second task is higher than The priority of the first task, the second clock frequency request include completing the second clock frequency of second required by task Rate, according to first clock frequency, first duration, the second clock frequency, second duration and described The clock frequency for having executed duration adjustment CPU of one task, that is to say, that the clock frequency that the present invention is sent by acquisition task Request, and the clock frequency request dynamic sent according to task adjusts the clock frequency of system on chip, without according to each The software and hardware difference of system on chip redesigns low-power consumption handover scheme, and the low-power consumption mode for realizing system on chip is cut automatically It changes, reduces human cost;Simultaneously as comprehensively considering the first clock frequency, in the getting higher priority of the task One duration, second clock frequency, the second duration and first task have executed duration to adjust the clock frequency of CPU, thus Under the premise of meeting the clock frequency requirement and deadline demand of first task and the second task, system on chip function is reduced Consumption.
Second embodiment of the present invention is related to a kind of low-power consumption mode switching method based on system on chip.Second implements Mode is roughly the same with first embodiment, is in place of the main distinction: in second embodiment of the invention, when described second It is described according to first clock frequency, first duration, institute when clock frequency is less than or equal to first clock frequency The clock frequency for having executed duration adjustment CPU of second clock frequency, second duration and the first task is stated, specifically To calculate the third clock frequency: f according to the following formula1*t1+f2*t2=f1* T+X*(t1- T);Wherein, (t1- T) it is greater than First preset threshold, f1For the first clock frequency, t1For the first duration, f2For second clock frequency, t2For the second duration, T The execution duration of one task, X are third clock frequency;Suspend the first task, when the clock frequency for adjusting CPU is third Clock frequency runs second task under the third clock frequency;When second task execution finishes, described The first task is continued to run from pause place of the first task under three clock frequencies.
The low-power consumption mode switching method based on system on chip that present embodiment provides, as shown in Fig. 2, including following step It is rapid:
S21: when system on chip is in idle condition, the clock frequency of system on chip is controlled as initial clock frequency.
S22: the first clock frequency request that first task to be run is sent is obtained.
S23: the clock frequency of system on chip is adjusted to the first clock frequency, is run under the first clock frequency first Business.
S24: when obtaining the execution of second clock frequency request and first task that the second task wait run is sent It is long.
Specifically, in this step, the priority of the second task is higher than the priority of first task, so that system can be excellent First carry out the second task;Second clock frequency request is used to characterize the CPU that the first task needs at least the first clock frequency Clock frequency and needs are completed to execute in the first duration;Second clock frequency is less than or equal to the first clock frequency.
S25: according to having held for the first clock frequency, the first duration, second clock frequency, the second duration and first task Row duration obtains third clock frequency.
Specifically, in this step, third clock frequency: f is calculated according to the following formula1*t1+f2*t2=f1*T+X* (t1- T) (secondary formula is suitable for t1Compare t2Big more situation);Wherein, (t1- T) it is greater than the first preset threshold, f1It is first Clock frequency, t1For the first duration, f2For second clock frequency, t2For the second duration, T is the execution duration of first task, X For third clock frequency.Wherein, f1*t1Indicate the task amount that first task needs to complete in total, f2*t2Indicate that the second task is total The task amount for needing to complete altogether, f1* t indicates the completed task amount of first task, X*(t1- T) it indicates to exist by clock frequency of X t1The task amount that-T can be completed this period, the formula principle constant according to first task and the second task total amount, simultaneously Meet the completion duration of first task in t1Interior, the second task completion duration is in t2It is interior.
S26: the clock frequency of system on chip is adjusted to third clock frequency by pause first task, in third clock frequency The second task is run under rate.
S27: when the second task execution finishes, is continued to run at the pause of first task under third clock frequency One task.
Step S21, S22, S23 in present embodiment is similar with step S11, S12, S13 in first embodiment, herein It repeats no more.
In order to make it easy to understand, below by for example:
Firstly, it is idle task that original state, which only has idle task(idle task, Task is the task letter operated on CPU Number) run in system, at this point, system only needs work in minimum clock frequency 32K, the no deadline is required, theoretically this A clock can also be cut off to save power consumption.
When there is task nest, such as the priority ratio task 1 of task 2 high, and the second task of Task 2() frequency Rate demand is equal to or less than Task 1(first task).
Task 1, which is first issued, to be requested and start to execute: clock frequency is also switched to by 10M@1ms, low power consumption control device 10M。
In 1 implementation procedure of Task, task 2 issues request 10M@10us(10MHz@10us and indicates: this task needs At least the cpu clock frequency of 10MHz and must be completed in 10us execute).Task 2 can be preferentially executed at this time, and cpu clock is cut Change that steps are as follows:
Cpu clock confirms task1 runing time, for example is 100us, if guarantee the switching while meeting task 1 and task 2 Request.If X is the clock frequency completing the remaining task of task 1 and task 2 and needing, then: 10M*1ms+10M*10us =10M*100us+X*(1ms-100us), obtain X=10.112M.
Task 2, which is executed, to be started to terminate up to Task 1 all to use clock frequency 10.112M, is issued at the end of Task 1 Clock frequency request 0, CPU return IDLE task(idle task), low power consumption control device can switch back into again clock IDLE shape State (idle state) clock frequency.
Embodiment of the present invention in terms of existing technologies, obtains the first clock frequency that first task to be run is sent Rate request, and is adjusted to the first clock frequency for the clock frequency of system on chip, brings into operation first under the first clock frequency Task, that is to say, that the clock frequency request that the present invention is sent by acquisition task, and asked according to the clock frequency that task is sent Dynamic is asked to adjust the clock frequency of system on chip, it is low without being redesigned according to the software and hardware difference of each system on chip Power consumption handover scheme, the low-power consumption mode for realizing system on chip automatically switch, and reduce human cost;Meanwhile, it is capable to depositing In task nest and when the clock frequency requirement of the second task is less than or equal to the clock frequency requirement of first task, pause First task, according to the execution of the first clock frequency, the first duration, second clock frequency, the second duration and first task Duration obtains third clock frequency, the clock frequency of system on chip is adjusted to third clock frequency, under third clock frequency The second task is run, when second task execution finishes, from the temporary of the first task under the third clock frequency Stop place and continue to run the first task, thus in the clock frequency requirement and the deadline that meet first task and the second task Under the premise of demand, the clock frequency of system is reduced;Also, by P=VI=VQ/t=CV2F is it is found that in CV2In the case where constant, With the reduction of system clock frequency f, the power consumption p of system on chip will reduce therewith, so as to reduce the power consumption of system.
Third embodiment of the present invention is related to a kind of low-power consumption mode switching method based on system on chip.Third is implemented Mode is roughly the same with second embodiment, is in place of the main distinction: in second embodiment of the invention, when described second It is described according to first clock frequency, first duration, described second when clock frequency is greater than first clock frequency The clock frequency for having executed duration adjustment CPU of clock frequency, second duration and the first task, specifically, root The third clock frequency: f is calculated according to following formula1*t1=f1* T+X*(t1-t2- T);Wherein, (t1-t2- T) it is greater than second Preset threshold, f1For the first clock frequency, t1For the first duration, t2For the second duration, T is the execution duration of first task, X For third clock frequency;Suspend the first task, the clock frequency for adjusting CPU is second clock frequency, at described second Second task is run under clock frequency;When second task execution finishes, the clock frequency for adjusting CPU is third clock Frequency continues to run the first task under the third clock frequency at the pause of the first task.
The low-power consumption mode switching method based on system on chip that present embodiment provides, as shown in figure 3, including following step It is rapid:
S31: when system on chip is in idle condition, the clock frequency of system on chip is controlled as initial clock frequency.
S32: the first clock frequency request that first task to be run is sent is obtained.
S33: the clock frequency of system on chip is adjusted to the first clock frequency, is run under the first clock frequency first Business.
S34: when obtaining the execution of second clock frequency request and first task that the second task wait run is sent It is long.
Specifically, in this step, the priority of the second task is higher than the priority of first task, second clock frequency For characterizing, the first task needs at least cpu clock frequency of the first clock frequency and needs are in the first duration for request It completes to execute;When the second clock frequency is greater than first clock frequency.
S35: according to having held for the first clock frequency, the first duration, second clock frequency, the second duration and first task Row duration obtains third clock frequency.
Specifically, in this step, third clock frequency: f is calculated according to the following formula1*t1=f1* T+X*(t1-t2- T);Wherein, (t1-t2- T) it is greater than the second preset threshold, f1For the first clock frequency, t1For the first duration, t2For the second duration, T For the execution duration of first task, X is third clock frequency.Wherein, f1*t1Indicate times that first task needs to complete in total Business amount, f1* t indicates the completed task amount of first task, X*(t1-t2-T it) indicates using X to be clock frequency in t1-t2-When this section of T Between the task amount that can complete, the formula principle constant according to first task amount, while meeting the completion duration of first task In t1Interior, the second task completion duration is in t2It is interior.
S26: the clock frequency of system on chip is adjusted to second clock frequency by pause first task, in second clock frequency The second task is run under rate.
S27: when the second task execution finishes, the clock frequency for adjusting CPU is third clock frequency, in third clock frequency First task is continued to run from pause place of first task under rate.
S38: it when first task is finished, obtains the clock frequency ending request that first task is sent and controls and be The clock frequency of system is initial clock frequency.
Step S31, S32, S33 in present embodiment is similar with step S21, S22, S23 in second embodiment, herein It repeats no more.
In order to make it easy to understand, below by for example:
Firstly, it is idle task that original state, which only has idle task(idle task, Task is the task letter operated on CPU Number) run in system, at this point, system only needs work in minimum clock frequency 32K, the no deadline is required, theoretically this A clock can also be cut off to save power consumption.
When there is task nest, such as the second task of task 2() priority ratio task 1(first task) it is high, and The higher frequency of Task 2, which can satisfy, has executed task 1 and task 2.
Task 1, which is first issued, to be requested and start to execute: clock frequency is also switched to by 10M@1ms, low power consumption control device 10M。
In 1 implementation procedure of Task, task 2 issues request 50M@10us.When can preferentially execute 2, CPU task at this time Clock switch step is as follows:
Cpu clock is switched to the request 50M of task 2 and confirms the time that task 1 has been run, for example is 100us, if protecting It demonstrate,proves the switching while meeting the request of task 1 and task 2.If X is that task 1 completes remaining task needs when exiting task 2 Clock frequency, then: 10M*1ms=10M*100us+X*(1ms-100us-10us), obtain X=10.12M.
At the end of Task 2, clock frequency is switched to 10.12M, and 1 remainder of Task can be completed with the frequency of 10.12M.
Clock frequency request 0.CPU is issued at the end of Task 1 returns IDLE task.
That is, first suspending Task 1 and the clock frequency of system being adjusted to 50M to run Task 2;Until Task 2 terminates, and the clock frequency of system is adjusted to 10.12M to run Task 1, issues clock frequency at the end of Task 1 0, CPU of request returns IDLE task(idle task), it is (idle that low power consumption control device can switch back into again clock IDLE state State) clock frequency.
It is understood that as (t1- T) be less than preset threshold, i.e. T and t1 relatively when, need to guarantee first task It has first carried out, that is, first carried out the remaining task of first task, then started to execute the second task again, at this point, according to following public affairs Formula calculates clock frequency X:f1*t1+f2*t2=f1*T+X*(t1-T)+X*(t2-(t1-T))=f1*T+X*t2.That is, from The remaining task for executing first task, to the second task has been executed, cpu clock frequency is X.Generally speaking, as long as two are appointed It is engaged in all completing task just within the time for meeting oneself request.
Typical mission handoff scenario is only listed above, may also other scenes be existed as the case may be.Such as if When the request of high priority is all bigger than the first request to the request of frequency and time, it may need this when to be switched to ratio The frequency scene that first frequency and second frequency are more increased is met the requirements, and to be otherwise treated as the request can not realize.Here It not set forth one by one.
In practical applications, as shown in figure 4, to operate in the signal transmission structure between mission function and CPU on CPU Schematic diagram, wherein Task { k } _ lpreq is to request from task { k } low-power consumption, and Task_idle_lpreq is nonfunctional task The low-power consumption of idle state when request is requested, and can be transferred to lowest operating frequency or be entered corresponding system low-power consumption mould Formula, such as DEEPSLEEP(SoC deep sleep mode)/SLEEP(second level Low-power-consumptiodormancy dormancy mode)/STANDBY(three-level suspend mode Mode).
TableTask_lpreq is defined as:
Table CPU_LPCFG is defined as:
[11:8] [7:4] [3:0]
Request of the CPU to system operating mode Request of the CPU to operating voltage To the frequency request of CPU
Embodiment of the present invention in terms of existing technologies, obtains the first clock frequency that first task to be run is sent and asks It asks, and the clock frequency of system on chip is adjusted to the first clock frequency, bring into operation first task under the first clock frequency, That is, the clock frequency request that the present invention is sent by acquisition task, and it is dynamic according to the clock frequency request that task is sent State adjusts the clock frequency of system on chip, without redesigning low-power consumption according to the software and hardware difference of each system on chip Handover scheme, the low-power consumption mode for realizing system on chip automatically switch, and reduce human cost;Meanwhile, it is capable to appoint existing When business is nested, the first clock frequency, the first duration, second clock frequency, the second duration and first task have been comprehensively considered Duration is executed to adjust the clock frequency of CPU, thus in the clock frequency requirement and the completion that meet first task and the second task Under the premise of time demand, the clock frequency of system is reduced, by P=VI=VQ/t=CV2F it is found that system clock frequency reduction It further reduced the power consumption of system on chip.
The step of various methods divide above, be intended merely to describe it is clear, when realization can be merged into a step or Certain steps are split, multiple steps are decomposed into, as long as including identical logical relation, all in the protection scope of this patent It is interior;To adding inessential modification in algorithm or in process or introducing inessential design, but its algorithm is not changed Core design with process is all in the protection scope of the patent.
4th embodiment of the invention is related to a kind of system on chip, as shown in Figure 5, comprising: m CPU(refers in particular to run embedding Enter the central processing unit of formula software), n hardware adaptor (Block) and be connected with m CPU and n hardware adaptor low Power eonsumption controller, wherein only carry out simple mark position bit manipulation in interrupt control unit, specific function realization be all It is completed in each task.Specifically, whether each Block judges automatically the module in working condition, if the module is Work is not needed or in idle state, so that it may which his block_idle home position signal is then passed to low power consumption control Device, low power consumption control device can close the clock even power supply for giving the block after detecting the idle signal, to realize piece The low-power consumption mode of upper system automatically switches, and reduces the power consumption of system on chip.
In practical applications, finally demand of each task to cpu clock frequency, low power consumption control device can be arranged system CPU_LPCFG issues the request to hardware, and hardware low power consumption control device summarizes the demand of CPU and other peripheral hardwares again and then adjusts again Whole optimal power consumption system state, the following are the realization functions of low power consumption control task: selecting specific system operating mode, selection The working frequency of CPU, the operating voltage for selecting CPU.
It will be understood by those skilled in the art that the respective embodiments described above are to realize specific embodiments of the present invention, And in practical applications, can to it, various changes can be made in the form and details, without departing from the spirit and scope of the present invention.

Claims (6)

1. a kind of low-power consumption mode switching method based on system on chip characterized by comprising
Obtain the first clock frequency request that first task to be run is sent, wherein first clock frequency request is used for The first task is characterized to need at least cpu clock frequency of the first clock frequency and need to complete in the first duration to execute;
The clock frequency of CPU is adjusted to first clock frequency, is run under first clock frequency described first Business;
The execution duration of second clock frequency request and the first task that the second task to be run is sent is obtained, In, the priority of second task is higher than the priority of the first task, and the second clock frequency request is for characterizing Second task needs at least cpu clock frequency of second clock frequency and needs to complete in the second duration to execute;
According to first clock frequency, first duration, the second clock frequency, second duration and described The clock frequency for having executed duration adjustment CPU of one task.
2. the low-power consumption mode switching method according to claim 1 based on system on chip, which is characterized in that when described When two clock frequencies are less than or equal to first clock frequency,
It is described according to first clock frequency, first duration, the second clock frequency, second duration and institute The clock frequency for having executed duration adjustment CPU for stating first task, specifically, calculating the third clock according to the following formula Frequency:
f1*t1+f2*t2=f1* T+X*(t1- T);
Wherein, (t1- T) it is greater than the first preset threshold, f1For the first clock frequency, t1For the first duration, f2For second clock frequency, t2For the second duration, T is the execution duration of first task, and X is third clock frequency;
Suspend the first task, the clock frequency for adjusting CPU is third clock frequency, is run under the third clock frequency Second task;
When second task execution finishes, after reforwarding at the pause of the first task under the third clock frequency The row first task.
3. the low-power consumption mode switching method according to claim 1 based on system on chip, which is characterized in that when described When two clock frequencies are greater than first clock frequency;
It is described according to first clock frequency, first duration, the second clock frequency, second duration and institute The clock frequency for having executed duration adjustment CPU for stating first task, specifically, calculating the third clock according to the following formula Frequency:
f1*t1=f1* T+X*(t1-t2- T);
Wherein, (t1-t2- T) it is greater than the second preset threshold, f1For the first clock frequency, t1For the first duration, t2For the second duration, T For the execution duration of first task, X is third clock frequency;
Suspend the first task, the clock frequency for adjusting CPU is second clock frequency, is run under the second clock frequency Second task;
When second task execution finishes, the clock frequency for adjusting CPU is third clock frequency, in the third clock frequency The first task is continued to run from pause place of the first task under rate.
4. the low-power consumption mode switching method according to claim 1 based on system on chip, which is characterized in that the acquisition Before the first clock frequency request that first task to be run is sent, further includes:
When CPU is in idle condition, the clock frequency for controlling CPU is initial clock frequency, wherein the initial clock frequency Less than first clock frequency.
5. the low-power consumption mode switching method according to claim 4 based on system on chip, which is characterized in that further include:
When the first task is finished, obtains the clock frequency ending request that the first task is sent and control The clock frequency of CPU processed is initial clock frequency.
6. the low-power consumption mode switching method according to claim 5 based on system on chip, which is characterized in that described initial Clock frequency is 32K or 0.
CN201910427211.6A 2019-05-22 2019-05-22 A kind of low-power consumption mode switching method based on system on chip Active CN109947231B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910427211.6A CN109947231B (en) 2019-05-22 2019-05-22 A kind of low-power consumption mode switching method based on system on chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910427211.6A CN109947231B (en) 2019-05-22 2019-05-22 A kind of low-power consumption mode switching method based on system on chip

Publications (2)

Publication Number Publication Date
CN109947231A true CN109947231A (en) 2019-06-28
CN109947231B CN109947231B (en) 2019-08-02

Family

ID=67017224

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910427211.6A Active CN109947231B (en) 2019-05-22 2019-05-22 A kind of low-power consumption mode switching method based on system on chip

Country Status (1)

Country Link
CN (1) CN109947231B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112486309A (en) * 2020-11-27 2021-03-12 广东小天才科技有限公司 Method for determining duration corresponding to idle state, control chip and electronic equipment
CN112486311A (en) * 2020-12-08 2021-03-12 南昌华勤电子科技有限公司 Low-power-consumption control method and system of embedded system and storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1776568A (en) * 2005-11-28 2006-05-24 北京中星微电子有限公司 Task-based dynamic CPU working frequency regulating method and system
CN102135906A (en) * 2011-03-18 2011-07-27 深圳市民德电子科技有限公司 Power consumption control method and system orienting to embedded real-time operating system
US20140173150A1 (en) * 2012-12-18 2014-06-19 Samsung Electronics Co., Ltd. System on chip, method of operating the same, and apparatus including the same
CN104407690A (en) * 2014-12-19 2015-03-11 中科创达软件股份有限公司 Method, device and mobile terminal for regulating operating frequency of CPU (Central Processing Unit)

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1776568A (en) * 2005-11-28 2006-05-24 北京中星微电子有限公司 Task-based dynamic CPU working frequency regulating method and system
CN102135906A (en) * 2011-03-18 2011-07-27 深圳市民德电子科技有限公司 Power consumption control method and system orienting to embedded real-time operating system
US20140173150A1 (en) * 2012-12-18 2014-06-19 Samsung Electronics Co., Ltd. System on chip, method of operating the same, and apparatus including the same
CN104407690A (en) * 2014-12-19 2015-03-11 中科创达软件股份有限公司 Method, device and mobile terminal for regulating operating frequency of CPU (Central Processing Unit)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112486309A (en) * 2020-11-27 2021-03-12 广东小天才科技有限公司 Method for determining duration corresponding to idle state, control chip and electronic equipment
CN112486309B (en) * 2020-11-27 2024-05-28 广东小天才科技有限公司 Method for determining corresponding duration of idle state, control chip and electronic equipment
CN112486311A (en) * 2020-12-08 2021-03-12 南昌华勤电子科技有限公司 Low-power-consumption control method and system of embedded system and storage medium
CN112486311B (en) * 2020-12-08 2023-07-14 南昌华勤电子科技有限公司 Low-power consumption control method and system of embedded system and storage medium

Also Published As

Publication number Publication date
CN109947231B (en) 2019-08-02

Similar Documents

Publication Publication Date Title
CN109947231B (en) A kind of low-power consumption mode switching method based on system on chip
CN100461072C (en) Powder supply controlling method and device of a multi-core processor
TWI592802B (en) Thermally adaptive quality-of-service levels
ul Islam et al. Hybrid DVFS scheduling for real-time systems based on reinforcement learning
TWI786091B (en) Integrated circuit and method for power management using duty cycles
JP6185208B1 (en) Dynamic power rail control for a cluster of loads
TWI553551B (en) Thermal mitigation using selective task modulation
TW201403299A (en) Central processor control method
EP2356537B1 (en) Active power management
CN1993669A (en) Power management coordination in multi-core processors
JP2006185407A (en) Peak power-controlling apparatus and method
US7992015B2 (en) Processor performance state optimization
JP2013200858A (en) Adaptive voltage scaling using serial interface
WO2021043300A1 (en) Operation frequency adjustment method for switched power supply, and device
CN108845911A (en) A kind of SOC chip bus dynamic multi-level frequency regulating circuit and method
CN101286854A (en) Ethernet power supply method and system
EP3189441A1 (en) Frequency and power management
CN112346828B (en) Task configuration method, device and storage medium based on distributed heterogeneous system
US10001830B2 (en) Input-output device management using dynamic clock frequency
KR20140026308A (en) Apparatus and method for managing power in multi-core system
US20130318372A1 (en) Dynamic load step calculation for load line adjustment
TW201237608A (en) VR power mode interface
WO2012001776A1 (en) Multicore system, method of scheduling and scheduling program
US9075608B2 (en) Integrated circuit
JP7474549B1 (en) Method for controlling power supply device and power supply device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant