CN109936716B - Display driving realization method and system - Google Patents

Display driving realization method and system Download PDF

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Publication number
CN109936716B
CN109936716B CN201910229087.2A CN201910229087A CN109936716B CN 109936716 B CN109936716 B CN 109936716B CN 201910229087 A CN201910229087 A CN 201910229087A CN 109936716 B CN109936716 B CN 109936716B
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display
signal
equipment
processor
gpu
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CN109936716A (en
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吴泽
张宝祺
黄帅
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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Abstract

The invention provides a method and a system for realizing display driving, which comprises the following steps: acquiring display driving information according to the unified extensible firmware interface specification firmware, and compiling and generating the display driving information according to the unified extensible firmware interface specification; loading display drive information when running to a drive execution environment; when the bridge chip is accessed and the existence of the display equipment is inquired, storing the physical address of the video memory of the GPU into the display controller; configuring a line-field synchronizing signal according to the screen resolution of the display; and when the starting equipment is operated to select the environment, outputting the display data to the display for display. The invention can realize the drive loading and the equipment initialization of the display equipment in the starting process of the operating system when the bridge chip is connected with the processor through the HT bus, so that the display equipment can be normally operated before the equipment is started and enters the operating system.

Description

Display driving realization method and system
Technical Field
The invention relates to the field of computer firmware, in particular to a method and a system for realizing display driving.
Background
A computer device typically undergoes four steps of powering on the device, initializing the device, booting an operating system, and entering the operating system at startup.
Currently, the Unified Extensible Firmware Interface (UEFI) specification is developed from the Extensible Firmware Interface (EFI) specification. Under the X86 processor and the bridge chip architecture, during the system startup process, driver loading and device initialization of the display device are required to perform display output of the display screen.
However, in the current UEFI firmware starting process, when a bridge chip is connected to a processor of a Microprocessor with interlocked pipeline (MIPS) architecture through an HT bus, the processes of driving and loading a display device and initializing the device cannot be realized.
Disclosure of Invention
The invention provides a method and a system for realizing display driving, which aim to solve the problem that the driving loading and equipment initialization processes of display equipment cannot be realized when a bridge chip is connected with a processor through an HT bus in the prior art.
According to a first aspect of the present invention, there is provided a method for implementing a display driver, applied to a system for implementing a display driver, where the system includes a processor and a bridge chip, the processor is connected to the bridge chip through an HT bus, and a GPU and a display controller are integrated on the bridge chip, the method includes:
acquiring display driving information according to the unified extensible firmware interface specification firmware, wherein the display driving information is compiled and generated according to the unified extensible firmware interface specification;
loading the display driving information when the display driving information is operated to a driving execution environment;
when inquiring that display equipment connected with the bridge chip exists by accessing the bridge chip, storing a physical address of a video memory of the GPU into the display controller and configuring a line-field synchronizing signal according to the screen resolution of the display equipment;
and when the environment is selected by the starting equipment, outputting display data to the display equipment for display.
Optionally, the outputting the display data to the display device for displaying includes:
writing the display data into a video memory of the GPU;
extracting the display data from the video memory and converting the display data into a general parallel video interface DVO signal;
converting the DVO signal into a first signal corresponding to the signal input interface type according to the signal input interface type of the display device;
transmitting the first signal to a signal input interface of the display device to enable the display device to display the received first signal.
Optionally, the first signal includes a video graphics array VGA signal or a high definition multimedia interface HDMI signal.
Optionally, the querying, by accessing the bridge piece, that there is a display device connected to the bridge piece includes:
accessing the bridge chip to obtain the PCI (peripheral component interconnect) standard identifier of the equipment;
and if the PCI identifications of the GPU and the display controller are contained in the PCI identifications of the equipment, determining that the display equipment exists.
Optionally, the processor is a microprocessor MIPS without an internal interlocking pipeline stage.
According to a second aspect of the present invention, there is provided a system for implementing display driving, including a processor, a bridge chip, and a display device, where the processor is connected to the bridge chip through an HT bus, the display device is connected to the processor through the bridge chip, and a GPU and a display controller are integrated on the bridge chip; the processor comprises an acquisition module, a loading module, an execution module and an output module;
the acquisition module is used for acquiring display driving information according to the unified extensible firmware interface specification firmware, and the display driving information is compiled and generated according to the unified extensible firmware interface specification;
the loading module is used for loading the display driving information when running to a driving execution environment;
the execution module is used for storing a physical address of a video memory of the GPU into the display controller and configuring a line-field synchronizing signal according to the screen resolution of the display device when the display device connected with the bridge chip exists by accessing the bridge chip;
and the output module is used for outputting display data to the display equipment for display when the starting equipment is operated to select the environment.
Optionally, the system for implementing display driving further includes a signal conversion chip, an input end of the signal conversion chip is connected to the display controller, and an output end of the signal conversion chip is connected to the display device;
the output module is specifically configured to write the display data into a video memory of the GPU;
the display controller is used for extracting the display data from the video memory and converting the display data into a general parallel video interface DVO signal;
the signal conversion chip is configured to convert, according to a signal input interface type of the display device, the DVO signal output by the display controller into a first signal corresponding to the signal input interface type, and transmit the first signal to a signal input interface of the display device, so that the display device displays the received first signal.
Optionally, the first signal includes: video graphics array VGA signals or high definition multimedia interface HDMI signals.
Optionally, the execution module is further configured to:
accessing the bridge chip to obtain the PCI (peripheral component interconnect) standard identifier of the equipment;
and if the PCI identifications of the GPU and the display controller are contained in the PCI identifications of the equipment, determining that the display equipment exists.
Optionally, the processor is a microprocessor MIPS architecture processor without an internal interlocking pipeline stage.
The embodiment of the invention provides a method and a system for realizing display drive, which comprises the following steps: acquiring display driving information according to the unified extensible firmware interface specification firmware, and compiling and generating the display driving information according to the unified extensible firmware interface specification; loading display drive information when running to a drive execution environment; when the bridge chip is accessed and the existence of the display equipment is inquired, storing the physical address of the video memory of the GPU into the display controller; configuring a line-field synchronizing signal according to the screen resolution of the display; and when the starting equipment is operated to select the environment, outputting the display data to the display for display. The invention can realize the drive loading and the equipment initialization of the display equipment in the starting process of the operating system when the bridge chip is connected with the processor through the HT bus, so that the display equipment can be normally operated before the equipment is started and enters the operating system.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a flowchart illustrating steps of a method for implementing a display driver according to an embodiment of the present invention;
fig. 2 is a block diagram of an implementation system of a display driver according to an embodiment of the present invention;
FIG. 3 is a system block diagram of a system for implementing a display driver according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating specific steps of a method for implementing a display driver according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, it shows a flowchart of steps of an implementation method of a display driver according to an embodiment of the present invention, where the implementation method of the display driver includes:
step 101, obtaining display driving information according to the unified extensible firmware interface specification firmware, wherein the display driving information is compiled and generated according to the unified extensible firmware interface specification.
As shown in fig. 2, a block diagram of an implementation system of a display driver according to an embodiment of the present invention is shown, where the implementation system of the display driver includes: the system comprises a processor 10, a bridge piece 20 and a display device 30, wherein the processor 10 is connected with the bridge piece 20 through an HT bus, the display device 30 is connected with the processor 10 through the bridge piece 20, and the graphic processor 10 and a display controller 202 are integrated on the bridge piece 20.
The processor 10 acquires the display driving information according to the unified extensible firmware interface specification firmware, and the display driving information is compiled and generated according to the unified extensible firmware interface specification; loading display driver information when the processor 10 runs to a driver execution environment; when the processor 10 accesses the bridge chip 20 and inquires that the display device 30 exists, storing the physical address of the video memory of the GPU201 into the display controller 202; the processor 10 configures the line-field synchronization signal according to the screen resolution of the display 302; the processor 10, when running to the boot device selection environment, outputs display data to the display 302 for display.
In this embodiment, the processor 10 may be connected to the bridge 20 through an HT (High transfer port, end-to-end bus technology) bus, and the bridge 20 may be connected to the display 302 through a Video Graphics Array (VGA) Interface and a High Definition Multimedia Interface (HDMI), so that the processor 10 is connected to the external display 302 through the bridge 20 and an external device connector.
In the embodiment of the present invention, referring to fig. 3, a system block diagram of an implementation system of a display driver provided in the embodiment of the present invention is shown, where a firmware basic code is implemented based on UEFI specifications, display driver information, i.e., a graphics card driver, is a program for driving a graphics card of a display device 30, and other drivers are drivers of other devices, where the drivers are software programs corresponding to hardware, and the drivers are small blocks of codes added to firmware, where the drivers include information about a hardware display device 30, and are used for loading to a hardware platform. And the display driving information is compiled and generated according to the UEFI specification.
And 102, loading the display driving information when the display driving information is operated to a driving execution environment.
In the embodiment of the invention, when the computer equipment is started, the computer equipment can be started according to the UEFI specification, and compared with the prior basic input/output system, the UEFI specification omits the step of system self-check, thereby having faster execution efficiency.
In addition, the UEFI system startup is divided into four processes: SEC- -PEI- -DXE- -BDS. 1. The SEC phase is the first phase of platform initialization, which is entered after the computer system is powered on or restarted; 2. PEI phase resources are still very limited, the memory is initialized at the later stage of PEI, the main function of the PEI phase resources is to prepare an execution environment for DXE, a HOB (Handoff Block) list consisting of information needing to be transmitted to DXE is provided, and finally the control right is given to DXE. 3. The DXE phase performs most of the initialization work of the system, and the memory is fully used, so that a lot of complex work can be performed. 4. The main function of the BDS phase is to execute a boot policy, at which stage the BIOS boots the operating system and passes control to the operating system.
In the embodiment of the invention, when the processor runs to the DXE phase, that is, the processor enters the driver execution environment, various Device handles (Device handles) and protocols (protocols) are installed, and the display driver information is loaded. The process comprises the following steps: the display driving information and other equipment driving information are compiled and linked together to form firmware, the firmware is burnt into a flash memory (flash), the flash is connected to a mainboard, after the mainboard is powered on, a processor copies firmware data to a memory and then sequentially executes each stage of UEFI, and in the DXE stage, the display driving is loaded.
And 103, when the display device exists through accessing the bridge piece and inquiring, storing the physical address of the video memory of the GPU into the display controller.
In the embodiment of the invention, the processor can access the bridge chip, inquire the peripheral equipment and judge whether the GPU and the display controller of the display equipment exist according to the PCIID. Specifically, the devices each have a PCI id that specifies the identity of the display device from the PCI protocol. If the processor accesses the bridge chip to inquire the PCIID of the GPU and the display controller of the display device, the existence of the display device can be determined.
Further, in the case where it is determined that the display device exists, the display device is initialized.
Specifically, initialization is to assign a variable to a default value, ready for future use. Specifically, the method configures related parameters of components in the display device, and determines what signals are received and what signals are output. The display controller is a controller in the bridge chip, and the configuration and initialization of the register are different from the existing process, that is, in the embodiment of the invention, the physical address capable of being stored in the display is stored in the display controller, so that the initialization of the display controller is realized.
And 104, configuring a line field synchronizing signal according to the screen resolution of the display.
In this step, the output signal of the display controller may be a parallel video interface (DVO) signal, and the line and field synchronization signal may be configured according to the resolution of the display to complete the initialization of the display.
And 105, outputting display data to the display for display when the environment of the Boot Device Selection (BDS) is operated.
After all is ready, the display device may be controlled by the processor so that the display data is converted to a format specified by the interface of the display, output to the display, and displayed.
In the process of starting the computer equipment, the invention provides a method for lighting the display screen, loading the display console and outputting display data before entering the operating system, so that a user can perform related operations through the display screen before entering the operating system.
In summary, the method for implementing display driving according to the embodiment of the present invention includes: acquiring display driving information according to the unified extensible firmware interface specification firmware, and compiling and generating the display driving information according to the unified extensible firmware interface specification; loading display drive information when running to a drive execution environment; when the bridge chip is accessed and the existence of the display equipment is inquired, storing the physical address of the video memory of the GPU into the display controller; configuring a line-field synchronizing signal according to the screen resolution of the display; and when the starting equipment is operated to select the environment, outputting the display data to the display for display. The invention can realize the drive loading and the equipment initialization of the display equipment in the starting process of the operating system when the bridge chip is connected with the processor through the HT bus, so that the display equipment can be normally operated before the equipment is started and enters the operating system.
As shown in fig. 4, it shows a flowchart of specific steps of an implementation method of a display driver according to an embodiment of the present invention, where the implementation method of the display driver includes:
step 401, obtaining display driving information according to the unified extensible firmware interface specification firmware, where the display driving information is compiled and generated according to the unified extensible firmware interface specification.
This step may specifically refer to step 101, which is not described herein again.
Optionally, the processor is a Microprocessor without an internal interlocked pipeline stage (MIPS).
Optionally, the GPU and the display controller are disposed on the bridge piece.
And 402, loading the display driving information when the display driving information is run to a driving execution environment.
This step may specifically refer to step 102, which is not described herein again.
Step 403, when the display device exists through accessing the bridge piece and querying, storing the physical address of the video memory of the GPU in the display controller.
This step may specifically refer to step 103, which is not described herein again.
Optionally, step 403 may further include:
substep 4031, access the bridge slice and obtain the peripheral component interconnect standard PCI identification of the device.
Substep 4032, determining that the display device exists if the PCI identifier of the GPU and the PCI identifier of the display controller are included in the PCI identifiers of the devices.
In the embodiment of the invention, the processor can access the bridge chip, inquire the peripheral equipment and judge whether the display equipment exists according to the PCIID. Specifically, both the GPU and the display controller have pci id identifiers. If the processor accesses the bridge chip to inquire the PCIID of the GPU and the display controller, the existence of the display equipment can be determined.
Step 404, configuring a line-field synchronizing signal according to the screen resolution of the display.
This step may specifically refer to step 104, which is not described herein again.
Step 405, writing the display data into a video memory of the GPU.
Specifically, the display controller is mainly responsible for fetching frame buffer and outputting cursor information from the display memory to the external display interface. Thus, the display data may be written to the graphics memory of the GPU so that the display controller can extract the display data from the graphics memory.
And 406, controlling the display controller to extract the display data from the video memory, converting the display data into a general parallel video interface (DVO) signal, and sending the DVO signal to a signal conversion chip.
In this step, referring to fig. 2, the display device 30 may further include a signal conversion chip 301, and the signal output by the display controller 202 cannot be directly output to the display 302 and needs to be converted by the signal conversion chip 301. The input signals of the signal conversion chips 301 are the same, the output signals are different, the input signals are all provided by the display controller 202, the display 302 has a plurality of sockets, and the corresponding data input needs, so that the corresponding signal conversion chips 301 are required to convert.
Step 407, controlling the signal conversion chip to convert the DVO signal of the general parallel video interface into a corresponding first signal according to the type of the signal input interface of the display, and transmitting the second information to the signal input interface of the display.
Optionally, the first signal includes: video graphics array VGA signals or high definition multimedia interface HDMI signals.
Specifically, the output signal of the display controller is a DVO signal (a display signal format), and the line-field synchronization signal is configured according to the screen resolution of the display. The signal conversion chip converts the DVO signal into a VGA signal or an HDMI signal.
Step 408, controlling the display to display the received first signal.
In the step, a video memory operation function is initialized, 4 interfaces are provided, data filling and screen data copying are realized on a video memory fixed position, and page turning and display output of a screen are realized. Realizing page turning of the screen specifically: firstly copying the data of the video memory to a memory area, cutting the area and then copying the area to the video memory (a buffer area as large as a screen is prepared in advance, and then directly cutting and copying the area to the screen from the buffer area) when entering a BDS stage, writing the data into the video memory of a bridge piece after a system graphic console is initialized, and at the moment, carrying the data to a signal conversion chip by a display controller and then outputting the data to a display.
Optionally, the processor may further include a loongson 3A/B type processor, such as any one of a 3A1000 processor, a 3A2000 processor, a 3A3000 processor, a 3A4000 processor, and the like; the bridge piece 20 is a 7A bridge piece of the dragon core; the signal conversion chip can comprise one or more of a CH7034B chip and a SIL9022A chip.
The Loongson 7A is a special bridge chip set product of the Loongson, and can be matched with an MIPS framework processor to be used as a south bridge. The bridge chip is interconnected with the MIPS framework processor through an HT high-speed bus interface, and a display controller and a corresponding device interface are integrated in the bridge chip.
In summary, the method for implementing display driving according to the embodiment of the present invention includes: acquiring display driving information according to the unified extensible firmware interface specification firmware, and compiling and generating the display driving information according to the unified extensible firmware interface specification; loading display drive information when running to a drive execution environment; when the bridge chip is accessed and the existence of the display equipment is inquired, storing the physical address of the video memory of the GPU into the display controller; configuring a line-field synchronizing signal according to the screen resolution of the display; and when the starting equipment is operated to select the environment, outputting the display data to the display for display. The invention can realize the drive loading and the equipment initialization of the display equipment in the starting process of the operating system when the bridge chip is connected with the processor through the HT bus, so that the display equipment can be normally operated before the equipment is started and enters the operating system.
The embodiment of the present invention further provides a system for implementing display driving, which may specifically refer to fig. 2, and includes a processor 10, a bridge chip 20, and a display device 30, where the processor 10 is connected to the bridge chip 20 through an HT bus, the display device 30 is connected to the processor 10 through the bridge chip 20, and the bridge chip 20 is integrated with a graphics processor 10 and a display controller 202.
The processor 10 comprises an acquisition module, a loading module, an execution module and an output module; the acquisition module is used for acquiring display driving information according to the unified extensible firmware interface specification firmware, and the display driving information is compiled according to the unified extensible firmware interface specification; the loading module is used for loading and displaying the drive information when running to the drive execution environment; the execution module is used for storing the physical address of the video memory of the GPU201 into the display controller 202 and configuring a line-field synchronizing signal according to the screen resolution of the display device 30 when the display device 30 connected with the bridge chip 20 exists through inquiring by accessing the bridge chip 20; and the output module is used for outputting the display data to the display device 30 for displaying when the starting device is operated to select the environment.
Specifically, for a specific description of the implementation system of display driving provided in the embodiment of the present invention, reference may be made to the description of step 101 to step 105, which is not described herein again.
Optionally, the system further includes a signal conversion chip, an input end of the signal conversion chip is connected to the display controller 202, and an output end of the signal conversion chip is connected to the display device 30; an output module, specifically configured to write display data into a video memory of the GPU 201; the display controller 202 is configured to extract display data from a video memory and convert the display data into a general parallel video interface DVO signal; the signal conversion chip is configured to convert the DVO signal output by the display controller 202 into a first signal corresponding to the type of the signal input interface according to the type of the signal input interface of the display device 30, and transmit the first signal to the signal input interface of the display device 30, so that the display device 30 displays the received first signal.
In this step, referring to fig. 2, the display device 30 may further include a signal conversion chip 301, and the signal output by the display controller 202 cannot be directly output to the display 302 and needs to be converted by the signal conversion chip 301. The input signals of the signal conversion chips 301 are the same, the output signals are different, the input signals are all provided by the display controller 202, the display 302 has a plurality of sockets, and the corresponding data input needs, so that the corresponding signal conversion chips 301 are required to convert.
Optionally, the first signal includes: video graphics array VGA signals or high definition multimedia interface HDMI signals.
Specifically, the output signal of the display controller is a DVO signal (a display signal format), and the line-field synchronization signal is configured according to the screen resolution of the display. The signal conversion chip converts the DVO signal into a VGA signal or an HDMI signal.
Optionally, the execution module is further configured to: accessing the bridge piece 20 to obtain the PCI (peripheral component interconnect) standard identifier of the equipment; if the PCI identifiers of the GPU201 and the display controller 202 are included in the PCI identifiers of the devices, it is determined that the display device 30 exists.
In the embodiment of the invention, the processor can access the bridge chip, inquire the peripheral equipment and judge whether the display equipment exists according to the PCIID. Specifically, both the GPU and the display controller have pci id identifiers. If the processor accesses the bridge chip to inquire the PCIID of the GPU and the display controller, the existence of the display equipment can be determined.
Optionally, the processor 10 is a microprocessor MIPS architecture processor without an internal interlocking pipeline stage.
Optionally, the processor may further include a loongson 3A/B type processor, such as any one of a 3A1000 processor, a 3A2000 processor, a 3A3000 processor, a 3A4000 processor, and the like; the bridge piece 20 is a 7A bridge piece of the dragon core; the signal conversion chip can comprise one or more of a CH7034B chip and a SIL9022A chip.
The Loongson 7A is a special bridge chip set product of the Loongson, and can be matched with an MIPS framework processor to be used as a south bridge. The bridge chip is interconnected with the MIPS framework processor through an HT high-speed bus interface, and a display controller and a corresponding device interface are integrated in the bridge chip.
In summary, an implementation system of display driving provided in an embodiment of the present invention includes: acquiring display driving information according to the unified extensible firmware interface specification firmware, and compiling and generating the display driving information according to the unified extensible firmware interface specification; loading display drive information when running to a drive execution environment; when the bridge chip is accessed and the existence of the display equipment is inquired, storing the physical address of the video memory of the GPU into the display controller; configuring a line-field synchronizing signal according to the screen resolution of the display; and when the starting equipment is operated to select the environment, outputting the display data to the display for display. The invention can realize the drive loading and the equipment initialization of the display equipment in the starting process of the operating system when the bridge chip is connected with the processor through the HT bus, so that the display equipment can be normally operated before the equipment is started and enters the operating system.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A method for realizing display drive is characterized in that the method is applied to a system for realizing display drive, the system comprises a processor and a bridge chip, the processor is connected with the bridge chip through an HT bus, a Graphic Processing Unit (GPU) and a display controller are integrated on the bridge chip, and the method comprises the following steps:
acquiring display driving information according to the unified extensible firmware interface specification firmware, wherein the display driving information is compiled and generated according to the unified extensible firmware interface specification;
loading the display driving information when the display driving information is operated to a driving execution environment;
when the processor accesses the bridge chip and inquires that display equipment connected with the bridge chip exists according to the PCI identification, storing a physical address of a video memory of the GPU into the display controller and configuring a line-field synchronizing signal according to the screen resolution of the display equipment;
and when the environment is selected by the starting equipment, outputting display data to the display equipment for display.
2. The method of claim 1, wherein outputting display data to the display device for display comprises:
writing the display data into a video memory of the GPU;
extracting the display data from the video memory and converting the display data into a general parallel video interface DVO signal;
converting the DVO signal into a first signal corresponding to the signal input interface type according to the signal input interface type of the display device;
transmitting the first signal to a signal input interface of the display device to enable the display device to display the received first signal.
3. The method of claim 2, wherein the first signal comprises: video graphics array VGA signals or high definition multimedia interface HDMI signals.
4. The method of any of claims 1-3, wherein querying for the presence of a display device connected to the bridge piece by accessing the bridge piece comprises:
accessing the bridge chip to obtain the PCI (peripheral component interconnect) standard identifier of the equipment;
and if the PCI identifications of the GPU and the display controller are contained in the PCI identification of the equipment, determining that the display equipment exists.
5. The method of any of claims 1-3, wherein the processor is a microprocessor MIPS architecture processor without internal interlocking pipeline stages.
6. The system for realizing the display drive is characterized by comprising a processor, a bridge piece and display equipment, wherein the processor is connected with the bridge piece through an HT bus, the display equipment is connected with the processor through the bridge piece, and a Graphic Processing Unit (GPU) and a display controller are integrated on the bridge piece; the processor comprises an acquisition module, a loading module, an execution module and an output module;
the acquisition module is used for acquiring display driving information according to the unified extensible firmware interface specification firmware, and the display driving information is compiled and generated according to the unified extensible firmware interface specification;
the loading module is used for loading the display driving information when running to a driving execution environment;
the execution module is used for storing a physical address of a video memory of the GPU into the display controller and configuring a line-field synchronizing signal according to the screen resolution of the display device when the processor accesses the bridge piece and inquires that the display device connected with the bridge piece exists according to the PCI identification;
and the output module is used for outputting display data to the display equipment for display when the starting equipment is operated to select the environment.
7. The system of claim 6, further comprising a signal conversion chip, wherein an input end of the signal conversion chip is connected with the display controller, and an output end of the signal conversion chip is connected with the display device;
the output module is specifically configured to write the display data into a video memory of the GPU;
the display controller is used for extracting the display data from the video memory and converting the display data into a general parallel video interface DVO signal;
the signal conversion chip is configured to convert, according to a signal input interface type of the display device, the DVO signal output by the display controller into a first signal corresponding to the signal input interface type, and transmit the first signal to a signal input interface of the display device, so that the display device displays the received first signal.
8. The system of claim 7, wherein the first signal comprises: video graphics array VGA signals or high definition multimedia interface HDMI signals.
9. The system of any of claims 6-8, wherein the execution module is further configured to:
accessing the bridge chip to obtain the PCI (peripheral component interconnect) standard identifier of the equipment;
and if the PCI identifications of the GPU and the display controller are contained in the PCI identification of the equipment, determining that the display equipment exists.
10. The system of any of claims 6-8, wherein the processor is a microprocessor MIPS architecture processor without internal interlocking pipeline stages.
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