CN109919822B - Digital watermark embedding system and implementation method thereof - Google Patents

Digital watermark embedding system and implementation method thereof Download PDF

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CN109919822B
CN109919822B CN201910068597.6A CN201910068597A CN109919822B CN 109919822 B CN109919822 B CN 109919822B CN 201910068597 A CN201910068597 A CN 201910068597A CN 109919822 B CN109919822 B CN 109919822B
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沙金
葛航旗
昌晶
陈中杰
陈帅
刘镜伯
于炜
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Nanjing University
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Abstract

The invention provides a digital watermark embedding system based on approximate DCT transformation, which comprises an input buffer moduleThe device comprises a block, an encryption scrambling module, an approximate DCT (discrete cosine transformation) module, a watermark embedding module, an approximate inverse DCT module and an output cache module; the input cache module stores the watermark information and caches the image data input from the outside according to a single line; the approximate DCT transformation module transforms the picture data input into the cache module by adopting an approximate DCT transformation matrix of 4 x 4; the watermark embedding module judges whether the value of the current embedded watermark information is 0 or 1, and amplifies the low-frequency data (1 + 2) similar to the DCT conversion module ‑6 ) Doubling or shrinking (1-2) ‑6 ) Doubling; the approximate inverse DCT conversion module is used for processing the image data embedded with the watermark by adopting a 4 x 4 approximate inverse DCT conversion matrix; the invention ensures the robustness of the result picture without using any multiplier, greatly improves the operation speed and reduces the resource consumption.

Description

Digital watermark embedding system and implementation method thereof
Technical Field
The invention belongs to the technical field of image watermark embedding, and particularly relates to a system based on digital watermark embedding and an implementation method thereof.
Background
With the progress of science and technology, the internet gradually develops towards the internet of things, and the information interaction amount also shows explosive growth. Therefore, protection of information is becoming more and more important. Digital pictures are more easily disseminated over digital media and the internet than other data, and embedding digital picture watermarks is undoubtedly one of the most effective means for protecting the privacy and legitimate interests of picture owners.
Commonly used digital watermark embedding methods fall into two broad categories: spatial domain embedding and frequency domain embedding. The spatial domain embedding algorithm has poor digital integrity and robustness, and is difficult to resist attacks such as noise and filtering. If a proper frequency area is selected in frequency domain transformation for watermark embedding, the robustness of the picture can be improved, and the visual visibility of the watermark in the picture is reduced.
The frequency domain watermark embedding method mainly comprises DWT, DFT and DCT. These algorithms are very complex and take too long time to process with software. In order to realize the internet of things era of everything interconnection, the requirement on the processing speed of information is greatly improved. The watermark embedding algorithm is transplanted to a hardware platform, which is a good solution, and has the characteristics of small volume, low power consumption, high reliability, low cost and the like under the condition of meeting the requirement of rapid processing. In order to further increase the operation speed and reduce the resource consumption, the original transformation mode cannot be directly transplanted, and the method needs to be designed according to the characteristics of a hardware circuit so as to be as close to the approximation algorithm of the original transformation as possible, thereby bringing higher resource utilization rate and faster processing speed, and seeking better solution among picture quality, processing speed, cost overhead and chip area.
Disclosure of Invention
The purpose of the invention is as follows: the invention provides a digital watermark embedding system which ensures the robustness of a result picture, greatly improves the operation speed and reduces the resource consumption under the condition of not using any multiplier.
The technical scheme is as follows: the invention provides a digital watermark embedding system, comprising: the system comprises an input cache module, an encryption scrambling module, an approximate DCT (discrete cosine transformation) module, a watermark embedding module, an approximate inverse DCT module and an output cache module; the input cache module is used for storing watermark information and caching the image data input from the outside according to a single line; the encryption scrambling module divides the watermark information input into the cache module into a plurality of small blocks, changes the spatial position of the binary watermark by adopting a key matrix and outputs the spatial position to the watermark embedding module; the approximate DCT transformation module transforms the picture data input into the cache module by adopting a 4 x 4 approximate DCT transformation matrix and converts the picture data from a spatial domain to a frequency domain; the watermark embedding module judges whether the value of the current embedded watermark information is 0 or 1, and amplifies the low-frequency data (1 + 2) of the approximate DCT transformation module -6 ) Doubling or shrinking (1-2) -6 ) Doubling; the approximate inverse DCT conversion module is used for processing the image data embedded with the watermark by adopting a 4 x 4 approximate inverse DCT conversion matrix and converting the image data from a frequency domain to a space domain; and the output cache module caches the 4 lines of picture data with the watermark information obtained by the conversion of the inverse DCT conversion module and sequentially outputs the picture data according to a single-line sequence.
Furthermore, the output buffer module is also connected with an external transmission bus and the input buffer module, the encryption scrambling module, the approximate DCT conversion module, the watermark embedding module and the approximate inverse DCT conversion module.
Further, the bit width of single pixel data of the picture stored by the input cache module is 8bits; after passing through an approximate DCT conversion module, the bit width of single pixel data of the picture is 13bits; after the watermark embedding module, the bit width of single pixel data of the picture is 20bits; after passing through the approximate DCT inverse transformation module, the bit width truncation of the single pixel data of the picture is 8bits.
Furthermore, a first-level register is respectively arranged between the approximate DCT conversion module and the watermark embedding module and between the watermark embedding module and the approximate inverse DCT conversion module.
The invention also provides a method for realizing the digital watermark embedding system, which comprises the following steps: caching the stored watermark information and the externally input image data in a single row; dividing the watermark information into a plurality of small blocks, and changing the spatial position of the binary watermark by adopting a secret key matrix; transforming the picture data by adopting a 4-by-4 approximate DCT transformation matrix, and converting the picture data from a spatial domain to a frequency domain; judging whether the value of the current embedded watermark information is 0 or 1, and amplifying the low-frequency data (1 + 2) similar to the DCT conversion module -6 ) Doubling or shrinking (1-2) -6 ) Doubling; processing the image data after embedding the watermark by adopting a 4-by-4 approximate inverse DCT (discrete cosine transform) transformation matrix, and converting the image data from a frequency domain to a spatial domain; and caching the 4 lines of image data with the watermark information obtained by the transformation of the inverse DCT transformation module, and sequentially outputting the image data according to the order of the single line.
Further, the expression of the key matrix is:
Figure BDA0001956535750000021
where (x, y) is the original spatial location coordinates and (x ', y') is the transformed spatial location coordinates.
Further, the one-dimensional transformation expression of the approximate DCT transformation is:
n 0 =(m 11 +m 41 )+(m 21 +m 31 ),
n 1 =m 11 -m 41
n 2 =(m 11 +m 41 )-(m 21 +m 31 ),
n 3 =m 31 -m 21
wherein m is ij Picture information representing i row and j column, n 0 ~n 3 Representing the corresponding column result after an approximate DCT transform.
Further, the one-dimensional transformation expression is merged with a common term to obtain (m) 11 +m 41 ) And (m) 21 +m 31 ) Only once, the intermediate results are reused.
Further, the one-dimensional transformation expression of the approximate inverse DCT transformation matrix is:
Figure BDA0001956535750000031
Figure BDA0001956535750000032
Figure BDA0001956535750000033
v3=1/2(u31-u21),
wherein u is ij Picture information, v, representing i row and j column 0 ~v 3 Representing the corresponding column result after an approximate inverse DCT transform.
Further, when the external transmission bus is busy, the output buffer module receives the external reading control signal and suspends the work, and simultaneously, the output buffer module transmits the external reading control signal to each module through the internal control signal, and suspends the work of the input buffer module, the encryption scrambling module, the approximate DCT conversion module, the watermark embedding module and the approximate inverse DCT conversion module.
Has the advantages that: aiming at the characteristics of a hardware circuit, the invention carries out approximate operation on DCT transformation and designs a corresponding watermark embedding method, and further optimizes the digital watermark embedding by utilizing an IC design technology. The approximate DCT only uses 6 adders/subtractors, the approximate inverse DCT only uses 6 adders/subtractors and 4 shifters, and the watermark information embedding only uses 2 adders/subtractors and one shifter. Under the condition of not using any multiplier, the robustness of the result picture is ensured, the operation speed is greatly increased, and the resource consumption is reduced. A better solution between picture quality, processing speed, cost overhead and chip area is achieved.
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FIG. 1 is a block diagram of a system for digital watermark embedding of the present invention;
FIG. 2 is a block diagram of an input data caching module of the present invention;
FIG. 3 is a schematic diagram of an approximate DCT transform of the present invention;
FIG. 4 is a block diagram of the watermark information embedding of the present invention;
FIG. 5 is a block diagram of an approximate inverse DCT transform of the present invention;
FIG. 6 is a block diagram of an output data caching module of the present invention.
Detailed Description
The present invention will be further described with reference to the following examples and the accompanying drawings.
As shown in fig. 1, the digital watermark embedding system based on approximate DCT transform of the present example includes an input buffer module; an encryption scrambling module; an approximate DCT transform module; a watermark embedding module; approximate inverse DCT transform module and output buffer module.
The input buffer module stores watermark information and buffers picture data input from the outside according to a single line, and after all data to be processed by the approximate DCT conversion module come in, the buffered data are distributed to the approximate DCT module to realize the serial-parallel conversion function;
the encryption scrambling module divides the watermark information input into the cache module into a plurality of small blocks, changes the spatial position of the binary watermark by adopting a key matrix and outputs the spatial position to the watermark embedding module;
the approximate DCT transformation module transforms the picture data input into the cache module by adopting a 4 x 4 approximate DCT transformation matrix and converts the picture data from a spatial domain to a frequency domain;
the watermark embedding module correspondingly amplifies (1 + 2) the low-frequency data of the approximate DCT transformation module according to whether the value of the current embedded watermark information is 0 or 1 -6 ) Doubling or shrinking (1-2) -6 ) Doubling; therein, 2 -6 Approximately equal to 0.0156. Here 2 -6 The method can be realized by a shift operation in hardware, and a multiplier is not used.
And the approximate inverse DCT conversion module is used for processing the picture data embedded with the watermark by adopting a 4-by-4 approximate inverse DCT conversion matrix and converting the picture data from a frequency domain to a spatial domain.
The output buffer module buffers 4 lines of data of the inverse DCT result, after 128 inverse DCT transformations are performed on each line, the 4 lines of picture data with watermark information are all processed, and then the picture data are sequentially output according to the order of the single line, so that the function of converting parallel data into serial data is realized.
The example uses 128 × 128 pixels of the input watermark information and 512 × 512 pixels of the input picture.
As shown in fig. 2, the input data caching module includes a watermark memory, a selector, a controller, and three FIF0 memories. Firstly, watermark information is firstly input, and a controller controls a watermark memory to store 128 × 128 watermark information; after all watermark information is stored, the image data of the first line starts to be input, the controller and the selector work jointly, the image data of the first line is stored in the FIF01, and then the image data of the second line is stored in the FIF02 and the image data of the third line is stored in the FIF 03; when the fourth line picture data is input, the controller and the selector can combine and synchronously output the first to third line picture data stored in the FIFs 01 to FIF03 and the input fourth line picture data; after the current four lines of picture data are completely output, the next four lines of picture data are sequentially input, and the process from the first line to the fourth line of picture data input is repeated.
The watermark encryption scrambling module divides the watermark information into 128 × 128 small blocks and transforms the spatial position of the binary watermark information according to the key matrix; the following key matrix is used:
Figure BDA0001956535750000041
where (x, y) is the original spatial location coordinates and (x ', y') is the transformed spatial location coordinates.
The approximate DCT transformation module adopts an approximate DCT transformation matrix of 4 x 4, the picture after the picture data with 512 x 512 pixels is transformed has 128 x 128 transformation blocks, and the size of each transformation block is 4 x 4; the approximate DCT transform matrix contains only ± 1,0 elements. The approximate DCT transform only uses an adder/subtracter, and saves a large amount of multiplier resources. As shown in fig. 3, the following one-dimensional approximate DCT transform function is implemented:
n 0 =(m 11 +m 41 )+(m 21 +m 31 ),
n 1 =m 11 -m 41
n 2 =(m 11 +m 41 )-(m 21 +m 31 ),
n 3 =m 31 -m 21
wherein m is ij Picture information representing i row and j column, n 0 ~n 3 Representing the corresponding column result after an approximate DCT transform. The complete two-dimensional approximate DCT transform can be obtained by performing a one-dimensional transform in the order of rows and columns, respectively.
Further, adopting a combined public item operationDo, (m) 11 +m 41 ) And (m) 21 +m 31 ) Only once, the intermediate results are reused, further reducing the 8 adders/subtractors to 6, corresponding to the 6 adders/subtractors in fig. 3.
As shown in fig. 4, the watermark embedding module embeds 128 × 128 watermark information into 128 × 128 transform blocks, and amplifies the low frequency data of the approximate DCT transform block correspondingly (1 + 2) by judging whether the value of the current embedded watermark information is 0 or 1 -6 ) Doubling or shrinking (1-2) -6 ) Multiplying, the operation relation is as follows:
Figure BDA0001956535750000051
where W is watermark information, F is a value corresponding to an approximate DCT transform block, F' is data after embedding the watermark information, 2 -6 Equal to about 0.0156. Here 2 -6 It can be realized by shift operation (> 6), i.e. right shift by 6 bits, in hardware, without using a multiplier.
The inverse matrix of the 4 x 4 approximate DCT transform only comprises the inverse module of the inverse approximate DCT transform
Figure BDA0001956535750000052
And 0 element. As shown in fig. 5, the following one-dimensional approximate inverse DCT transform function is implemented:
Figure BDA0001956535750000053
Figure BDA0001956535750000054
Figure BDA0001956535750000055
v3 =1/2(u31-u21),
wherein u is ij Picture information representing i row and j column,v 0 ~v 3 Representing the corresponding column result after an approximate inverse DCT transform.
Figure BDA0001956535750000061
And->
Figure BDA0001956535750000062
Multiplication of (2) can be achieved by right shifting by 1 bit (> 1) and 2 bits (> 2), respectively. The complete two-dimensional approximate inverse DCT transform can be obtained by performing a one-dimensional inverse transform in the order of rows and columns, respectively.
Further, with merge common item operations, (u) 11 +u 41 ) And (u) 21 +u 31 ) Only once, the intermediate results are reused, further reducing the 8 adders to 6, corresponding to the 6 adders in fig. 5, requiring 6 adders and 4 shifters.
As shown in fig. 6, the output buffer module buffers 4 lines of output data of the inverse DCT transformation module, and stores the buffered data in FIF0_0 to FIF0_3, respectively. After 128 inverse DCT transformations are performed, the 4 lines of picture data with watermark information are completely processed, and the 4 lines of processed picture data are sequentially output according to the order of a single line, so that the function of converting parallel data into serial data is realized. In addition, the output buffer module is also connected with an external transmission bus and an input buffer module, an encryption scrambling module, an approximate DCT conversion module, a watermark embedding module and an approximate inverse DCT conversion module. When the external transfer bus is busy, that is: the bandwidth of an external transmission bus is occupied by other program tasks, no more transmission bandwidth can be used, the function of the output cache module can be suspended through the external read control signal, meanwhile, the output cache module transmits the external read control signal to each module through the internal control signal, the functions of other modules are suspended, the data locking function is achieved, and data loss is prevented.
In the whole processing process, the intermediate data needs to properly expand the bit width to reduce the precision loss: in the input data cache module, the bit width of single pixel data of an input original picture is 8bits; after passing through an approximate DCT conversion module, the bit width of the intermediate data is 13bits; after the watermark embedding module, the bit width of the intermediate data is 20bits; after passing through the approximate inverse DCT conversion module, the final result bit width truncation is 8bits.
Meanwhile, a pipeline design is introduced, and a first-level register is introduced among the approximate DCT conversion module, the watermark embedding module and the approximate inverse DCT conversion module to cache an intermediate result, so that the whole watermark embedding process only needs 3 clock cycles, and each clock cycle allows data input without causing data blockage.
This example was implemented on the Xilinx xcvu440 development board and the final integration showed a total of 342 LUTs, 78 FFs. At a clock frequency of 200MHz, a throughput of 3.2GByte/s was achieved with 81mW of power. The PSNR value of the image after the watermark is embedded is 42dB, and the NC value of the extracted watermark definition is 0.91 after the image is attacked by Gaussian noise with the mean value of 0 and the variance of 0.1.

Claims (10)

1. A digital watermark embedding system, characterized by: the system comprises an input cache module, an encryption scrambling module, an approximate DCT (discrete cosine transform) conversion module, a watermark embedding module, an approximate inverse DCT conversion module and an output cache module;
the input cache module stores the watermark information and caches the image data input from the outside according to a single line;
the encryption scrambling module divides watermark information input into the cache module into a plurality of small blocks, changes the spatial position of the binary watermark by adopting a key matrix and outputs the spatial position to the watermark embedding module;
the approximate DCT transformation module transforms the picture data input into the cache module by adopting a 4 x 4 approximate DCT transformation matrix and converts the picture data from a spatial domain to a frequency domain; approximate DCT transform uses 6 adders/subtractors;
the watermark embedding module judges whether the value of the current embedded watermark information is 0 or 1, and amplifies the low-frequency data (1 + 2) of the approximate DCT transformation module -6 ) Doubling or shrinking (1-2) -6 ) Doubling; watermark information embedding also uses 2 adders/subtractors and a shiftA machine;
the approximate inverse DCT conversion module is used for processing the image data embedded with the watermark by adopting a 4 x 4 approximate inverse DCT conversion matrix and converting the image data from a frequency domain to a space domain; approximate inverse DCT transform uses 6 adders/subtractors and 4 shifters;
the output cache module caches 4 lines of image data with watermark information obtained by the conversion of the inverse DCT conversion module, and sequentially outputs the image data according to a single-line sequence;
the one-dimensional transformation expression of the approximate DCT transformation is as follows:
n 0 =(m 11 +m 41 )+(m 21 +m 31 ),
n 1 =m 11 -m 41
n 2 =(m 11 +m 41 )-(m 21 +m 31 ),
n 3 =m 31 -m 21
wherein m is ij Picture information representing i row and j column, n 0 ~n 3 Representing the corresponding column result after the approximate DCT transformation;
the one-dimensional transformation expression of the approximate inverse DCT transformation matrix is as follows:
Figure FDA0003945835540000011
Figure FDA0003945835540000012
Figure FDA0003945835540000013
Figure FDA0003945835540000014
wherein u is ij Picture information, v, representing i row and j column 0 ~v 3 Representing the corresponding column result after an approximate inverse DCT transform.
2. The digital watermark embedding system according to claim 1, wherein: the output buffer module is also connected with an external transmission bus and the input buffer module, the encryption scrambling module, the approximate DCT conversion module, the watermark embedding module and the approximate inverse DCT conversion module.
3. The digital watermark embedding system according to claim 1, wherein: the bit width of single pixel data of the picture stored by the input cache module is 8bits; after passing through an approximate DCT conversion module, the bit width of single pixel data of the picture is 13bits; after the watermark embedding module, the bit width of single pixel data of the picture is 20bits; after passing through the approximate DCT inverse transformation module, the bit width of single pixel data of the picture is 8bits.
4. The digital watermark embedding system according to claim 1, wherein: and a primary register is respectively arranged between the approximate DCT conversion module and the watermark embedding module and between the watermark embedding module and the approximate inverse DCT conversion module.
5. A digital watermark embedding system implementation method of claim 1: caching the stored watermark information and the externally input image data in a single row; dividing watermark information into a plurality of small blocks, and changing the spatial position of the binary watermark by adopting a key matrix; transforming the picture data by adopting a 4-by-4 approximate DCT transformation matrix, and converting the picture data from a spatial domain to a frequency domain; judging whether the value of the current embedded watermark information is 0 or 1, and amplifying the low-frequency data (1 + 2) similar to the DCT conversion module -6 ) Doubling or shrinking (1-2) -6 ) Doubling; processing the image data after embedding the watermark by adopting a 4-by-4 approximate inverse DCT (discrete cosine transform) transformation matrix, and converting the image data from a frequency domain to a spatial domain; the 4 lines of picture data with watermark information obtained by the transformation of the inverse DCT transformation module are cached and sequentially arranged in a single line orderAnd (6) outputting.
6. The digital watermark embedding system implementation method of claim 5, wherein: the expression of the key matrix is as follows:
Figure FDA0003945835540000021
where (x, y) is the original spatial location coordinates and (x ', y') is the transformed spatial location coordinates.
7. The digital watermark embedding system implementation method of claim 5, wherein: the one-dimensional transformation expression of the approximate DCT transformation is as follows:
n 0 =(m 11 +m 41 )+(m 21 +m 31 ),
n 1 =m 11 -m 41
n 2 =(m 11 +m 41 )-(m 21 +m 31 ),
n 3 =m 31 -m 21
wherein m is ij Picture information representing i row and j column, n 0 ~n 3 Representing the corresponding column result after an approximate DCT transform.
8. The digital watermark embedding system implementation method of claim 7, wherein: merging the common terms of the one-dimensional transformation expression to obtain (m) 11 +m 41 ) And (m) 21 +m 31 ) Only once, the intermediate results are reused.
9. The digital watermark embedding system implementation method of claim 5, wherein: the one-dimensional transformation expression of the approximate inverse DCT transformation matrix is as follows:
Figure FDA0003945835540000031
Figure FDA0003945835540000032
Figure FDA0003945835540000033
Figure FDA0003945835540000034
wherein u is ij Picture information, v, representing i row and j column 0 ~v 3 Representing the corresponding column result after an approximate inverse DCT transform.
10. The digital watermark embedding system implementation method of claim 5, wherein: when the external transmission bus is busy, the output buffer module receives the external reading control signal and suspends the work, and simultaneously, the output buffer module transmits the external reading control signal to each module through the internal control signal, and suspends the work of the input buffer module, the encryption scrambling module, the approximate DCT conversion module, the watermark embedding module and the approximate inverse DCT conversion module.
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