CN109901913A - A kind of multithreading affairs storage programming model method controllably repeating number - Google Patents
A kind of multithreading affairs storage programming model method controllably repeating number Download PDFInfo
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Abstract
The invention belongs to computer multiple thread multiple programming field, after being related to a kind of execution failure, the multithreading affairs storage programming model method of number (N-retry) is controllably repeated.The present invention modifies former affairs storage programming model, number is repeated to the transaction controlling for executing failure, and pass through building task queue, if affairs execute failure, the task that the affairs execute then is back to the mode of task queue tail portion, it is ensured that the correctness of parallel model, and avoid the hot point resource in multithread programs, it reduces affairs and always executes the frequency of failure, improve the concurrent efficiency of program.This method ease for use is high, can significantly improve parallel efficiency in height conflict parallel algorithm.
Description
Technical field
The invention belongs to computer multiple programming field, the multi-thread of number is controllably repeated after being related to a kind of execution failure
Journey affairs store (Transaction Memory) programming model method.
Background technique
Size prior art discloses Moore's Law in chip, frequency, power consumption etc. are verified, but with IC core
Up to 7 nanometers, transistor size is difficult constantly to reduce further in accordance with Moore's Law the transistor size of piece, the frequency of monokaryon CPU by
It is also difficult to be substantially improved in the limitation of power consumption, therefore the computing capability of monokaryon CPU promotes more difficulty；Think in the industry, it is parallel more
One of the key technology that core processor increases the computing capability for becoming processor along Moore's Law.
Multi-thread programming is the common programming technique that parallel computation is realized in multi-core processor platform.However by existing journey
Sequence is transplanted to multithreading from single thread, while being an extremely challenging job but also with higher parallel efficiency, difficult
In terms of point is mainly reflected in easy-to-use parallel programming model and high parallel efficiency.
Think in the industry, it is the conflict of multithreading shared drive that multi-core parallel concurrent programming model, which needs the key problem solved,.Often
There are two types of the shared drive conflicts seen, one is read-after-write conflicts, i.e., when two threads read while write same memory, wherein one
During reading and using shared drive, which is override by another thread changes a thread；Another kind is write after write
Conflict, two threads carry out write operation to one piece of shared drive simultaneously；Practice display, these conflicts need in multi-thread programming
Carefully processing, otherwise multithread programs will obtain error result.
Usually solving above-mentioned shared drive conflict, there are mainly three types of methods: lock mechanism is stored without lock programming and affairs；Lock machine
System is developed on the basis of semaphore [1], controls unlatching and the obstruction of thread by defining the semaphore of mutual exclusion
Same memory is used simultaneously to avoid two (or multiple) threads, it is the method for the most common resolving data conflicts, however
When this method is used, it has following defects that if locked using coarseness, programming is relatively easy, but may be greatly reduced
The parallel efficiency of program can increase the parallel efficiency of program if locking using fine granularity, but programming is complicated, code operation amount is big, can
The problems such as capable of generating deadlock；No locking-type programming [2] is that the comparison swap operation (compare-and-swap) based on CPU is realized
The atom of affairs executes, the concurrent program not high and smaller suitable for complexity；
Affairs store the transactional attribute that [3] are derived from database, and affairs can allow one section of critical section code being capable of atomization, simultaneously
Row independently executes in multithreading, and programming model is easy to use, and parallel efficiency with higher；Currently, affairs store
Implementation be broadly divided into three categories: software transaction store [4] [5] [6] [7] [8], hardware transactional storage [9] [10] [11]
[12] and mixing affairs store [13] [14], and wherein the Dave Dice of Sun Microsystems, Ori Shalev and Nir Shavit are proposed
And the TL2 model realized is most representational software transaction storage model, and the TSX in novel I ntel processor
(Transactional Synchronization Extensions) instruction set, is current industrial circle in hardware transactional storage side
The Typical Representative in face, Intel are then the classical model for mixing affairs storage with the ISA instruction set that University of Michigan develops jointly.
Prior art discloses (as shown in Figure 1) multiple programming applications simply stored based on TL2 software transaction
Example, it executes the function of y=x+10 in multi-thread environment, wherein assuming that x is shared reading variable, y writes variable to be shared, becomes
Amount x and y may occur shared data with other threads and conflict；In Fig. 1, the concurrent program for writing application is only needed simply
Ground includes the sentence that sharing conflict may occur using TM_BEGIN () and TM_END (), constitutes a complete transaction, and lead to
Calling TM_READ () and TM_WRITE () are crossed to indicate the reading variable of possible sharing conflict and write variable, from this application layer
Example can be seen that the multiple programming based on Transactional memory without it is explicit using lock mechanism, Deadlock will not occur, can
The difficulty for writing concurrent program being greatly reduced, and in terms of application layer, execution of the affairs in multi-thread environment can only succeed,
Without the execution route after failure, programming model is simplified；
But inside TL2 software transaction storage model, affairs can run succeeded or execute failure, if the affairs due to
The reasons such as sharing conflict execute failure, and meeting rollback (rollback) starts the place executed to affairs inside Transactional memory,
And the affairs are re-executed, until successful execution and until submit implementing result；Due to the presence of data collision, an affairs can
Failure and rollback can be continuously performed many times；In fact, in multithreading execution, if certain shared resource is occupied by certain thread,
Failure can be executed always by needing other threads of the resource, until obtaining the resource；Therefore in the algorithm of height conflict,
The parallel efficiency of TL2 model generally can be lower than the parallel codes using original lock mechanism；If the affairs of failure can be allowed, hot spot is avoided
The parallel efficiency of shared resource, program will be promoted further.
In view of the above shortcomings of the prior art, the quasi- one kind that provides of present inventor controllably repeats number
Multithreading affairs store programming model method, after especially a kind of execution failure, controllably repeat the more of number (N-retry)
Thread affairs store programming model method.This method can effectively improve based on affairs storage programming model multithread programs and
Line efficiency, while the model that this method proposes has similar interface with former Transactional memory, still has affairs storage mould
The simple advantage of type multiple programming.
Bibliography related to the present invention has:
[1]Dijxstra,E.W.“Solution of a problem in concurrent programming
control.”FACULTAD DE INGENIERAS FUNDACI N UNIVERSITARIALUISAMIG(1965):50.
[2]Michael,Maged.“CAS-based lock-free algorithm for shared deques.”
Euro-Par2003Parallel Processing(2003):651-660.
[3]Herlihy M,Moss J E B.Transactional memory:Architectural support
for lock-free data structures[M].ACM,1993.
[4]Shavit,Nir,and Dan Touitou.“Software transactional memory.”
Distributed Computing 10.2(1997):99-116.
[5]Moore,Kevin E.,et al.“LogTM:log-based transactional memory.”
HPCA.Vol.6.2006.
[6]Shalev,Ori,and Nir Shavit.“Predictive log-synchronization.”ACM
SIGOPS Operating Systems Review.Vol.40.No.4.ACM,2006.
[7]Dice,Dave,Ori Shalev,and Nir Shavit.“Transactional locking II.”
DISC.Vol.6.2006.
[8]Welc,Adam,Suresh Jagannathan,and Antony Hosking.“Transactional
monitors for concurrent objects.”ECOOP 2004Object-Oriented Programming(2004):
494-514.
[9]Ananian,C.Scott,et al.“Unbounded transactional memory.”High-
Performance Computer Architecture,2005.HPCA-11.11th International Symposium
on.IEEE,2005.
[10]Hammond,Lance,et al.“Transactional memory coherence and consis-
tency.”ACM SIGARCH Computer Architecture News.Vol.32.No.2.IEEE Computer
Society,2004.
[11]Yoo,Richard M.,et al.“Performance evaluation of Intel
transactional synchronization extensions for high-performance computing.”High
Per-formance Computing,Networking,Storage and Analysis(SC),2013International
Conference for.IEEE,2013.
[12]Nakaike,Takuya,et al.“Quantitative comparison of hardware
transactional memory for Blue Gene/Q,zEnterprise EC12,Intel Core,and POWER8.”
ACM SIGARCH Computer Architecture News.Vol.43.No.3.ACM,2015.
[13]Shalev,Ori,and Nir Shavit.“Predictive log-synchronization.”ACM
SIGOPS Operating Systems Review.Vol.40.No.4.ACM,2006.
[14]Moir,Mark S.“Hybrid software/hardware transactional memory.”
U.S.Patent No.7,395,382.1Jul.2008.。
Summary of the invention
It is an object of the invention in view of the deficienciess of the prior art, providing one kind controllably repeats the multi-thread of number
Journey affairs store programming model method, after especially a kind of execution failure, controllably repeat the multithreading of number (N-retry)
Affairs store programming model method.This method is inside multithreading Transactional memory, after affairs execute failure several times, no longer
Former affairs are repeated, task performed by the affairs is put back into task queue tail portion, to avoid the contention to hot point resource.
The present invention can effectively improve the parallel efficiency of the multithread programs based on affairs storage programming model, while be proposed
Model and former Transactional memory there is similar interface, still have the simple advantage of Transactional memory multiple programming.
Specifically, the present invention is directed to the deficiency of Traditional affair storage model, provide after a kind of affairs execute failure, controllably
Repeat the multithreading affairs storage programming model method of number.This method is saved pending by one task queue of building
Task, affairs fail if executing the affairs of the task in commission due to certain after rollback several times, at this time by the mistake
It loses task performed by affairs and is put back into task queue tail portion；The present invention is based on original transaction storage models, and control its failure
The resource hot spot of concurrent program is avoided in the behavior of affairs, improves parallel efficiency；In addition, control repeats number in affairs storage
Operation be affairs storage software library layer inside, only need calling interface i.e. for the concurrent application on upper layer
Can, the Transactional memory method is to multiple programming close friend.
In the present invention, affairs storage can enable one section of critical section code atomization, parallel, independently hold in multithreading
Row, although having the variable of sharing conflict between affairs, before affairs have correctly executed submission, all operation results will be deposited
Storage is in buffer area, if detecting data collision, current affairs will be abrogated and rollback, re-executes, until its at
Until function is submitted.
More specifically, the multithreading affairs storage programming model method for controllably repeating number of the invention, feature
It is comprising:
A) it inside multithreading Transactional memory, after affairs execute failure several times, is not repeated to execute former affairs, it will
Task performed by the affairs puts back to task queue tail portion；Can effectively improve the multithread programs based on Transactional memory and
Line efficiency；
B) the multithreading affairs storage programming model controllably repeated is, it can be achieved that controllably to repeat the software of number
Transactional memory and the hardware transactional storage model for controllably repeating number.
In the present invention, in the application of the software transaction storage model (N-retry TL2) for controllably repeating number
Layer identification code is as shown in Fig. 2 code sample；In the application layer code of N-retry TL2 model, thread takes out from task queue
One task simultaneously starts to execute, and enters affairs storage by STM_BEGIN and STM_EDN, N-retry TL2 model is to success or loses
The affairs lost set up a flag bit；When affairs execute failure, sentence flag=0 is not performed, and program jumps directly to
N-retry_STM_END；Due to needing the task by failure to re-execute in some time later, one need to be constructed entirely
Task is dynamically sent in the task queue of office；If the affairs of this task execute failure, then the task that the affairs execute will be put
Enter task queue tail portion；
The realization details of N-retry TL2 is as shown in Figure 5；It is seen from fig 5 that N-retry TL2 model is in office
Affairs incipient stage STM_begin can be jumped to after reason failure, but is that it increases the step of checking number of repetition；In opening for affairs
Execution stage beginning can define an environmental variance stm_jmpbuf and call sigsetjmp instruction to store current environment；If
During affairs execute, affairs are because certain reason is revoked, then program can allow frequency of failure retry time to add 1, then call
Sigjmp instructs to restore to instruct the environment saved, transaction rollback by sigsetjmp；If the frequency of failure is not more than given N,
Re-execute the affairs；If it is greater than N, the ending phase STM_end of affairs can be jumped to；It is worth noting that record failure
The variable of number is the peculiar variable of thread, can't be instructed and restore by sigjmp.
In the present invention, hardware transactional storage model (the N-retry RTM) such as Fig. 6 institute for controllably repeating number
Show；In N-retry RTM model, if the number that affairs are abrogated due to data collision is less than N, thread will be re-executed
Then affairs fail and the task are put back to task queue tail of the queue for the affairs, such as larger than N；Affairs caused by due to other are lost
It loses, is then solved using lock mechanism；In the rollback path of failure, different types of lock can choose；Preferably compare in the method
Preferably high ticket locks (highticket lock) for mutual exclusion lock and spin lock effect；
In the embodiment of the present invention, programming demonstration is stored as N-retry RTM affairs using algorithm 2；Use first _
Xbegin starts affairs storage, checks whether lock is idle if starting successfully, it is assumed that lock idle state then starts affairs；Work as affairs
After storage starting, if affairs execution is unsuccessfully abrogated, then this algorithm flow is directly automatic jumped to the END of the 14th row by hardware
OF TRANS flag bit, and judge later the reason of causing affairs to fail；If the reason of affairs fail is non-data
The reason of conflict, then lock mechanism will be used to execute this affairs；If affairs are abrogated due to data collision and number of repetition
Less than N, then for circulation beginning is returned to, affairs are re-executed；If more than N then affairs failure then jump out for circulation, and by this
Task queue tail of the queue is put back in business；Due to hardware resource, hardware transactional storage is stored with more limitations than software transaction,
It could even be possible to occurring data collision in single thread；This is because the collection of writing of hardware transactional storage model RTM is stored in CPU
L1 grade caching on, this, which is cached with, to be swapped out by operating system.
Analysis shows being difficult to differentiate between true data collision at present either because L1 caches the data caused by reason that swap out
Conflict.
In the embodiment of the present invention, priginal soft Transactional memory TL2 and N-retry TL2 software transaction in application layer
Storage model comparison:
Fig. 2 gives in application, and priginal soft Transactional memory TL2 is controllably repeated with what this patent proposed
The calling of the software journey Transactional memory (N-retry TL2) of number compares, in the application layer code of TL2 model, thread
Since task queue take out a task and execute, by STM_BEGIN and STM_EDN enter affairs storage, all things
During the inside that business failure, rollback and the details repeated are hidden in the library TL2 is realized；
The software journey Transactional memory N-retry TL2 for controllably repeating number of the invention is closely similar with it,
What is uniquely distinguished is that need to the affairs of success or failure be set up with a flag bit, and when affairs execute failure, sentence flag=0 will
It will not be performed, program jumps directly to N-retry_STM_END, due to needing the affairs by failure in some time later
It re-executes, therefore a global task queue need to be constructed dynamically to send task, if the affairs of this task execute failure, that
The task will be placed into task queue tail portion.
In another embodiment of the present invention, priginal soft Transactional memory TL2 and N-retry TL2 software thing inside library
Storage model of being engaged in comparison:
1) TL2 software transaction storage model library is realized
Fig. 3 is the execution process that in house software affairs in library store TL2 model, is broadly divided into following steps: being entered from interface
Library level starts affairs and executes；The shared variable for needing to read is loaded into readset, if data collision, thing occur for readset resource
Business rollback；Speculate that executing code building writes collection；Thread will apply for that acquisition is all and write the corresponding lock of collection variable, and lock；If obtaining
Resource failure is locked, then represents the variable and is used by other threads, this thread will discharge the lock of all acquisitions, transaction rollback；It is global
Timestamp adds 1；Whether the lock and version number for checking readset are changed by other threads, this affairs successful execution if checking and passing through
It is submitted, otherwise rollback；The value for writing collection variable will be written into true address, and discharge all locks for writing collection, affairs success
Submission is executed, using variable and lock based on Version Control, software transaction storage model TL2 may insure the consistency of data；
2) realization of TL2 and N-retry TL2 software transaction storage model compares
Fig. 4 is the details of TL2 in realization, from fig. 4 it can be seen that the rollback inside the library TL2 of TL2 model, and only
Affairs run succeeded and can just jump out, meanwhile, Fig. 4 gives the realization details how TL2 model controls rollback, wherein STM_
Begin, STM_end, STM_read and STM_write are the macros that C language is realized, in order to realize transaction rollback and again
It executes, TL2 model library calls a pair of of important function sigsetjmp and sigjmp, and Sigsetjmp is made after saving by sigjmp
Current readjustment environment, readjustment environment includes program counter (program counter, PC), stack pointer (stack
Pointer) and local basic information (ACKspeak for frame pointer) etc., Sigjmp function can restore quilt
The environment that sigsetjmp is saved；In TL2 model, starts the execution stage in affairs, an environmental variance stm_ can be defined
Jmpbuf and call sigsetjmp instruction to store current environment.If affairs are for some reason during executing affairs
It is revoked.So program can call sigjmp instruction to restore to instruct the environment saved by sigsetjmp, and program returns to affairs and opens
The stage of beginning re-executes, until its success.When its long jump returns stm_jmpbuf, the corresponding stack of thread can be clear
Sky, therefore read and write collection and be also emptied；
Fig. 5 is the details of N-retry TL2 model in realization, it is closely similar with TL2 model, but N-retryTL2 mould
Type increases the inspection of the frequency of failure in inside, shows in Fig. 5, in the N-retryTL2 model that this method proposes in issued transaction
Affairs incipient stage STM_begin still can be jumped to after failure, but is that it increases the step of checking number of repetition, with TL2 mould
Type is the same, and N-retry TL2 model starts the execution stage affairs, defines an environmental variance stm_jmpbuf and calls
Sigsetjmp instructs to store current environment, if during affairs execute, affairs are because certain reason is revoked, then program can first allow mistake
It loses number retry time and adds 1, call sigjmp instruction then to restore to be instructed the environment saved by sigsetjmp, affairs are returned
Rolling, if the frequency of failure re-executes the affairs no more than given N；If it is greater than N, the end rank of affairs can be jumped to
Section STM_end；It is worth noting that the variable of the record frequency of failure is the peculiar variable of thread, can't be instructed by sigjmp extensive
It is multiple.
In another embodiment of the present invention, carries out hardware transactional storage model RTM and N-retry RTM hardware transactional stores
The realization of model compares:
The synchronous extension TSX of Intel affairs storage is the expansion instruction set for realizing hardware transactional storage, and TSX provides two and connects
Mouthful: hardware lock omits HLE (Hardware Lock Elision) and limited affairs store RTM (Restricted
Transactional Memory), the method for the present invention stores RTM using limited affairs, because it provides a rollback road
Diameter is used for the rollback measure of processing failure affairs, but unlike software transaction storage, hardware transactional storage not can guarantee thing
Business can be successfully executed, therefore, in the recommended flowsheet (reference flow) of Intel hardware transactional storage model RTM, journey
Sequence person must provide a failure rollback path using traditional lock mechanism, due to hardware transactional storage not can guarantee affairs can be with
It is successfully performed, programmer must limit the number repeated, in addition, causing affairs failure in software transaction storage
The reason of reason only has data collision, and stores in RTM in limited affairs, and affairs fail has very much, wherein there are three types of failure originals
Reason hardware return value is pointed out: data collision is abrogated, L1 capacity is abrogated and pressure is abrogated, and it is by shared variable that data collision, which is abrogated,
Conflict causes, and L1 capacity, which is abrogated, refers to that the collection of writing due to limited affairs storage RTM is cached positioned at the L1 grade of processor, and L1 grades
Cache miss can also cause affairs failure, due to needing the rollback path of a lock mechanism, starting in limited affairs storage RTM
Need to check the whether idle consistency to guarantee data of lock afterwards, if lock is busy state, the pressure of this affairs is abrogated；
Algorithm 1 is that the RTM affairs that Intel recommends store programming demonstration, and in algorithm 1, n representative is executed using lock mechanism
The total degree that the affairs that fail before task re-execute, first use _ xbegin starting affairs storage, check lock if starting successfully
It is whether idle, it is assumed that lock idle state then starts affairs, it is notable that when affairs, which store, to be started, if affairs are abrogated, that
This algorithm flow is directly automatic jumped to the END OF TRANS flag bit of the 14th row by hardware, if being unsuccessfully more than n times, thing
Business will be executed using lock mechanism；
Fig. 6 is N-retry RTM hardware transactional storage model process of the present invention, in N-retry RTM model, if thing
The number abrogated due to data collision be engaged in less than N, thread will re-execute affairs, and then affairs fail and should such as larger than N
Task puts back to task queue tail of the queue, due to other caused by affairs fail, then equally using lock mechanism solve, failure
In rollback path, different types of lock can choose, in the method, using high ticket preferably than mutual exclusion lock and spin lock effect
It locks (high ticket lock)；
Algorithm 2 is N-retry RTM affairs storage programming demonstration, first use _ xbegin starting affairs storage, if starting
It is successful then check whether lock is idle, it is assumed that lock idle state then starts affairs, after affairs, which store, to be started, if affairs execute failure
It abrogates, then this algorithm flow is directly automatic jumped to the END OFTRANS flag bit of the 14th row by hardware, and later to leading
The reason of causing affairs failure is judged, if the reason of affairs fail is the reason of non-data conflict, then lock mechanism will be used
This affairs is executed, if affairs are abrogated due to data collision and number of repetition is less than N, returns to for circulation beginning, again
Execute affairs；If more than N, then for circulation is then jumped out in affairs failure, and the task is put back to task queue tail of the queue, since hardware provides
The reason of source, hardware transactional storage is stored with more limitations than software transaction, it could even be possible to occurring data in single thread
Conflict, this is because the collection of writing of hardware transactional storage model RTM is stored on the L1 grade caching of CPU, this is cached with may quilt
Operating system is swapped out；But it is difficult to differentiate between true data collision at present either because L1 caches the reason that swaps out and causes
Data collision.
It is proposed by the present invention controllably repeat number (N-retry) multithreading Transactional memory method, it can be achieved that
Controllably to repeat the software transaction storage model of number and controllably repeating the hardware transactional storage model of number, can mention
The parallel efficiency of the multithread programs based on Transactional memory is risen, meanwhile, N-retry Transactional memory is deposited with original transaction
Storing up model has similar interface, and multiple programming is friendly, easy-to-use.
Detailed description of the invention
Fig. 1 software transaction store code example.
Fig. 2 TL2 model and N-retry tl2 model application layer code of the present invention compare.
The storage of Fig. 3 TL2 software transaction executes process.
Fig. 4 TL2 software transaction storage model details.
Fig. 5 N-retry software transaction storage model of the present invention realizes details.
Hardware transactional storage model Fig. 6 of the invention.
The simulation of Fig. 7 N-retry Transactional memory method executes example.
Number of repetition N and runing time and the relationship of quantity is abrogated in Fig. 8 model of the present invention.
Specific embodiment
To make objects, features and advantages of the present invention more straightforward, deposited below by the software transaction based on TL2
Storage model and the model stored based on Intel TSX hardware transactional are modified, and the controllable repetition for realizing that the application proposes is held
The multithreading affairs of row number (N-retry) store programming model method, further illustrate the present invention by implementing.
Embodiment 1
For Fig. 7 by a small example, the N-retry Transactional memory method for explaining that this patent proposes is how to reduce
Failure affairs sum.
Original hypothesis has 9 tasks in task queue, and number represents the resource number of its sharing conflict, for example, the 2nd He
3rd affairs are due to having shared same resource 1, if data collision will be generated by being performed simultaneously.Abscissa is the time, and unit is
Layout at one.It is executed in emulation using 2 thread parallels.When starting, two threads are obtained from task queue respectively appoints
It is engaged in and starts to execute.If two parallel threads are without data collision, normal to execute (such as t1, t2 period).Data if it exists
Conflict (such as t3 period), then the affairs being postponed are marked as red frame.Original transaction storage model can re-execute repeatedly, directly
It is discharged to shared resource.And N-retry Transactional memory is then put into failed tasks at the end of task queue.In the present example
It can be seen that the shared data conflict sum of original transaction storage model is 2, and the shared number of N-retry Transactional memory
It is 1 according to conflict sum, reduces data collision number, improve parallel efficiency.
By generating more massive example at random, if parallel line number of passes is 6, sharing conflict scope of resource is from 0 to 16, fortune
The results are shown in Table 1 for row.As it can be seen from table 1 N-retry Transactional memory can be reduced on large-scale example
11.76% number of collisions and 8.47% runing time.Therefore, the N-retry Transactional memory of this patent proposition is demonstrated
Higher parallel efficiency is obtained than original Transactional memory.
1 embodiment of table, 1 test data
Embodiment 2
The present invention realizes N-retry TL2 Transactional memory of the invention on the basis of priginal soft transaction model TL2
Algorithm.Use hashmap, cps, intruder and yada Parallel application algorithm as test case to algorithm proposed by the present invention
It is assessed.Hashmap algorithm is the widely used classical data structure of computer science, and cps algorithm is asked for minimum cost flow
The derivation algorithm of topic, intruder and yada algorithm are the high collision algorithms in multithreading testing standard STAMP.
Present example is realized with C++ programming language, and has 80 cores, 256GB memory, frequency 2GHz at one
Linux server on run.Number of repetition N in N-retry TL2 Transactional memory is set as 0.Table 2 is N-retry
Transactional memory and former software transaction storage model, in four operation result tested on example comparisons." time " represents CPU
Runing time, " #abort " represent the sum of affairs failure, and " time improve " represents the percentage of runing time promotion, " #
Abort ratio " is the ratio of total failure quantity.From table 2 it can be seen that Transactional memory runing time of the invention is average
24.9% can be promoted, failure affairs total quantity can reduce 59.5%, can effectively promote parallel efficiency.
The parallel efficiency pair of table 2 N-retry TL2 software transaction storage model and original TL2 software transaction storage model
Than
Embodiment 3
The present invention realizes N-retry RTM Transactional memory of the invention on the basis of original hardware transaction model RTM
Algorithm.Use hashmap, cps, intruder and yada Parallel application algorithm as test case to algorithm proposed by the present invention
It is assessed.Invention example realized with C++ programming language, and 4 core CPU with Intel TSX instruction set,
16GB memory, L1 grades of 32KB caching, frequency be 4GHz linux server on run.N-retry RTM Transactional memory
In number of repetition N be set as 0.
Table 3 is the parallel efficiency pair of N-retry RTM hardware transactional storage model Yu original RTM hardware transactional storage model
Than.From table 3 it can be seen that runing time can be reduced 11.3% by N-retry RTM Transactional memory proposed by the present invention, lose
56.4% can be reduced by losing affairs total quantity.Due to the limitation of hardware resource, the affairs of hardware transactional storage execute failure rate and are higher than
Software transaction storage, and the getable parallel efficiency of this method institute is promoted and is also slightly below software transaction storage.
The parallel efficiency pair of table 3 N-retry RTM hardware transactional storage model and original RTM hardware transactional storage model
Than
Embodiment 4
Hashmap algorithm is selected to inquire into the number of repetition N that fails in N-retry Transactional memory proposed by the present invention to simultaneously
The influence of line efficiency.
In this embodiment, total number of tasks is 5e6, and the size of hashmap is 5e5, shares 8 parallel threads.Fig. 8 points
The relationship between runing time and failure affairs sum and failure number of repetition N is not shown.As can be seen that as N increases, fortune
Row time and failure affairs sum are also with growth.Traditional affair storage model be equivalent in detail in this figure N be intended to it is infinite, and
N-retry Transactional memory is equivalent to N equal to 0.It can be seen that the parallel efficiency of N-retry Transactional memory is apparently higher than
Original transaction storage model.
Claims (6)
1. a kind of multithreading affairs storage programming model method for controllably repeating number, characterized in that it comprises:
A) it inside multithreading Transactional memory, after affairs execute failure several times, is not repeated to execute former affairs, by the thing
The performed task of business puts back to task queue tail portion；Make the parallel efficiency for improving the multithread programs based on Transactional memory；
B) the multithreading affairs storage programming model controllably repeated is, it can be achieved that controllably to repeat the software transaction of number
Storage model and the hardware transactional storage model for controllably repeating number.
2. method according to claim 1, which is characterized in that store mould in the software transaction for controllably repeating number
In type, application layer code such as Fig. 2 code sample of the software transaction storage model (N-retry TL2) of number is controllably repeated
It is shown；In the application layer code of N-retry TL2 model, thread taken out since task queue a task and execute,
Affairs storage is entered by STM_BEGIN and STM_EDN, N-retry TL2 model sets up a mark to the affairs of success or failure
Will position；When affairs execute failure, sentence flag=0 is not performed, and program jumps directly to N-retry_STM_END；Structure
Building a global task queue dynamic sends task to re-execute the task of failure in some time later；If this task
Affairs execute failure, the affairs execute task be placed into task queue tail portion.
3. method as described in claim 2, which is characterized in that the realization of N-retry TL2 includes: that N-retryTL2 model exists
Affairs incipient stage STM_begin is jumped to after issued transaction failure, which increase check number of repetition；In opening for affairs
Execution stage beginning defines an environmental variance stm_jmpbuf and calls sigsetjmp instruction storage current environment；If affairs
During execution, affairs are because certain reason is revoked, then program makes frequency of failure retry time add 1, then call sigjmp instruction
Restore the environment saved by sigsetjmp instruction, transaction rollback；If the frequency of failure re-executes the thing no more than given N
Business；If it is greater than N, the ending phase STM_end of affairs is jumped to；The variable for recording the frequency of failure is the peculiar variable of thread,
It is not instructed and restores by sigjmp.
4. method according to claim 1, which is characterized in that store mould in the hardware transactional for controllably repeating number
In type N-retry RTM, if the number that affairs are abrogated due to data collision is less than N, thread will re-execute the affairs,
Then affairs fail and the task are put back to task queue tail of the queue such as larger than N；The failure of the affairs as caused by other reasons, then using lock
Mechanism solves；In the rollback path of failure, different types of lock is selected.
5. method according to claim 4, which is characterized in that it is described in the rollback path of failure, select high ticket to lock
(high ticket lock)。
6. method according to claim 4, which is characterized in that the storage programming of N-retry RTM affairs uses algorithm 2, packet
Include: use _ xbegin starting affairs storage first checks whether lock is idle, it is assumed that lock idle state is then opened if starting successfully
Beginning affairs；After affairs, which store, to be started, if affairs execution is unsuccessfully abrogated, the algorithm flow directly automatic jumps to the by hardware
The END OF TRANS flag bit of 14 rows, and judge later the reason of causing affairs to fail；If the original of affairs failure
Because of non-data conflict, lock mechanism will be used to execute this affairs；If affairs are abrogated and again due to data collision
Again number is less than N, then returns to for circulation beginning, re-execute affairs；If more than N, then for circulation is then jumped out in affairs failure, and
The task is put back into task queue tail of the queue；Due to hardware resource, it is possible to occur data collision in single thread；Storage
The L1 grade of the CPU for writing collection of hardware transactional storage model RTM is cached with and may be swapped out by operating system.
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