CN109889271B - Variable frequency scrambling optical module and implementation method - Google Patents

Variable frequency scrambling optical module and implementation method Download PDF

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CN109889271B
CN109889271B CN201910041084.6A CN201910041084A CN109889271B CN 109889271 B CN109889271 B CN 109889271B CN 201910041084 A CN201910041084 A CN 201910041084A CN 109889271 B CN109889271 B CN 109889271B
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adapter
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CN109889271A (en
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王亚丽
肖海清
杨国民
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Wuhan Hengtaitong Technology Co ltd
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Abstract

The invention relates to the technical field of optical communication, in particular to a variable-frequency scrambling code optical module which comprises an adaptation control unit and a frequency controller, wherein the adaptation control unit is respectively and electrically connected with a first adapter, a second adapter and a third adapter, the first adapter, the second adapter and the third adapter are respectively and electrically connected with a multiplexer and are used for multiplexing data from different adapters, the frequency controller is electrically connected with a variable-frequency scrambler and is used for controlling the working frequency of the variable-frequency scrambler, the scrambling code controller is electrically connected with a generator polynomial and is used for controlling a generator polynomial used by the current scrambling code, and the generator polynomial generator is electrically connected with the variable-frequency scrambler. Meanwhile, encryption of special signals and multiple reliable transmission of important control signals can be realized.

Description

Variable frequency scrambling optical module and implementation method
Technical Field
The invention relates to the technical field of optical communication, in particular to a variable-frequency scrambling code optical module and an implementation method thereof.
Background
With the development of communication technology, optical modules are widely applied in the fields of environmental monitoring, power control, industrial control and the like. The characteristics of these fields are that the data are various, the speed is high and low, the speed is several to several tens of megabytes, the speed is 1kb/s, and even the DC level. In order to realize more effective data transmission in these special fields, at present, electric transmission is generally adopted, a server is arranged nearby, and monitoring points are networked through a network. Because the loss of the electricity transmission is large, the distance is short, usually several tens of meters to one or two hundred meters, so that more servers are needed, the networking is complex, and the equipment cost and the maintenance cost are high. In recent years, optical modules have been used in many fields due to the advantages of optical fiber long-distance transmission and low cost of optical modules.
In order to adapt a common hundred mega optical module to the applications in these fields, it is a common practice to specially design the transmitting and receiving circuits of the optical module to adapt to different high and low frequency signals, and at the same time, enable the transmitter and the receiver to work normally. The scheme has the disadvantages that different transmitting and receiving circuits are required to be designed according to different high and low rates, and the optical module of the scheme is difficult to work normally according to various high and low frequency signals and direct current levels.
In order to solve the problems, the invention provides a variable-frequency scrambling code optical module and an implementation method thereof, which adapt and carry out variable-frequency processing on various parameters such as control signals, state signals, data signals and the like generated on a monitoring site to adapt to the transmission state of a network, thereby realizing the monitoring network with long distance, low cost and convenient networking maintenance, and simultaneously realizing scrambling code encryption of special signals and multiple reliable transmission of important control signals.
Disclosure of Invention
The invention aims to solve the defects in the prior art and provides a frequency conversion scrambling code optical module and an implementation method thereof.
In order to achieve the purpose, the invention adopts the following technical scheme:
designing a variable frequency scrambling code optical module, which comprises an adaptive control unit and a frequency controller, wherein the adaptive control unit is respectively electrically connected with a first adapter, a second adapter and a third adapter for controlling the adapters to load data, the first adapter, the second adapter and the third adapter are used for receiving signals collected on site, the first adapter, the second adapter and the third adapter are respectively electrically connected with a multiplexer for multiplexing data from different adapters, the frequency controller is electrically connected with a variable frequency scrambler for controlling the working frequency of the variable frequency scrambler, the scrambling code controller is electrically connected with a generator polynomial for controlling a generator polynomial used by the current scrambling code, the generator polynomial generator is electrically connected with the variable frequency scrambler for providing a scrambling code sequence for the variable frequency scrambler, the multiplexer is electrically connected with the frequency conversion scrambler and used for providing a data sequence for the frequency conversion scrambler, the frequency conversion scrambler is electrically connected with a sending data interface and used for providing data for a sending channel, the frequency controller is electrically connected with the frequency converter, the frequency converter is also electrically connected with a system clock unit, a local buffer and a signal buffer, the system clock unit is electrically connected with a clock generator and used for providing a reference clock for the clock generator, the clock generator is respectively electrically connected with an input register, an N-level buffer, an N-frequency multiplier, a coding expander and an output register, the input register is connected with an external input signal and used for receiving the external input signal, the N-level buffer is electrically connected with the input register and used for buffering the received signal, and the N-frequency multiplier is electrically connected with the N-level buffer, the N frequency multiplier is electrically connected with the coding expander and used for coding the cached data and expanding the coded data according to the requirement of an output signal, the coding expander is electrically connected with the output register, the output register outputs the signal, the signal buffer and the local buffer are both electrically connected with the arithmetic unit, and the arithmetic unit outputs the signal.
Preferably, the signals collected on site can be divided into three categories, namely data signals, status signals and control signals, and the first adapter receives the data signals, the second adapter receives the status signals and the third adapter receives the control signals.
Preferably, the N multiplier may be used for the data signal to integer N according to the following formuladAnd (3) coding of frequency multiplication:
Figure GDA0002532777290000031
wherein:
Nd: is an integer;
Vd: is the input data rate;
Vl: is the line rate;
if Vl/Vd=4,
Then N isd≤2,
The data may be frequency doubled encoded.
Preferably, the N frequency multiplier isControl signal, integer N can be performed according to the following formulacAnd (3) coding of frequency multiplication:
Figure GDA0002532777290000032
wherein:
Nc: is an integer;
Vc: is the input data rate;
Vl: is the line rate.
The invention also provides a method for realizing the frequency conversion scrambling code optical module, which comprises the following steps:
s1, the first adapter, the second adapter and the third adapter transmit the received signals to a multiplexer through an adaptation control unit, and the multiplexer multiplexes the three or more paths of signals after adaptation to generate serial data frame signals;
s2, and the multiplexer transmits the signal to a signal buffer which buffers the signal;
s3, the multiplexer continues to provide a data sequence for the variable-frequency scrambler, the variable-frequency scrambler realizes the transformation of data scrambling code frequency through the frequency controller, and the scrambling code controller controls the generator polynomial generator to generate a polynomial to generate a local scrambling code sequence, so that the generator polynomial provides the local scrambling code sequence for the variable-frequency scrambler;
s4, the frequency conversion scrambler operates and combines the data and the local scrambling code sequence and outputs a frame sequence, and the sequence is sent to the arithmetic unit through a sending data interface;
s5, the input register transmits the received external input signal to an N-level buffer, the N-level buffer transmits the signal to an N-level frequency multiplier, the N-level frequency multiplier processes the signal and transmits the signal to a code expander, and the code expander performs code expansion on the buffered data;
s6, the system clock unit provides a reference clock for the clock generator, the clock generator provides clock signals for the input register, the N-level buffer, the N-multiplier, the coding expander and the output register according to the parameter requirements of the input signal and the output signal, and then the output register outputs the signals;
s7, the frequency converter takes the system clock unit as a reference clock, and generates a required line side clock under the control of the frequency controller;
s8, the local buffer and the signal buffer generate synchronous and aligned signal sequence and local scrambling code sequence under the action of the frequency converter;
and S9, the arithmetic unit is used for carrying out arithmetic combination on the signal sequence and the local scrambling code sequence, outputting the scrambled frame sequence and finally providing the scrambled frame sequence for the light emitting device.
The invention provides a variable frequency scrambling code optical module and a realization method, which have the beneficial effects that: the frequency conversion scrambling code optical module and the implementation method adapt and carry out frequency conversion processing on various parameters such as control signals, state signals, data signals and the like generated on a monitoring site, so that the frequency conversion scrambling code optical module adapts to the transmission state of a network, the monitoring network with long distance, low cost and convenient networking maintenance is realized, and meanwhile, the encryption of special signals and the multiple reliable transmission of important control signals can be realized.
Drawings
Fig. 1 is a schematic structural diagram of a variable frequency scrambling code optical module according to the present invention;
fig. 2 is a schematic circuit structure diagram of a frequency conversion scrambling code optical module adapter provided in the present invention;
fig. 3 is a schematic circuit structure diagram of a frequency-conversion scrambler of the frequency-conversion scrambling code optical module according to the present invention.
In the figure: the system comprises an adaptation control unit 101, a first adapter 102, a second adapter 103, a third adapter 104, a multiplexer 105, a frequency controller 106, a scrambling code controller 107, a generator polynomial generator 108, a frequency conversion scrambler 109, a transmission data interface 110, a system clock unit 201, a clock generator 202, an input register 203, an N-stage buffer 204, an N-multiplier 205, an encoding expander 206, an output register 207, a frequency converter 301, a local buffer 302, a signal buffer 303 and an arithmetic unit 304.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Referring to fig. 1-3, a variable frequency scrambling code optical module includes an adaptation control unit 101 and a frequency controller 106, the adaptation control unit 101 is electrically connected to a first adapter 102, a second adapter 103 and a third adapter 104 respectively for controlling the adapters to load data, and the first adapter 102, the second adapter 103 and the third adapter 104 are used for receiving signals collected on site, the first adapter 102, the second adapter 103 and the third adapter 104 are electrically connected to a multiplexer 105 respectively for multiplexing data from different adapters, the frequency controller 106 is electrically connected to a variable frequency scrambler 109 for controlling the working frequency of the variable frequency scrambler 109, a scrambling code controller 107 is electrically connected to a generator polynomial generator 108 for controlling a generator polynomial for a current scrambling code, the generator polynomial generator 108 is electrically connected to the variable frequency scrambler 109, for providing a scrambling sequence to the variable frequency scrambler 109, and a multiplexer 105 is electrically connected to the variable frequency scrambler 109 for providing a data sequence to the variable frequency scrambler 109.
The frequency conversion scrambler 109 is electrically connected to the transmission data interface 110 for providing data for a transmission channel, the frequency controller 106 is electrically connected to the frequency converter 301, the frequency converter 301 is electrically connected to the system clock unit 201, the local buffer 302 and the signal buffer 303, the system clock unit 201 is electrically connected to the clock generator 202 for providing a reference clock for the clock generator 202, the clock generator 202 is electrically connected to the input register 203, the N-level buffer 204, the N-multiplier 205, the code expander 206 and the output register 207, the input register 203 is connected to an external input signal for receiving an external input signal, and the N-level buffer 204 is electrically connected to the input register 203.
The received signal is buffered, the N-multiplier 205 is electrically connected with the N-level buffer 204 and used for amplifying the buffered signal, the N-multiplier 205 is electrically connected with the code expander 206 and used for encoding the buffered data and expanding the encoded data according to the requirement of the output signal, the code expander 206 is electrically connected with the output register 207, the output register 207 outputs the signal, the signal buffer 303 and the local buffer 302 are electrically connected with the arithmetic unit 304, and the arithmetic unit 304 outputs the signal.
The signals collected in the field can be classified into three categories, namely data signals, status signals and control signals, and the first adapter 102 receives the data signals, the second adapter 103 receives the status signals and the third adapter 104 receives the control signals.
The Nmultiplier 205 may integer N for the data signal according to the following formuladAnd (3) coding of frequency multiplication:
Figure GDA0002532777290000061
wherein:
Nd: is an integer;
Vd: is the input data rate;
Vl: is the line rate;
if Vl/Vd=4,
Then N isd≤2,
The data may be frequency doubled encoded.
The Nmultiplier 205 can perform the integer N for the control signal according to the following formulacAnd (3) coding of frequency multiplication:
Figure GDA0002532777290000071
wherein:
Nc: is an integer;
Vc: is the input data rate;
Vl: is the line rate.
Example 1:
the invention also provides a method for realizing the frequency conversion scrambling code optical module, which comprises the following steps:
s1, the first adapter 102, the second adapter 103, and the third adapter 104 transmit the received signals to the multiplexer 105 through the adaptation control unit 101, and the multiplexer 105 multiplexes the adapted three or more signals to generate a serial data frame signal;
s2, and the multiplexer 105 transmits its signal to the signal buffer 303, and the signal buffer 303 buffers its signal;
s3, the multiplexer 105 continues to provide the data sequence for the variable-frequency scrambler 109, the variable-frequency scrambler 109 transforms the data scrambling frequency through the frequency controller 106, and the scrambling controller 107 controls the generator polynomial generator 108 to generate a polynomial to generate a local scrambling sequence, so that the generator polynomial generator 108 provides the local scrambling sequence for the variable-frequency scrambler 109;
s4, the frequency conversion scrambler 109 operates and combines the data and the local scrambling code sequence to output a frame sequence, and sends the sequence to the arithmetic unit 304 through the sending data interface 110;
s5, the input register 203 transmits the received external input signal to the N-level buffer 204, the N-level buffer 204 transmits the signal to the N-multiplier 205, the N-multiplier 205 processes the signal and transmits the signal to the code expander 206, and the code expander 206 performs code expansion on the buffered data;
and causes the code spreader 206 to encode as follows:
1=(10)
0=(01);
s6, the system clock unit 201 provides the clock generator 202 with the reference clock, and the clock generator 202 provides the clock signals for the input register 203, the N-level buffer 204, the N-multiplier 205, the code expander 206 and the output register 207 according to the parameter requirements of the input signal and the output signal, and outputs the signals through the output register 207;
s7, the frequency converter 301 generates the required line side clock under the control of the frequency controller 106 by using the system clock unit 201 as the reference clock;
s8, the local buffer 302 and the signal buffer 303 generate a synchronous and aligned signal sequence and a local scrambling sequence under the action of the frequency converter 301;
s9, the arithmetic unit 304 performs arithmetic and combination on the signal sequence and the local scrambling sequence, outputs a scrambled frame sequence, and finally provides the scrambled frame sequence to the light emitting device.
Example 2:
the invention also provides a method for realizing the frequency conversion scrambling code optical module, which comprises the following steps:
s1, the first adapter 102, the second adapter 103, and the third adapter 104 transmit the received signals to the multiplexer 105 through the adaptation control unit 101, and the multiplexer 105 multiplexes the adapted three or more signals to generate a serial data frame signal;
s2, and the multiplexer 105 transmits its signal to the signal buffer 303, and the signal buffer 303 buffers its signal;
s3, the multiplexer 105 continues to provide the data sequence for the variable-frequency scrambler 109, the variable-frequency scrambler 109 transforms the data scrambling frequency through the frequency controller 106, and the scrambling controller 107 controls the generator polynomial generator 108 to generate a polynomial to generate a local scrambling sequence, so that the generator polynomial generator 108 provides the local scrambling sequence for the variable-frequency scrambler 109;
s4, the frequency conversion scrambler 109 operates and combines the data and the local scrambling code sequence to output a frame sequence, and sends the sequence to the arithmetic unit 304 through the sending data interface 110;
s5, the input register 203 transmits the received external input signal to the N-level buffer 204, the N-level buffer 204 transmits the signal to the N-multiplier 205, the N-multiplier 205 processes the signal and transmits the signal to the code expander 206, and the code expander 206 performs code expansion on the buffered data;
and causes the code spreader 206 to encode as follows:
1=(01)
0=(10);
s6, the system clock unit 201 provides the clock generator 202 with the reference clock, and the clock generator 202 provides the clock signals for the input register 203, the N-level buffer 204, the N-multiplier 205, the code expander 206 and the output register 207 according to the parameter requirements of the input signal and the output signal, and outputs the signals through the output register 207;
s7, the frequency converter 301 generates the required line side clock under the control of the frequency controller 106 by using the system clock unit 201 as the reference clock;
s8, the local buffer 302 and the signal buffer 303 generate a synchronous and aligned signal sequence and a local scrambling sequence under the action of the frequency converter 301;
s9, the arithmetic unit 304 performs arithmetic and combination on the signal sequence and the local scrambling sequence, outputs a scrambled frame sequence, and finally provides the scrambled frame sequence to the light emitting device.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims (5)

1. A variable frequency scrambling code optical module comprises an adaptation control unit (101) and a frequency controller (106), wherein the adaptation control unit (101) is respectively electrically connected with a first adapter (102), a second adapter (103) and a third adapter (104) for controlling the adapters to load data, the first adapter (102), the second adapter (103) and the third adapter (104) are used for receiving signals collected on site, the first adapter (102), the second adapter (103) and the third adapter (104) are respectively electrically connected with a multiplexer (105) for multiplexing data from different adapters, the frequency controller (106) is electrically connected with a variable frequency scrambler (109) for controlling the working frequency of the variable frequency scrambler (109), and the scrambling code controller (107) is electrically connected with a generator polynomial generator (108), a generator polynomial for controlling the current scrambling code, the generator polynomial (108) is electrically connected to the variable-frequency scrambler (109) for providing a scrambling code sequence to the variable-frequency scrambler (109), the multiplexer (105) is electrically connected to the variable-frequency scrambler (109) for providing a data sequence to the variable-frequency scrambler (109), the variable-frequency scrambler (109) is electrically connected to the transmit data interface (110) for providing data to the transmit channel, the frequency controller (106) is electrically connected to the frequency converter (301), the frequency converter (301) is simultaneously electrically connected to the system clock unit (201), the local buffer (302) and the signal buffer (303), the system clock unit (201) is electrically connected to the clock generator (202) for providing a reference clock to the clock generator (202), and the clock generator (202) is respectively connected to the input register (203), The N-level buffer (204), the N-level frequency multiplier (205), the code expander (206) and the output register (207) are electrically connected, the input register (203) is connected with an external input signal and used for receiving the external input signal, the N-level buffer (204) is electrically connected with the input register (203) and used for buffering the received signal, the N-level frequency multiplier (205) is electrically connected with the N-level buffer (204) and used for amplifying the buffered signal, the N-level frequency multiplier (205) is electrically connected with the code expander (206) and used for encoding the buffered data and expanding the encoded data according to the requirement of the output signal, the code expander (206) is electrically connected with the output register (207), the output register (207) outputs the signal, and the signal buffer (303) and the local buffer (302) are both electrically connected with the arithmetic unit (304), the operator (304) outputs a signal.
2. A variable frequency scrambling code optical module according to claim 1, wherein the signals collected in the field can be divided into three categories, namely data signals, status signals and control signals, and the first adapter (102) receives the data signals, the second adapter (103) receives the status signals and the third adapter (104) receives the control signals.
3. A variable frequency scrambling optical module according to claim 1 wherein the N multiplier (205) is operable for data signals according to the followingFormula integer NdAnd (3) coding of frequency multiplication:
Figure FDA0002532777280000021
wherein:
Nd: is an integer;
Vd: is the input data rate;
Vl: is the line rate;
if Vl/Vd=4,
Then N isd≤2,
The data may be frequency doubled encoded.
4. The optical module of claim 1, wherein the N multiplier (205) is configured to perform an integer N for the control signal according to the following formulacAnd (3) coding of frequency multiplication:
Figure FDA0002532777280000022
wherein:
Nc: is an integer;
Vc: is the input data rate;
Vl: is the line rate.
5. A method for implementing a variable-frequency scrambling optical module according to claim 1, comprising the following steps:
s1, the first adapter (102), the second adapter (103) and the third adapter (104) transmit the received signals to a multiplexer (105) through an adaptation control unit (101), and the multiplexer (105) multiplexes the three or more signals after adaptation to generate a serial data frame signal;
s2, and the multiplexer (105) transmits the signal to the signal buffer (303), and the signal buffer (303) buffers the signal;
s3, the multiplexer (105) continuing to provide the data sequence to the variable frequency scrambler (109), the variable frequency scrambler (109) implementing a frequency transformation of the data scrambling code by the frequency controller (106), and the scrambling controller (107) controlling the generator polynomial generator (108) to generate a polynomial to produce a local scrambling sequence, whereby the generator polynomial generator (108) provides the local scrambling sequence to the variable frequency scrambler (109);
s4, the frequency conversion scrambler (109) operates and combines the data and the local scrambling code sequence to output a frame sequence, and sends the sequence to the arithmetic unit (304) through a sending data interface (110);
s5, the input register (203) transmits the received external input signal to an N-level buffer (204), the N-level buffer (204) transmits the signal to an N-multiplier (205), the N-multiplier (205) processes the signal and then transmits the signal to an encoding spreader (206), and the encoding spreader (206) performs encoding spreading on the buffered data;
s6, the system clock unit (201) provides a reference clock for the clock generator (202), and the clock generator (202) provides clock signals for the input register (203), the N-level buffer (204), the N-multiplier (205), the code expander (206) and the output register (207) according to the parameter requirements of the input signal and the output signal, and then outputs the signals through the output register (207);
s7, the frequency converter (301) takes the system clock unit (201) as a reference clock, and generates a required line side clock under the control of the frequency controller (106);
s8, the local buffer (302) and the signal buffer (303) generate a synchronous and aligned signal sequence and a local scrambling code sequence under the action of the frequency converter (301);
s9, the arithmetic unit (304) carries out arithmetic combination to the signal sequence and the local scrambling sequence, outputs the scrambled frame sequence and finally provides the scrambled frame sequence to the light emitting device.
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CN103595599A (en) * 2012-12-31 2014-02-19 大唐电信科技股份有限公司 Method for designing open type fused EOC
CN106506094A (en) * 2016-12-02 2017-03-15 青岛海信宽带多媒体技术有限公司 Optical module and optical signal receiving circuit

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Publication number Priority date Publication date Assignee Title
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Publication number Priority date Publication date Assignee Title
CN1420642A (en) * 2001-11-21 2003-05-28 北京润光泰力科技发展有限公司 Digital multiplexing method and apparatus for fibre-optic transmission
CN102664683A (en) * 2012-04-27 2012-09-12 北京汉铭通信有限公司 Remote signal processing method and remote unit used in remote optical fiber type wireless distribution systems
CN103595599A (en) * 2012-12-31 2014-02-19 大唐电信科技股份有限公司 Method for designing open type fused EOC
CN106506094A (en) * 2016-12-02 2017-03-15 青岛海信宽带多媒体技术有限公司 Optical module and optical signal receiving circuit

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