CN109766057B - Firmware data processing method and system - Google Patents

Firmware data processing method and system Download PDF

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Publication number
CN109766057B
CN109766057B CN201910011702.2A CN201910011702A CN109766057B CN 109766057 B CN109766057 B CN 109766057B CN 201910011702 A CN201910011702 A CN 201910011702A CN 109766057 B CN109766057 B CN 109766057B
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firmware data
written
data
read
address
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CN109766057A (en
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陈金水
八木敏文
储周硕
刘翔
白王静
李文东
席通
郑君叶
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Chengdu BOE Display Technology Co Ltd
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Chengdu CEC Panda Display Technology Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The embodiment of the application provides a firmware data processing method and a system, wherein the method comprises the following steps: receiving a write-in instruction of a PC (personal computer) end, wherein the write-in instruction comprises information of firmware data to be written in; according to the writing instruction, distributing a target address of a storage component for the firmware data to be written; writing the firmware data to be written into the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address into an address mapping table. The method provided by the embodiment can solve the problem that the device debugging is inconvenient.

Description

Firmware data processing method and system
Technical Field
The embodiment of the application relates to the technical field of firmware data processing, in particular to a firmware data processing method and system.
Background
In the field of panel display, because the types of ICs of various manufacturers are different, the storage conditions of firmware data are also different, and the storage modes corresponding to different memories are different, the processing of firmware data is particularly important, and the problem of inconvenience in debugging exists in the prior art.
Disclosure of Invention
The embodiment of the application provides a firmware data processing method and system, so as to overcome the problem that debugging is inconvenient in the prior art.
In a first aspect, an embodiment of the present application provides a firmware data processing method, including:
receiving a write-in instruction of a PC (personal computer) end, wherein the write-in instruction comprises information of firmware data to be written in;
according to the writing instruction, distributing a target address of a storage component for the firmware data to be written;
writing the firmware data to be written into the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address into an address mapping table.
In one possible design, the firmware data to be written includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In one possible design, the writing the firmware data to be written to the target address includes:
establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a format mapping table;
converting the data format of the firmware data to be written into a Binary file format;
and writing the converted firmware data to be written into the target address.
In a second aspect, an embodiment of the present application provides a firmware data processing method, including: receiving a reading instruction of a PC (personal computer) end, wherein the reading instruction comprises information of firmware data to be read;
searching an address mapping table according to the information of the firmware data to be read to obtain a storage address of the firmware data to be read in a storage component;
and sending the data stored under the storage address to the PC terminal as the firmware data to be read.
In one possible design, the firmware data to be read includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In a possible design, the sending the data stored at the storage address to the PC as the firmware data to be read includes:
searching a format mapping table to obtain a data format corresponding to the storage address;
converting the data stored under the storage address into a data format corresponding to the storage address;
and sending the converted data serving as the firmware data to be read to the PC terminal.
In a possible design, the receiving a reading instruction from the PC includes:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
In a third aspect, an embodiment of the present application provides a firmware data processing apparatus, including:
the writing instruction receiving module is used for receiving a writing instruction of the PC end, wherein the writing instruction comprises information of firmware data to be written;
the target address allocation module is used for allocating a target address of a target storage component for the firmware data to be written according to the writing instruction;
and the writing module is used for writing the firmware data to be written into the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address into a preset address mapping table.
In one possible design, the firmware data to be written includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In one possible design, the write module is specifically configured to: establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a preset format mapping table;
converting the data format of the firmware data to be written into a Binary file format;
and writing the converted firmware data to be written into the target address.
In a fourth aspect, an embodiment of the present application provides a firmware data processing apparatus, including:
the reading instruction receiving module is used for receiving a reading instruction of the PC end, wherein the reading instruction comprises information of firmware data to be read;
the storage address acquisition module is used for searching a preset address mapping table according to the information of the firmware data to be read to acquire a storage address of the firmware data to be read in a target storage component;
and the sending module is used for sending the data stored under the storage address to the PC terminal as the firmware data to be read.
In one possible design, the firmware data to be read includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In a possible design, the sending module is specifically configured to:
searching a preset format mapping table to obtain a data format corresponding to the storage address;
converting the data stored under the storage address into a data format corresponding to the storage address;
and sending the converted data serving as the firmware data to be read to the PC terminal.
In a possible design, the read instruction receiving module is specifically configured to:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
In a fifth aspect, an embodiment of the present application provides a firmware data management system, including: a storage component, a PC terminal, and the firmware data processing device of the third aspect and the third aspect.
In a sixth aspect, an embodiment of the present application provides a firmware data management system, including: the storage component, the PC terminal, and the fourth aspect of the various possible designs of the firmware data processing device.
In a seventh aspect, an embodiment of the present application provides a firmware data processing device, including: at least one processor and memory;
the memory stores computer-executable instructions;
the at least one processor executing the computer-executable instructions stored by the memory causes the at least one processor to perform the firmware data processing method as described above in the first aspect and various possible designs of the first aspect.
In an eighth aspect, an embodiment of the present application provides a firmware data processing device, including: at least one processor and memory;
the memory stores computer-executable instructions;
the at least one processor executing the computer-executable instructions stored by the memory causes the at least one processor to perform the firmware data processing method as described above in the second aspect and various possible designs of the second aspect.
In a ninth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, and when a processor executes the computer-executable instructions, the firmware data processing method according to the first aspect and various possible designs of the first aspect is implemented.
In a tenth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, and when a processor executes the computer-executable instructions, the firmware data processing method according to the second aspect and various possible designs of the second aspect is implemented.
According to the firmware data processing method and system provided by the embodiment, a write-in instruction of a PC (personal computer) end is received, a target address of a storage component is allocated to firmware data to be written in according to information of the firmware data in the write-in instruction, the firmware data to be written in is written to the target address at the same time, a mapping relation between the firmware data to be written in and the target address is established to an address mapping table, and unified management of the firmware data to be written in is achieved. According to the scheme, all the firmware data to be written can be written into the target addresses of the distributed storage components together, writing is convenient, an address mapping table is established according to the mapping relation between the firmware data to be written and the target addresses, and unified management of the firmware data to be written can be achieved. The scheme can realize unified management of firmware data, improve data processing efficiency and solve the problem of inconvenient debugging.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a diagram illustrating a manner of storing firmware data according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram illustrating a manner of uniformly storing firmware data in a firmware data processing method according to a third embodiment of the present application;
fig. 3 is a first flowchart illustrating a firmware data processing method according to a second embodiment of the present application;
fig. 4 is a schematic diagram illustrating address space allocation in a firmware data processing method according to a fourth embodiment of the present application;
fig. 5 is a second flowchart illustrating a firmware data processing method according to a fifth embodiment of the present application;
fig. 6 is a third flowchart illustrating a firmware data processing method according to a sixth embodiment of the present application;
fig. 7 is a fourth flowchart illustrating a firmware data processing method according to a seventh embodiment of the present application;
fig. 8 is a first schematic structural diagram of a firmware data processing apparatus according to an eighth embodiment of the present application;
fig. 9 is a second schematic structural diagram of a firmware data processing apparatus according to a ninth embodiment of the present application;
fig. 10 is a schematic structural diagram of a firmware data management system according to a tenth embodiment of the present application;
fig. 11 is a schematic structural diagram of a firmware data processing device according to an eleventh embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims of the present application and in the above-described drawings (if any) are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic diagram of a manner of storing firmware data according to an embodiment of the present application, where the firmware is a program, the firmware data is a code (program code), and the stored firmware data can be applied in the display field.
Referring to fig. 1, in the manner of storing firmware data provided in the first embodiment of the present application, different types of codes are stored in two Flash memories, one Flash memory is integrated on the TCON Board, and the other Flash memory is integrated on the Left SPWB Board, and the integration on the TCON Board may further include: the power management integrated circuit PMIC and the display chip PGama IC are provided, wherein the PMIC and the PGama IC are both provided with a built-in ROM, and different types of codes are stored in the following modes: the Tcon Code is stored in Flash on a Tcon Board, the PC end reads/writes the Tcon Code through a Tcon IC through an I2C bus, and the Tcon IC end reads/writes the Tcon Code through an SPI bus; PMIC Code is stored in a built-in ROM of PMIC, and the PC terminal reads/writes the PMIC Code through I2C; the PGama Code is stored in a ROM built in a PGama IC, and the PC end reads/writes the PGama Code through an I2C bus; in the PGama IC/PMIC integrated with the VCOM functional module, VCOM Code is stored in a ROM built in the PGama IC/PMIC, and the VCOM Code is read/written on the PC terminal through an I2C bus; in a standalone PVcom IC, a VCOM Code is stored in a ROM built in the PVcom, and the VCOM Code is read/written on the PC side through an I2C bus; the Demura Code is stored in Flash on the SPWB Board, and the PC side reads/writes the Demura Code through the SPI bus. Different codes are stored in different memories, which facilitates device debugging.
In order to facilitate uniform management of firmware data, a schematic diagram of a manner of uniformly storing firmware data is provided in the second embodiment of the present application. As shown in fig. 2, in this embodiment, different firmware data are mainly managed by the TCON chip in a unified manner, and for different types of codes (firmware data), the file format stored in Flash integrated on the SPWB Board needs to be coded in a unified manner, so that the TCON chip manages different firmware data in a unified manner.
In this embodiment, only a single Flash is needed, and the single Flash is integrated on the SPWB. In addition, the TCON Board is integrated with a TCON IC, a PMIC and a PGama IC, signal transmission can be carried out among a TCON chip, the PMIC and the PGama IC which are integrated on the TCON Board, the TCON chip is communicated with a single Flash through an SPI bus, a PC end is communicated with the TCON chip through an I2C bus, namely the PMIC, the PGama IC and the Flash are respectively communicated with the TCON chip and then communicated with the PC end through the TCON chip, and the TCON chip reads/writes a target address of the single Flash through the SPI bus.
Referring to fig. 3, the present application provides a firmware data processing method, referring to fig. 3, fig. 3 is a first flowchart illustrating a firmware data processing method according to a second embodiment of the present application, as shown in fig. 3, the method includes:
s101, receiving a writing instruction of a PC end, wherein the writing instruction comprises information of firmware data to be written.
In practical applications, the execution subject of this embodiment may be a firmware data processing device, and the implementation manner of the processing device is various, for example, the processing device may be program software, or may also be a medium storing a related computer program, such as a usb disk, a cloud disk, and the like; alternatively, the processing apparatus may also be a physical device, such as a chip, a central control board TCON, or the like, loaded or installed with an associated computer program.
In this embodiment, the communication with the PC side may be performed through an I2C bus. The information of the firmware data to be written may be an identifier of the firmware data to be written, and the firmware data to be written may be obtained by identifying the identifier.
Specifically, a path for storing the firmware data to be written in by the PC end is obtained according to the identifier, and the firmware data to be written in is obtained according to the path.
And S102, distributing a target address of a storage component for the firmware data to be written according to the writing instruction.
Wherein the firmware data to be written comprises at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In this embodiment, different firmware data to be written are stored in different target addresses of the storage component, that is, all the firmware data to be written are stored in a single Flash, so that the burning efficiency of the firmware data to be written is improved, the production cost is reduced, and the unified management of register codes, power management integrated circuit codes, display parameter codes, virtual computer codes and optical compensation codes is realized. In the storage process, the target address of the storage component allocated to the firmware data to be written may be a preset target address at which different firmware data to be written is correspondingly stored in the storage component, that is, the target address is allocated to the firmware data to be written according to a preset allocation mode; the target address of the storage component allocated to the firmware data to be written may also be randomly allocated, and it is only required to ensure that different target addresses of the storage component are allocated to different firmware data to be written, so as to implement that different firmware data are stored in different target addresses of the storage component.
For example, refer to the schematic diagram of address space allocation in the firmware data processing method shown in fig. 4. The specific allocation of the target address of the storage component for the firmware data to be written is as follows: storing an optical compensation Code Demura Code in a preset address space Bank B of a single Flash, storing a virtual computer Code VCOM Code in a preset address space Bank C of the single Flash, storing a register Code Tcon Code in a preset address space Bank D of the single Flash (storage component) on the SPWB Board, storing a power management integrated circuit Code PMIC Code in a preset address space Bank E of the single Flash, and storing a display parameter Code PGama Code in a preset address space Bank F of the single Flash. The method includes the steps that Panel information is stored in a preset address space Bank A of a single Flash, Reserved is stored in a preset address space Bank G of the single Flash, a ROM does not need to be arranged in a PMIC and a PGama IC, a PC end communicates with a Tcon IC through an I2C bus according to an allocated target address, then the preset address space (target address) in the single Flash is read/written through the Tcon IC through an SPI bus, reading/writing of different types of codes (firmware data) is facilitated, unified management of the codes is achieved, and BOM cost is reduced.
S103, writing the firmware data to be written into the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address into an address mapping table.
In this embodiment, the address mapping table may be preset, or may be established in a process of writing the firmware data to be written to the target address after the target address is allocated.
If the address mapping table is preset, the address mapping table stores the mapping relationship between the firmware data to be written and the target address, and the writing of the firmware data to be written into the target address can write the firmware data to be written into the target address according to the mapping relationship in the address mapping table.
If the address mapping table is established in the process of writing the firmware data to be written to the target address, analyzing the mapping relation between the firmware data to be written and the target address according to an allocation rule for allocating the firmware data to be written to the target address, establishing the address mapping table, and storing the mapping relation into the address mapping table. And when the writing instruction of the PC end is waited to be received again, the written target address can be searched according to the established address mapping table, and the firmware data to be written is written in the target address. By establishing the address mapping table, the target address stored in the single Flash is convenient to access.
The firmware data processing method provided by this embodiment receives a write instruction from a PC, allocates a target address of a storage component to the firmware data to be written according to information of the firmware data in the write instruction, writes the firmware data to be written to the target address, establishes a mapping relationship between the firmware data to be written and the target address to an address mapping table, and implements unified management of the firmware data to be written. According to the scheme, all the firmware data to be written can be written into the target address of the allocated storage component together, so that writing is facilitated, and the data processing efficiency is improved. The scheme can solve the problems of inconvenience in debugging and operation management due to various storage devices and scattered firmware data distribution.
Fig. 5 is a second flowchart of a firmware data processing method according to a fifth embodiment of the present application, and this embodiment describes, based on the foregoing embodiment, a specific implementation process of the foregoing embodiment S103 in detail. As shown in fig. 5, the writing the firmware data to be written to the target address may include:
s201, establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a format mapping table;
s202, converting the data format of the firmware data to be written into a Binary file format;
and S203, writing the converted firmware data to be written into the target address.
In this embodiment, the format mapping table may be preset or established in a process of writing the firmware data to be written into a target address for data conversion. If the format mapping table is established in the process of writing the firmware data to be written into the target address for data conversion, the specific process may include: performing unified conversion of formats according to the writing of the firmware data to be written into the target address, for example, converting the format A of the firmware data to be written into the format C, and converting the format B of the firmware data to be written into the format C; and establishing a mapping relation between a target address for writing the firmware data to be written and the data format of the firmware data to be written, establishing a format mapping table, and storing the mapping relation between the data formats into the format mapping table. And when a reading instruction of the PC end is received, the read target address can be searched according to the established format mapping table, so that the firmware data to be read is read.
Wherein, the data format of the firmware data to be written is converted into Binary file format, and the converted firmware data to be written is written to the target address, thereby realizing the uniform management of all the firmware data to be written,
in the specific implementation process, all the firmware data to be written can be conveniently and uniformly written in the same format through the address mapping table and the format mapping table, the target address of the firmware data to be written can be quickly found, the burning efficiency is high, the storage space of a single Flash is fully utilized, and the production cost is reduced. The scheme can realize unified management of firmware data, improve data processing efficiency, and does not need to occupy a plurality of storage components, reduce size and cost and improve integration level.
Referring to fig. 6, fig. 6 is a schematic flowchart third of a firmware data processing method according to a sixth embodiment of the present application. As shown in fig. 6, the method includes:
s301, receiving a reading instruction of the PC end, wherein the reading instruction comprises information of firmware data to be read.
In this embodiment, the information of the firmware data to be read may be an identifier of the firmware data to be read, and the firmware data to be read may be obtained by identifying the identifier. Here, the identifier of the firmware data to be read is identical to the identifier of the firmware data to be written.
S302, according to the information of the firmware data to be read, searching an address mapping table to obtain a storage address of the firmware data to be read in a storage component.
Wherein the firmware data to be read comprises at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In this embodiment, different firmware data to be read are stored in different target addresses of the storage component, where a mapping relationship exists between the firmware data to be read and the target addresses, the mapping relationship is stored in an address mapping table, and a storage address of the firmware data to be read in the storage component can be obtained by looking up the address mapping table. The target addresses may be preset or randomly allocated, so as to ensure that different target addresses of the storage component are allocated to different firmware data to be read.
For example, it is possible to obtain that the register code is stored in a preset address space Bank D of a single Flash (SPI Flash, a storage component in fig. 1) on the SPWB Board according to an address mapping table, the power management integrated circuit code is stored in a preset address space Bank E of the single Flash, the display parameter code is stored in a preset address space Bank F of the single Flash, the virtual computer code is stored in a preset address space Bank C of the single Flash, and the optical compensation code is stored in a preset address space Bank B of the single Flash.
And S303, sending the data stored in the storage address to the PC terminal as the firmware data to be read.
In this embodiment, the data stored at the storage address is the firmware data to be read, and is communicated with the PC end through an I2C bus, that is, the firmware data to be read is sent to the PC end.
In the firmware data processing method provided by this embodiment, a read instruction of a PC end is received, and according to information of firmware data to be read in the read instruction, an address mapping table is searched to obtain a storage address of the firmware data to be read in a storage component, where data stored at the storage address is the firmware data to be read, and the firmware data to be read is sent to the PC end. The scheme can solve the problems of inconvenience in debugging and operation management due to various storage devices and scattered firmware data distribution.
Referring to fig. 7, fig. 7 is a fourth schematic flowchart of a firmware data processing method according to a seventh embodiment of the present application, and this embodiment describes in detail a specific implementation process of the foregoing embodiment S303 based on the embodiment of fig. 6. As shown in fig. 7, the sending the data stored at the storage address to the PC as the firmware data to be read may include:
s401, searching a format mapping table to obtain a data format corresponding to the storage address;
s402, converting the data stored in the storage address into a data format corresponding to the storage address;
and S403, sending the converted data serving as the firmware data to be read to the PC terminal.
In a specific implementation process, the format mapping table may be preset or established in a process of writing the firmware data to be written into a target address for data conversion. And establishing a mapping relation between a target address and a data format of the firmware data to be written in the format mapping table, and obtaining the data format corresponding to the target address according to the mapping relation between the data formats, wherein the target address is the storage address. For example, the format of the firmware data to be read at the storage address is format C, and according to the mapping relationship between the target address and the data format of the firmware data to be written, whether the firmware data to be read in format C is converted into format a or format B can be obtained.
The data format of the firmware data to be read is unified into a Binary file format, the data in the Binary file format is converted into the data format corresponding to the storage address according to the data stored in the storage address, and the converted firmware data to be read is sent to a PC (personal computer) end, so that reading is facilitated, and unified management of all the firmware data to be read is realized.
Optionally, in this embodiment, on the basis of the embodiment in fig. 5 or fig. 6, a detailed description is given to a specific implementation process of S301 in this embodiment. The receiving of the reading instruction from the PC end may include:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
In a specific implementation process, when a developer or a user maintains firmware data stored in a target address, the developer or the user is received to send a maintenance instruction through a PC terminal, where the maintenance instruction includes information of the firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained, and then a read instruction sent by the PC terminal according to the maintenance instruction is received, so that the PC terminal can read the firmware data to be maintained stored in the target address.
According to the firmware data processing method provided by the embodiment, by searching the target address mapping table, the storage address of the firmware data to be read can be quickly and accurately acquired, so that the firmware data to be read is acquired and sent to the PC terminal. The scheme can realize unified management of firmware data, improve data processing efficiency, and does not need to occupy a plurality of storage components, reduce size and cost and improve integration level.
Fig. 8 is a first schematic structural diagram of a firmware data processing apparatus according to an eighth embodiment of the present application. As shown in fig. 8, the firmware data processing device 50 includes: a write command receiving module 501, a target address allocating module 502, and a writing module 503.
A write instruction receiving module 501, configured to receive a write instruction from a PC, where the write instruction includes information of firmware data to be written;
a target address allocation module 502, configured to allocate a target address of a target storage unit for the firmware data to be written according to the write instruction;
a writing module 503, configured to write the firmware data to be written to the target address, establish a mapping relationship between the firmware data to be written and the target address, and store the mapping relationship between the firmware data to be written and the target address to a preset address mapping table.
The apparatus provided in this embodiment may be used to implement the technical solutions of the fourth to fifth embodiments of the method, which have similar implementation principles and technical effects, and this embodiment is not described herein again.
In one possible design, the firmware data to be written includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In one possible design, the writing module 503 is specifically configured to: establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a preset format mapping table;
converting the data format of the firmware data to be written into a Binary file format;
and writing the converted firmware data to be written into the target address.
Fig. 9 is a second schematic structural diagram of a firmware data processing apparatus according to a ninth embodiment of the present application. As shown in fig. 9, the firmware data processing device 60 includes: a read instruction receiving module 601, a storage address obtaining module 602, and a sending module 603.
A read instruction receiving module 601, configured to receive a read instruction from a PC, where the read instruction includes information of firmware data to be read;
a storage address obtaining module 602, configured to search a preset address mapping table according to the information of the firmware data to be read, to obtain a storage address of the firmware data to be read in a target storage device;
a sending module 603, configured to send the data stored in the storage address to the PC end as the firmware data to be read.
The apparatus provided in this embodiment may be used to implement the technical solutions of the sixth to seventh embodiments of the method, which have similar implementation principles and technical effects, and this embodiment is not described herein again.
In one possible design, the firmware data to be read includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
In one possible design, the sending module 603 is specifically configured to:
searching a preset format mapping table to obtain a data format corresponding to the storage address;
converting the data stored under the storage address into a data format corresponding to the storage address;
and sending the converted data serving as the firmware data to be read to the PC terminal.
In one possible design, the read instruction receiving module 601 is specifically configured to:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
Fig. 10 is a schematic structural diagram of a firmware data management system according to a tenth embodiment of the present invention. As shown in fig. 10, the system provided in this embodiment includes a storage part 701, a PC terminal 702, and a firmware data processing apparatus 703 described in the above embodiment.
The following explains the firmware data processing process with reference to a specific application scenario as follows:
the firmware data processing apparatus in the architecture may be the firmware data processing apparatus of embodiment eight and/or embodiment nine. When the firmware data processing device in the architecture is the firmware data processing device of the embodiment eight and/or the firmware data processing device of the embodiment nine, the firmware data processing device can be implemented by a single device, that is, a single device integrated with the functions of the embodiment eight and the embodiment nine.
For example, the firmware data processing apparatus 703 according to the above-mentioned embodiment is integrated in the storage unit 701, when writing firmware data in the storage unit 701, the PC 702 communicates with the firmware data processing apparatus 703 through the I2C bus, the PC 702 sends a write instruction to the firmware data processing apparatus 703, the firmware data processing apparatus 703 receives a write instruction of the PC 702, the write instruction includes information of the firmware data to be written, and according to the write instruction, allocates a target address of the storage unit to the firmware data to be written, and establishes a mapping relationship between the target address and a data format of the firmware data to be written to a format mapping table, converts the data format of the firmware data to be written to a Binary file format, writes the converted firmware data to be written to the target address, and writes the firmware data to be written to the target address, and establishing a mapping relation between the firmware data to be written and the target address to an address mapping table, so that the unified management of the firmware data to be written is realized, and the writing and the debugging are convenient.
When reading data from the storage section 701, the PC side 702 communicates with the firmware data processing apparatus 703 via the I2C bus, and the PC side 702 sends a read instruction to the firmware data processing apparatus 703. The firmware data processing apparatus 703 receives a read instruction of the PC 702, where the read instruction includes information of firmware data to be read. The firmware data processing device 703 searches an address mapping table according to the information of the firmware data to be read to obtain a storage address of the firmware data to be read in a storage component, searches a format mapping table to obtain a data format corresponding to the storage address, converts the data stored at the storage address into the data format corresponding to the storage address, sends the converted data as the firmware data to be read to the PC end 702, wherein when the firmware data stored in the storage component needs to be maintained, the PC end 702 sends a maintenance instruction to the firmware data processing device 703, the firmware data processing device 703 receives a reading instruction sent by the PC end according to the maintenance instruction, the maintenance instruction includes the information of the firmware data to be maintained, reads the firmware data to be maintained, namely the firmware data to be read, according to the information of the firmware data to be maintained, the reading is convenient, and the unified management of the firmware data to be written is realized.
For example, firmware (firmware data) required by the panel can be stored in a single Flash on the SPWB Board, and the storage, reading, and writing modes of each Code are as follows:
1. the register Code Tcon Code is stored in an address space Bank D preset by Flash, and the PC side communicates with the Tcon IC through an I2C bus, and then reads and writes the address space Bank D through an SPI bus via the Tcon IC (firmware data processing device).
2. A power management integrated circuit Code PMIC Code is stored in an address space Bank E preset by Flash, a PC terminal is communicated with a Tcon IC through an I2C bus, and then the address space Bank E is read and written through the Tcon IC through an SPI bus;
3. the display parameter Code PGama Code is stored in an address space Bank F preset in Flash, the PC end communicates with a Tcon IC through an I2C bus, and then the address space Bank F is read/written through an SPI bus by the Tcon IC;
4. the virtual computer Code VCOM Code is stored in an address space Bank C preset by Flash, the PC end communicates with a Tcon IC through an I2C bus, and then the address space Bank C is read/written through the SPI bus by the Tcon IC;
5. the optical compensation code Demura Cod is stored in an address space Bank B preset by Flash, and the PC side communicates with the Tcon IC through an I2C bus, and then passes through the SPI bus address space Bank B via the Tcon IC.
The process fully utilizes the storage space of a single Flash, reduces the number of external flashes, removes the ROM integrated in the IC, can reduce the BOM cost, stores all the codes in the single Flash, realizes unified management, is convenient to read and write, improves the data processing efficiency, does not need to occupy a plurality of storage components, reduces the size and reduces the cost, improves the integration level, and can solve the problems that the storage devices are various, the distribution of firmware data is dispersed, and the debugging and the operation management are not convenient.
Fig. 11 is a schematic hardware configuration diagram of a firmware data processing device according to an eleventh embodiment of the present application. As shown in fig. 11, the firmware data processing device 80 of the present embodiment includes: a processor 801 and a memory 802; wherein
A memory 802 for storing computer-executable instructions;
the processor 801 is configured to execute the computer-executable instructions stored in the memory to implement the steps performed by the receiving device in the above embodiments. Reference may be made in particular to the description relating to the method embodiments described above.
An embodiment of the present application further provides a computer-readable storage medium, where a computer executing instruction is stored in the computer-readable storage medium, and when a processor executes the computer executing instruction, the firmware data processing method as described above is implemented.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the modules is only one logical division, and other divisions may be realized in practice, for example, a plurality of modules may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form.
The modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
In addition, functional modules in the embodiments of the present application may be integrated into one processing unit, or each module may exist alone physically, or two or more modules are integrated into one unit. The unit formed by the modules can be realized in a hardware form, and can also be realized in a form of hardware and a software functional unit.
The integrated module implemented in the form of a software functional module may be stored in a computer-readable storage medium. The software functional module is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute some steps of the methods according to the embodiments of the present application.
It should be understood that the Processor may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present invention may be embodied directly in a hardware processor, or in a combination of the hardware and software modules within the processor.
The memory may comprise a high-speed RAM memory, and may further comprise a non-volatile storage NVM, such as at least one disk memory, and may also be a usb disk, a removable hard disk, a read-only memory, a magnetic or optical disk, etc.
The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, the buses in the figures of the present application are not limited to only one bus or one type of bus.
The storage medium may be implemented by any type or combination of volatile and non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be integral to the processor. The processor and the storage medium may reside in an Application Specific Integrated Circuits (ASIC). Of course, the processor and the storage medium may reside as discrete components in an electronic device or host device.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The foregoing program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims (7)

1. A method for processing firmware data, comprising:
receiving a write-in instruction of a PC (personal computer) end, wherein the write-in instruction comprises information of firmware data to be written in;
according to the writing instruction, distributing a target address of a storage component for the firmware data to be written; storing all the firmware data to be written in a single Flash;
writing the firmware data to be written to the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address to an address mapping table;
the writing the firmware data to be written to the target address includes:
establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a format mapping table;
converting the data format of the firmware data to be written into a Binary file format;
writing the converted firmware data to be written into the target address; the firmware data to be written includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
2. A method for processing firmware data, comprising:
receiving a reading instruction of a PC (personal computer) end, wherein the reading instruction comprises information of firmware data to be read;
searching an address mapping table according to the information of the firmware data to be read to obtain a storage address of the firmware data to be read in a storage component; all the firmware data to be read are stored in a single Flash;
taking the data stored under the storage address as the firmware data to be read, and sending the data to the PC end;
the sending the data stored in the storage address to the PC terminal as the firmware data to be read includes:
searching a format mapping table to obtain a data format corresponding to the storage address;
converting the data stored under the storage address into a data format corresponding to the storage address;
sending the converted data serving as the firmware data to be read to the PC end;
the firmware data to be read includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
3. The method according to claim 2, wherein the receiving of the reading instruction from the PC comprises:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
4. A firmware data processing apparatus, comprising:
the writing instruction receiving module is used for receiving a writing instruction of the PC end, wherein the writing instruction comprises information of firmware data to be written;
a target address allocation module, configured to allocate a target address of a target storage component to the firmware data to be written according to the write instruction; storing all the firmware data to be written in a single Flash;
the writing module is used for writing the firmware data to be written to the target address, establishing a mapping relation between the firmware data to be written and the target address, and storing the mapping relation between the firmware data to be written and the target address to a preset address mapping table;
the write module is specifically configured to: establishing a mapping relation between the target address and the data format of the firmware data to be written, and storing the mapping relation between the target address and the data format of the firmware data to be written into a preset format mapping table;
converting the data format of the firmware data to be written into a Binary file format;
writing the converted firmware data to be written into the target address; the firmware data to be written includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
5. A firmware data processing apparatus, comprising:
the reading instruction receiving module is used for receiving a reading instruction of the PC end, wherein the reading instruction comprises information of firmware data to be read;
the storage address acquisition module is used for searching a preset address mapping table according to the information of the firmware data to be read to acquire a storage address of the firmware data to be read in a target storage component; all the firmware data to be read are stored in a single Flash;
the sending module is used for sending the data stored under the storage address to the PC end as the firmware data to be read;
the sending module is specifically configured to:
searching a preset format mapping table to obtain a data format corresponding to the storage address;
converting the data stored under the storage address into a data format corresponding to the storage address;
sending the converted data serving as the firmware data to be read to the PC end;
the firmware data to be read includes at least one of: register code, power management integrated circuit code, display parameter code, virtual computer code, and optical compensation code.
6. The apparatus of claim 5, wherein the read instruction receiving module is specifically configured to:
receiving a reading instruction sent by a PC end according to a maintenance instruction, wherein the maintenance instruction comprises information of firmware data to be maintained, and the information of the firmware data to be read is the information of the firmware data to be maintained.
7. A firmware data management system, comprising: a storage component, a PC terminal, and a firmware data processing device as claimed in any one of claims 4 and/or 5-6.
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