CN109756294A - A kind of user equipment for wireless communication, the method and apparatus in base station - Google Patents

A kind of user equipment for wireless communication, the method and apparatus in base station Download PDF

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Publication number
CN109756294A
CN109756294A CN201711061889.4A CN201711061889A CN109756294A CN 109756294 A CN109756294 A CN 109756294A CN 201711061889 A CN201711061889 A CN 201711061889A CN 109756294 A CN109756294 A CN 109756294A
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China
Prior art keywords
bit
block
blockette
information block
check
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CN201711061889.4A
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CN109756294B (en
Inventor
陈晋辉
张晓博
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Shanghai Langbo Communication Technology Co Ltd
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Shanghai Langbo Communication Technology Co Ltd
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Priority to US16/177,753 priority Critical patent/US10547330B2/en
Publication of CN109756294A publication Critical patent/CN109756294A/en
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Abstract

Method and apparatus in the user equipment that this application discloses a kind of for wireless communication, base station.Base station equipment sequentially generates first information block, it executes the first channel coding and sends the first wireless signal, wherein, it include the bit in the first blockette in the first information block, the first information block be used to generate L check bit, the first information block and the L check bit are sequentially mapped in first bit block after interweaving, first bit block is used as the input of first channel coding, the value of first blockette is related with the Q, bit in first blockette is in position of the position in first bit block all in the L check bit in first bit block before preceding check bit.Present invention take advantage of that the characteristic of Polar code serial decoding is judged in advance using check bit using filling bit as bit is freezed, improves decoding performance.

Description

A kind of user equipment for wireless communication, the method and apparatus in base station
Technical field
The present invention relates to the transmission plans of the wireless signal in wireless communication system, more particularly to the biography of channel coding Defeated method and apparatus.
Background technique
Polarization code (Polar Codes) is a kind of first by Bi Erken university, Turkey Erdal Arikan professor in 2008 Symmetric binary input discrete memoryless channel(DMC) (B-DMC, Binary input may be implemented in the encoding scheme of secondary proposition Discrete Memoryless Channel) capacity code building method.In 3GPP (3rd GenerationPartner Project, third generation cooperative partner program) in RAN1#87 meeting, 3GPP has determined use Control channel encoding scheme of the Polar code scheme as 5G eMBB (enhancing mobile broadband) scene.
Different DCI (Downlink in traditional LTE (Long Term Evolution, long term evolution) system Control Information, Downlink Control Information) format corresponds to different coding bit numbers, UE (User Equipment, user equipment) all possible DCI format according to corresponding to current transmission mode to carrying DCI PDCCH (Physical Downlink ControlChannel) carries out blind examination.It is right that the method for reseptance of this PDCCH will cause DCI institute The blind examination number of the side UE is consequently increased when the amount of bits candidate item increase answered.
Summary of the invention
Inventors discovered through research that for the information bit within the scope of certain amount, the channel coding based on polarization code The length of input bit block corresponding to device is fixed with used polarization code, and difference only is to freeze bit number The difference of amount.This characteristic of polarization code can be used for filling the DCI format of different length to the bit block biography of equal length It is defeated, and length corresponding to DCI format can be obtained by the format identification (FID) domain in DCI.For the mitigation side UE blind examination burden The considerations of, Distributed C RC (Cyclic Redundancy Check, cyclic redundancy check) bit is introduced into based on polarization code Channel coding is interleaved DCI bit before carrying out polarization code coding to introduce.Therefore, how in DCI format Middle placement format identification (FID) domain is used using the quantity of determination filling bit as early as possible and by filling bit as bit is freezed to improve Decoding performance is a urgent problem to be solved.
In view of the above-mentioned problems, the present invention provides solutions.It should be noted that in the absence of conflict, this Shen The feature in embodiment and embodiment please can be arbitrarily combined with each other.For example, embodiment and implementation in the base station of the application Feature in example can be applied in user equipment, and vice versa.
This application discloses a kind of methods in base station equipment that be used to wirelessly communicate, wherein includes:
First information block is generated, the first information block includes by the bit and Q filling bit in M blockette K bit of composition, the M are greater than 1 positive integer, and the Q is nonnegative integer, and the K is greater than 1 positive integer;
The first channel coding is executed, the first bit block is used for the input of first channel coding, first letter Road coding is based on polarization code, and first bit block includes the K bit and L check bit, the first information block quilt For generating the L check bit, the L is positive integer;
The first wireless signal is sent, the output of first channel coding be used to generate first wireless signal;
Wherein, any blockette in the M blockette is made of positive integer bit, the first blockette It is a blockette in the M blockette, first blockette is made of P bit, and the P is just whole Number;The value of first blockette is related with the information format of the first information block, alternatively, first blockette Value it is related with the Q;The first information block and the L check bit are sequentially mapped to described the after interweaving In one bit block, position of the P bit in first bit block is all before the first check bit, and described first Check bit is position of the L check bit in first bit block near preceding check bit, first school Test bit in first bit block previous adjacent bit and the latter adjacent bit be all in the first information block Bit.
As one embodiment, the above method is advantageous in that, first check bit can decoding process by with In determining whether the decoding for being directed to first blockette is correct, to improve decoding reliability, translating for bad code is reduced Code delay.
As one embodiment, the polarization code is by a bit block and a line number and columns be all N Crow how Gram matrix (Kronecker Matrix) is multiplied obtained bit block, and the N is 2 n times power, and the n is positive integer.
As a sub- embodiment, a bit in the bit block is referred to as a sub-channels, the sequence of subchannel It is number identical as the line number of the Crow Neck matrix.
As one embodiment, serial decoding be used to decode polarization code.
As one embodiment, a bit refer to the bit in the position in a bit block where bit Serial number in the bit block, the serial number are used for determining the object of subsequent operation, and the lesser bit of serial number is described It is located further forward in bit block.
As one embodiment, first bit block according to the corresponding coefficient of reliability of each bit from small to large Arrangement, smaller more forward of coefficient of reliability.
As one embodiment, the coefficient of reliability and subchannel serial number are corresponded.
As one embodiment, first bit block assumes that each bit is corresponding according to the base station equipment Decoding serial number from morning to night arrange, it is more early translate come it is more forward.
As one embodiment, first bit block includes freezing bit, and a bit is in first bit block The corresponding polarization code in position in subchannel.
As one embodiment, first bit block includes freezing bit, and first bit block is as the polarization The input of code, a bit in first bit block correspond to a line in the Crow Neck matrix.
As one embodiment, first bit block does not include freezing bit, and first bit block be used to generate 4th bit block includes freezing bit in the 4th bit block.
As one embodiment, one is freezed bit block and first bit block successively cascades and obtains the 4th bit block.
As one embodiment, bit and subchannel in the 4th bit block are corresponded.
As one embodiment, a bit in the 4th bit block is corresponded in the Crow Neck matrix A line.
As one embodiment, in first bit block, bit where at least described first check bit with The bit where any one check bit in other check bits in the L check bit is discontinuous.
As one embodiment, the value of first check bit is only and in the bit of the composition first information block Bit of the position before first check bit is related in first bit block.
As one embodiment, the value of first check bit and form in the bit of the first information block Bit of the position after first check bit is unrelated in first bit block.
As one embodiment, it be used to generate the bit in the first information block of first check bit and exist Position in first bit block is all before first check bit.
As one embodiment, the value of first check bit is that the bit in the first bit set does xor operation As a result, the bit in first bit set is the bit in the first information block, in first bit set Bit is in the position in first bit block before first check bit.
As one embodiment, the P bit is a subset of first bit set.
As one embodiment, the P bit be used to generate first check bit.
As one embodiment, first bit block does not include freezing bit, and position is in institute in first bit block Bit before stating the first check bit be used to generate first check bit, and position is in institute in first bit block It states the bit after the first check bit and is not used for generating first check bit.
As one embodiment, the first information block is made of the K bit, and the first information block includes institute State the bit and the Q filling bit in M blockette.
As one embodiment, the first information block by the M blockette bit and it is described Q filling Bit successively cascades composition.
As one embodiment, the first information block is by the Q filling bit and the M blockette Bit successively cascades composition.
As one embodiment, position of the Q filling bit in the first information block is discontinuous.
As one embodiment, position of the Q filling bit in the first information block is continuous.
As one embodiment, the first information block includes other bits in addition to the K bit.
As one embodiment, the first information block does not include check bit.
As one embodiment, the check bit is Parity Check Bits.
As one embodiment, the check bit is the bit in a convolutional code.
As one embodiment, the check bit be used to judge during decoding whether decoding is correct.
As one embodiment, the M blockette respectively corresponds the M domain (field) in a DCI.
As one embodiment, the M blockette respectively corresponds the M domain (field) in a broadcast message.
As one embodiment, the first information block is broadcast message, and the M blockette respectively corresponds broadcast M domain (field) in information.
As one embodiment, the first information block be a DCI (Downlink Control Information, Downlink Control Information).
As one embodiment, the first information block is the relevant DCI (Downlink of a uplink Control Information, Downlink Control Information).
As one embodiment, the first information block is the relevant DCI (Downlink of a downlink transfer Control Information, Downlink Control Information).
As one embodiment, the first information block is the relevant DCI of UL Grant (uplink is authorized).
As one embodiment, the first information block indicates the relevant control information of uplink.
As one embodiment, the first information block instruction is used for the running time-frequency resource of uplink.
As one embodiment, the first information block instruction is used for the modulation scheme of uplink.
As one embodiment, the first information block instruction is used for the encoding scheme of uplink.
As one embodiment, the first information block instruction is used for the multi-antenna technology scheme of uplink.
As one embodiment, the first information block is the relevant DCI of DL Grant (uplink is authorized).
As one embodiment, the first information block indicating downlink transmits relevant control information.
As one embodiment, the first information block instruction is used for the running time-frequency resource of downlink transfer.
As one embodiment, the first information block instruction is used for the modulation scheme of downlink transfer.
As one embodiment, the first information block instruction is used for the encoding scheme of downlink transfer.
As one embodiment, the first information block instruction is used for the multi-antenna technology scheme of downlink transfer.
As one embodiment, the first information block is the bit block obtained after being interleaved to a DCI.
As one embodiment, the second bit block be the M block of information and the Q filling bit cascade after obtain Bit block, the first information block is the bit block obtained after second bit block is interleaved.‘
As one embodiment, after the second bit block is the M block of information and the Q filling bit successively cascade Obtained bit block.
As one embodiment, second bit block is a DCI.
As one embodiment, the M block of information is M domain in second bit block.
As one embodiment, the M blockette indicates different control contents.
As one embodiment, the second blockette be in the M blockette in addition to first blockette A blockette, running time-frequency resource used in second blockette instruction subsequent transmission.
As one embodiment, RB (Resource used in the second blockette indicating downlink transmission Block, resource block).
As one embodiment, RB (Resource used in the second blockette instruction uplink Block, resource block).
As one embodiment, second blockette indicates the occupied RB of Physical Downlink Shared Channel.
As one embodiment, second blockette indicates the occupied RB of Physical Uplink Shared Channel.
As one embodiment, the P bit is continuous, the third sub-information in the first information block Bit in block is also continuously that first blockette and the third blockette exist in the first information block Context in the first information block is related with the quantity of bit included by the first information block.
As one embodiment, if the quantity of bit included by the first information block is Q1, the first son letter Block is ceased before the third blockette;If the quantity of bit included by the first information block is first described in Q2 Blockette is after the third blockette;The Q1 and Q2 is two different positive integers.
As one embodiment, if the quantity of bit included by the first information block is the first Positive Integer Set In any positive integer, first blockette is before the third blockette, if the first information block is wrapped The quantity of the bit included is any positive integer in the second Positive Integer Set, and first blockette is believed in third After breath block;First Positive Integer Set and second Positive Integer Set are made of multiple positive integers respectively.
As one embodiment, the third blockette indicates RA (Resource Assignment, resource allocation).
As one embodiment, the third blockette indicates RB (Resource Block, resource block).
As one embodiment, the third blockette is that (Carrier Indicator Field, carrier wave refer to CIF Show domain), indication carrier wave.
As one embodiment, third blockette instruction MCS (Modulation Coding Scheme, the modulation Encoding scheme).
As one embodiment, the third blockette indicates RV (Redundancy Version, redundancy versions).
As one embodiment, the third blockette is NDI (NewData Indicator, new data instruction) institute Domain.
As one embodiment, the third blockette indicates the relevant configuration information of multiple antennas.
As one embodiment, the base station equipment assumes the recipient of first wireless signal in channel decoding mistake It is used in journey using the Q filling bit as bit is freezed.
As one embodiment, the base station equipment assumes the recipient of first wireless signal in channel decoding mistake It is used in journey using the Q filling bit as known bits.
As one embodiment, the Q ensures that the quantity of the bit in the first information block is the first candidate integer collection A target positive integer in conjunction, the target positive integer are in the first candidate integer set not less than the M son letter The minimum positive integer of the quantity of bit total in block is ceased, the first candidate integer set is made of multiple positive integers.
As one embodiment, the first candidate integer set is default (not needing signal deployment).
As one embodiment, any positive integer in the first candidate integer set is not more than 200.
As one embodiment, the first information block does not include other packing ratios in addition to the Q filling bit It is special.
As one embodiment, the Q is 0, and the first information block is made of the M blockette.
As one embodiment, the Q is greater than 0, and the value of the Q filling bit is default setting.
As one embodiment, the Q is greater than 0, and the value of the Q filling bit is all fixed as 0.
As one embodiment, the Q is greater than 0, and the value default setting of the Q filling bit is and first ratio The value for freezing bit in special block is identical.
As one embodiment, position of the Q filling bit in first bit block is continuous.
As one embodiment, the Q filling bit is in first bit block near Q preceding bit.
As one embodiment, first bit block includes freezing bit block, the Q filling bit block near The Q bit for freezing bit block.
As one embodiment, first bit block includes freezing bit block, and the Q filling bit block is described Near the Q successive bits for freezing bit block in first bit block.
As one embodiment, the exclusive or result of the bit in the first information block be used to generate the L verification Bit.
As one embodiment, the L check bit is the CRC (Cyclic based on the first information block Redundancy Check, cyclic redundancy check) bit.
As one embodiment, the L check bit is the convolutional code based on the first information block.
As one embodiment, the L check bit is the odd even generated based on the bit in the first information block Check bit.
As one embodiment, how the first CRC multinomial is used for determining based on described in first information block generation L check bit.
As one embodiment, the L is equal to 24.
As one embodiment, the L is equal to 16.
As one embodiment, the L check bit is used in decoding procedure inspection for the first information block Decoding it is whether correct.
As one embodiment, the L check bit is (scrambled) CRC bit after being scrambled, described One block of information be used to generate the CRC after the scrambling code.
As one embodiment, the CRC after the scrambling code is by based on the first CRC multinomial and first letter The CRC bit that breath block generates is generating after code-scrambling operation with characteristic sequence.
As one embodiment, the code-scrambling operation is xor operation.
As one embodiment, the characteristic sequence is that user equipment is specific.
As one embodiment, the mark (identifier) of the characteristic sequence and user equipment is related.
As one embodiment, the characteristic sequence is the mark of user equipment.
As one embodiment, the bit in the first information block be used to generate the CRC after the scrambling code.
As one embodiment, the bit in third bit block is being sequentially mapped to first ratio after interweaving In special block, the third bit block is the first information block and the L check bit successively cascade result.
As one embodiment, first check bit is the L check bit in the third bit block Position is near preceding check bit.
As one embodiment, the first intertexture table be used to be interleaved the third bit block generation described first Bit block.
As one embodiment, the first intertexture table is default determination.
As one embodiment, the first intertexture table is optional.
As one embodiment, the first intertexture table is according to the difference of the quantity of the bit in the first information block And it is different.
As one embodiment, the first intertexture table is one in P1 candidate intertexture table, the first information block In the quantity of bit be used for determining the first intertexture table.
As one embodiment, the numerical value in the first intertexture table is directed to the number of the bit in the first information block The maximum probable value of amount, the quantity of the bit in the first information block are used for using the first intertexture table to described First information block and the L check bit are interleaved operation.
As one embodiment, the numerical value in the first intertexture table is directed to the number of the bit in the first information block The maximum probable value of amount, the maximum probable value and the first information block of the quantity of the bit in the first information block In bit quantity between difference be used for using the first intertexture table to the first information block and the L school It tests bit and is interleaved operation.
As one embodiment, the first intertexture table includes retrieval column and numerical value column, the retrieval arrange include with it is described Continuous searching value, the searching value be used to sequentially generate first bit block to numerical value on numerical value column correspondingly In bit, the numerical value in the first numerical value set on numerical value column closes one by one with the bit in the third bit block Connection, the arrangement of numerical value in numerical value column according to the searching value corresponding to it from small to large, the P bit is described P bit of the first numerical value subset associations in numerical value column before with the associated numerical value of the first check bit, described the One numerical value subset is the subset of the first numerical value set.
The retrieval in the corresponding retrieval column of any value as one embodiment, in the first numerical value subset Value is less than the corresponding searching value of first check bit.
As one embodiment, the quantity for the searching value that the first intertexture table includes is equal in the third bit block Bit quantity, the first numerical value is a numerical value on numerical value column, and serial number is equal to described the in the third bit block The bit of one numerical value is placed on serial number in first bit block and is equal on the bit of the first searching value, first inspection Rope value corresponds to first numerical value in the first intertexture table.
As one embodiment, the quantity for the searching value that the first intertexture table includes is greater than in the third bit block Bit quantity, the first numerical value is a numerical value on numerical value column, the bit of the first serial number in the third bit block It is placed in first bit block on the bit of corresponding second serial number, first serial number is equal to first numerical value The first difference is subtracted, first difference is that the quantity for the searching value that the first intertexture table includes subtracts the third bit The difference of the quantity of bit in block, corresponding first searching value of second serial number, first searching value are handed over described first It knits and corresponds to first numerical value in table, first numerical value is not less than first difference.
As one embodiment, the numerical value that first difference is less than in the numerical value column is not used for the third Bit in bit block is interleaved.
As one embodiment, there are at least two check bits in first bit block in the L check bit In position it is discontinuous.
As one embodiment, the value of any one check bit in the L check bit compares with described first The bit in the first information block of position after it in special block is unrelated.
As one embodiment, the value of any one check bit in the L check bit be only possible to described Bit of the position in the first information block before it in first bit block is related, with the position in first bit block The bit set in first information block after it is unrelated.
As one embodiment, the value of any one check bit in the L check bit is only and described first Bit of the position in the first information block before it in bit block is related.
As one embodiment, first bit block does not include freezing bit.
As one embodiment, the value for freezing bit is default configuration.
As one embodiment, the bit that freezes is used during decoding as known bits.
As one embodiment, first channel coding is all the Crow Neck matrix of N based on a line number and columns (Kronecker Matrix), the N are 2 n times power, and the n is positive integer.
As one embodiment, exist in first channel coding by a bit block and a Crow Neck matrix The operation of multiplication.
As one embodiment, the polarization code refers to the 5th bit block and a line number and columns that length is N all For output of the result as polarization code of the Crow Neck matrix multiple of N, the 5th bit block includes the K bit, institute It states L check bit and freezes bit.
As one embodiment, the 5th bit block is by all bits in the first information block, the L school It tests bit and freezes bit composition.
As one embodiment, for the 5th bit block by the K bit, the L check bit and N-K-L are a Freeze bit composition.
As one embodiment, the 5th bit block includes removing the K bit, other than the L check bit Other non-freezing bits, the small language N-K-L of the quantity for freezing bit for including in the 5th bit block.
It is to freeze bit near described in the 4th bit block as Q filling bit block described in one embodiment Q successive bits of block.
As one embodiment, freezes bit block and first bit block successively cascade and generates length as described the of N Four bit blocks, the bit in the 4th bit block arranges from low to high according to coefficient of reliability, in the 4th bit block The position of bit respectively with N number of coefficient of reliability correspond, the N coefficient of reliability respectively with the serial number one of N number of subchannel One is corresponding, and the bit in the 4th bit block is placed in subchannel corresponding with its position, N number of subchannel Upper bit rearranges the 5th bit block, the 5th bit block and institute according to the serial number of N number of subchannel from small to large It states line number that polarization code uses and columns is all that the Crow Neck matrix multiple of N obtains the output of the polarization code, the N is 2 N times power, the n is positive integer.
As one embodiment, first channel coding further includes rate-matched.
As one embodiment, first channel coding includes the generation of the 4th bit block, the 5th bit The generation of block, the polarization code and rate-matched.
As one embodiment, generation of first channel coding by the 4th bit block, the 5th bit block Generation, the polarization code and rate-matched composition.
As one embodiment, first wireless signal is that first bit block successively passes through channel coding (Channel Coding), scrambling code (Scrambling), modulation mapper (Modulation Mapper), layer mapper (Layer Mapper), precoding (Precoding), resource particle mapper (Resource Element Mapper) are wide Output after (Generation) occurs for tape symbol.
As one embodiment, first wireless signal is that first bit block successively passes through channel coding, is disturbed Code, modulation mapper, layer mapper, conversion precoder (transform precoder, for generating complex valued signals), Precoding, resource particle mapper, the output after wideband symbol generation.
As one embodiment, first wireless signal is in PBCH (Physical Broadcast Channel, physics Broadcast channel) on transmit.
As one embodiment, first wireless signal is in PDCCH (Physical DownlinkControl Channel, Physical Downlink Control Channel) on transmit.
As one embodiment, first wireless signal is in EPDCCH (Enhanced Physical Downlink Control Channel, enhance Physical Downlink Control Channel) on transmit.
As one embodiment, first wireless signal transmits on physical control channel.
As one embodiment, tandem of the bit in the first information block in the first information block with Tandem of the bit in first bit block in the first information block is different.
At least there are two continuous bits in first bit as one embodiment, in the first information block It is discrete (i.e. discontinuous) in block.
As one embodiment, first bit block is to verify to the bit in the first information block with described L The result that bit is resequenced.
As one embodiment, first bit block is by the bit in the first information block, the L verification Bit and freeze bit carry out mixing rearrangement result.
As one embodiment, in the M blockette in addition to other blockettes of the first blockette all with institute The value for stating Q is unrelated.
As one embodiment, in the M blockette in addition to other blockettes of the first blockette not by with In the value of instruction Q.
As one embodiment, other bits in the first information block in addition to the P bit all with the Q Value it is unrelated.
As one embodiment, other bits in the first information block in addition to the P bit are not used for referring to Show the value of Q.
As one embodiment, the value of first blockette indicates the information format of the first information block.
As one embodiment, the information format of the first information block is a candidate lattice in K1 candidate format Formula, the value of first blockette indicate that the format of the first information block, the K1 are from the K1 candidate format Positive integer greater than 1.
As one embodiment, the value of first blockette is the information format of the first information block at K1 Retrieval in candidate format, the K1 are greater than 1 positive integer.
As one embodiment, the information format of the first information block is a candidate lattice in K1 candidate format Formula, value of first blockette within the scope of certain numerical value are corresponded with K1 candidate format, and the K1 is greater than 1 Positive integer.
As one embodiment, the value of first blockette indicates the Q.
As one embodiment, the Q is a candidate value in K2 candidate value, the value of first blockette Indicate that the Q, the K2 are greater than 1 positive integer from the K2 candidate value.
As one embodiment, the value of first blockette is number of the Q in K2 candidate value, described K2 is greater than 1 positive integer.
As one embodiment, the Q is a candidate value in K2 candidate value, and first blockette is one The value determined in numberical range is corresponded with K2 candidate format, and the K2 is greater than 1 positive integer.
As one embodiment, the information format of the first information block is used for determining the Q's.
As one embodiment, the first information block is DCI (Downlink Control Information, downlink Control information), the information format of the first information block is the DCI format (format) of the first information block.
As one embodiment, the value of first blockette is combined with the second information for determining the Q's Value.
As one embodiment, second information refers to the quantity of subcarrier.
As one embodiment, second information refers to multi-antenna mode.
As one embodiment, second information refers to modulating-coding format.
As one embodiment, second information refers to carrier frequency band.
As one embodiment, the base station equipment sends second wireless singal, described in the second wireless singal instruction Second information.
As one embodiment, the value of first blockette be used to determine the first lattice from K1 candidate format Formula is the format of the first information block, and second information is used for from the corresponding K2 candidate value of first format Determine the value of the Q, the K1 and the K2 are greater than 1 positive integer.
According to the one aspect of the application characterized by comprising
Determine position of the P bit in the first information block;
Wherein, position of the P bit in the first information block ensures the P bit in first ratio Position in special block is all before first check bit.
As one embodiment, the quantity of the bit in the first information block is used for determining the P bit in institute State the position in first information block.
As one embodiment, the quantity of the bit in the first information block is respectively with the P bit described Position in one block of information corresponds.
As one embodiment, the first information format set where the first information block is used for determining the P Position of the bit in the first information block, the number of the corresponding bit of information format in the first information format set It measures identical.
As one embodiment, the P bit is in the position and the first information block in the first information block Bit quantity it is related.
As one embodiment, bit of the position after first check bit can not in first bit block It can be any bit in the P bit.
As one embodiment, in first bit block bit of the position after first check bit not by For determining the value of the Q.
As one embodiment, in first bit block bit of the position after first check bit not by For determining the format of the first information block.
According to the one aspect of the application, which is characterized in that position of the P bit in first bit block It is continuously, position of the P bit in the first information block is also continuous.
As one embodiment, the above method is advantageous in that, convenient for the clear of specification, the simplicity of operation, and is ensured The P bit is in the position in first bit block all before first check bit.
As one embodiment, the quantity of the bit in the first information block is one in K1 candidate value, right In the information format for answering any one in the K1 candidate value, position of the P bit in first bit block is Continuously, position of the P bit in the first information block is also continuous, and the K1 is greater than 1 positive integer.
As one embodiment, the format of the first information block is one in K2 candidate format, at the K2 In any one candidate format in candidate format, position of the P bit in first bit block be it is continuous, Position of the P bit in the first information block is also continuously that the K2 is greater than 1 positive integer.
As one embodiment, the first information block includes continuous first ratio in position in the first information block Special and the second bit, the position of first bit and second bit in first bit block is discontinuous, the P A bit can not include first bit and second bit simultaneously.
As one embodiment, the first numerical value subset is by not only searching value is continuous and the continuous P numerical value group of numerical value At.
According to the one aspect of the application, which is characterized in that the P bit is the ratio for forming the first information block In spy in first bit block position near P preceding bit.
As one embodiment, the above method is advantageous in that, guarantees that the bit for being used to indicate filling bit quantity is use up Fast decoding reduces decoding latency with the quantity of determining filling bit as early as possible.
As one embodiment, the base station equipment assumes the more forwardly of bit meeting in position in first bit block Decoding obtains earlier during decoding.
Arrangement of the bit according to reliability from low to high as one embodiment, in first bit block.
As one embodiment, the corresponding searching value of numerical value in the first numerical value subset is first set of values The smallest P searching value in the corresponding searching value of numerical value in conjunction.
As one embodiment, first bit block and a Crow Neck matrix multiple obtain first channel The output of coding.
According to the one aspect of the application, the P bit is P ratio of the sequence after in the first information block It is special.
As one embodiment, the above method is advantageous in that, system is facilitated to design, and be ensure that and is used to indicate information lattice The bit field of formula continuity in DCI, improves the reliability for being used to indicate the bit field of information format.
As one embodiment, the information format of the first information block is any one in K1 candidate information format Kind, the K1 is greater than 1 positive integer.
As one embodiment, the quantity of the bit in the first information block is one in K2 value, and the K2 is Positive integer greater than 1, in the information format of the first information block of any one in the correspondence K2 value, the P A bit is all the P bit after that sort.
As one embodiment, in the first information block, the position of the Q filling bit is in the P bit Before.
As one embodiment, the Q is positive integer, and the P bit is adjacent with the Q filling bit.
As one embodiment, position of the P bit in the first information block is continuous.
As one embodiment, the position of other bits in the first information block in addition to the P bit is described Before P bit.
As one embodiment, the P bit is adjacent with first check bit in first bit block.
According to the one aspect of the application, position of the P bit in the first information block and first letter The quantity for ceasing the bit in block is related.
As one embodiment, the above method is advantageous in that, according to intertexture table, for the number including different bits The DCI optimization of amount is used to indicate the bit field of information format, to meet the needs of multi-faceted.
As one embodiment, the P bit corresponding numerical value in the first intertexture table is default determination.
As one embodiment, the P bit corresponding numerical value and first information in the first intertexture table The quantity of bit in block is related.
As one embodiment, the P bit corresponding searching value in the first intertexture table is default determination 's.
As one embodiment, the P bit corresponding searching value and first letter in the first intertexture table The quantity for ceasing the bit in block is related.
As one embodiment, position of the P bit in first bit block is default determination.
As one embodiment, the P bit is in the position and the first information block in first bit block Bit quantity it is related.
According to the one aspect of the application, the P bit and first check bit are in first bit block Relative position it is unrelated with the quantity of bit in the first information block.
As one embodiment, the above method is advantageous in that, convenient for standardize it is clear and to the P bit can It is controlled by property.
As one embodiment, the P bit be in first bit block before first check bit The P bit near first check bit.
At least there is a bit as one embodiment, in the P bit to be not belonging in first bit block In the bit in P bit of first check bit before first check bit.
As one embodiment, the quantity of the bit in the first information block is a candidate in K2 candidate value Value, the K2 are greater than 1 positive integer, the quantity of the bit in the first information block be not except the K2 candidate value with An outer value.
As one embodiment, the first intertexture table is used for the first information block and the L check bit It is sequentially mapped in first bit block after interweaving, second value set is a son of the first numerical value set Collection, numerical value in the second value set is before with the associated numerical value of the first check bit, for first letter Any one candidate value that the amount of bits in block is equal in the K2 candidate value is ceased, the second value set all exists, The corresponding second value subset including P numerical value of the P bit, the second value subset is the second value set A subset, the numerical value in the second value subset is unrelated with the quantity of bit in the first information block, the P Position of a bit in first bit block searching value corresponding with the second value subset corresponds.
As one embodiment, the second value subset is in the second value set near P preceding numerical value.
As one embodiment, the second value subset is P numerical value in the second value set after.
As one embodiment, the second value subset is continuous P numerical value in the second value set.
As one embodiment, the P bit is opposite in first bit block with first check bit Position refer to any one bit in the P bit where first bit block bit and first school Test the quantity of bit of the bit between the bit where in first bit block.
As one embodiment, the P bit is opposite in first bit block with first check bit Position refers to any one bit in the P bit in the serial number and first verification where first bit block Difference of the bit between the serial number where in first bit block.
As one embodiment, the P bit is opposite in first bit block with first check bit Position is fixed.
As one embodiment, in the first intertexture table, the corresponding searching value of the P bit is near institute P searching value of the corresponding searching value of the first check bit is stated, the P searching value is corresponding less than first check bit Searching value.
As one embodiment, in the first information block, between the P bit and first check bit Relative position it is related with the quantity of bit in the first information block.
According to the one aspect of the application, the P bit and first check bit are in first bit block Relative position it is related with the quantity of bit in the first information block.
As one embodiment, the above method is advantageous in that, passes through the load bit number (payload according to DCI Size the bit where) adjusting bit identification domain is clear convenient for specification and performance optimizes.
As one embodiment, if the quantity of the bit in the first information block is Q1, the P bit exists There are P1 ratios between the bit where the last one bit and first check bit in first bit block It is special;If the quantity of the bit in the first information block is Q2, the P bit in first bit block most There are P2 bits between bit where latter bit position and first check bit;The Q1 and the Q2 are Two unequal be greater than 1 positive integer, the P1 and the P2 are two unequal positive integers.
As one embodiment, third bit is a bit in the P bit, if the first information block In the quantity of bit be Q1, then there are P1 between the third bit and bit where first check bit Bit;If the quantity of the bit in the first information block is Q2, the third bit and the first check bit institute Bit between there are P2 bits;The Q1 and Q2 be two it is unequal be greater than 1 positive integer, the P1 It is two unequal positive integers with the P2.
According to the one aspect of the application, position of the Q filling bit in the first information block is discontinuous 's.
As one embodiment, the above method is advantageous in that, by optimizing the Q filling bit described first Distribution in block of information further increases decoding performance.
As one embodiment, position of the P bit in the first information block is that continuously, the Q are filled out Bit is filled in the distribution in the first information block for ensuring in any one blockette in the M blockette Position of the bit in the first information block be all continuous.
As one embodiment, the P bit is near P preceding bit in first bit block, and the Q is a Filling bit is in the distribution in the first information block for ensuring that the P bit is in first bit block near preceding P bit.
As one embodiment, the P bit is in first bit block near first check bit P bit, distribution of the Q filling bit in the first information block is for ensuring that the P bit is described first Near P bit of first check bit in bit block.
As one embodiment, first bit block does not include freezing bit, and one is freezed bit block and described first Bit block, which successively cascades, generates third bit block, and distribution of the Q filling bit in the first information block is for ensuring The Q filling bit is in first bit block near Q preceding bit.
As one embodiment, first bit block includes one and freezes bit block, and the Q filling bit is in institute The distribution in first information block is stated for ensuring that the Q filling bit is to freeze in first bit block near described Q bit of bit block.
As one embodiment, subchannel corresponding to the Q filling bit is the bit in the first information block The minimum Q sub-channels of reliability in corresponding subchannel.
As one embodiment, the bit in first bit block arranges from small to large according to coefficient of reliability, described Q filling bit is in the distribution in the first information block for ensuring that the Q filling bit is in first bit block Near Q preceding bit.
This application discloses a kind of methods in user equipment that be used to wirelessly communicate, wherein includes:
The first wireless signal is received, first wireless signal is used for the input of the first channel decoding;
Execute the first channel decoding, corresponding first channel coding of first channel decoding, first channel coding Based on polarization code, the first bit block is used for the input of first channel coding;
Restore first information block, the first information block includes by the bit and Q filling bit in M blockette K bit of composition, first bit block include the K bit and L check bit, the first information block by with In generating the L check bit, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, and the L is Positive integer;
Wherein, any blockette in the M blockette is made of positive integer bit, the first blockette It is a blockette in the M blockette, first blockette is made of P bit, and the P is just whole Number;The value of first blockette is related with the information format of the first information block, alternatively, first blockette Value it is related with the Q;The first information block and the L check bit are sequentially mapped to described the after interweaving In one bit block, position of the P bit in first bit block is all before the first check bit, and described first Check bit is position of the L check bit in first bit block near preceding check bit, first school Test bit in first bit block previous adjacent bit and the latter adjacent bit be all in the first information block Bit.
As one embodiment, first channel decoding is serial channel decoding.
As one embodiment, serial column (Successive CancellationList, SCL) of eliminating are described first It is used to decode the polarization code in channel decoding.
As one embodiment, storehouse (Successive Cancellation Stack, SCS) is serially eliminated described It is used to decode the polarization code in first channel decoding.
As one embodiment, first channel decoding be used to restore first bit block.
As one embodiment, first channel decoding be used to restore the corresponding soft bit of first bit block.
As one embodiment, bit rearrangement is extracted from first bit block and restores the first information block.
As one embodiment, first bit block is deinterleaved and restores the first information block.
As one embodiment, first channel decoding is before restoring all bits in the first information block First restore the P bit.
As one embodiment, the P bit is by first channel decoding for restoring in the first information block Bit.
As one embodiment, after first channel decoding be used to restore the P bit, the user Equipment continues to use first channel using the Q filling bit that first blockette indicates as bit is freezed It is decoded, to restore the bit in the first information block.
As one embodiment, after first channel decoding be used to restore the P bit, the user The information format for the first information block that equipment is indicated according to first blockette fills its corresponding described Q Bit is decoded as freezing bit and continue to use first channel decoding, to restore in the first information block Bit.
As one embodiment, first check bit be used to verify the decoding for being directed to first blockette It is whether correct.
As one embodiment, first channel decoding is first to first check bit and first bit block In the first bit set before first check bit restored, the P bit is first bit set In bit, the user equipment assumes that first bit set be used to generate first check bit and except described Other bits except first bit set are not used for generating first check bit.First channel decoding uses Whether first check bit judges correct to the decoding of first bit set.If first bit set is logical Cross the verification of first check bit, then the P bit be used for determining the Q value and the Q filling bit Position in the first information block, first channel decoding use the Q filling bit to freeze bit as Q For in the first information block non-filling bit and the L check bit decoded.
As one embodiment, if first bit set does not pass through the verification of first check bit, institute State decoded operation of the user equipment stopping to the first information block.
As one embodiment, the user equipment assumes that first check bit is in first bit set Bit exclusive or result.
As one embodiment, the user equipment assumes that a CRC multinomial is used for for the first information block A CRC bit block is generated, the CRC bit block includes the L check bit, and first check bit is the CRC First bit in bit block.According to the one aspect of the application, comprising:
Decoding obtains the P bit;
Wherein, the P bit is in the position in first bit block all before first check bit.
At least one in other bits as one embodiment, in the first information block in addition to the P bit A bit obtains after being decoded for the P bit.
As one embodiment, the value of first blockette is used for a to the P is removed in the first information block The decoding of other bits other than bit.
As one embodiment, the value of first blockette is used for determining the format of the first information block.
As one embodiment, the value of first blockette is used for determining the value and the Q filling of the Q Position of the bit in the first information block.
According to the one aspect of the application, position of the P bit in first bit block is continuous, institute It is also continuous for stating position of the P bit in the first information block.
According to the one aspect of the application, the P bit is in the bit for form the first information block described Position is near P preceding bit in one bit block.
According to the one aspect of the application, the P bit is P ratio of the sequence after in the first information block It is special.
According to the one aspect of the application, position of the P bit in the first information block and first letter The quantity for ceasing the bit in block is related.
According to the one aspect of the application, the P bit and first check bit are in first bit block Relative position it is unrelated with the quantity of bit in the first information block.
According to the one aspect of the application, the P bit and first check bit are in first bit block Relative position it is related with the quantity of bit in the first information block.
According to the one aspect of the application, position of the Q filling bit in the first information block is discontinuous 's.
This application discloses a kind of base station equipments that be used to wirelessly communicate, comprising:
- the first processor module generates first information block, and the first information block includes by the ratio in M blockette K bit of special and Q filling bit composition, the M are greater than 1 positive integer, and the Q is nonnegative integer, and the K is big In 1 positive integer;
- the first channel encoder, executes the first channel coding, and the first bit block is used for first channel coding Input, first channel coding are based on polarization code, and first bit block includes the K bit and L check bit, The first information block be used to generate the L check bit, and the L is positive integer;
- the first transmitter module, sends the first wireless signal, and the output of first channel coding be used to generate institute State the first wireless signal;
Wherein, any blockette in the M blockette is made of positive integer bit, the first blockette It is a blockette in the M blockette, first blockette is made of P bit, and the P is just whole Number;The value of first blockette is related with the information format of the first information block, alternatively, first blockette Value it is related with the Q;The first information block and the L check bit are sequentially mapped to described the after interweaving In one bit block, position of the P bit in first bit block is all before the first check bit, and described first Check bit is position of the L check bit in first bit block near preceding check bit, first school Test bit in first bit block previous adjacent bit and the latter adjacent bit be all in the first information block Bit.
As one embodiment, above-mentioned base station equipment is characterized in that, first processor module determines the P Position of the bit in the first information block;Wherein, position of the P bit in the first information block ensures institute P bit is stated in the position in first bit block all before first check bit.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit is in first bit block Position be it is continuous, position of the P bit in the first information block is also continuous.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit is the composition first information In the bit of block in first bit block position near P preceding bit.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit is in the first information block Sort the P bit after.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit is in the first information block Position it is related with the quantity of bit in the first information block.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit and first check bit It is unrelated with the quantity of bit in the first information block in the relative position in first bit block.
As one embodiment, above-mentioned base station equipment is characterized in that, the P bit and first check bit It is related with the quantity of bit in the first information block in the relative position in first bit block.
As one embodiment, above-mentioned base station equipment is characterized in that, the Q filling bit is in the first information Position in block is discontinuous.
This application discloses a kind of user equipmenies that be used to wirelessly communicate, comprising:
- the first receiver module, receives the first wireless signal, and first wireless signal is used for the first channel decoding Input;
- the first channel decoder executes the first channel decoding, corresponding first channel coding of first channel decoding, institute It states the first channel coding and is based on polarization code, the first bit block is used for the input of first channel coding;
Second processing machine module restores first information block, and the first information block includes by the ratio in M blockette The K bit that special and Q filling bit forms, first bit block include the K bit and L check bit, described First information block be used to generate the L check bit, and the M and the K are greater than 1 positive integer, the Q right and wrong Negative integer, the L are positive integers;
Wherein, any blockette in the M blockette is made of positive integer bit, the first blockette It is a blockette in the M blockette, first blockette is made of P bit, and the P is just whole Number;The value of first blockette is related with the information format of the first information block, alternatively, first blockette Value it is related with the Q;The first information block and the L check bit are sequentially mapped to described the after interweaving In one bit block, position of the P bit in first bit block is all before the first check bit, and described first Check bit is position of the L check bit in first bit block near preceding check bit, first school Test bit in first bit block previous adjacent bit and the latter adjacent bit be all in the first information block Bit.
As one embodiment, above-mentioned user equipment is characterized in that, the first channel decoder decodes to obtain the P Bit;Wherein, the P bit is in the position in first bit block all before first check bit.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit is in first bit block Position be it is continuous, position of the P bit in the first information block is also continuous.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit is the composition first information In the bit of block in first bit block position near P preceding bit.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit is in the first information block Sort the P bit after.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit is in the first information block Position it is related with the quantity of bit in the first information block.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit and first check bit It is unrelated with the quantity of bit in the first information block in the relative position in first bit block.
As one embodiment, above-mentioned user equipment is characterized in that, the P bit and first check bit It is related with the quantity of bit in the first information block in the relative position in first bit block.
As one embodiment, above-mentioned user equipment is characterized in that, the Q filling bit is in the first information Position in block is discontinuous.
It is compared as one embodiment with traditional scheme, the present invention has following advantage:
The characteristic of Polar code serial decoding is utilized, by indicating inside code block, reduces the blind examination number of the side UE;
Support more flexible more diverse DCI format;
Using filling bit as bit is freezed, decoding performance is improved;
The reliability of format instructions field is improved using check bit;
Pass through the position optimization system performance of the instruction information of optimization information format.
Detailed description of the invention
By reading referring to the detailed description of non-limiting embodiments in the following drawings, of the invention is other Feature, objects and advantages will become more apparent:
Fig. 1 shows the first information block according to one embodiment of the application, the first channel coding and the first wireless communication Number flow chart;
Fig. 2 shows the schematic diagrames according to the network architecture of one embodiment of the application;
Fig. 3 shows the radio protocol architecture of the user plane and control plane according to one embodiment of the application Schematic diagram;
Fig. 4 shows the schematic diagram of enode and given user equipment according to one embodiment of the application;
Fig. 5 shows the wireless signal transmission flow chart according to one embodiment of the application;
Fig. 6 shows first wireless signal of one embodiment according to the application, the first channel decoding and the first information The flow chart of block;
Fig. 7 shows the schematic diagram of the first channel coding and the first channel decoding according to one embodiment of the application;
Fig. 8 shows the schematic diagram of first channel coding of one embodiment according to the application;
Fig. 9 shows the schematic diagram of first channel decoding of one embodiment according to the application;
Figure 10 shows being interleaved to first information block and L check bit according to one embodiment of the application Schematic diagram;
Figure 11 shows the position according to first blockette of one embodiment of the application in first information block Schematic diagram;
Figure 12 shows the position according to first blockette of one embodiment of the application in the first bit block Schematic diagram;
Figure 13 shows the schematic diagram of the first information block according to one embodiment of the application;
Figure 14 shows the structural block diagram of the processing unit in the base station according to one embodiment of the application;
Figure 15 shows the structural block diagram of the processing unit in the UE according to one embodiment of the application;
Specific embodiment
It is described in further detail below in conjunction with technical solution of the attached drawing to the application, it should be noted that do not rushing In the case where prominent, the feature in embodiments herein and embodiment can be arbitrarily combined with each other.
Embodiment 1
Embodiment 1 illustrates the first information block according to the application, the first channel coding and the first wireless signal, such as attached Shown in Fig. 1.In attached drawing 1, each box represents a step.In embodiment 1, the base station equipment in the application is successively First information block is generated, the first channel coding is executed and sends the first wireless signal;Wherein, the first information block includes by M K bit of bit and Q filling bit composition in a blockette, the M are greater than 1 positive integer, the Q right and wrong Negative integer, the K are greater than 1 positive integer;First bit block is used for the input of first channel coding, and described first Channel coding is based on polarization code, and first bit block includes the K bit and L check bit, the first information block It is used to generate the L check bit, the L is positive integer;The output of first channel coding be used to generate described First wireless signal;Any blockette in the M blockette is made of positive integer bit, the first blockette It is a blockette in the M blockette, first blockette is made of P bit, and the P is just whole Number;The value of first blockette is related with the information format of the first information block, alternatively, first blockette Value it is related with the Q;The first information block and the L check bit are sequentially mapped to described the after interweaving In one bit block, position of the P bit in first bit block is all before the first check bit, and described first Check bit is position of the L check bit in first bit block near preceding check bit, first school Test bit in first bit block previous adjacent bit and the latter adjacent bit be all in the first information block Bit.
As one embodiment, the polarization code refers to the 5th bit block and a line number and columns that length is N all For output of the result as polarization code of the Crow Nike matrix multiple of N, the 5th bit block includes the K bit, institute It states L check bit and freezes bit.
As one embodiment, first bit block does not include freezing bit, and one is freezed bit block and described first Bit block, which successively cascades, generates the 4th bit block.
As one embodiment, the bit in the 4th bit block arranges from small to large according to coefficient of reliability.
The position of bit in 4th bit block is corresponded with N number of coefficient of reliability respectively, the N reliability Coefficient is corresponded with the serial number of N number of subchannel respectively, and the bit in the 4th bit block is placed to opposite with its position In the subchannel answered, bit rearranges the 5th according to the serial number of N number of subchannel from small to large in N number of subchannel Bit block,
As one embodiment, input of the 5th bit block as the polarization code.
As one embodiment, the first information block is a DCI block.
As one embodiment, PDCCH be used to transmit the first information block.
As one embodiment, first blockette indicates the information format of the first information block, described first The information format of block of information is used for determining the Q.
As one embodiment, tandem of the bit in the first information block in the first information block with Tandem of the bit in first bit block in the first information block is different.
As one embodiment, the first information block and the L check bit successively cascade and generate third bit Block, the first intertexture table, which be used to be interleaved the third bit block, generates first bit block.
As one embodiment, the first intertexture table includes retrieval column and numerical value column, the retrieval arrange include with it is described Continuous searching value, the searching value be used to sequentially generate first bit block to numerical value on numerical value column correspondingly In bit, the numerical value in the first numerical value set on numerical value column closes one by one with the bit in the third bit block Connection, the arrangement of numerical value in numerical value column according to the searching value corresponding to it from small to large, the P bit is described P bit of the first numerical value subset associations in numerical value column before with the associated numerical value of the first check bit, described the One numerical value subset is the subset of the first numerical value set.
The retrieval in the corresponding retrieval column of any value as one embodiment, in the first numerical value subset Value is less than the corresponding searching value of first check bit.
As one embodiment, first blockette is made of 2 bits.
As one embodiment, first blockette is made of 3 bits.
As one embodiment, first blockette is made of 4 bits.
As one embodiment, first channel coding includes rate-matched.
As one embodiment, the output of the polarization code is used as the input of rate-matched.
As one embodiment, the output of first channel coding is the output carried out after rate-matched.
Embodiment 2
Embodiment 2 illustrates the schematic diagram of a network architecture according to the application, as shown in Fig. 2.Fig. 2 is explanation NR 5G, LTE (Long-Term Evolution, long term evolution) and LTE-A (Long-Term Evolution Advanced, enhance long term evolution) System Network Architecture 200 figure.NR 5G or LTE network framework 200 can be described as EPS (Evolved Packet System, evolved packet system) 200 some other suitable term.EPS 200 may include one or More than one UE (User Equipment, user equipment) 201, NG-RAN (Next-Generation enters network) 202, EPC (Evolved Packet Core, evolution block core)/5G-CN (5G-Core Network, 5G core net) 210, HSS (Home Subscriber Server, home signature user server) 220 and Internet service 230.EPS can connect with other Enter network interconnection, but in order to not show these entity/interfaces simply.As shown, EPS provides packet-switched services, however it is affiliated The technical staff in field will be apparent that each conception of species presented through the application, which extends to, provides circuit switched service Network or other cellular networks.NG-RAN includes NR node B (gNB) 203 and other gNB204.GNB203 provide towards The user of UE201 and control plane protocol terminations.GNB203 can be connected to other gNB204 via Xn interface (for example, backhaul). GNB203 is alternatively referred to as base station, base transceiver station, radio base station, radio transceiver, transceiver function, basic service set Close (BSS), expansion service set (ESS), TRP (transmitting and receiving point) or some other suitable term.GNB203 mentions for UE201 For the access point to EPC/5G-CN210.The example of UE201 includes cellular phone, smart phone, session initiation protocol (SIP) phone, laptop computer, personal digital assistant (PDA), satelline radio, global positioning system, multimedia device, Video-unit, digital audio-frequency player (for example, MP3 player), camera, game console, unmanned plane, aircraft, protenchyma Manage net equipment, machine type communication device, land craft, automobile, wearable device or any other like function dress It sets.UE201 can also be known as mobile station, subscriber stations, mobile unit, subscriber unit, wireless list by those skilled in the art Member, remote unit, mobile device, wireless device, wireless communication device, remote-control device, mobile subscriber stations, access terminal, movement Terminal, wireless terminal, remote terminal, hand-held set, user agent, mobile client, client or some other suitable term. GNB203 is connected to EPC/5G-CN210 by S1/NG interface.EPC/5G-CN210 includes MME/AMF/UPF 211, other MME/AMF/UPF214, S-GW (Service Gateway, gateway) 212 and P-GW (Packet Date Network Gateway, grouped data network gateway) 213.MME/AMF/UPF211 is the letter handled between UE201 and EPC/5G-CN210 The control node of order.Generally, MME/AMF/UPF211 provides carrying and connection management.All User IP (Internet Protocal, Internet Protocol) packet be to be transmitted by S-GW212, S-GW212 is itself coupled to P-GW213.P-GW213 is provided The distribution of UE IP address and other functions.P-GW213 is connected to Internet service 230.Internet service 230 includes operator Corresponding the Internet protocol service, specifically may include internet, Intranet, (IP Multimedia Subsystem, IP is more by IMS Media subsystem) and PS streaming service (PSS).
As one embodiment, the UE201 corresponds to the user equipment in the application.
As one embodiment, the gNB203 corresponds to the base station in the application.
As one embodiment, the UE201 supports polarization code decoding.
As one embodiment, the gNB203 supports polarization code coding.
Embodiment 3
Embodiment 3 shows the implementation of the radio protocol architecture of the user plane and control plane according to the application The schematic diagram of example, as shown in Fig. 3.Fig. 3 is implementation of the explanation for user plane and the radio protocol architecture for controlling plane The schematic diagram of example, Fig. 3 show the radio protocol frame for being used for user equipment (UE) and base station equipment (gNB or eNB) with three layers Structure: layer 1, layer 2 and layer 3.1 (L1 layers) of layer are lowermost layers and implement various PHY (physical layer) signal processing functions.L1 layers at this Text is referred to as PHY301.2 (L2 layers) 305 of layer are responsible for passing through chain of the PHY301 between UE and gNB on PHY301 Road.In user plane, L2 layer 305 includes MAC (Medium Access Control, medium access control) sublayer 302, RLC (Radio Link Control, radio link layer control protocol) sublayer 303 and PDCP (Packet Data Convergence Protocol, Packet Data Convergence Protocol) sublayer 304, these sublayers terminate at the gNB on network side.Although it is not shown, But UE can have several upper layers on L2 layer 305, including terminate at the P-GW on network side network layer (for example, IP layers) and terminate at the application layer at the other end (for example, distal end UE, server etc.) of connection.PDCP sublayer 304 provides Multiplexing between different radio carrying and logic channel.PDCP sublayer 304 also provides the mark for upper layer data packet Head compression provides safety by encrypted packet to reduce radio transmitting expense, and provide between gNB to UE Handover support.Rlc sublayer 303 provides the Segmentation and Reassembly dress of upper layer data packet, and lost data packets re-emit And data packet reorders to compensate the received out-of-order as caused by HARQ.Media access control sublayer 302 provides logical AND transport channel Between multiplexing.Media access control sublayer 302 be also responsible between UE distribute a cell in various radio resources (for example, Resource block).Media access control sublayer 302 is also responsible for HARQ operation.In the control plane, the radio protocol architecture pair for UE and gNB It is substantially the same for physical layer 301 and L2 layer 305, but not for controlling the header compressed function of plane.Control is flat Face further includes RRC (Radio Resource Control, radio resource control) sublayer 306 in layer 3 (L3 layers).RRC Layer 306 is responsible for obtaining radio resource (that is, radio bearer) and configures lower part using the RRC signaling between gNB and UE Layer.
User equipment of the radio protocol architecture suitable for the application as one embodiment, in attached drawing 3.
Base station equipment of the radio protocol architecture suitable for the application as one embodiment, in attached drawing 3.
As one embodiment, first wireless signal in the application is created on the PHY301.
As one embodiment, the first information in the application is created on the PHY301.
Embodiment 4
Embodiment 4 shows the schematic diagram of a base station equipment and given user equipment according to the application, such as attached drawing 4 It is shown.Fig. 4 is the block diagram of the gNB410 communicated within the access network with UE450.
It may include controller/processor 440, scheduler 443, memory 430, receiving area in base station equipment (410) Manage device 412, transmited processor 415, MIMO transmited processor 441, MIMO detector 442, emitter/receiver 416 and antenna 420。
It may include controller/processor 490, memory 480, data source 467, transmitting in user equipment (UE450) Processor 455 receives processor 452, MIMO transmited processor 471, MIMO detector 472, emitter/receiver 456 and day Line 460.
In downlink transfer, related processing may include: with base station equipment (410)
Upper layer packet reaches controller/processor 440, and controller/processor 440 provides Header compression, encryption, packet segmentation Connect and reorder and logical and transport channel between multiplexing demultiplexing, to implement for user plane and control The L2 layer protocol of plane;It may include data or control information, such as DL-SCH (Downlink Shared in the packet of upper layer Channel, DSCH Downlink Shared Channel);
Controller/processor 440 can be associated with the memory 430 of storage program code and data.Memory 430 can Think computer-readable media;
Controller/processor 440 notifies 443 transmission demand of scheduler, and scheduler 443 is for dispatching and transmission demand pair The interface-free resources answered, and by scheduling result notification controller/processor 440;
Controller/processor 440 by receive processor 412 to uplink receiving handled to downlink send Control information passes to transmited processor 415;
Transmited processor 415 receives the output bit flow of controller/processor 440, implements to be used for L1 layers of (i.e. physics Layer) various signals transmitting processing function include coding, interweave, scrambling, modulation, power control/distribution and physical layer control letter Enable (including PBCH, PDCCH, PHICH, PCFICH, reference signal) generation etc.;
- MIMO transmited processor 441 controls symbol or reference signal symbol carries out spatial manipulation (ratio to data symbol Such as multiple antennas precoding, digital beam excipient), output baseband signal to transmitter 416;
The output simulation of-MIMO transmited processor 441 sends wave beam inborn nature vector to transmitter 416;
Transmitter 416 be used for by the baseband signal that MIMO transmited processor 441 provides be converted into radiofrequency signal and via Antenna 420 is launched;Each transmitter 416 carries out sampling processing to respective input symbol stream and obtains respective sampling letter Number stream;Each transmitter 416 respective sample streams is further processed (such as digital-to-analogue conversion is amplified, filtering, up-conversion Deng) obtain downlink signal;Simulation sends beam shaping and is handled in transmitter 416.
In downlink transfer, related processing may include: with user equipment (UE450)
Receiver 456 is supplied to MIMO inspection for that will be converted into baseband signal by the received radiofrequency signal of antenna 460 Survey device 472;Simulation receives beam shaping and is handled in receiver 456;
The signal that-MIMO detector 472 is used to receive from receiver 456 carries out MIMO detection, to receive processor 452 provide the baseband signal after MIMO is detected;
The extraction simulation reception beam shaping relevant parameter of processor 452 is received to export to MIMO detector 472, MIMO inspection It surveys the output simulation of device 472 and receives beam shaping vector to receiver 456;
Receive processor 452 implement for L1 layer (that is, physical layer) various signals receive processing function include decode, Deinterleaving, descrambling, the extraction of demodulation physical layer control signaling etc.;
Controller/processor 490 receive receive processor 452 export bit stream, provide packet header decompression, decryption, Packet segmentation connection and reorder and logical and transport channel between multiplexing demultiplexing, to implement for user plane With the L2 layer protocol of control plane;
Controller/processor 490 can be associated with the memory 480 of storage program code and data.Memory 480 can Think computer-readable media;
Controller/processor 490 transmited processor 455 sends uplink handled to downlink reception Control information, which passes to, receives processor 452.
The first blockette in the application, first information block, the first bit block and the first wireless signal pass through at transmitting Reason device 415 sequentially generates.First wireless signal that MIMO transmited processor 441 exports transmited processor 415 is relevant Baseband signal carries out multiple antennas precoding.The baseband signal that MIMO transmited processor 441 provides is converted into penetrating by transmitter 416 Frequency signal carries out simulation and sends beam shaping, and launches via antenna 420.Receiver 456 will be connect by antenna 460 It receives, carries out simulation and receive beam shaping, obtain radiofrequency signal related with first wireless signal, and be converted into base band letter Number it is supplied to MIMO detector 472.MIMO detector 472 carries out MIMO detection to the signal received from receiver 456.It connects The baseband signal that receipts processor 452 exports MIMO detector 472, which is handled, successively obtains first wireless signal, institute State the first blockette, first bit block and the first information block.
In uplink, related processing may include: with user equipment (UE450)
Data source 467 provides upper layer packet to controller/processor 490, controller/processor 490 provide Header compression, Encryption, packet segmentation connection and reorder and logical and transport channel between multiplexing demultiplexing, to implement for user The L2 layer protocol of plane and control plane;It may include data or control information, such as UL-SCH (Uplink in the packet of upper layer Shared Channel, Uplink Shared Channel);
Controller/processor 490 can be associated with the memory 480 of storage program code and data.Memory 480 can Think computer-readable media;
Controller/processor 490 by receive processor 452 to downlink reception handled to uplink send Control information passes to transmited processor 455;
Transmited processor 455 receives the output bit flow of controller/processor 490, implements to be used for L1 layers of (i.e. physics Layer) various signals transmitting processing function include coding, interweave, scrambling, modulation, power control/distribution and physical layer control letter Enable (including PUCCH, SRS (Sounding Reference Signal, detection reference signal)) generation etc.;
- MIMO transmited processor 471 controls symbol or reference signal symbol carries out spatial manipulation (ratio to data symbol Such as multiple antennas precoding, digital beam excipient), output baseband signal to transmitter 456;
The output simulation of-MIMO transmited processor 471 sends beam shaping vector to transmitter 457;
Transmitter 456 be used for by the baseband signal that MIMO transmited processor 471 provides be converted into radiofrequency signal and via Antenna 460 is launched;Each transmitter 456 carries out sampling processing to respective input symbol stream and obtains respective sampling letter Number stream.Each transmitter 456 respective sample streams is further processed (such as digital-to-analogue conversion is amplified, filtering, up-conversion Deng) obtain uplink signal.Simulation sends beam shaping and is handled in transmitter 456.
In uplink, related processing may include: with base station equipment (410)
Receiver 416 is supplied to MIMO inspection for that will be converted into baseband signal by the received radiofrequency signal of antenna 420 Survey device 442;Simulation receives beam shaping and is handled in receiver 416;
The signal that-MIMO detector 442 is used to receive from receiver 416 carries out MIMO detection, to receive processor 442 provide the symbol after MIMO is detected;
The output simulation of-MIMO detector 442 receives beam shaping vector to receiver 416;
Receive processor 412 implement for L1 layer (that is, physical layer) various signals receive processing function include decode, Deinterleaving, descrambling, the extraction of demodulation physical layer control signaling etc.;
Controller/processor 440 receive receive processor 412 export bit stream, provide packet header decompression, decryption, Packet segmentation connection and reorder and logical and transport channel between multiplexing demultiplexing, to implement for user plane With the L2 layer protocol of control plane;
Controller/processor 440 can be associated with the memory 430 of storage program code and data.Memory 430 can Think computer-readable media;
Controller/processor 440 by transmited processor 415 to downlink send handled to uplink send Control information, which passes to, receives processor 412;
As one embodiment, the gNB410 device includes: at least one processor and at least one processor, At least one processor includes computer program code;At least one processor and the computer program code It is configured to be used together at least one described processor.The gNB410 device is at least: first information block is generated, it is described First information block include by M blockette bit and K bit forming of Q filling bit, the M be greater than 1 Positive integer, the Q are nonnegative integers, and the K is greater than 1 positive integer;Execute the first channel coding, the first bit block by with In the input of first channel coding, first channel coding is based on polarization code, and first bit block includes the K A bit and L check bit, the first information block be used to generate the L check bit, and the L is positive integer;Hair The first wireless signal is sent, the output of first channel coding be used to generate first wireless signal;Wherein, the M Any blockette in blockette is made of positive integer bit, and the first blockette is in the M blockette A blockette, first blockette is made of P bit, and the P is positive integer;First blockette Value it is related with the information format of the first information block, alternatively, the value of first blockette is related with the Q;It is described First information block and the L check bit are sequentially mapped in first bit block after interweaving, the P ratio All before the first check bit, first check bit is the L verification for position of the spy in first bit block Position of the bit in first bit block is near preceding check bit, and first check bit is in first bit Previous adjacent bit and the latter adjacent bit in block are all the bits in the first information block.
As one embodiment, the gNB410 includes: a kind of memory for storing computer-readable instruction program, institute It states the generation when being executed by least one processor of computer-readable instruction program to act, the movement includes: to generate the first letter Block is ceased, the first information block includes by the bit and K bit forming of Q filling bit in M blockette, the M It is greater than 1 positive integer, the Q is nonnegative integer, and the K is greater than 1 positive integer;Execute the first channel coding, the first ratio Special block is used for the input of first channel coding, and first channel coding is based on polarization code, first bit block Including the K bit and L check bit, the first information block be used to generate the L check bit, and the L is Positive integer;The first wireless signal is sent, the output of first channel coding be used to generate first wireless signal;Its In, any blockette in the M blockette is made of positive integer bit, and the first blockette is the M son A blockette in block of information, first blockette are made of P bit, and the P is positive integer;Described first The value of blockette is related with the information format of the first information block, alternatively, the value of first blockette and the Q It is related;The first information block and the L check bit are sequentially mapped in first bit block after interweaving, All before the first check bit, first check bit is institute for position of the P bit in first bit block Position of the L check bit in first bit block is stated near preceding check bit, first check bit is described Previous adjacent bit and the latter adjacent bit in first bit block are all the bits in the first information block.
As one embodiment, the UE450 device includes: at least one processor and at least one processor, institute Stating at least one processor includes computer program code;At least one processor and the computer program code quilt Be configured to be used together at least one described processor, the UE450 device at least: receive the first wireless signal, described the One wireless signal is used for the input of the first channel decoding;Execute the first channel decoding, first channel decoding corresponding first Channel coding, first channel coding are based on polarization code, and the first bit block is used for the input of first channel coding; Restore first information block, the first information block include by M blockette bit and the K that forms of Q filling bit it is a Bit, first bit block include the K bit and L check bit, and the first information block be used to generate described L check bit, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, and the L is positive integer;Its In, any blockette in the M blockette is made of positive integer bit, and the first blockette is the M A blockette in blockette, first blockette are made of P bit, and the P is positive integer;Described The value of one blockette is related with the information format of the first information block, alternatively, the value of first blockette with it is described Q is related;The first information block and the L check bit are sequentially mapped in first bit block after interweaving, All before the first check bit, first check bit is for position of the P bit in first bit block Position of the L check bit in first bit block is near preceding check bit, and first check bit is in institute Stating previous adjacent bit and the latter adjacent bit in the first bit block is all the bit in the first information block.
As one embodiment, the UE450 includes: a kind of memory for storing computer-readable instruction program, described The generation when being executed by least one processor of computer-readable instruction program acts, and the movement includes: to receive first wirelessly Signal, first wireless signal are used for the input of the first channel decoding;Execute the first channel decoding, first channel Corresponding first channel coding is decoded, first channel coding is based on polarization code, and the first bit block is used for first channel The input of coding;Restore first information block, the first information block include by M blockette bit and Q fill K bit of bit composition, first bit block includes the K bit and L check bit, the first information block It is used to generate the L check bit, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, described L is positive integer;Wherein, any blockette in the M blockette is made of positive integer bit, the first sub-information Block is a blockette in the M blockette, and first blockette is made of P bit, and the P is just Integer;The value of first blockette is related with the information format of the first information block, alternatively, first sub-information The value of block is related with the Q;The first information block and the L check bit are sequentially mapped to described after interweaving In first bit block, position of the P bit in first bit block is all before the first check bit, and described One check bit is position of the L check bit in first bit block near preceding check bit, described first Previous adjacent bit and the latter adjacent bit of the check bit in first bit block are all the first information Bit in block.
As one embodiment, gNB410 corresponds to the base station in the application.
As one embodiment, UE450 corresponds to the user equipment in the application.
As one embodiment, gNB410 corresponds to the base station in the application.
As one embodiment, UE450 corresponds to the user equipment in the application.
As one embodiment, transmited processor 415, MIMO transmitter 441 and transmitter 416 be used to send this Shen Please in the first wireless signal.
As one embodiment, receiver 456, MIMO detector 472 and reception processor 452 be used to receive this Shen Please in the first wireless signal.
As one embodiment, transmited processor 415 be used to generate first information block.
As one embodiment, receives processor 452 and be used to restore first information block.
As one embodiment, transmited processor 415 is used to carry out the first channel coding.
As one embodiment, receives processor 452 and be used to carry out the first channel decoding.
Embodiment 5
Embodiment 5 illustrates the flow chart of a wireless signal transmission according to the application, as shown in attached drawing 5.Attached drawing 5 In, base station N1 is the maintenance base station of the serving cell of UE U2.
ForBase station N1, first information block is generated in step s 11, executes the first channel coding in step s 12, The first wireless signal is sent in step S13.
ForUE U2, the first wireless signal is received in the step s 21, and the first channel decoding is executed in step S22, Restore first information block in step S23.
In embodiment 5, the first information block include by M blockette bit and Q filling bit form K bit, the M is greater than 1 positive integer, and the Q is nonnegative integer, and the K is greater than 1 positive integer;First bit Block is used for the input of first channel coding by N1, and first channel decoding corresponds to first channel coding, and described the One channel coding is based on polarization code, and first bit block includes the K bit and L check bit, the first information For block by N1 for generating the L check bit, the L is positive integer;The output of first channel coding is used for by N1 Generate first wireless signal;Any blockette in the M blockette is made of positive integer bit, and first Blockette is a blockette in the M blockette, and first blockette is made of P bit, described P is positive integer;The value of first blockette is related with the information format of the first information block, alternatively, first son The value of block of information is related with the Q;The first information block and the L check bit are successively mapped after interweaving by N1 Into first bit block, position of the P bit in first bit block all before the first check bit, First check bit is position of the L check bit in first bit block near preceding check bit, institute Stating previous adjacent bit and the latter adjacent bit of first check bit in first bit block is all described first Bit in block of information.
As a sub- embodiment, N1 determines position of the P bit in the first information block, and U2 is decoded To the P bit, position of the P bit in the first information block ensures the P bit in first ratio Position in special block is all before first check bit.
As a sub- embodiment, position of the P bit in first bit block is continuously the P Position of the bit in the first information block is also continuous.
As a sub- embodiment, the P bit is in the bit for form the first information block in first ratio Position is near P preceding bit in special block.
As a sub- embodiment, the P bit is P bit of the sequence after in the first information block.
As a sub- embodiment, position of the P bit in the first information block and the first information block In bit quantity it is related.
As a sub- embodiment, phase of the P bit with first check bit in first bit block It is unrelated with the quantity of bit in the first information block to position.
As a sub- embodiment, phase of the P bit with first check bit in first bit block It is related with the quantity of bit in the first information block to position.
As a sub- embodiment, position of the Q filling bit in the first information block is discontinuous.
In the case where not conflicting, above-mentioned sub- embodiment being capable of any combination.
Embodiment 6
Embodiment 6 illustrates the first wireless signal, the flow chart of the first channel decoding and first information block, such as 6 institute of attached drawing Show.In attached drawing 6, each box represents a step.
In embodiment 6, the user equipment in the application successively receives the first wireless signal, executes the first channel Decoding restores first information block;Wherein, first wireless signal is used for the input of the first channel decoding;First letter Road decodes corresponding first channel coding, and first channel coding is based on polarization code, and the first bit block is used for first letter The input of road coding;The first information block includes by form K ratio of bit and Q filling bit in M blockette Spy, first bit block include the K bit and L check bit, and the first information block be used to generate the L A check bit, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, and the L is positive integer;The M Any blockette in a blockette is made of positive integer bit, and the first blockette is in the M blockette A blockette, first blockette is made of P bit, and the P is positive integer;First blockette Value it is related with the information format of the first information block, alternatively, the value of first blockette is related with the Q;It is described First information block and the L check bit are sequentially mapped in first bit block after interweaving, the P ratio All before the first check bit, first check bit is the L verification for position of the spy in first bit block Position of the bit in first bit block is near preceding check bit, and first check bit is in first bit Previous adjacent bit and the latter adjacent bit in block are all the bits in the first information block.
As one embodiment, the polarization code refers to the 5th bit block and a line number and columns that length is N all For output of the result as polarization code of the Crow Nike matrix multiple of N, the 5th bit block includes the K bit, institute It states L check bit and freezes bit.
As one embodiment, first bit block does not include freezing bit, and one is freezed bit block and described first Bit block, which successively cascades, generates the 4th bit block.
As one embodiment, the bit in the 4th bit block arranges from small to large according to coefficient of reliability.
The position of bit in 4th bit block is corresponded with N number of coefficient of reliability respectively, the N reliability Coefficient is corresponded with the serial number of N number of subchannel respectively, and the bit in the 4th bit block is placed to opposite with its position In the subchannel answered, bit rearranges the 5th according to the serial number of N number of subchannel from small to large in N number of subchannel Bit block,
As one embodiment, input of the 5th bit block as the polarization code.
As one embodiment, the first information block is a DCI block.
As one embodiment, PDCCH be used to transmit the first information block.
As one embodiment, first blockette indicates the information format of the first information block, described first The information format of block of information is used for determining the Q.
As one embodiment, tandem of the bit in the first information block in the first information block with Tandem of the bit in first bit block in the first information block is different.
As one embodiment, the first information block and the L check bit successively cascade and generate third bit Block, the first intertexture table, which be used to be interleaved the third bit block, generates first bit block.
As one embodiment, the first intertexture table includes retrieval column and numerical value column, the retrieval arrange include with it is described Continuous searching value, the searching value be used to sequentially generate first bit block to numerical value on numerical value column correspondingly In bit, the numerical value in the first numerical value set on numerical value column closes one by one with the bit in the third bit block Connection, the arrangement of numerical value in numerical value column according to the searching value corresponding to it from small to large, the P bit is described P bit of the first numerical value subset associations in numerical value column before with the associated numerical value of the first check bit, described the One numerical value subset is the subset of the first numerical value set.
The retrieval in the corresponding retrieval column of any value as one embodiment, in the first numerical value subset Value is less than the corresponding searching value of first check bit.
As one embodiment, first blockette is made of 2 bits.
As one embodiment, first blockette is made of 3 bits.
As one embodiment, first blockette is made of 4 bits.
As one embodiment, first channel coding includes rate-matched.
As one embodiment, the output of the polarization code is used as the input of rate-matched.
As one embodiment, the output of first channel coding is the output carried out after rate-matched.
Embodiment 7
Embodiment 7 illustrates the first channel coding and the first channel decoding, as shown in Fig. 7.
In embodiment 7, in base station equipment, bit d (1) d (2) d (3) d (4) d (5) ... in first information block by with In generating the bit in CRC bit block p (1) p (2) d (3) ..., the CRC bit block is successively made of L check bit, institute It states the bit in first information block and the CRC bit block and obtains the first bit block after interweaving, first bit block adds Add the input that the first channel coding is used as after freezing bit, the output of the channel coding be used to generate first nothing Line signal, the channel coding are based on polarization code (Polar code).Bit in at least partly described L check bit exists It is discrete (Distributed, i.e., discontinuously) in first bit block.
In a user device, first wireless signal received be used to generate the input of the first channel decoding, institute It states the first channel decoding and is based on first channel coding.The output of first channel decoding is reference sequences, the reference Bit in sequence and first bit block corresponds.
In fig. 7, the bit in the first information block indicates that the i is greater than the integer equal to 0 with d (i); Bit in the CRC bit block indicates that the j is greater than the integer equal to 0 with p (j).In the first information block Bit is connected with the bit in the associated CRC bit block with solid line.Dendrogram in decoder illustrates that the channel is translated Code neutralizes the associated a part of path bit { d (0), d (3), p (0) }, and bit { d (0), d (3), p (0) } is described first Position in bit block is continuous.
As one embodiment, first channel decoding is based on Viterbi criterion, corresponding at least one CRC bit The reference value be used for beta pruning in first channel decoding.
As one embodiment, the CRC bit block includes 24 bits, wherein 8 bits are discontinuous.
As one embodiment, the first information block includes the bit in the first blockette, first bit block In include Q filling bit, the Q is positive integer;In first channel decoding, the user equipment obtain it is described It is first determined before the element of Q1 filling bit of correspondence in reference sequences and corresponds to first sub-information in the reference sequences The element of bit in block, according to the member of the bit corresponded in the reference sequences in first blockette Element determines the value of the Q1 filling bit, and the Q1 filling bit is carried out subsequent decoded operation as bit is freezed, The Q1 filling bit is the subset of the Q filling bit.
As one embodiment, the Q1 is equal to the Q.
As one embodiment, the Q1 is less than the Q, in the Q filling bit and the Q1 filling bit it Outer filling bit is decoded before first blockette.
As one embodiment, the value of each element is estimated for corresponding (transmission) bit in the reference sequences The LLR (Log Likelihood Ratio, log-likelihood ratio) of meter.
As one embodiment, it is 0 that the reference sequences, which neutralize the corresponding element of the Q1 filling bit,;In addition to institute It states except the corresponding element of Q1 filling bit, the value of each element is for corresponding (transmission) ratio in the reference sequences Special and estimation LLR (Log Likelihood Ratio, log-likelihood ratio).
As one embodiment, first wireless signal is that the first bit block addition freezes bit later successively By scrambling code (Scrambling), modulation mapper (Modulation Mapper), layer mapper (Layer Mapper), in advance It encodes (Precoding), resource particle mapper (Resource Element Mapper), wideband symbol occurs (Generation) output after.
As one embodiment, first wireless signal is that the first bit block addition freezes bit later successively By scrambling code, modulation mapper, layer mapper, conversion precoder (transform precoder, for generating complex values letter Number), precoding, resource particle mapper, the output after wideband symbol generation.
As one embodiment, the CRC bit block is to recycle generator polynomial by CRC by the first information block The output of (cyclic generator polynomial).
As one embodiment, the CRC bit block is to recycle generator polynomial by CRC by the first information block Output after (cyclic generator polynomial) and scrambling code.
As one embodiment, the multinomial that the CRC bit block before the first information block and scrambling code is constituted is in GF (2) generator polynomial can be recycled by the CRC on to divide exactly, i.e., the CRC bit block structure before the described first information block and scrambling code At deconv with the obtained remainder of CRC circulation generator polynomial be zero.
As one embodiment, first channel coding includes rate-matched (Rate Matching).
As one embodiment, the beta pruning be used to reduce good fortune in the channel decoding based on Viterbi criterion The searching route deposited.For example, the path that heavy line indicates is the searching route survived, other paths in the dendrogram of attached drawing 7 It is the searching route deleted.
As one embodiment, in first bit block, first information block corresponding to the searching route by beta pruning In bit before associated CRC bit.
Embodiment 8
Embodiment 8 illustrates the first channel coding, as shown in Fig. 8.
In embodiment 8, the first channel coding includes polarization code generation module, and the first bit block is used as the polarization The input of code generation module, the output of the polarization code generation module are the output of first channel coding.First information block Generation module, CRC bit generation module and the first bit block generation module be first channel coding before processing mould Block.The CRC bit generation module be used to generate first bit block.
In embodiment 8, the first information block includes bit and Q filling bit in M blockette, the M A blockette is the blockette #1 in attached drawing 8, blockette #2 ... blockette #M respectively.First blockette is institute State a blockette in M blockette.The value of first blockette is related with the Q.The first information block It is used to generate CRC bit block, the corresponding mark of user equipment be used to carry out the CRC bit block scrambling and generate the L A check bit.The first information block, the L check bit and freezes bit block and be used to generate first bit Block.It is described to freeze to include that positive integer freezes bit in bit block.First blockette is made of P bit, the P It is positive integer.The first information block and the L check bit are sequentially mapped to first bit block after interweaving In, position of the P bit in first bit block is all before the first check bit, first check bit It is position of the L check bit in first bit block near preceding check bit, first check bit In first bit block previous adjacent bit and the latter adjacent bit be all ratio in the first information block It is special.
As one embodiment, all bits that freeze freezed in bit block are all 0.
As one embodiment, all bits freezed in bit block are continuous in first bit block.
As one embodiment, the first information block and the L check bit refer to 3GPP (The 3rd Generation Partnership Project, third generation partnership project) table 5.3.1-1 in standard TS38.212 into The bit that row generates after interweaving is sequentially mapped in first bit block.
As one embodiment, the first information block is by blockette #1, blockette #2 ... blockette #M and Q A filling bit successively cascades generation, and the Q is greater than 0.
As one embodiment, the Q is equal to 0, and the first information block is by blockette #1, blockette #2 ... Block of information #M successively cascades generation.
As one embodiment, tandem of the bit in the first information block in the first information block with Tandem of the bit in first bit block in the first information block is different.
As one embodiment, the bit and the filling bit of freezing all is 0.
As one embodiment, the length of first bit block is 2 n times power, and the N is positive integer.
As one embodiment, the polarization code generation module is that input bit block is multiplied with polarization code generator matrix Using multiplied result as output.
As one embodiment, the polarization code generator matrix is Kronecker matrix.
Embodiment 9
Embodiment 9 illustrates the first channel decoding, as shown in Fig. 9.
In embodiment 9, the first channel decoding includes polarization code decoding I module, the structural generation module of the first bit block II module is decoded with polarization code.The output of first channel decoding is first bit block.First bit block is by institute First information block recovery module is stated for generating the first information block.
In embodiment 9, first bit block be launched machine for generate the first wireless signal.First bit Block includes bit in first information block, the corresponding L check bit of the first information block and freezes bit.Described first Bit in block of information is in the sequence in the first information block with the bit in the first information block in first bit Sequence in block is different.The first information block includes bit and Q filling bit in M blockette, and the M is big In 1 positive integer, the Q is no less than 0 integer.First blockette is a son letter in the M blockette Block is ceased, the value of first blockette indicates the information format of the first information block, the information lattice of the first information block Formula is used for determining the Q.First blockette is made of P bit, and the P is positive integer.
In embodiment 9, the demodulation result of first wireless signal is used for the defeated of the polarization code decoding I module Enter, the polarization code decoding I module is corresponding to be launched polarization code generation module of the machine for first bit block.The pole The output for changing code decoding I module is used for determining first blockette.The value of first blockette is used for determining It is used for the input of the structural generation module of first bit block.Position of the P bit in first bit block All before the first check bit, first check bit is the L check bit in first bit block Position is near preceding check bit.First check bit is also used for determining that the decoding to first blockette is It is no correct.In the structural generation module of first bit block, the value of first blockette is used for determining the Q, To be used for determining the structure of first bit block, that is, freeze the position where bit and filling bit.First ratio The output of the structural generation module of special block is used for determining the distribution for freezing bit and the filling bit, i.e., described the The structure of one bit block.The structure of first bit block and the demodulation result of first wireless signal are used for the pole Change the input of code decoding II module.The polarization code decoding II module is corresponding to be launched pole of the machine for first bit block Change code generation module, described to freeze bit, the bit in the filling bit and first blockette is in the polarization code It is used in decoding II module as known bits.The first information block recovery module is extracted from first bit block The first information block corresponding bit rearrangement generation first information block.
Embodiment 10
Embodiment 10, which illustrates, is interleaved first information block and L check bit, as shown in attached drawing 10.
In embodiment 10, the input of third bit block and the first intertexture table as de-interleaver module, de-interleaver module Output is by K+L bit f0, f1..., fK+L-1First bit block of composition.First information block is by K bit d0, d1..., dK-1It cascades, CRC bit block is by L check bit e0, e1..., eL-1It cascades, the third bit block c0, c1..., cK+L-1It is successively cascaded by the first information block and the CRC bit block.
In embodiment 10, the first intertexture table includes that retrieval column (i.e. column where m) and numerical value arrange (i.e. v (m) institute Column), the retrieval column include and the numerical value continuous searching value correspondingly on numerical value column, the searching value It is used to sequentially generate the bit in first bit block, numerical value in the first numerical value set and institute on the numerical value column The bit stated in third bit block is associated with one by one, the numerical value in numerical value column according to the searching value corresponding to it from it is small to Big arrangement.The quantity for the searching value that the first intertexture table includes is equal to the number of the bit in the third bit block The maximum value possible K of amountmax+ L, wherein KmaxIt is the maximum value possible of the quantity of the bit in the first information block.
In embodiment 10, work as K=KmaxWhen, bit of the serial number equal to v (m) is placed on institute in the third bit block It states in the first bit block on bit of the serial number equal to m;As K < KmaxWhen, serial number is equal to v (m)-in the third bit block (Kmax- K) bit be placed sequentially in first bit block according to the sequence of m corresponding to v (m) from small to large, Middle v (m) need to meet v (m) >=KmaxThe condition of-K, v (m) < K in numerical value columnmaxThe numerical value of-K is not used for described Bit in three bit blocks is interleaved.
In embodiment 10, the first check bit is sorted most in the third bit block in the L check bit Forward bit.First check bit is also to sort in first bit block near preceding in the L check bit Bit.First check bit corresponding numerical value in the first intertexture table is Kmax.Numerical value KmaxCorresponding searching value It is m0。m0Corresponding serial number is l (m in first bit block0), the l (m0) depend on the K value.Described first Previous adjacent bit and the latter adjacent bit of the check bit in first bit block are all the first information blocks In bit.
As one embodiment, there are at least two check bits in first bit block in the L check bit In position it is discontinuous.
As one embodiment, the value of any one check bit in the L check bit compares with described first The bit in the first information block of position after it in special block is unrelated.
As one embodiment, the value of any one check bit in the L check bit be only possible to described Bit of the position in the first information block before it in first bit block is related, with the position in first bit block The bit set in first information block after it is unrelated.
As one embodiment, the value of any one check bit in the L check bit is only and described first Bit of the position in the first information block before it in bit block is related.
As one embodiment, first bit block does not include freezing bit.
Embodiment 11
Embodiment 11 illustrates position of first blockette in first information block, as shown in Fig. 11.
In embodiment 11, first information block is by K bit d0, d1..., dK-1It cascades, the first blockette is by P A bit b0, b1..., bP-1It cascades.b0, b1..., bP-1It is the d in the K bit0, d1..., dK-1, a0, a1..., aK-P-1It is K-P bit in the first information block in addition to the bit in first blockette.
Attached drawing 11 illustrates four of the bit in the first blockette described in embodiment 11 in the first information block Class candidate's pattern.In first kind candidate's pattern, the b0, b1..., bP-1It is discontinuous P ratio in the first information block It is special;In second class candidate's pattern, the b0, b1..., bP-1It is in the first information block near preceding continuous P ratio It is special;In third class candidate's pattern, the b0, b1..., bP-1It is the continuous P ratio in the first information block after It is special;In the 4th class candidate's pattern, the b0, b1..., bP-1It is continuous P bit in the first information block, and described b0, b1..., bP-1It does not include first bit and the last one bit in the first information block.
Embodiment 12
Embodiment 12 illustrates position of first blockette in first information block, as shown in Fig. 12.
In embodiment 12, the first blockette is by P bit b0, b1..., bP-1It cascades, CRC bit block is by L Check bit e0, e1..., eL-1It cascading, first information block includes the bit in first blockette, and described first Block of information and CRC bit block are sequentially mapped to first bit block after interweaving.Bit in the first information block Quantity be K.Bit and other first letters of first bit block by the bit in the first blockette, in CRC bit block Cease the bit g in addition to the bit in first blockette in block0, g1..., gK-P-1Composition.In the CRC bit block First bit e0It is the first check bit.e0It is also the position in first bit block of the bit in the CRC bit block It sets near preceding check bit.
In embodiment 12, the first information block and the CRC bit block are sequentially mapped to described after interweaving Bit b in first bit block, in first blockette0, b1..., bP-1Position in first bit block all exists The first check bit e0Before, the first check bit e0Previous adjacent bit in first bit block and The latter adjacent bit is all the bit in the first information block.In first bit block, first check bit e0Bit before be used to generate the first check bit e0, the first check bit e0Bit later not by with In generation the first check bit e0
Attached drawing 12 illustrates four of the bit in the first blockette described in embodiment 12 in first bit block Class candidate's pattern: in first kind candidate's pattern, b0, b1..., bP-1It is in first bit block near e0It is continuous P bit;In second class candidate's pattern, b0, b1..., bP-1It is in first bit block near preceding continuous P A bit;In third class candidate's pattern, b0, b1..., bP-1It is continuous P bit, b in first bit block0, b1..., bP-1Neither it is included in first bit block near e0Bit do not include in first bit block yet First bit;In third class candidate's pattern, b0, b1..., bP-1It is the discontinuous P ratio in first bit block It is special.
Embodiment 13
Embodiment 13 illustrates the schematic diagram of the first information block according to the application, as shown in Fig. 13.In attached drawing 13, First information block by M blockette, that is, blockette #1, blockette #2 ..., blockette #M and Q filling bit according to Secondary cascade composition;Blockette #1, blockette #2 ..., blockette #M respectively correspond bit sequence { a1_1a1_ 2...a1_k1, { a2_1a2_2... a2_k2..., { aM_1aM_2...aM_kM};The Q filling bit is bit sequence { b1b2... bQ, in the M blockette quantity of total bit be equal to k1, k2 ..., the sum of kM.
As the sub- embodiment 1 of embodiment 13, if bit in the first information block quantity (i.e. k1, k2 ..., The sum of kM, Q) it is M2, first blockette is blockette #i;If the quantity of the bit in the first information block For M3, first blockette is blockette #j;The M2 and M3 is differed, and the i and the j are differed, the i It is no more than the positive integer of M respectively with the j.
As the sub- embodiment 2 of embodiment 13, its in the first information block other than first blockette The quantity of his bit of any two blockette in the context and the first information block in the first information block It is unrelated.
As the sub- embodiment 3 of embodiment 13, in the first information block other than first blockette extremely The quantity of few bit of two blockettes in the context and the first information block in the first information block has It closes.
As the sub- embodiment 4 of embodiment 13, the meaning of at least one blockette and institute in the M blockette The quantity for stating the bit in first information block is related.
As the sub- embodiment 5 of embodiment 13, the M is related with the quantity of bit in the first information block.
As the sub- embodiment 6 of embodiment 13, the first information block is a DCI, the M blockette difference M domain (field) in the corresponding DCI.
As the sub- embodiment 7 of embodiment 13, first blockette is blockette #1.
As the sub- embodiment 7 of embodiment 13, first blockette is blockette #M.
As one embodiment, the meaning of M blockette DCI format corresponding with the first information block has It closes.
As one embodiment, the M domain includes one or more in following domain:
- resource allocation (Resource Allocation);
- .MCS (Modulation Coding Status, modulation coding state);
- .CIF (Carier Indicator Field, carrier wave instructions field);
- .TPC (Transmission Power Control sends power control);
- .HARQ (hybrid automatic repeat-request) process number (Process Number);
- .RV (Redundancy version, redundancy versions);
- .NDI (New Data Indicator, new data instruction);
- .BWP (BandWidthPart, bandwidth component) instruction;
- .SRI (Sounding reference signal Resource Indicator, interception reference signal resource Instruction);
- .TPMI (Transmission Precoding Matrix Indicator sends precoding instruction);
- .A-CSI (Aperiodic Channel Status Information, aperiodic channel status information) touching Hair;
- .A-SRS (Aperiodic Sounding Reference Signal, aperiodic interception reference signal) triggering;
- .DMRS (Demodulation Reference Signal, demodulated reference signal) configuration information.
Embodiment 14
Embodiment 14 illustrates the structural block diagram of the processing unit in base station, as shown in Fig. 14.In attached drawing 14, base station Processing unit 1401 is mainly by the first processor module 1401, the first channel encoder 1402 and the first transmitter module 1403 Composition.
In embodiment 14, the first processor module 1401 generates first information block;First channel encoder 1402 executes First channel coding;First transmitter module 1403 sends the first wireless signal.
In embodiment 14, the first information block includes by the bit and Q filling bit group in M blockette At K bit, the M is greater than 1 positive integer, and the Q is nonnegative integer, and the K is greater than 1 positive integer;First ratio Special block is used for the input of first channel coding, and first channel coding is based on polarization code, the first bit block packet The K bit and L check bit are included, the first information block be used to generate the L check bit, and the L is Positive integer;The output of first channel coding be used to generate first wireless signal;In the M blockette Any blockette is made of positive integer bit, and the first blockette is a sub-information in the M blockette Block, first blockette are made of P bit, and the P is positive integer;The value of first blockette and described the The information format of one block of information is related, alternatively, the value of first blockette is related with the Q;The first information block and The L check bit is sequentially mapped in first bit block after interweaving, and the P bit is described first All before the first check bit, first check bit is the L check bit described for position in bit block Near preceding check bit, first check bit is previous in first bit block for position in one bit block Adjacent bit and the latter adjacent bit are all the bits in the first information block.
As one embodiment, first processor module 1401 determines the P bit in the first information block In position;Wherein, position of the P bit in the first information block ensures the P bit in first ratio Position in special block is all before first check bit.
As one embodiment, position of the P bit in first bit block is continuous, the P ratio Position of the spy in the first information block is also continuous.
As one embodiment, the P bit is in the bit for form the first information block in first bit Position is near P preceding bit in block.
As one embodiment, the P bit is P bit of the sequence after in the first information block.
As one embodiment, the P bit is in the position and the first information block in the first information block Bit quantity it is related.
As one embodiment, the P bit is opposite in first bit block with first check bit Position is unrelated with the quantity of bit in the first information block.
As one embodiment, the P bit is opposite in first bit block with first check bit Position is related with the quantity of bit in the first information block.
As one embodiment, position of the Q filling bit in the first information block is discontinuous.
As one embodiment, first processor module 1401 includes controller/processor in embodiment 4 440。
As one embodiment, first processor module 1401 includes the transmited processor 415 in embodiment 4.
As one embodiment, first channel encoder 1402 includes the transmited processor 415 in embodiment 4.
As one embodiment, first channel encoder 1402 includes controller/processor in embodiment 4 440。
As one embodiment, first transmitter module 1403 includes the MIMO transmited processor in embodiment 4 441。
As one embodiment, first transmitter module 1403 includes the emitter/receiver 416 in embodiment 4 With antenna 420.
Embodiment 15
Embodiment 15 illustrates the structural block diagram of the processing unit in UE, as shown in Fig. 15.In attached drawing 15, UE processing Device 1500 is mainly made of the first receiver module 1501, the first channel decoder 1502 and second processing machine module 1503.
In embodiment 15, the first receiver module 1501 receives the first wireless signal, and the first channel decoder 1502 is held The first channel decoding of row, second processing machine module 1503 restore first information block.
In embodiment 15, first wireless signal is used for the input of the first channel decoding;First channel is translated Corresponding first channel coding of code, first channel coding are based on polarization code, and the first bit block is used for first channel and compiles The input of code;The first information block include by the bit and K bit forming of Q filling bit in M blockette, First bit block includes the K bit and L check bit, and the first information block be used to generate the L school Bit is tested, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, and the L is positive integer;The M Any blockette in blockette is made of positive integer bit, and the first blockette is in the M blockette One blockette, first blockette are made of P bit, and the P is positive integer;First blockette Value is related with the information format of the first information block, alternatively, the value of first blockette is related with the Q;Described One block of information and the L check bit are sequentially mapped in first bit block after interweaving, the P bit All before the first check bit, first check bit is the L verification ratio for position in first bit block Position of the spy in first bit block is near preceding check bit, and first check bit is in first bit block In previous adjacent bit and the latter adjacent bit be all bit in the first information block.
As one embodiment, the decoding of the first channel decoder 1502 obtains the P bit;Wherein, the P ratio Spy is in the position in first bit block before first check bit.
As one embodiment, position of the P bit in first bit block is continuous, the P ratio Position of the spy in the first information block is also continuous.
As one embodiment, the P bit is in the bit for form the first information block in first bit Position is near P preceding bit in block.
As one embodiment, the P bit is P bit of the sequence after in the first information block.
As one embodiment, the P bit is in the position and the first information block in the first information block Bit quantity it is related.
As one embodiment, the P bit is opposite in first bit block with first check bit Position is unrelated with the quantity of bit in the first information block.
As one embodiment, the P bit is opposite in first bit block with first check bit Position is related with the quantity of bit in the first information block.
As one embodiment, position of the Q filling bit in the first information block is discontinuous.
As one embodiment, the second processing machine module 1503 includes controller/processor in embodiment 4 490。
As one embodiment, the second processing machine module 1503 includes the memory 480 in embodiment 4.
As one embodiment, the second processing machine module 1503 includes the reception processor 452 in embodiment 4.
As one embodiment, first channel decoder 1502 includes the reception processor 452 in embodiment 4.
As one embodiment, first channel decoder 1502 includes controller/processor in embodiment 4 490。
As one embodiment, first receiver module 1501 includes the MIMO detector 472 in embodiment 4.
As one embodiment, first receiver module 1501 includes the emitter/receiver 456 in embodiment 4 With antenna 460.
Those of ordinary skill in the art will appreciate that all or part of the steps in the above method can be referred to by program Enable related hardware complete, described program can store in computer readable storage medium, such as read-only memory, hard disk or CD etc..Optionally, it is next real that one or more integrated circuit also can be used in all or part of the steps of above-described embodiment It is existing.Correspondingly, each modular unit in above-described embodiment, can be realized using example, in hardware, it can also be by software function module Form realize that the application is not limited to the combination of the software and hardware of any particular form.UE or terminal in the present invention Including but not limited to mobile phone has the unmanned plane of communication module, has the aircraft of communication module, has the vapour of communication module Vehicle, tablet computer, notebook, card of surfing Internet, NB-IOT (narrowband Internet of Things) terminal, the wireless telecom equipments such as eMTC terminal.This hair Base station or system equipment in bright include but is not limited to gNB, macrocell base stations, microcell base station, Home eNodeB, relaying base It the wireless telecom equipments such as stands.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the scope of the present invention.It is all Within the spirit and principles in the present invention, any modification made, equivalent replacement, improve etc., it should be included in guarantor of the invention Within the scope of shield.

Claims (20)

1. a kind of method in base station equipment that be used to wirelessly communicate, wherein include:
Generate first information block, the first information block include by M blockette bit and Q filling bit form K bit, the M is greater than 1 positive integer, and the Q is nonnegative integer, and the K is greater than 1 positive integer;
The first channel coding is executed, the first bit block is used for the input of first channel coding, first channel coding Based on polarization code, first bit block includes the K bit and L check bit, and the first information block be used to give birth to At the L check bit, the L is positive integer;
The first wireless signal is sent, the output of first channel coding be used to generate first wireless signal;
Wherein, any blockette in the M blockette is made of positive integer bit, and the first blockette is described A blockette in M blockette, first blockette are made of P bit, and the P is positive integer;It is described The value of first blockette is related with the information format of the first information block, alternatively, the value of first blockette and institute It is related to state Q;The first information block and the L check bit are sequentially mapped to first bit block after interweaving In, all before the first check bit, first check bit is for position of the P bit in first bit block Position of the L check bit in first bit block is near preceding check bit, and first check bit is in institute Stating previous adjacent bit and the latter adjacent bit in the first bit block is all the bit in the first information block.
2. the method according to claim 1, wherein including:
Determine position of the P bit in the first information block;
Wherein, the P bit ensures the P bit in first bit block in the position in the first information block Position all before first check bit.
3. method according to claim 1 or 2, which is characterized in that position of the P bit in first bit block It is continuous for setting, and position of the P bit in the first information block is also continuous.
4. according to claim 1 to method described in any claim in 3, which is characterized in that the P bit is composition institute Position is stated in the bit of first information block in first bit block near P preceding bit.
5. according to claim 1 to method described in any claim in 4, which is characterized in that the P bit is described P bit of the sequence after in first information block.
6. the method according to claim 1, which is characterized in that the P bit is described Position in one block of information is related with the quantity of bit in the first information block.
7. according to claim 1 to method described in any claim in 6, which is characterized in that the P bit and described the One check bit is unrelated with the quantity of bit in the first information block in the relative position in first bit block.
8. according to claim 1 to method described in any claim in 6, which is characterized in that the P bit and described the One check bit is related with the quantity of bit in the first information block in the relative position in first bit block.
9. according to claim 1 to method described in any claim in 8, which is characterized in that the Q filling bit is in institute It is discontinuous for stating the position in first information block.
10. a kind of method in user equipment that be used to wirelessly communicate, wherein include:
The first wireless signal is received, first wireless signal is used for the input of the first channel decoding;
The first channel decoding, corresponding first channel coding of first channel decoding are executed, first channel coding is based on pole Change code, the first bit block is used for the input of first channel coding;
Restore first information block, the first information block include by M blockette bit and Q filling bit form K bit, first bit block includes the K bit and L check bit, and the first information block be used to generate The L check bit, the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, and the L is positive integer;
Wherein, any blockette in the M blockette is made of positive integer bit, and the first blockette is described A blockette in M blockette, first blockette are made of P bit, and the P is positive integer;It is described The value of first blockette is related with the information format of the first information block, alternatively, the value of first blockette and institute It is related to state Q;The first information block and the L check bit are sequentially mapped to first bit block after interweaving In, all before the first check bit, first check bit is for position of the P bit in first bit block Position of the L check bit in first bit block is near preceding check bit, and first check bit is in institute Stating previous adjacent bit and the latter adjacent bit in the first bit block is all the bit in the first information block.
11. according to the method described in claim 10, it is characterised by comprising:
Decoding obtains the P bit;
Wherein, the P bit is in the position in first bit block all before first check bit.
12. method described in 0 or 11 according to claim 1, which is characterized in that the P bit is in first bit block Position be it is continuous, position of the P bit in the first information block is also continuous.
13. method described in any claim in 0 to 12 according to claim 1, which is characterized in that the P bit is group At in the bit of the first information block in first bit block position near P preceding bit.
14. method described in any claim in 0 to 13 according to claim 1, which is characterized in that the P bit be P bit of the sequence after in the first information block.
15. method described in any claim in 0 to 14 according to claim 1, which is characterized in that the P bit is in institute The position stated in first information block is related with the quantity of bit in the first information block.
16. method described in any claim in 0 to 15 according to claim 1, which is characterized in that the P bit and institute It is unrelated with the quantity of bit in the first information block in the relative position in first bit block to state the first check bit.
17. method described in any claim in 0 to 15 according to claim 1, which is characterized in that the P bit and institute It is related with the quantity of bit in the first information block in the relative position in first bit block to state the first check bit.
18. method described in any claim in 0 to 17 according to claim 1, which is characterized in that the Q filling bit Position in the first information block is discontinuous.
19. a kind of base station equipment that be used to wirelessly communicate, comprising:
- the first processor module generates first information block, and the first information block includes by the bit and Q in M blockette K bit of a filling bit composition, the M are greater than 1 positive integer, and the Q is nonnegative integer, and the K is being greater than 1 just Integer;
- the first channel encoder executes the first channel coding, and the first bit block is used for the input of first channel coding, First channel coding is based on polarization code, and first bit block includes the K bit and L check bit, and described the One block of information be used to generate the L check bit, and the L is positive integer;
- the first transmitter module, sends the first wireless signal, and the output of first channel coding be used to generate described first Wireless signal;
Wherein, any blockette in the M blockette is made of positive integer bit, and the first blockette is described A blockette in M blockette, first blockette are made of P bit, and the P is positive integer;It is described The value of first blockette is related with the information format of the first information block, alternatively, the value of first blockette and institute It is related to state Q;The first information block and the L check bit are sequentially mapped to first bit block after interweaving In, all before the first check bit, first check bit is for position of the P bit in first bit block Position of the L check bit in first bit block is near preceding check bit, and first check bit is in institute Stating previous adjacent bit and the latter adjacent bit in the first bit block is all the bit in the first information block.
20. a kind of user equipment that be used to wirelessly communicate, comprising:
- the first receiver module, receives the first wireless signal, and first wireless signal is used for the defeated of the first channel decoding Enter;
- the first channel decoder, executes the first channel decoding, corresponding first channel coding of first channel decoding, and described the One channel coding is based on polarization code, and the first bit block is used for the input of first channel coding;
Second processing machine module restores first information block, and the first information block includes by the bit and Q in M blockette K bit of a filling bit composition, first bit block include the K bit and L check bit, first letter Breath block be used to generate the L check bit, and the M and the K are greater than 1 positive integer, and the Q is nonnegative integer, The L is positive integer;
Wherein, any blockette in the M blockette is made of positive integer bit, and the first blockette is described A blockette in M blockette, first blockette are made of P bit, and the P is positive integer;It is described The value of first blockette is related with the information format of the first information block, alternatively, the value of first blockette and institute It is related to state Q;The first information block and the L check bit are sequentially mapped to first bit block after interweaving In, all before the first check bit, first check bit is for position of the P bit in first bit block Position of the L check bit in first bit block is near preceding check bit, and first check bit is in institute Stating previous adjacent bit and the latter adjacent bit in the first bit block is all the bit in the first information block.
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