CN109756124B - Current feed type half-bridge resonance topological structure for wireless power transmission - Google Patents

Current feed type half-bridge resonance topological structure for wireless power transmission Download PDF

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CN109756124B
CN109756124B CN201910053507.6A CN201910053507A CN109756124B CN 109756124 B CN109756124 B CN 109756124B CN 201910053507 A CN201910053507 A CN 201910053507A CN 109756124 B CN109756124 B CN 109756124B
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CN109756124A (en
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周洪
关世琦
李刚
李佳
邓其军
胡文山
周东国
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Shenzhen Huayu Wireless Power Supply Technology Co ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention provides a current feed type half-bridge resonant topological structure for wireless power transmission, which comprises a transmitting end and a receiving end, wherein the transmitting end comprises a quasi-current source, a half-bridge circuit inverter and a CLC resonant network, the quasi-current source is connected with the CLC resonant network through the half-bridge circuit inverter, the receiving end comprises a resonant circuit and a voltage doubler circuit, the resonant circuit is connected with the voltage doubler circuit, the CLC resonant network comprises a first capacitor, a second capacitor and a transmitting coil, the second capacitor is connected with the transmitting coil in series and then connected with the first capacitor in parallel, and the resonant circuit comprises a receiving coil matched with the transmitting coil and a third capacitor electrically connected with the receiving coil. The current feed type half-bridge resonance topological structure for wireless power transmission enables a current feed type induction power transmission system (IPT) circuit to be suitable for medium-power application.

Description

Current feed type half-bridge resonance topological structure for wireless power transmission
Technical Field
The invention relates to the field of wireless power transmission, in particular to a current feed type half-bridge resonance topological structure for wireless power transmission.
Background
Wireless energy Transfer Systems (WPTs) are currently a focus of research and are classified into inductive power transfer systems and capacitive power transfer systems. An inductive power transmission system (IPT) is a wireless power transmission technology realized by utilizing an electromagnetic induction theory, and has wide application prospects in the fields of aerospace, transportation, medical instruments, robots, illumination, portable electronic products, mines, underwater application and the like.
As in fig. 1, the control of the inverter of a current fed push-pull current multiplier circuit based on an IPT system is typically done by frequency conversion modulation. The switching frequency is determined only by the inverted output voltage and is done by sensing the zero-crossing of the output voltage, which helps the zero-voltage switch (ZVS) to turn on and off. However, the main limitation of this control method is to start the converter due to the zero voltage output by the inverter. Since the zero crossing of the inverter output voltage is a single operating point, it is a difficult challenge to accurately detect this point and turn on one Metal Oxide Semiconductor Field Effect Transistor (MOSFET) while turning off the other MOSFET without delay in the sensor and control. If the control in the circuit is not precise, the shunt capacitance will be shorted through one MOSFET and the other MOSFET's transistor diode. However, if the inverter output voltage is low and the operating switching frequency is low, the control circuit delay is negligible, which is not a big problem. However, in high power applications, the output voltage of the inverter is large in amplitude and rises sharply after a zero crossing. Thus, if the MOSFET is not turned on and is completely turned off at zero crossing, the resonant capacitor will be short-circuited through the MOSFET and the transistor diode, which will result in a large amount of power loss. For these reasons, the application of these topologies is generally limited to low power. In order to make the current feed type IPT circuit suitable for medium power application, the invention provides a novel current feed type half-bridge resonance topological structure, and the limitation is solved.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a current feed type half-bridge resonance topological structure for wireless power transmission, so that a current feed type IPT circuit is suitable for medium-power application.
The invention is realized by the following steps:
the invention provides a current feed type half-bridge resonant topological structure for wireless power transmission, which comprises a transmitting end and a receiving end, wherein the transmitting end comprises a quasi-current source, a half-bridge circuit inverter and a CLC resonant network, the quasi-current source is connected with the CLC resonant network through the half-bridge circuit inverter, the receiving end comprises a resonant circuit and a voltage doubler circuit, the resonant circuit is connected with the voltage doubler circuit, the CLC resonant network comprises a first capacitor, a second capacitor and a transmitting coil, the second capacitor is connected with the transmitting coil in series and then connected with the first capacitor in parallel, and the resonant circuit comprises a receiving coil matched with the transmitting coil and a third capacitor electrically connected with the receiving coil.
Preferably, the output power factor of the inverter is kept lagging, and the soft switch of the inverter switch is always ensured to be conducted no matter what the load current is; the values of the first capacitor and the second capacitor are selected to enable the amplitude of the output current of the inverter to be low, and the value of the third capacitor is selected to enable the voltage of the input end of the voltage multiplier circuit to be the maximum value.
Preferably, the receiving coil is connected in series with the third capacitor.
Preferably, the voltage doubler circuit includes a third diode, a fourth capacitor and a fifth capacitor, the third diode is connected to the fourth capacitor, the fourth diode is connected to the fifth capacitor, and an anode of the third diode and a cathode of the fourth diode are both connected to a cathode of the third capacitor.
Preferably, the quasi-current source includes a dc power supply, a first dc inductor and a second dc inductor, the first dc inductor and the second dc inductor are connected in parallel with each other and are both connected in series with the dc power supply, and the other ends of the first dc inductor and the second dc inductor are both connected to the half-bridge circuit inverter.
Preferably, there is no coupling between the first and second dc inductances.
Preferably, the half-bridge inverter includes a first switching device, a second switching device, a first diode, and a second diode.
Preferably, the first switching device is a first field effect transistor, the second switching device is a second field effect transistor, a drain of the first field effect transistor is connected with the first direct current inductor, a source of the first field effect transistor is connected with an anode of the first diode, a drain of the second field effect transistor is connected with the second direct current inductor, a source of the second field effect transistor is connected with an anode of the second diode, and cathodes of the first diode and the second diode are both connected with a cathode of the direct current power supply.
Preferably, the positive electrode of the first capacitor is connected with the drain electrode of the first field effect transistor, and the negative electrode of the first capacitor is connected with the drain electrode of the second field effect transistor.
The invention has the following beneficial effects:
1. the current feed type half-bridge resonant topological structure for wireless power transmission provided by the invention adopts a (C) (CL) series-parallel resonant circuit, and can be suitable for medium-power application.
2. The current feed type half-bridge resonance topological structure for wireless power transmission provided by the invention is realized through a direct current bus inductor Ld1And Ld2Provides natural short circuit protection and also limits the peak and circulating currents through the element. The current sharing (half bridge) configuration further reduces the average and peak currents through the elements, thereby reducing conduction losses. The current fed circuit also provides a voltage gain and the voltage doubler adds 2 times the additional gain.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a push-pull converter circuit based on an IPT system;
figure 2 is an IPT circuit and current fed half bridge converter provided by an embodiment of the invention;
fig. 3 is an equivalent circuit of an IPT system converter provided by the embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 2 to fig. 3, an embodiment of the present invention provides a current-fed half-bridge resonant topology structure for wireless power transmission, including a transmitting end and a receiving end, where the transmitting end includes a quasi-current source, a half-bridge circuit inverter, and a CLC resonant network, the quasi-current source is connected to the CLC resonant network through the half-bridge circuit inverter, the receiving end includes a resonant circuit and a voltage doubler circuit, the resonant circuit is connected to the voltage doubler circuit, and the CLC resonant network includes a first capacitor CPA second capacitor CSAnd a transmitting coil L1Said second capacitor CSAnd the transmitting coil L1Connected in series with the first capacitor CPIn parallel, the resonant circuit including the transmitting coil L1Matched receiving coil L2And with the receiving coil L2Third capacitor C connected electrically2。
The invention provides, analyzes and develops a new power electronic system for the application of a wireless power transmission system, and particularly provides a current feed type topology with current sharing and voltage multiplication characteristics. The topology is analyzed using a new series parallel CLC resonant network. The resonant network of the present invention can derate off-board circuit devices and allow the use of devices with low on-resistance and low cost compared to conventional series LC resonant networks. This is the first attempt to achieve IPT using a shunt voltage multiplying current fed circuit and a CLC resonant network. The output power factor of the inverter is kept lagging, and the soft switch of the inverter switch is always ensured to be conducted no matter what the load current is.
Fig. 1 is a push-pull converter circuit based on an IPT system, fig. 2 is a circuit topology structure of the embodiment, and is different from the push-pull converter circuit based on the IPT systemIn this embodiment, there is no coupling between the dc inductors of the quasi-current sources, and in the transmitting circuit, the compensation capacitor is divided into two parts instead of using the conventional parallel LC resonant tank, so as to develop a series-parallel CCL resonant tank, i.e. a second capacitor CsAnd a transmitting coil L1Connected in series with the first capacitor CpAnd (4) connecting in parallel. As shown in fig. 2, due to the high leakage current, the transmit coil circuit impedance (i.e., the impedance of the entire transmit terminal) is significantly reduced by the series capacitance, and the effective transmit coil impedance (i.e., the impedance of the CLC resonant network) is reduced to ω L1-1/(ωCs)]. Thus, the first capacitance CpOnly a fraction of the total reactive power requirement needs to be provided, maintaining all the advantages of current fed converters, i.e. low current stress at the switches of the half bridge inverter and low harmonic content in the coil current, etc.
The half-bridge inverter inputs a square wave current to the CLC resonant network. The components of the transmitting coil side network (i.e. the transmitting side) are designed such that the current I at the output of the half-bridge inverter isiA first capacitor C connected in parallel for a given output power being a minimumpProviding a lower impedance for higher harmonic currents. Thus, the higher harmonics I of the inverter output currentiThrough the first capacitor CpAnd a transmitting coil L1An almost pure sinusoidal current is obtained. Due to mutual coupling, the receiving coil L2Will obtain a mutual inductance M, a transmitter coil current I1A voltage proportional to the operating frequency of the transmit coil. However, appropriate capacitive reactive compensation is required to compensate for the effect of the high leakage inductance of the receiving side coil. In the invention, a third capacitor C is connected in series2And compensating reactive power. And finally, the power supply in the receiving end network is rectified through a voltage multiplier circuit and feeds back to the load.
As shown in fig. 2, the receiving coil L is preferably2And the third capacitor C2Connected in series for compensating reactive power.
Preferably, the voltage doubler circuit comprises a third diode D3, a fourth diode D4, and a fourth capacitor C01And a fifth capacitance C02The third diode D3 and the fourth capacitor C01The fourth diode D4 is connected with a fifth capacitor C02The anode of the third diode D3, the cathode of the fourth diode D4 and the third capacitor C are connected2Is connected to the negative electrode of the voltage doubler circuit, which is used to rectify and amplify the voltage.
Preferably, the quasi-current source comprises a DC power supply VdFirst direct current inductance Ld1And a second direct current inductance Ld2The first direct current inductance Ld1And a second direct current inductance Ld2Are connected in parallel and are all connected with the direct current power supply VdIn series, the first direct current inductance Ld1And a second direct current inductance Ld2Is connected with the half-bridge circuit inverter, and a first direct current inductor Ld1And a second direct current inductance Ld2The absence of coupling between the inductors provides natural short circuit protection and also limits the peak and circulating currents through the element.
Preferably, the half-bridge inverter includes a first fet S1, a second fet S2, a first diode D1, and a second diode D2, the drain of the first fet S1 and the first dc inductor Ld1The source of the first field effect transistor S1 is connected with the anode of the first diode D1, the drain of the second field effect transistor S2 is connected with the second direct current inductor Ld2The source of the second FET S2 is connected to the anode of the second diode D2, and the cathodes of the first diode D1 and the second diode D2 are connected to the DC power supply VdFurther reducing the average and peak currents through the element and thus reducing conduction losses.
Preferably, the first capacitor CPThe anode is connected with the drain electrode of the first field effect transistor S1, and the first capacitor CPThe negative electrode is connected with the drain electrode of the second field effect transistor S2 and is connected with a capacitor C in parallelpProviding a lower impedance for higher harmonic currents.
This example is an example of a 1.2kW IPT system design and is used for experimental prototype development and validation.
The method comprises the following steps:FIG. 3 is the equivalent circuit shown in FIG. 2, wherein the I/O ports are current sources IiAnd a voltage source Vr. By applying the power balance principle, the input end voltage V of the voltage multiplier circuit on the AC side is considered to flow at the AC side (namely the receiving end) due to the fundamental wave componentrAnd the voltage V at the output end of the voltage doubler circuit0There is a relationship as follows:
Figure BDA0001951634920000071
because of the passive rectification of the diode, the voltage V at the input end of the voltage doubler circuitrAnd receiving the coil current I2Are in phase. In this analysis, the coil current I is received2Voltage V at input end of OR voltage doubler circuitrIs designated as the reference phase. Applying Kirchhoff's Current Law (KCL) in transmitting terminal network, and outputting terminal current I of half-bridge circuit inverteriIs the transmitting coil current I1And a current I through the first capacitorPSum of
Figure BDA0001951634920000072
Where M is the mutual inductance between the transmitter coil and the receiver coil, j is an imaginary unit, ω is the angular frequency, CpA first capacitor, CsIs a second capacitance, L1For transmitting coil inductance, ViIs the voltage at the output of the half-bridge inverter. Applying Kirchhoff's Voltage Law (KVL) at receiving end, voltage V at input end of voltage doubler circuitrIs composed of
Figure BDA0001951634920000073
Wherein L is2To receive the coil inductance, C2Is a third capacitance.
Selecting a first capacitance CpAnd a second capacitor CsOf the value of (a) such that the current I at the output of the half-bridge inverter isiThe amplitude is low and the third capacitance C is selected2Input of voltage doubler circuitTerminal voltage VrIs the maximum value. This is done by eliminating the second term in (2) and (3). According to equations (2) and (3), the required capacitance is calculated as
Figure BDA0001951634920000074
Wherein, ω is01For transmitting the resonant frequency, omega, of the coil02And receiving the resonance frequency of the coil.
By varying the switching frequency omega of a half-bridge inverter0(＝2πf0) Resonant frequency omega of transmitting coil01And receiving coil resonance frequency omega02Equal to achieve efficient power transfer. Applying KVL in the receiver loop, transmitting coil current I1Is calculated as
Figure BDA0001951634920000075
Wherein, V0For the voltage-doubler circuit output voltage, omega0For half-bridge inverter switching frequencies, j and M have the same meaning as above.
Applying KVL and KCL at the transmitting end, using equations (4) and (5), the Root Mean Square (RMS) value of the voltage between the transmitting coil and the two series capacitors is
Figure BDA0001951634920000081
Figure BDA0001951634920000082
Wherein, V1For transmitting voltage across the coil, VsIs the voltage across the second capacitor, I0Is the current of the output terminal of the voltage doubler circuit, V0、L1、ω0、CsJ and M have the same meanings as above.
From the equivalent circuit of fig. 3, the voltage V at the output of the half-bridge inverter can be derivediAnd current IiIs composed of
Figure BDA0001951634920000083
Figure BDA0001951634920000084
Wherein, Cp，I0，V0，L1，ω0，CsJ and M have the same meanings as above.
As can be seen from equation (8), due to the series connection of the second capacitor CsIn the presence of, appear
Figure BDA0001951634920000089
An item. This is a major advantage of the topology proposed herein compared to existing parallel L-C topologies. The output power factor of the half-bridge inverter is obtained from equations (8) and (9)
Figure BDA0001951634920000088
Is composed of
Figure BDA0001951634920000085
Wherein the content of the first and second substances,
Figure BDA0001951634920000086
is the phase angle of the current(s),
Figure BDA0001951634920000087
is the phase angle, omega, of the voltage0、M、I0、V0、L1、CsAnd CpThe meaning of (1) is as above.
When the switching devices are Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), the hysteresis in the power factor at the input to the half-bridge inverter is important because Zero Voltage Switching (ZVS) conduction is ensured regardless of the load current. Similarly, when the switching device is selected to be an Insulated Gate Bipolar Transistor (IGBT), power factor advance is very important to achieve soft switching when the device is turned off.
It can be seen from fig. 3 that the RMS value of the switching current of the half-bridge inverter is directly dependent on the input dc current Id. The peak blocking voltage of the half-bridge inverter switches and diodes is also the same magnitude as the peak output voltage of the half-bridge inverter. Thus, the voltage and current ratings of the switches and diodes of the half-bridge inverter can be derived
Figure BDA0001951634920000091
Figure BDA0001951634920000092
Wherein, ViFor the output voltage, I, of half-bridge invertersdFor an input direct current, IS1For the rated current value, I, of the half-bridge inverter switch S1S2For the rated current value, I, of the half-bridge inverter switch S2D3Is the rated current value, I, of the third diode D3D4The rated current value of the fourth diode D4,
Figure BDA0001951634920000093
for the peak reverse blocking voltage of the half bridge inverter switch S1,
Figure BDA0001951634920000094
is the peak reverse blocking voltage of the half bridge inverter switch S2.
Step two: in the topology shown in fig. 3, the half-bridge inverter output power cannot be controlled by fixed frequency variable duty cycle modulation because the basic switching devices are two, S1 and S2. The minimum duty cycle of the switches is limited to 0.5 due to the current source at the inverter input. However, fixing the duty cycle of the switches to 0.5, the inverter switching frequency can be varied to achieve the desired output power. Impedance at the output of the inverter, i.e. impedance Z input into the resonant network at the transmitting endiIs composed of
Figure BDA0001951634920000095
Wherein R iseIs the equivalent load resistance of the input end of the voltage doubler circuit, j, omega, M, L1、L2And CpHas the same meaning as above, and is derived by the formula
Figure BDA0001951634920000096
Wherein, I0、V0Has the same meaning as above, R0Is the equivalent load resistance of the output end of the voltage doubler circuit.
According to equation (2), the active power P output by the half-bridge inverterinvIs composed of
Figure BDA0001951634920000097
Wherein, Ii、Re、Zi、
Figure BDA0001951634920000098
And IdThe meaning is the same as above.
Step three: the nominal charging power (P) and the nominal charging current (I) of the inductive power transfer system are taken into account. The rated voltage and charging current of the battery of the load EV (electric vehicle) are known, and in this embodiment, the rated voltage of the battery of the load EV (electric vehicle) is 325V. The present embodiment is a 1.2kW inductive power transfer system, and therefore the rated charging power (P) is 1.2kW and the rated charging current I is calculated to be 1200W/325V — 3.7A.
Step four: the nominal switching frequency of the half-bridge inverter is selected based on the switching device, diode, IPT pad size and other conditions. In this embodiment, the rated transmit coil RMS current is around 11.5A. Therefore, the required mutual inductance M is 42 μ H.
It should be understood that parts of the specification not set forth in detail are well within the prior art.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (3)

1. A current feed formula half-bridge resonance topological structure for wireless power transmission which characterized in that: the device comprises a transmitting end and a receiving end, wherein the transmitting end comprises an quasi-current source, a half-bridge circuit inverter and a CLC resonant network, the quasi-current source is connected with the CLC resonant network through the half-bridge circuit inverter, the receiving end comprises a resonant circuit and a voltage multiplier circuit, the resonant circuit is connected with the voltage multiplier circuit, the CLC resonant network comprises a first capacitor, a second capacitor and a transmitting coil, the second capacitor is connected with the transmitting coil in series and then connected with the first capacitor in parallel, the resonant circuit comprises a receiving coil matched with the transmitting coil and a third capacitor electrically connected with the receiving coil, the quasi-current source comprises a direct current power supply, a first direct current inductor and a second direct current inductor, the first direct current inductor and the second direct current inductor are connected in parallel and are both connected with the direct current power supply in series, and the first direct current inductor and the second direct current inductor are not coupled, the half-bridge circuit inverter comprises a first field effect tube, a second field effect tube, a first diode and a second diode, wherein the drain electrode of the first field effect tube is connected with the first direct current inductor, the source electrode of the first field effect tube is connected with the anode of the first diode, the drain electrode of the second field effect tube is connected with the second direct current inductor, the source electrode of the second field effect tube is connected with the anode of the second diode, the cathodes of the first diode and the second diode are connected with the cathode of the direct current power supply, the anode of a first capacitor is connected with the drain electrode of the first field effect tube, the cathode of the first capacitor is connected with the drain electrode of the second field effect tube, the output power factor lag of the inverter is kept, the soft switch conduction of the inverter switch is always guaranteed no matter how the load current is, and the duty ratio of the switch is fixed to be 0.5, the switching frequency of the inverter is varied to achieve a desired output power, and the values of the first and second capacitors are selected to cause half-bridge operationThe inverter inputs a square wave current to the CLC resonant network, and the components at the transmitting end are designed to make the current I at the output end of the half-bridge inverteriIs a minimum value for a given output power, and the value of the third capacitance is selected so that the voltage doubler circuit input terminal voltage is a maximum value,
the equivalent circuit of the topological structure is utilized for verification, the power balance principle is applied, active power flows at a receiving end due to fundamental wave components, and the voltage V at the input end of the voltage multiplier circuit at the alternating current siderAnd the voltage V at the output end of the voltage doubler circuit0There is a relationship as follows:
Figure FDA0002561420940000021
because of the passive rectification of the diode, the voltage V at the input end of the voltage multiplier circuitrAnd receiving the coil current I2Is in phase, receiving coil current I2Voltage V at input end of OR voltage doubler circuitrIs assigned as a reference phase, applying kirchhoff's law KCL in the transmitting-side network, the current I at the output of the half-bridge inverteriIs the transmitting coil current I1And a current I through the first capacitorPSum of
Figure FDA0002561420940000022
Where M is the mutual inductance between the transmitter coil and the receiver coil, j is an imaginary unit, ω is the angular frequency, CpA first capacitor, CsIs a second capacitance, L1For transmitting coil inductance, ViFor the voltage of the output end of the half-bridge circuit inverter, kirchhoff's voltage law KVL is applied to the receiving end, and the voltage V of the input end of the voltage multiplier circuitrIs composed of
Figure FDA0002561420940000023
Wherein L is2To receive the coil inductance, C2Is a third capacitance, and is a third capacitance,
selecting a first capacitance CpAnd a second capacitor CsThe half-bridge inverter inputs a square wave current to the CLC resonant network, and the component at the transmitting end is designed to make the current I at the output end of the half-bridge inverteriIs minimum for a given output power and the third capacitance C is selected2Voltage at input end of voltage doubler circuit VrFor maximum, the required capacitance is calculated as
Figure FDA0002561420940000024
Wherein, ω is01For transmitting the resonant frequency, omega, of the coil02The resonant frequency of the receiving coil is set,
by varying the switching frequency omega of a half-bridge inverter0(＝2πf0) Resonant frequency omega of transmitting coil01And receiving coil resonance frequency omega02The effective power transmission is realized by equality, KVL is applied to a receiving end loop, and the current I of a transmitting coil1Is calculated as
Figure FDA0002561420940000025
Wherein, V0For the voltage-doubler circuit output voltage, omega0For half-bridge inverter switching frequencies, j and M are as defined above,
applying KVL and KCL at the transmitting end, applying equations (4) and (5), the root mean square RMS value of the voltage between the transmitting coil and the two series capacitors is
Figure FDA0002561420940000031
Figure FDA0002561420940000032
Wherein, V1For transmitting voltage across the coil, VsIs the voltage across the second capacitor, I0Is the output end of the voltage doubler circuitFlow, V0、L1、ω0、CsThe meanings of j and M are the same as above,
can obtain the voltage V of the output end of the half-bridge circuit inverteriAnd current IiIs composed of
Figure FDA0002561420940000033
Figure FDA0002561420940000034
Wherein, Cp，I0，V0，L1，ω0，CsJ and M have the same meanings as above,
the output power factor of the half-bridge inverter is obtained from equations (8) and (9)
Figure FDA0002561420940000035
Is composed of
Figure FDA0002561420940000036
Wherein the content of the first and second substances,
Figure FDA0002561420940000037
is the phase angle of the current(s),
Figure FDA0002561420940000038
is the phase angle, omega, of the voltage0、M、I0、V0、L1、CsAnd CpThe meaning of (a) is as above,
RMS value of the switching current of the half-bridge inverter is directly dependent on the input DC current IdThe peak blocking voltage of the switches and diodes of the half-bridge inverter is also the same as the peak output voltage of the half-bridge inverter, and the rated values of the voltage and current of the switches and diodes of the half-bridge inverter can be obtained
Figure FDA0002561420940000039
Figure FDA00025614209400000310
Wherein, ViFor the output voltage, I, of half-bridge invertersdFor an input direct current, IS1For the rated current value, I, of the half-bridge inverter switch S1S2For the rated current value, I, of the half-bridge inverter switch S2D3Is the rated current value, I, of the third diode D3D4The rated current value of the fourth diode D4,
Figure FDA0002561420940000041
for the peak reverse blocking voltage of the half bridge inverter switch S1,
Figure FDA0002561420940000042
for the peak reverse blocking voltage of the half bridge inverter switch S2,
fixing the duty ratio of the switch to 0.5, changing the inverter switching frequency to achieve the required output power, the impedance of the inverter output, i.e. the impedance Z input into the transmitting end resonant networkiIs composed of
Figure FDA0002561420940000043
Wherein R iseIs the equivalent load resistance of the input end of the voltage doubler circuit, j, omega, M, L1、L2And CpHas the same meaning as above, and is derived by the formula
Figure FDA0002561420940000044
Wherein, I0、V0Has the same meaning as above, R0Is the equivalent load resistance of the output end of the voltage doubler circuit,
according to equation (2), the active power P output by the half-bridge inverterinvIs composed of
Figure FDA0002561420940000045
Wherein, Ii、Re、Zi、
Figure FDA0002561420940000046
And IdThe meaning is the same as above.
2. A current fed half bridge resonant topology for wireless power transfer as claimed in claim 1 wherein: the receiving coil is connected in series with the third capacitor.
3. A current fed half bridge resonant topology for wireless power transfer as claimed in claim 2 wherein: the voltage multiplier circuit comprises a third diode, a fourth capacitor and a fifth capacitor, the third diode is connected with the fourth capacitor, the fourth diode is connected with the fifth capacitor, and the anode of the third diode and the cathode of the fourth diode are connected with the cathode of the third capacitor.
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