CN109739510B

CN109739510B - Instruction encoding and decoding and executing method and device thereof

Info

Publication number: CN109739510B
Application number: CN201811645970.1A
Authority: CN
Inventors: 陈子炎; 徐炜; 刘丽
Original assignee: Shanghai Mxchip Information Technology Co Ltd
Current assignee: Shanghai Mxchip Information Technology Co Ltd
Priority date: 2018-12-29
Filing date: 2018-12-29
Publication date: 2023-05-16
Anticipated expiration: 2038-12-29
Also published as: CN109739510A

Abstract

The invention discloses an instruction coding and decoding and executing method and a device thereof, which are applied to a coding and decoding controller, wherein the coding and decoding controller is respectively connected with a multi-path selection circuit and an executing device; the method comprises the following steps: generating and sending a gating command to the multi-path selection circuit, controlling the multi-path selection circuit to gate the corresponding resistor on the resistor array, and obtaining the resistance value of the gated resistor through the multi-path selection circuit; according to the pre-stored resistance value and the operation instruction corresponding table, determining the obtained operation instruction corresponding to the resistance value of the resistor, generating the operation instruction, and sending the generated operation instruction to the execution device for execution. The invention adopts the mode that the resistance corresponds to the operation instruction, simplifies the complexity of the coding process, reduces the number of equipment required by the decoding process and reduces the cost.

Description

Instruction encoding and decoding and executing method and device thereof

Technical Field

The present invention relates to the field of encoding and decoding technologies, and in particular, to a method and an apparatus for encoding and decoding an instruction.

Background

Currently, in the field of programmable applications, a commonly used coding and decoding method is binary coding. When binary coding is adopted, when a number is represented by binary, the number of bits is very large, and in practical use, decimal is adopted before the binary is sent into a digital system, the binary is converted into binary after being sent into a machine, and the binary is converted into decimal for people to read after operation is finished. The method involves the operations of coding, transcoding and the like, and the working principle is relatively complex, so that the learning and application difficulties are large and the method is not convenient enough. Meanwhile, the mutual conversion of binary and decimal is important in application, and programmers are required to have the function of seeing binary numbers, directly converting the binary numbers into decimal numbers and vice versa, and have relatively high technical requirements on personnel.

Moreover, when receiving the encoded instruction converted into binary numbers, binary decoding is also required to generate the final operation instruction, and the process needs to rely on a plurality of arithmetic units, such as: the basic functions of an Arithmetic Logic Unit (ALU) are addition, subtraction, multiplication, division, and other logical operations such as AND, OR, NOT, XOR, and other operations, and shifting, complement, and the like. When the binary decoding method is adopted to run, the operation and the operation type of the arithmetic unit are determined by the controller, and the data processed by the arithmetic unit come from the memory; the processed result data is typically returned to memory or temporarily stored in an arithmetic unit. Therefore, the whole decoding process needs to rely on more hardware infrastructure equipment, the implementation is more complex, and the implementation cost is higher.

Therefore, how to provide an instruction encoding/decoding and executing method and device thereof capable of solving the above-mentioned problems is a problem that a person skilled in the art needs to solve.

Disclosure of Invention

The invention aims to provide an instruction encoding and decoding and executing method and a device thereof, which adopt a mode that a resistance value corresponds to an operation instruction, simplify the complexity of an encoding process, reduce the number of equipment required in a decoding process and reduce the cost.

In order to solve the technical problems, the invention provides an instruction encoding and decoding and executing method which is applied to an encoding and decoding controller, wherein the encoding and decoding controller is respectively connected with a multi-path selection circuit and an executing device; the method comprises the following steps:

generating and sending a gating command to the multiplexing circuit, controlling the multiplexing circuit to gate the corresponding resistor on the resistor array, and obtaining the resistance value of the gated resistor through the multiplexing circuit;

according to the pre-stored resistance value and the operation instruction corresponding table, determining the obtained operation instruction corresponding to the resistance value of the resistor, generating the operation instruction, and sending the generated operation instruction to the execution device for execution.

In order to solve the technical problems, the invention also provides an instruction encoding and decoding and executing device which is used for an encoding and decoding controller, wherein the encoding and decoding controller is respectively connected with the multi-path selection circuit and the executing device; the device comprises:

the gating module is used for generating and sending gating instructions to the multiplexing selection circuit, controlling the multiplexing selection circuit to gate the corresponding resistors on the resistor array, obtaining the resistance values of the gated resistors through the multiplexing selection circuit and sending the resistance values to the instruction generation module;

The instruction generation module is used for determining the received operation instruction corresponding to the resistance value of the resistor according to the pre-stored resistance value and the operation instruction corresponding table, generating the operation instruction, and sending the generated operation instruction to the execution device for execution.

The invention provides an instruction coding and decoding and executing method and a device thereof. Therefore, in the invention, when the staff wants to carry out coding, the staff does not need to master the interconversion capability of binary and decimal, but only needs to remember the operation instructions corresponding to different resistance values, thereby reducing the technical requirements on the staff and having simpler working principle. And in the subsequent decoding process, the controller is only required to compare the resistance value of the current gating resistor with a pre-stored resistance value and operation instruction corresponding table to generate the operation instruction without depending on various types of arithmetic units, and the whole decoding process is not required to depend on more hardware basic holding equipment, so that the decoding process is simplified, and the implementation cost is lower.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a flow chart of a process of an instruction encoding/decoding and execution method provided by the invention;

FIG. 2 is a flow chart illustrating a process of another method of encoding, decoding and executing instructions according to the present invention;

FIG. 3 is a flow chart illustrating a process of another method of encoding and decoding instructions according to the present invention;

FIG. 4 is a schematic diagram of a resistor array according to the present invention;

FIG. 5 is a schematic diagram of an instruction encoding/decoding and executing apparatus according to the present invention;

fig. 6 is a schematic structural diagram of an instruction encoding/decoding and execution system according to the present invention.

Detailed Description

The core of the invention is to provide an instruction coding and decoding and executing method and a device thereof, which adopts a mode that the resistance corresponds to an operation instruction, simplifies the complexity of the coding process, reduces the number of equipment required by the decoding process and reduces the cost.

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The invention provides an instruction coding and decoding and executing method which is applied to a coding and decoding controller, wherein the coding and decoding controller is respectively connected with a multi-path selection circuit and an executing device; referring to fig. 1, fig. 1 is a flowchart illustrating a process of an instruction encoding/decoding and execution method according to the present invention; the method comprises the following steps:

step s1: generating and sending a gating command to the multiplexing selection circuit, controlling the multiplexing selection circuit to gate the corresponding resistor on the resistor array, and obtaining the resistance value of the gated resistor through the multiplexing selection circuit.

It will be appreciated that the resistor array includes a plurality of sets of resistors arranged in a certain order, and since the operation instructions need to be sent to the execution device for execution in order, the operation instructions are usually generated sequentially. Therefore, each time a part of resistors needs to be gated to determine an operation instruction corresponding to the resistance value of the resistors to generate, and then the next part of resistors are gated to generate the next part of operation instructions.

Step s2: according to the pre-stored resistance value and the operation instruction corresponding table, determining the obtained operation instruction corresponding to the resistance value of the resistor, generating the operation instruction, and sending the generated operation instruction to the execution device for execution.

The corresponding table of the resistance and the operation instruction needs to be stored in the codec controller in advance, and the corresponding relation between each resistance and the operation instruction is stored in the corresponding table.

The invention provides an instruction coding and decoding and executing method, which is characterized in that different resistors are preset to correspond to different operation instructions, then the types of the operation instructions are determined according to the resistance values of the gated resistors and a pre-stored resistance value and operation instruction corresponding table through the corresponding resistors on a gated resistor array, and the operation instructions are sent to an executing device for executing. Therefore, in the invention, when the staff wants to carry out coding, the staff does not need to master the interconversion capability of binary and decimal, but only needs to remember the operation instructions corresponding to different resistance values, thereby reducing the technical requirements on the staff and having simpler working principle. And in the subsequent decoding process, the controller is only required to compare the resistance value of the current gating resistor with a pre-stored resistance value and operation instruction corresponding table to generate the operation instruction without depending on various types of arithmetic units, and the whole decoding process is not required to depend on more hardware basic holding equipment, so that the decoding process is simplified, and the implementation cost is lower.

In a preferred embodiment, the multiplexing circuit gates one row of resistors at a time, with each row of resistors having a resistance corresponding to an operating command.

It can be understood that if the multi-path selection circuit includes only one multi-path selector, the multi-path selector is in a multi-path structure, i.e. one path of the multi-path selector is gated at a time, so that only one path of resistor can be gated at a time to generate one operation instruction, and the operation instructions are generated in series at the time; of course, if multiple multiplexers are included in the multiplexing circuit, each multiplexer may gate a resistor separately, thereby generating the operation instructions in parallel. Of course, the mode of the present invention is not particularly limited, and the number of multiplexers included in the multiplexing circuit is not particularly limited. In the above embodiment, each row of resistors in the resistor array corresponds to an operation instruction, and this arrangement structure facilitates the selection and conduction of the multi-path selection circuit, and the arrangement of the structure is regular, so that the management is facilitated. Of course, the invention is not limited by whether an operating command specifically corresponds to a row of resistors or a column of resistors.

In a preferred embodiment, referring to fig. 2, fig. 2 is a flowchart illustrating a process of another method for encoding, decoding and executing instructions according to the present invention; the process of step s1 is specifically:

Step s111: judging whether a non-executed sequence number exists at present according to a preset sequence, and if so, entering step s112; if not, the instruction encoding and decoding are finished.

When the gating command is generated for the first time, the gating command can be generated first and then judged, or the gating command can be judged first and then generated as described in the step, and the invention is not limited to this.

Step s112: and generating a gating instruction carrying the sequence number with the forefront sequencing according to a preset sequence.

Since the transmitted operation instructions are in order when generating the operation instructions to be transmitted to the execution device, that is, a series of operation instructions need to be transmitted in a specific order, in order to distinguish the order of the instructions, when encoding by resistance, that is, the order of the operation instructions corresponding to the acquired set of resistance values needs to be determined. To achieve this, in this embodiment, a plurality of rows of resistors are disposed on the resistor array, each row of resistors is provided with a sequential number, for example, 1, 2, etc., and each time gating is performed, it is necessary to sequentially gate rows in the order from the sequential number on the resistor array to the sequential number on the resistor array. The sequential number of the selected row of resistors is the same as the execution sequence of the operation instructions generated in accordance with the row of resistors.

The preset sequence in the invention is usually from small to large.

Step s113: transmitting a gating command to the multi-path selection circuit, and controlling a row of resistors corresponding to the gating sequence numbers of the multi-path selection circuit; and the resistance value of the selected resistor is obtained through the multiplexing circuit.

The process of step s2 is specifically:

step s211: and determining an operation instruction corresponding to the obtained resistance value of the resistor according to the pre-stored resistance value and the operation instruction corresponding table, and generating the operation instruction.

Step s212: the operation instruction generated at present is sent to an execution device for execution; and returns to trigger the foregoing judgment operation.

It can be understood that the invention carries the serial number of a row of resistors which need to be conducted in the current operation in each gating instruction, then conducts the row of resistors to obtain the resistance value of the resistors, and the execution sequence of the generated operation instruction when the operation instruction is sent to the execution device is the same as the serial number of the row of resistors; the sequence numbers in the gating instructions are sequentially generated according to a preset sequence. For example, assuming that the resistor array includes sequence numbers 1 to 7, and the preset sequence is from 1 to 7, the first generated gating instruction carries the number 1, then the first row of resistors are gated, and the first operation instruction is generated and sent to the executing device; and then generating a gating instruction carrying the number 2, gating a second row of resistors, generating a second operation instruction, sending the second operation instruction to the execution device, and repeating the process until all the resistors are gated. In the setting mode, when a worker sets the resistor array, the content and the execution sequence of each operation instruction can be controlled by controlling the resistance value of each row of resistors in the resistor array, and the logic of the encoding and decoding process of the whole operation instruction is clear and definite, so that the worker can conveniently generate a series of continuous operation instructions.

Preferably, the method further comprises:

after receiving a single execution instruction generated after triggering a single instruction execution key, triggering and judging whether the operation of unexecuted sequence numbers exists currently, controlling the subsequent transmission of the currently generated operation instruction to an execution device for execution, and stopping returning to trigger the judgment operation.

After receiving the multi-execution instruction generated after triggering the multi-instruction execution key, triggering and judging whether the operation of the unexecuted sequence number exists currently, controlling the subsequent transmission of the currently generated operation instruction to the execution device for execution, and continuing to return to triggering the judgment operation.

It can be understood that by setting the single instruction execution key and the multi-instruction execution key, a worker can select whether to continuously generate and execute the operation instruction or to generate and execute only the current operation instruction. Therefore, under certain scenes needing to observe the execution result of the single instruction, the single instruction execution key can be selectively triggered, so that each operation instruction is stopped after being executed, and the staff can observe the execution result conveniently; and under the condition that the whole execution result is only required to be observed, the multi-instruction execution key can be selectively triggered, and the execution result is observed after all operation instructions corresponding to each row of resistors in the resistor array are executed. Therefore, by setting the above two keys, a worker can select a proper execution mode according to the self requirement, and the convenience is higher.

In addition, when the single instruction execution key and the multi-instruction execution key are set, the whole coding and decoding system can default to a single instruction execution mode or a multi-instruction execution mode when being started initially, and in addition, when the coding and decoding system runs in the single instruction execution mode or the multi-instruction execution mode, if the coding and decoding system wants to switch to another mode, the coding and decoding system can be realized by triggering the key corresponding to the other mode. For example, if the current mode is a single instruction execution mode, the mode is switched to the multiple instruction execution mode after the subsequent user triggers the multiple instruction execution key.

In another preferred embodiment, referring to fig. 3, fig. 3 is a flowchart illustrating a process of another method for encoding, decoding and executing instructions according to the present invention; the process of step s1 is specifically:

step s121: generating and transmitting all gating instructions to a multi-path selection circuit, controlling the multi-path selection circuit to sequentially gate each row of resistors on a resistor array according to a preset sequence, and obtaining the resistance value of the gated resistors through the multi-path selection circuit; until all resistors are gated.

The process of step s2 is specifically:

step s221: and determining an operation instruction corresponding to the obtained resistance value of the resistor according to the pre-stored resistance value and the operation instruction corresponding table, and generating the operation instruction.

Step s222: according to a preset sequence, sequentially sending the received operation instructions corresponding to the resistance values of the resistors of each row to an execution device for execution; and until all the operation instructions are sent, finishing the encoding and decoding of the instruction.

It will be appreciated that in this embodiment, each time the decoding process is started, all the strobe commands are sent to the multiplexing circuit, and then the multiplexing circuit sequentially strobes the rows of resistors on the resistor array according to a predetermined sequence. For example, assuming that the resistors include 7 rows of resistors, numbered 1-7, and the predetermined sequence is from 1 to 7, the multiplexing circuit starts to gate from the first row of resistors until the 7 th row of resistors is gate, and in this process, each row of resistors is gate to obtain the resistance value of the row of resistors. In this way, the number of generated strobe instructions can be reduced, the entire decoding process can be simplified, and at the same time, it can be ensured that a series of operation instructions in the corresponding order are finally generated in the encoding order and sent to the execution device.

In addition, it should be noted that in the above embodiment, the codec controller may choose to temporarily buffer the received resistance values of each group, and when all the resistance values are received, sequentially generate instructions according to a preset sequence, and after all the instructions are generated, sequentially send the instructions to the execution device according to the preset sequence. Or the codec controller may generate the instruction after receiving a set of resistance values, but not send the generated operation instruction to the execution device, but wait until the instructions are all generated, and then send the operation instruction to the execution device sequentially according to a preset sequence. Or the codec controller can also generate an instruction after receiving a set of resistance values, and send an operation instruction to the execution device after generating each operation instruction. In particular, the mode is not particularly limited.

In a preferred embodiment, the method further comprises:

after receiving a starting instruction generated after triggering a starting key, triggering the codec controller to start working;

after receiving a pause instruction generated after triggering the pause key, triggering the codec controller to pause the work until receiving the start instruction again.

It will be appreciated that the start button is used to start the program from scratch (the operating instruction corresponding to the row of resistors numbered 1) or after a pause, the start program continues from the pause position. The pause button may pause program execution. Pressing the pause button during the program execution will stop the execution after the current operation command is executed. After the pause, the start button is pressed, and the program will continue to execute the next operation command. By setting the start key and the pause key, the encoding and decoding process of the generated operation instructions can be controlled more, a worker can control the termination and the starting of the process at any time, the worker can conveniently change the resistance value of the resistor in the resistor array midway, and convenience and flexibility are higher.

In a specific embodiment, the resistor array includes a plurality of rows of resistor slots and a plurality of fixed resistors arranged in a preset sequence, and the resistor slots are used for inserting the fixed resistors;

Each row of resistor slots comprises an operation code slot and a plurality of data code slots.

The pre-stored resistance value and operation instruction corresponding table comprises: the corresponding relation between the resistance value of the fixed-value resistor inserted into the operation code slot and the operation type, and the corresponding relation between the resistance value of the fixed-value resistor inserted into the data code slot and the operation parameter.

It is to be understood that the content corresponding to the resistance value of the fixed-value resistor inserted into the operation code slot is hereinafter referred to as an operation code, and the content corresponding to the resistance value of the fixed-value resistor inserted into the data code slot is hereinafter referred to as a data code. The operation code is used for controlling the type of operation instruction, such as a write instruction or a read instruction, the data code is used for specifically limiting operation parameters, and the operation content can be also understood to be limited, for example, if the instruction is a summation instruction, the data code can limit the added numerical value and the like; each complete operation instruction consists of an operation code and contents corresponding to all data codes. Because the operation parameters contained in different operation instructions are different, when the invention is applied to different application scenes, the number of the data code slots can be set according to the actual application requirements and can be 1 or more. The fixed value resistor is small in size and low in cost compared with the adjustable resistor, so that a plurality of fixed value resistors are inserted into slots to form a required operation instruction, and the size of the resistor array and the system cost can be reduced.

Further, if the slot mode is adopted, the fixed resistor and the resistor slot can be connected by adopting contacts, namely, a metal contact is arranged on the fixed resistor, and a metal contact for being in contact conduction with the metal contact on the fixed resistor is arranged on the resistor slot. I.e. the fixed value resistor can be electrically conducted with the resistor slot after being inserted into the resistor slot.

It can be understood that the connection mode of the metal contacts is easy to set, has small plugging force and better hand feeling compared with the socket connection mode. And compared with the magnetic connection mode, the connection tightness is better and the cost is lower. Of course, the fixed resistor and the resistance slot can also adopt a socket connection or a magnetic connection mode. The connection mode of the fixed-value resistor and the resistor slot is not limited in the invention.

Further, when the slot mode is adopted, the fixed resistor can be arranged in a building block with a fixed size for convenient insertion, the building block can be square or cylindrical, and the size is set to be convenient for a user to take. Of course, the resistance slot is correspondingly arranged to be corresponding to the building block, and the mode of using the constant-value resistor is more convenient for a user to take. In addition, in order to facilitate the user to identify the resistance value of each building block, the surfaces of the building blocks can be in different colors, or the resistance values of resistors contained in the building blocks can be written on the surfaces of the building blocks. The mode in which the present invention is specifically adopted is not particularly limited.

In other embodiments, instead of inserting the fixed resistor, the adjustable resistor may be fixed in the resistor array, so that the user may directly adjust the resistance of the adjustable resistor at the corresponding position. At this time, each row of resistors comprises an operation code resistor and a plurality of data code resistors; the corresponding table of the resistance value and the operation instruction pre-stored in the controller comprises: the corresponding relation between the resistance value of the operation code resistor and the operation type, and the corresponding relation between the resistance value of the data code resistor and the operation parameter.

It will be appreciated that in this embodiment the resistor array is made up of fixed rows of adjustable resistors, and the operator can construct different operating instructions by adjusting the resistance of the adjustable resistors. In this way, the user only needs to adjust the resistance. This approach is less likely to result in loss of the resistor and is more reliable than the approach of inserting the resistor into the slot.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a resistor array according to the present invention. Of course, the specific manner in which the resistors are arranged is not limited by the present invention.

According to the foregoing description, referring to table 1, table 1 is a structure of an operation instruction.

TABLE 1 Structure of operating instructions

Operation code	Data code	1	Data code 2	…	Data code N
						OpType	Data1	Data2	…	DataN

Specifically, in the present invention, the operation codes and the data are corresponding to each other through different resistance values, so the encoding mode of the operation instruction is specifically shown in table 2. Table 2 only shows the encoding scheme using the operation code and the data code corresponding to the resistance value, and does not limit the operation code and the data code to be equal to the resistance value.

Table 2 coding scheme of operation instructions

Operation code	Data code	1	Data code 2	…	Data code N
						Ro1	Rd1	Rd2	…	RdN

Because of the physical meaning of the operation code and the data code, the definition needs to be made one by one, stored in the corresponding table of the resistance value and the operation instruction, and inquired in a table look-up mode. Therefore, in general, the programmable products with different functions should be first set with the resistance and the operation command corresponding table, as shown in table 3.

TABLE 3 resistance and operation instruction correspondence table

For ease of understanding, the following is a brief procedure for instruction encoding and decoding in the present invention:

since the program should be a sequential combination of several operating instructions and execute in sequence, for example: to complete task a,

instructions

1,2,3,4, … X need to be completed in sequence. Therefore, firstly, a corresponding table of resistance values and operation instructions is required to be formulated, as shown in a table 4, (wherein Ro and Rd can be freely combined according to the actual physical meaning of the product so as to spell instructions with different functions.)

Table 4 resistance and operation instruction correspondence table

Instructions for	Operation type code	Data code	1	Data code 2	…	Instruction content
							Instruction
1	Ro1	Rd11	Rd21	…	Function 1
						Instruction 2	Ro2	Rd12	Rd22	…	Function 2
Instruction 3	Ro3	Rd13	Rd23	…	Function 3
						Instruction 4	Ro4	Rd14	Rd24	…	Function 4
…	…	…	…		…
						Instruction X	Rox	Rd1x	Rd2x	…	Function X

It should be noted that although the number of bits of the resistors provided on each row of the resistor array is the same in the present invention, the user may choose to set the adjustable resistor at the corresponding position to 0 or not insert a constant value resistor according to actual needs. That is, the number of the actual effective data codes corresponding to each operation instruction can be different, and each instruction needs to be coded, decoded and executed in a targeted manner. See in particular table 5:

table 5 examples of instructions for different numbers of data codes

Instructions for

Operation type code

Data code

1

Data code 2

Data code 3

Instruction content

Instruction

1

Ro1

Rd11

-

Function 1

Instruction 2

Ro2

Rd12

-

Rd32

Function

2

Instruction 3

Ro3

Rd23

Rd33

Function

3

Instruction 4

Ro4

-

Rd34

Function

4

…

Instruction X

RoX

Rd1X

Rd2X

Rd3X

Function X

From table 5:

the first instruction comprises a data code 1;

the second instruction comprises a data code 1 and a data code 3;

the third instruction comprises a data code 2 and a data code 3;

in the fourth instruction, data code 3 is included. And so on.

Of course, the above is only a specific example, and the present invention is not limited to the number of operation codes, and the specific contents of the resistance value and operation instruction correspondence table.

Preferably, the method further comprises:

and displaying the content of the operation instruction sent to the execution device and the execution result thereof.

It can be understood that in many application scenarios, the execution result needs to be displayed or the content of the operation instruction needs to be displayed, and in this way, the user can conveniently and timely know the execution condition of the operation instruction, and further adjust and process in time, so that the user experience is better.

Preferably, the method further comprises:

detecting the execution condition of each operation instruction, and respectively sending the corresponding display instruction to the indicator lamp corresponding to the operation instruction according to different execution conditions to perform corresponding display operation.

It is understood that, here, an indicator light is set for each operation instruction, for example, if 1 to 7 operation instructions are set, 7 indicator lights are set for each operation instruction, and each indicator light is used for displaying the execution condition of the operation instruction when each operation instruction is executed. For example, the normal execution failure, non-execution, in-execution, execution completion and the like are executed, so that a user can conveniently and intuitively know the execution condition of each operation instruction, and the convenience of the user is improved.

Preferably, the method further comprises:

Generating a voice broadcasting instruction according to the content of the operation instruction sent by the control instruction and the execution result of the operation instruction, and sending the voice broadcasting instruction to voice broadcasting equipment for voice broadcasting.

It will be appreciated that since the instruction encoding and decoding method of the present invention may be applied to devices such as toys for infants, the infants may have an illiterate condition. The result of the execution of the instruction may not be known through the display. Therefore, the voice broadcasting device is set in this embodiment, and the user who cannot view the display can know the execution condition of the operation instruction conveniently through voice broadcasting. The voice broadcasting device can be arranged together with the display, and a user can select whether to close the display or not, so that the selectivity and convenience of the user are improved.

Specifically, after obtaining the resistance value of the selected resistor through the multi-path selection circuit, before determining the operation instruction corresponding to the obtained resistance value of the resistor according to the pre-stored resistance value and the operation instruction corresponding table, the method further comprises:

the obtained resistance value of the resistor is converted into a digital signal.

Correspondingly, the operation instruction corresponding to the resistance value of the resistor after being converted into the digital signal is determined according to the pre-stored resistance value and the operation instruction corresponding table.

It can be understood that the codec controller cannot directly identify the analog signal in the operation process, and the resistance value of the resistor obtained by multiplexing is an analog signal, so that in order to facilitate the information identification of the codec controller, the obtained resistance value of the resistor is converted into a digital signal, i.e. an analog-to-digital conversion operation is performed, thereby facilitating the processing of the codec controller.

For ease of understanding, the following description will be given of a specific application of the present invention by way of example only, in which a "modular programmable calculator" is designed. The instruction structure of the building block type programmable calculator comprises: 1) The operation code refers to an operator; 2) The data code refers to the operational parameters (numbers 0-9). As shown in tables 6 and 7.

Table 6 instruction structure of "building block type programmable calculator

Operation type code	Data code
		Operators (+, -, x, ≡etc.)	Operational parameters (numbers 0-9)

Table 7 resistance and operation instruction mapping table of "building block programmable calculator

Specific instructions are shown for example in table 8,

table 8 examples of instruction programming applications for "building block programmable calculator

The specific description is as follows: in a real product, the resistor can be externally formed into an instruction module, the purpose of accessing the circuit is realized by inserting or other modes, and the instruction module can be defined according to the application function of the product. Such as: the resistor can be arranged inside the interesting building block printed with the operation symbol mark and the interesting building block printed with the color digital symbol. In addition, the whole product also comprises an LED display screen or voice broadcasting equipment and the like for assisting a user in checking the calculation result. According to the actual requirements of the example: the whole product can be provided with: the LED display screen is used for assisting in displaying operation results and instruction contents. Or can be provided with a voice device for automatically broadcasting the operation result, etc. And the device is also provided with an indicator light, a single instruction execution key and a multi-instruction execution key. As shown in table 9.

Table 9 application example table of "building block programmable calculator

The working process is exemplified by the following steps:

1) Pressing the "single instruction execution button": each operation instruction finishes the execution of the indication lamp, lights the red lamp, displays a calculation result along with the LED screen, and presses a button again to execute the next operation instruction;

2) Pressing the "multiple instruction execution button": all instructions are executed at one time in sequence, the indicator lights are turned on one by one, the LED screen displays intermediate calculation results one by one, and after all the instructions are executed, the LED displays operation final results.

Of course, the above is only one specific example. The invention is not limited to the type of products to which the method provided by the invention is specifically applied, and the types of various auxiliary devices contained in the products when the method is applied to the products. The specific contents of the operation code and the data in the present invention are related to the product requirement, and the present invention is not limited thereto. The present invention is not limited to the gating method and the process of generating the operation command.

The invention also provides an instruction encoding and decoding and executing device which is used for an encoding and decoding controller, wherein the encoding and decoding controller is respectively connected with the multi-path selection circuit and the executing device; referring to fig. 5, fig. 5 is a schematic structural diagram of an instruction encoding/decoding and executing device provided by the present invention; the device comprises:

The gating module 1 is used for generating and sending a gating command to the multiplexing selection circuit, controlling the multiplexing selection circuit to gate the corresponding resistor on the resistor array, obtaining the resistance value of the gated resistor through the multiplexing selection circuit and sending the resistance value to the command generating module 2.

The instruction generating module 2 is configured to determine an operation instruction corresponding to the resistance value of the received resistor according to the pre-stored resistance value and the operation instruction correspondence table, generate the operation instruction, and send the generated operation instruction to the executing device for executing.

Preferably, the multiplexing circuit gates one row of resistors at a time, and the resistance value of each row of resistors corresponds to one operation instruction.

Preferably, the gating module 1 specifically includes:

the judging unit is used for judging whether the unexecuted sequence numbers exist at present according to a preset sequence, and if so, generating a gating instruction carrying the sequence number with the forefront sequencing according to the preset sequence; if not, the instruction encoding and decoding are finished.

The single gating unit is used for sending gating instructions to the multi-path selection circuit and controlling a row of resistors corresponding to the gating sequence numbers of the multi-path selection circuit; the first resistance value obtaining unit is triggered after each time a row of resistors is gated.

The first resistance value obtaining unit is used for obtaining the resistance value of the current selected resistor row through the multi-path selection circuit and sending the resistance value to the instruction generating module;

correspondingly, the instruction generating module 2 specifically includes:

the first instruction generating unit is used for determining the received operation instructions corresponding to the resistance values of each row of resistors according to the pre-stored resistance values and the operation instruction corresponding table and generating the operation instructions.

The single instruction execution unit is used for sending the currently generated operation instruction to the execution device for execution; and triggering a judging unit.

Preferably, the method further comprises:

the single instruction control unit is used for triggering the judging unit to start working after receiving a single execution instruction generated after triggering the single instruction execution key; and sending the single working instruction to the single instruction execution unit, and controlling the single instruction execution unit to stop triggering the judging unit after sending the currently generated operation instruction to the executing device for execution.

The multi-instruction execution control module is used for triggering the judging unit to start working after receiving a multi-execution instruction generated after triggering the multi-instruction execution key; and sending the multiple working instructions to the multi-instruction execution unit, and controlling the multi-instruction execution unit to continue triggering the judging unit after sending the currently generated operation instruction to the execution device for execution.

Preferably, the gating module 1 specifically includes:

the multi-gating unit is used for generating and transmitting all gating instructions to the multi-path selection circuit, and controlling the multi-path selection circuit to sequentially gate each row of resistors on the resistor array according to a preset sequence until all resistors are completely gated; the second resistance value obtaining unit is triggered after each time a row of resistors is gated.

The second resistance value obtaining unit is used for obtaining the resistance value of the current selected resistor row through the multi-path selection circuit and sending the resistance value to the instruction generating module.

Correspondingly, the instruction generating module 2 specifically includes:

and the second instruction generating unit is used for determining the received operation instructions corresponding to the resistance values of each row of resistors according to the pre-stored resistance values and the operation instruction corresponding table and generating the operation instructions.

The multi-instruction execution unit is used for sequentially sending the received operation instructions corresponding to the resistance values of the resistors of each row to the execution device for execution according to a preset sequence; and until all the operation instructions are sent, finishing the encoding and decoding of the instruction.

Preferably, the method further comprises:

and the starting module is used for starting the work of each module in the triggering device after receiving a starting instruction generated after the starting key is triggered.

And the pause module is used for stopping the work of all modules in the trigger device after receiving the pause instruction generated after triggering the pause key until receiving the start instruction again.

Preferably, the resistor array includes a plurality of rows of resistor sockets and a plurality of fixed resistors arranged in a predetermined order, and the resistor sockets are used for inserting the fixed resistors. Each row of resistor slots comprises an operation code slot and a plurality of data code slots.

Preferably, the method further comprises:

and the display module is used for displaying the content of the operation instruction sent to the execution device and the execution result thereof.

Preferably, the method further comprises:

the indicator lamp control module is used for detecting the execution condition of each operation instruction and respectively sending the corresponding display instruction to the indicator lamp corresponding to the operation instruction according to different execution conditions to carry out corresponding display operation.

Preferably, the method further comprises:

the voice broadcasting module is used for generating a voice broadcasting instruction according to the content of the operation instruction sent by the control instruction and the execution result of the operation instruction, and sending the voice broadcasting instruction to the voice broadcasting equipment for voice broadcasting.

Preferably, the method further comprises:

the analog-to-digital conversion module is used for receiving the resistance value of the selected resistor obtained by the gating module, converting the resistance value of the resistor into a digital signal and sending the digital signal to the instruction generation module.

Accordingly, the gating module 1 transmits the obtained resistance value of the gated resistor to the analog-to-digital conversion module.

It will be clear to those skilled in the art that, for convenience and brevity of description, reference may be made to the corresponding process in the foregoing method embodiment for the specific working process of the apparatus described above, which is not described herein again.

The invention also provides an instruction encoding, decoding and executing system, which is shown in fig. 6, and fig. 6 is a schematic structural diagram of the instruction encoding, decoding and executing system. The system comprises: a resistor array 13, a multiplexing circuit 12, a codec controller 11 and an executing device 14.

The resistor array 13 includes a plurality of rows of resistors arranged in a predetermined order.

The multiplexing circuit 12 controls the corresponding resistor in the gating resistor array 13 according to the gating command sent by the codec controller 11; the multiplexing circuit 12 is used for obtaining the resistance value of the gated resistor and then sending the resistance value to the codec controller 11; the input end of the multiplexing circuit 12 is connected with the resistor array 13, and the control end and the output end of the multiplexing circuit 12 are respectively connected with the codec controller 11.

The output end of the codec controller 11 is connected to the executing device 14, the codec controller 11 is configured to generate and send a gating command to the multiple selection circuit 12, determine an operation command corresponding to the resistance value of the received resistor according to a pre-stored resistance value and operation command correspondence table, generate the operation command, and send the generated operation command to the executing device 14 for executing.

Preferably, the instruction codec and execution system further comprises:

and a display 15 connected to the codec controller 11 for displaying the content of the operation instruction transmitted from the codec controller 11 to the execution device 14 and the execution result thereof.

Wherein the display 15 may be an LED display, the invention is not limited to the type of display 15.

Preferably, the instruction codec and execution system further comprises:

the indication lamps 17 are in one-to-one correspondence with the operation instructions, the indication lamps 17 are connected with the codec controller 11, and the indication lamps 17 are used for performing corresponding display operations according to the display instructions sent by the codec controller 11.

After receiving different display instructions, the display lamp can respectively perform different display operations to prompt the user of the current execution state. For example, when the operation instruction is not executed, the indicator lamp 17 is not lighted; the indicator light 17 lights a green light when the process is being executed; if the operation instruction fails, the indicator lamp 17 lights up a red light. The indicator light 17 may be an LED indicator light here, and of course, the present invention is not limited to the specific type of indicator light 17. In addition, the present invention is not limited to the display mode of each indicator lamp 17 after receiving various display instructions.

Preferably, the instruction codec and execution system further comprises:

and the voice broadcasting device 16 is connected with the codec controller 11 and is used for voice broadcasting the content of the operation instruction sent by the control instruction and the execution result of the operation instruction.

Preferably, the instruction codec and execution system further comprises:

a single instruction execution key and a multi-instruction execution key connected to the codec controller 11.

After the codec controller 11 receives a single instruction execution instruction generated after triggering a single instruction execution key, the control system works according to a single instruction execution mode; after the codec controller 11 receives the multi-instruction execution instruction generated after triggering the multi-instruction execution key, the control system operates according to all instruction execution modes.

Preferably, the instruction codec and execution system further comprises:

a start key and a pause key connected to the codec controller 11.

After receiving a start instruction generated after triggering a start key, the codec controller 11 controls the system to start working; after receiving the pause instruction generated after the pause key is triggered, the codec controller 11 controls the system to pause the operation until receiving the start instruction again.

Wherein the various keys of the present invention may be provided on a separate keyboard 18; or may be a trigger button provided on the display 15 to be triggered when the mouse is clicked or touched. The invention is not limited to the arrangement of the keys.

Preferably, the multiplexing circuit 12 comprises an analog multiplexing switch and an analog-to-digital converter.

The analog multi-path selection switch is selectively conducted with a row of resistors in the resistor array 13 each time according to the gating command sent by the encoding and decoding controller 11 and a preset sequence; the input end of the analog multi-path selection switch is connected with the resistor array 13, and the output end of the analog multi-path selection switch is connected with the analog-to-digital converter; the control end and the output end of the analog-digital converter are connected with the encoding and decoding controller 11.

Preferably, the codec controller 11 is a single-chip microcomputer. It can be understood that the cost of the singlechip is lower, and because the invention only needs to perform simple data comparison and instruction generation, the singlechip with lower cost can be used for control, and other types of processors can be adopted as the codec controller 11. The invention is not limited in this regard.

The system also comprises a power management circuit connected with each power utilization component.

The above embodiments are only preferred embodiments of the present invention, and the above embodiments may be arbitrarily combined, and the combined embodiments are also within the scope of the present invention. It should be noted that other modifications and variations to the present invention can be envisioned by those of ordinary skill in the art without departing from the spirit and scope of the present invention.

It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

Claims

1. The method is characterized by being applied to a coder-decoder controller, wherein the coder-decoder controller is respectively connected with a multi-path selection circuit and an execution device; the method comprises the following steps:

determining an operation instruction corresponding to the obtained resistance value of the resistor according to a pre-stored resistance value and operation instruction corresponding table, generating the operation instruction, and sending the generated operation instruction to the execution device for execution;

the multi-path selection circuit gates a row of resistors each time, and the resistance value of each row of resistors corresponds to an operation instruction;

the resistor array comprises a plurality of rows of resistor slots and a plurality of fixed-value resistors, wherein the resistor slots are arranged in a preset sequence, and the resistor slots are used for inserting the fixed-value resistors;

each row of the resistor slots comprises an operation code slot and a plurality of data code slots;

the pre-stored corresponding table of the resistance and the operation instruction comprises: the corresponding relation between the resistance value of the fixed-value resistor inserted into the operation code slot and the operation type, and the corresponding relation between the resistance value of the fixed-value resistor inserted into the data code slot and the operation parameter;

The process of generating and sending a gating command to the multiplexing circuit and controlling the multiplexing circuit to gate the corresponding resistor on the resistor array specifically comprises the following steps:

judging whether a non-executed sequence number exists currently according to the preset sequence, and if so, generating a gating instruction carrying the sequence number with the forefront sequencing according to the preset sequence; if not, finishing the coding and decoding of the instruction;

sending the gating instruction to the multi-path selection circuit, and controlling the multi-path selection circuit to gate a row of resistors corresponding to the sequence numbers;

the process of sending the generated operation instruction to the execution device for execution specifically comprises the following steps:

transmitting the currently generated operation instruction to the execution device for execution; and returns to trigger the judgment operation;

generating and sending all gating instructions to the multi-path selection circuit, and controlling the multi-path selection circuit to sequentially gate each row of resistors on the resistor array according to the preset sequence until all resistors are completely gated;

according to the preset sequence, sequentially sending the received operation instructions corresponding to the resistance values of the resistors of each row to the execution device for execution; and until all the operation instructions are sent, finishing the encoding and decoding of the instruction.

2. The method as recited in claim 1, further comprising:

triggering the operation of judging whether the unexecuted sequence number exists currently after receiving a single execution instruction generated after triggering a single instruction execution key, controlling a subsequent operation instruction generated currently to be sent to the execution device for execution, and stopping returning to trigger the judgment operation;

after receiving the multi-execution instruction generated after triggering the multi-instruction execution key, triggering the operation for judging whether the unexecuted sequence number exists currently, controlling the subsequent transmission of the currently generated operation instruction to the execution device for execution, and continuing to trigger the judgment operation.

3. The method as recited in claim 1, further comprising:

And triggering the coder-decoder controller to pause after receiving a pause instruction generated after triggering a pause key until receiving the start instruction again.

4. A method according to any one of claims 1-3, further comprising:

5. A method according to any one of claims 1-3, further comprising:

6. A method according to any one of claims 1-3, further comprising:

7. A method according to any one of claims 1 to 3, wherein after obtaining, by the multiplexing circuit, the resistance value of the selected resistor, before determining the operation instruction corresponding to the obtained resistance value of the resistor according to the pre-stored resistance value and operation instruction correspondence table, the method further comprises:

Converting the obtained resistance value of the resistor into a digital signal;

8. The instruction encoding and decoding and executing device is characterized by being used for an encoding and decoding controller, wherein the encoding and decoding controller is respectively connected with a multi-path selection circuit and an executing device; the device comprises:

the instruction generation module is used for determining the received operation instruction corresponding to the resistance value of the resistor according to the pre-stored resistance value and the operation instruction corresponding table, generating the operation instruction, and sending the generated operation instruction to the execution device for execution;

wherein, gating module specifically includes:

the judging unit is used for judging whether the unexecuted sequence numbers exist at present according to the preset sequence, and if so, generating a gating instruction carrying the sequence number with the forefront sequencing according to the preset sequence; if not, finishing the coding and decoding of the instruction;

the single gating unit is used for sending the gating command to the multi-path selection circuit and controlling the multi-path selection circuit to gate a row of resistors corresponding to the sequence numbers; triggering a first resistance value obtaining unit after each time a row of resistors is selected;

the first resistance value obtaining unit is used for obtaining the resistance value of the currently selected resistor row through the multi-path selection circuit and sending the resistance value to the instruction generating module;

correspondingly, the instruction generation module specifically comprises:

The first instruction generating unit is used for determining the received operation instructions corresponding to the resistance values of each row of resistors according to the pre-stored resistance values and the operation instruction corresponding table and generating the operation instructions;

the single instruction execution unit is used for sending the currently generated operation instruction to the execution device for execution; triggering the judging unit;

according to the preset sequence, sequentially sending the received operation instructions corresponding to the resistance values of the resistors of each row to the execution device for execution; until all operation instructions are sent, finishing the encoding and decoding of the instruction;

the gating module specifically comprises:

the multi-gating unit is used for generating and sending all gating instructions to the multi-path selection circuit, and controlling the multi-path selection circuit to sequentially gate each row of resistors on the resistor array according to the preset sequence until all resistors are completely gated; triggering a second resistance value obtaining unit after each time of gating a row of resistors;

The second resistance value obtaining unit is used for obtaining the resistance value of the currently selected resistor row through the multi-path selection circuit and sending the resistance value to the instruction generating module;

correspondingly, the instruction generation module specifically comprises:

the second instruction generating unit is used for determining the received operation instruction corresponding to the resistance value of each row of resistors according to the pre-stored resistance value and the operation instruction corresponding table and generating the operation instruction;

the multi-instruction execution unit is used for sequentially sending the received operation instructions corresponding to the resistance values of the resistors of each row to the execution device for execution according to the preset sequence; and until all the operation instructions are sent, finishing the encoding and decoding of the instruction.

9. The apparatus as recited in claim 8, further comprising:

the single instruction control unit is used for triggering the judging unit to start working after receiving a single execution instruction generated after triggering a single instruction execution key; the single-order working instruction is sent to the single-order execution unit, and the single-order execution unit is controlled to stop triggering the judging unit after the currently generated operation instruction is sent to the execution device for execution;

The multi-instruction execution control module is used for triggering the judging unit to start working after receiving a multi-execution instruction generated after triggering a multi-instruction execution key; and sending a plurality of working instructions to the multi-instruction execution unit, and controlling the multi-instruction execution unit to continuously trigger the judging unit after sending the currently generated operation instruction to the execution device for execution.

10. The apparatus as recited in claim 8, further comprising:

the starting module is used for triggering each module in the device to start working after receiving a starting instruction generated after triggering a starting key;

and the pause module is used for triggering all modules in the device to pause work after receiving a pause instruction generated after triggering the pause button until receiving the start instruction again.

11. The apparatus according to any one of claims 8-10, further comprising:

12. The apparatus according to any one of claims 8-10, further comprising:

13. The apparatus according to any one of claims 8-10, further comprising:

14. The apparatus according to any one of claims 8-10, further comprising:

the analog-to-digital conversion module is used for receiving the resistance value of the selected resistor obtained by the gating module, converting the resistance value of the resistor into a digital signal and then sending the digital signal to the instruction generation module;

correspondingly, the gating module sends the obtained resistance value of the gated resistor to the analog-to-digital conversion module.