CN109712991B - Display panel and manufacturing method thereof - Google Patents

Display panel and manufacturing method thereof Download PDF

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Publication number
CN109712991B
CN109712991B CN201811528424.XA CN201811528424A CN109712991B CN 109712991 B CN109712991 B CN 109712991B CN 201811528424 A CN201811528424 A CN 201811528424A CN 109712991 B CN109712991 B CN 109712991B
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line
substrate
power line
detection
metal layer
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CN109712991A (en
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周志伟
宋艳芹
李威龙
张露
胡思明
韩珍珍
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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Abstract

The invention discloses a display panel and a manufacturing method thereof, wherein the display panel comprises: a substrate; the thin film transistor unit is positioned on the substrate and comprises a power line connected with a power supply of the display panel and a first detection line connected with the compensation circuit of the display panel; the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate. By the method, the detection precision is improved, and the compensation effect of the compensation circuit is improved.

Description

Display panel and manufacturing method thereof
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a manufacturing method of the display panel.
Background
The OLED display device may be classified into two major categories, i.e., direct addressing and Thin Film Transistor (TFT) Matrix addressing, of a Passive Matrix OLED (PMOLED) and an Active Matrix OLED (AMOLED) according to a driving manner. The AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a large-sized display device with high definition. In the AOLED display panel manufacturing technology, the area of the middle-sized and large-sized panels is large, so that the brightness uniformity and the display effect are difficult to control. Meanwhile, the medium and large-sized panels often require long service life, which puts forward higher service requirements on the service life of the panels; however, the AOLED device is seriously aged with time, which results in serious deterioration of lifetime, brightness uniformity and display effect, and thus cannot satisfy the service life.
In the prior art, 3T1C is usually used in combination with an external compensation circuit to detect the threshold voltage (Vth) of the driving TFT and the AMOLED attenuation in real time, so as to implement compensation. Specifically, the pixel driving circuit of each sub-pixel in the display panel is electrically connected to the detection IC through the detection line to detect Vth, and attenuation compensation is performed according to the detection result. In the prior art, the arrangement of the detection line is often interfered by other signal lines, so that the detection precision is not enough, and the compensation effect is poor.
Disclosure of Invention
The invention mainly solves the technical problem of providing a display panel and a manufacturing method of the display panel, which improve the detection precision and further improve the compensation effect of the compensation circuit on the display panel.
In order to solve the technical problems, the invention adopts a technical scheme that:
provided is a display panel including:
a substrate;
the thin film transistor unit is positioned on the substrate and comprises a first detection line connected with the display panel compensation circuit and a power line connected with the display panel power supply;
the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate.
In order to solve the technical problem, the invention adopts another technical scheme that:
provided is a method for manufacturing a display panel, the method including:
providing a substrate;
disposing a thin film transistor unit on the substrate;
a first detection line connected with the display panel compensation circuit and a power line connected with the display panel power supply are arranged in the thin film transistor unit;
the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate.
The invention has the beneficial effects that: different from the situation of the prior art, the first detection line and the power line are arranged on the same layer in the thin film transistor unit of the display panel, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate, so that the influence of peripheral signals on the first detection line is shielded through the power line, the detection precision is improved, and the compensation effect of the compensation circuit on the display panel is further improved.
Drawings
FIG. 1 is a schematic structural diagram of a display panel according to a first embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a display panel according to a second embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a display panel according to a third embodiment of the present invention;
FIG. 4a is a schematic structural diagram of a display panel according to a fourth embodiment of the present invention;
FIG. 4b is a schematic top view illustrating the arrangement of the data lines and the first detection lines in the fourth embodiment of the display panel according to the present invention;
FIG. 5 is a schematic structural diagram of a fifth embodiment of a display panel according to the present invention;
FIG. 6 is a schematic structural diagram of a display panel according to a sixth embodiment of the present invention;
FIG. 7 is a schematic flow chart illustrating a method for fabricating a display panel according to the present invention;
fig. 8 is a schematic flow chart illustrating a process of disposing a thin film transistor unit on a substrate according to a method for fabricating a display panel of the present invention.
Detailed Description
Where certain terms are used throughout the description and claims to refer to particular components, those skilled in the art will appreciate that manufacturers may refer to the same components by different names. In the present specification and claims, the difference in name is not used as a means for distinguishing between components, but a difference in function of a component is used as a reference for distinguishing between components. The present invention will be described in detail below with reference to the accompanying drawings and examples. The present invention will be described in detail below with reference to the accompanying drawings and examples.
Fig. 1 is a schematic structural diagram of a display panel according to a first embodiment of the invention. The display panel 100 includes:
a substrate 10;
a thin film transistor unit 20 on the substrate 10, the thin film transistor unit 20 including a first sensing line 31 connected to the compensation circuit of the display panel 100 and a power line 40 connected to the power supply of the display panel 100;
specifically, the thin film transistor unit 20 includes a first metal layer 21, a first insulating layer 22, a second metal layer 23, a second insulating layer 24, a third metal layer 25, a third insulating layer 26, and a fourth metal layer 27, which are stacked;
the thin film transistor unit 20 further includes an active layer 28 disposed between the substrate 10 and the first metal layer 21, and an isolation layer 29 isolating the active layer 28 from the first metal layer 21.
In this embodiment, the tft unit 20 further includes other functional layers, and the structure thereof is the same as that in the prior art, and is not described herein again.
The first metal layer 21 is molybdenum, the second metal layer 23 and the third metal layer 25 are titanium-aluminum-titanium composite metal layers, and the fourth metal layer 27 is an indium tin oxide-silver-indium tin oxide composite metal layer.
The first insulating layer 22 is an organic insulating layer and has a thickness of 20-200 nm; the second insulating layer 24 and the third insulating layer 26 are inorganic insulating layers, and the thickness of the second insulating layer is 0.5-3 micrometers.
In this embodiment, the second insulating layer 24 and the third insulating layer 26 are inorganic insulating layers and have a thickness of 1 μm.
The display panel of the present invention is a display panel including: a substrate; the thin film transistor unit is positioned on the substrate and comprises a first detection line connected with the compensation circuit of the display panel and a power line connected with the power supply of the display panel; the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate.
In this embodiment, the thin film transistor unit on the substrate includes a first sensing line connected to the compensation circuit of the display panel and a power line connected to the power supply of the display panel; the first detection line and the power line are arranged on different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate. The method specifically comprises the following steps:
in this embodiment, the power line 40 includes a first power line 41, the second metal layer 23 includes the first power line 41, the third metal layer 25 includes the first detection line 31, that is, the first power line 41 is located on the second metal layer 23, the first detection line 31 is located on the third metal layer 25, and an orthographic projection of the first detection line 31 on the substrate 10 at least partially overlaps an orthographic projection of the first power line 41 on the substrate 10. As shown in fig. 1, the first power line 41 is located below the first detection line 31, and an orthographic projection of the first detection line 31 on the substrate 10 completely overlaps with an orthographic projection of the first power line 41 on the substrate 10. In other embodiments, the orthographic projection of the first detection line 31 on the plane where the first power line 41 is located may partially overlap with the first power line 41, so as to shield the influence of other signal lines around the first detection line 31 on the first detection line 31, improve the detection accuracy of the first detection line 31, and further improve the compensation effect of the compensation circuit on the display panel 100.
In this embodiment, the thin film transistor unit on the substrate includes a first sensing line connected to the compensation circuit of the display panel and a power line connected to the power supply of the display panel; the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line. The method specifically comprises the following steps:
fig. 2 is a schematic structural diagram of a display panel according to a second embodiment of the invention. The difference from fig. 1 is that the power line 40 includes a second power line 42, and the second power line 42 is located in the second metal layer 23. The first detection line 31 and the second power line 42 are disposed on the same layer, and the first detection line 31 and the second power line 42 are adjacent to each other. So as to shield the influence of other signal lines around the first detection line 31 on the first detection line 31 through the second power line 42.
In this embodiment, the display panel of the present invention includes a thin film transistor unit on a substrate, where the thin film transistor unit includes a first detection line connected to a compensation circuit of the display panel and a power line connected to a power supply of the display panel; the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate. The method specifically comprises the following steps:
as shown in fig. 2, the power line 40 includes a first power line 41, the second metal layer 23 includes the first power line 41, the third metal layer 25 includes the first detection line 31, that is, the first power line 41 is located on the second metal layer 23, the first detection line 31 is located on the third metal layer 25, and an orthographic projection of the first detection line 31 on the substrate 10 at least partially overlaps an orthographic projection of the first power line 41 on the substrate 10; and the power line 40 includes a second power line 42, and the second power line 42 is located in the second metal layer 23. The first detection line 31 and the second power line 42 are disposed on the same layer, and the first detection line 31 and the second power line 42 are adjacent to each other. So as to shield the influence of other signal lines around the first detection line 31 on the first detection line 31 through the power lines (first power line, second power line).
Please refer to fig. 3, which is a schematic structural diagram of a display panel according to a third embodiment of the present invention. The difference from fig. 1 is that the fourth metal layer 27 includes a metal anode 271, and the orthographic projections of the metal anode 271 on the substrate 10 in the display panel 100 and the orthographic projections of the first detection lines 31 on the substrate 10 are alternately arranged. In fig. 3, the orthographic projection of the metal anode 271 on the substrate 10 and the orthographic projection of the first detection line 31 on the plane of the substrate 10 are alternately arranged at intervals, so as to avoid the influence of the metal anode 271 on the detection of the first detection line 31, improve the detection precision of the first detection line 31, and further improve the compensation effect of the compensation circuit on the display panel 100.
Please refer to fig. 4a, which is a schematic structural diagram of a display panel according to a fourth embodiment of the present invention. The difference from fig. 3 is that the first metal layer 21 in the display panel 100 includes a data line 50. In a direction perpendicular to the substrate 10, the first power line 41 is located between the first detection line 31 and the data line 50 to isolate the mutual influence between the first detection line 31 and the data line 50, so as to improve the detection accuracy of the first detection line 31, and further improve the compensation effect of the compensation circuit on the display panel 100.
Further, the orthographic projections of the first detection lines 31 on the substrate 10 and the orthographic projections of the data lines 50 on the substrate 10 are alternately arranged, as shown in fig. 4b, so that not only is the interference between the adjacent data lines 50 reduced, but also the crosstalk between the adjacent first detection lines 31 is reduced, and the detection accuracy of the first detection lines 31 is improved.
When the compensation operation is performed, the first detection line 31 inputs a detection signal, and the data signal of the data line 50 tends to be stable; the data line 50 inputs a data signal, and the first detection line 31 can be set to the same low-potential signal by turning on a reset switch of the first detection line 31 in the compensation circuit. Therefore, the signal interference between the adjacent first detection lines 31 and the data lines 50 is weaker, and compared with a layout manner in which all the first detection lines 31 are disposed together and all the data lines 50 are disposed together, in this embodiment, the signal interference between the adjacent first detection lines 31 and between the adjacent data lines 50 can be more effectively avoided in a manner that the orthographic projections of the first detection lines 31 on the substrate 10 and the orthographic projections of the data lines 50 on the substrate 10 are alternately arranged, so as to improve the detection accuracy.
Fig. 5 is a schematic structural diagram of a display panel according to a fifth embodiment of the invention. The difference from fig. 3 is that the second metal layer 23 of the display panel 100 further includes a data line 50, the third metal layer 25 further includes a second power line 42, the second power line 42 is disposed on the same layer as the first detection line 31, the second power line 42 is adjacent to the first detection line 31, and an orthographic projection of the first detection line 31 on the substrate 10 and an orthographic projection of the data line 50 on the substrate 10 are alternately arranged.
In this embodiment, the metal anode 271 is located on the fourth metal layer 27, the first detection line 31 is located on the third metal layer 25, and the orthographic projections of the metal anode 271 on the substrate 10 and the orthographic projections of the first detection line 31 on the substrate 10 are alternately arranged at intervals; the second power line 42 is located on the third metal layer 25, and is disposed on the same layer as the first detection line 31, and the second power line 42 is adjacent to the first detection line 31; the first power line 41 is located on the second metal layer 23, and an orthographic projection of the first detection line 31 on the substrate 10 is completely overlapped with an orthographic projection of the first power line 41 on the substrate 10; the data lines 50 are located on the second metal layer 23, and orthographic projections of the first detection lines 31 on the substrate 10 and orthographic projections of the data lines 50 on the substrate 10 are alternately arranged. As shown in fig. 5, the first power line 41 and the second power line 42 are disposed around the first detection line 31, which is to say that the first detection line 31 is protected in multiple directions by the first power line 41 and the second power line 42, so as to further shield the influence of other signal lines around the first detection line 31 on the first detection line 31, thereby improving the detection accuracy of the first detection line 31 and further improving the compensation effect of the compensation circuit on the display panel 100.
Further, the orthographic projections of the first detection lines 31 on the substrate 10 and the orthographic projections of the data lines 50 on the substrate 10 are alternately arranged, as shown in fig. 4b, not only is the interference between the adjacent data lines 50 reduced, but also the crosstalk between the adjacent first detection lines 31 is reduced, and the detection accuracy of the first detection lines 31 is improved.
In other embodiments, the data line 50 may be located in another layer in the thin film transistor unit 20, and the orthographic projection of the first detection line 31 on the substrate 10 and the orthographic projection of the data line 50 on the substrate 10 are alternately arranged, and the first power line 41 in a planar shape is located between the first detection line 31 and the data line 50 in a direction perpendicular to the substrate 10.
Fig. 6 is a schematic structural diagram of a display panel according to a sixth embodiment of the invention. The difference from fig. 5 is that the fourth metal layer 27 in the display panel 100 further includes a second detection line 32; the third insulating layer 26 is provided with a via hole 60 penetrating through the third insulating layer 26 and exposing the first detection line 31, and the second detection line 32 is in contact with the first detection line 31 through the via hole 60 to be electrically connected.
In this embodiment, the second detection line 32 is in contact with the first detection line 31 through the via hole 60 of the third insulating layer 26 exposing the first detection line 31 to electrically connect, which is equivalent to the first detection line 31 and the second detection line 32 forming a detection line with an increased cross section, and compared with the fourth embodiment of the present application, the increase in cross section of the first detection line 31 reduces the resistance of the detection line (the first detection line 31 plus the second detection line 32), thereby reducing the loss of the parasitic capacitance/resistance to the detection signal on the detection line, improving the detection accuracy of the detection line, and further improving the compensation effect of the compensation circuit on the display panel 100.
The second sensing line 32 is a composite metal of indium tin oxide-silver-indium tin oxide.
Please refer to fig. 7, which is a flowchart illustrating a method for fabricating a display panel according to the present invention. The method comprises the following steps:
step S1: a substrate is provided.
Step S2: a thin film transistor unit is disposed on the substrate.
Step S3: a first detection line connected with the display panel compensation circuit and a power line connected with the display panel power supply are arranged in the thin film transistor unit;
the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate.
Referring to fig. 6, the power line 40 includes a first power line 41, the first detection line 31 and the first power line 41 are disposed in different layers, and an orthographic projection of the first detection line 31 on the substrate 10 completely overlaps with an orthographic projection of the first power line 41 on the substrate 10. In other embodiments, the orthographic projection of the first detection line 31 on the substrate 10 and the orthographic projection of the first power line 41 on the substrate 10 may also partially overlap. The power line 40 further includes a second power line 42, the first detection line 31 and the second power line 42 are disposed on the same layer, and the first detection line 31 and the second power line 42 are adjacent to each other.
Wherein, the step S2 of disposing the thin film transistor unit 20 on the substrate 10 and the step S3 specifically include:
step S21: a first metal layer 21 is provided on the substrate 10.
Wherein the first metal layer 21 is molybdenum metal.
Step S22: a first insulating layer 22 is provided on the first metal layer 21.
The first insulating layer 22 is an organic insulating layer and has a thickness of 20-200 nm.
Step S23: a second metal layer 23 is disposed on the first insulating layer 22 to form a first power line 41 and a data line 50.
Specifically, the second metal layer 23 is formed on the first insulating layer 22, and the first power line 41 and the data line 50 are formed by etching the second metal layer 23.
Wherein the second metal layer 23 is a titanium-aluminum-titanium composite metal layer.
Step S24: a second insulating layer 24 is disposed on the second metal layer 23.
The second insulating layer 24 is an inorganic insulating layer and has a thickness of 0.5-3 μm.
The second insulating layer 24 is 0.5 μm, which makes the display panel 100 thinner and thinner on the basis of satisfying the electrical insulation between the first detection line 31 and the first power line 41.
The second insulating layer 24 is 3 μm, which improves the electrical insulation effect between the first detection line 31 and the first power line 41, and prevents short circuit caused by electrical breakdown.
In this embodiment, the thickness of the second insulating layer 24 is 1 μm, so that the first detection line 31 and the first power line 41 have a better electrical insulation effect, and the display panel 100 is thinner.
Step S25: a third metal layer 25 is disposed on the second insulating layer 24 to form a first sensing line 31 and a second power line 42.
Specifically, the third metal layer 25 is formed on the second insulating layer 24, and the first sensing line 31 and the second power line 42 are formed by etching the third metal layer 25.
The orthographic projection of the first detection line 31 on the substrate 10 is at least partially overlapped with the orthographic projection of the first power line 41 on the substrate 10, so that the influence of other signal lines around the first detection line 31 on the first detection line 31 is shielded by the first power line 41, the detection precision of the first detection line 31 is improved, and the compensation effect of the compensation circuit on the display panel 100 is further improved. The orthographic projections of the data lines 50 on the substrate 10 and the orthographic projections of the first detection lines 31 on the substrate 10 are alternately arranged at intervals, so that the interference between the adjacent data lines 50 is reduced, the crosstalk between the adjacent first detection lines 31 is reduced, and the detection accuracy of the first detection lines 31 is improved.
Wherein the third metal layer 25 is a titanium-aluminum-titanium composite metal layer.
Step S26: a third insulating layer 26 is disposed on the third metal layer 25, and a via hole 60 penetrating the third insulating layer 26 and exposing the first sensing line 31 is formed.
Specifically, the third insulating layer 26 is formed on the third metal layer 25, and a via hole 60 exposing the first sensing line 31 is formed by drilling a hole in the third insulating layer 26.
The third insulating layer 26 is an inorganic insulating layer and has a thickness of 0.5-3 μm.
The third insulating layer 26 is 0.5 μm, which makes the display panel 100 thinner and thinner on the basis of satisfying the electrical insulation between the second power line 42 and the metal anode 271.
The third insulating layer 26 is 3 microns, so that the electrical insulation effect between the second power line 31 and the metal anode 271 is improved, and short circuit caused by electrical breakdown is avoided.
In this embodiment, the thickness of the third insulating layer 26 is 1 μm, so that the second power line 42 and the metal anode 271 have a better electrical insulating effect, and the display panel 100 is thinner.
Step S27: a fourth metal layer 27 is disposed on the third insulating layer 26, and a second sensing line 32 and a metal anode 271 are formed.
Specifically, the fourth metal layer 27 is formed on the third insulating layer 26, and the second detection line 32 and the metal anode 271 are formed by etching the fourth metal layer 27.
The second detection line 32 is electrically connected to the first detection line 31 through the via 60.
The orthographic projection of the metal anode 271 on the substrate 10 and the orthographic projection of the first detection line 31 on the substrate 10 are alternately arranged at intervals, so that the influence of the metal anode 271 on the detection of the first detection line 31 is avoided, and the detection precision of the first detection line 31 is improved. The second power line 42 is disposed on the same layer as the first detection line 31, and the second power line 42 is adjacent to the first detection line 31, that is, the first detection line 31 is protected in multiple directions by the first power line 41 and the second power line 42, so as to further shield the influence of other signal lines around the first detection line 31 on the first detection line 31. The first detection line 31 and the second detection line 32 are contacted through the via hole 60 in the third insulating layer 26 to be electrically connected, so as to form a detection line with an enlarged cross section, and the resistance of the detection line (the first detection line 31 and the second detection line 32) is reduced when the cross section is enlarged, so that the loss of parasitic capacitance/resistance to a detection signal on the detection line is reduced, the detection precision of the detection line is improved, and the compensation effect of the compensation circuit on the display panel 100 is further improved.
The fourth metal layer 27 is a composite metal layer of indium tin oxide-silver-indium tin oxide.
Before and/or after step S2, a process of disposing other functional layers (such as the active layer 28 and the isolation layer 29 in fig. 5) is also included, which is the same as the prior art and is not described herein again.
The invention is provided with a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, a third metal layer, a third insulating layer and a fourth metal layer which are stacked on a thin film transistor unit of a display panel. A first power line and a data line are formed on the second metal layer, a first detection line and a second power line are formed on the third metal layer, a second detection line and a metal anode are formed on the fourth metal layer, the first detection line is in contact with the second detection line through a via hole exposing the first detection line in the third insulating layer so as to be electrically connected, the orthographic projection of the data line on the substrate and the orthographic projection of the first detection line on the substrate are alternately arranged at intervals, the orthographic projection of the metal anode on the substrate and the orthographic projection of the first detection line on the substrate are alternately arranged at intervals, the orthographic projection of the first detection line on the substrate and the orthographic projection of the first power line on the substrate are at least partially overlapped, and the second power line is adjacent to the first detection line, the influence of the peripheral signal line on the first detection line is shielded, the loss of the parasitic capacitance/resistance on the detection signal on the detection line is reduced, the detection precision is improved, and the compensation effect of the compensation circuit on the display panel is further improved.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (8)

1. A display panel, comprising:
a substrate;
the thin film transistor unit is positioned on the substrate and comprises a first detection line connected with the compensation circuit of the display panel and a power line connected with the power supply of the display panel;
the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate; the influence of other signal lines around the first detection line on the first detection line is shielded, and the detection precision of the first detection line is improved;
the thin film transistor unit comprises a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, a third metal layer, a third insulating layer and a fourth metal layer which are stacked;
the power line comprises a first power line, the second metal layer comprises the first power line, the third metal layer comprises the first detection line, the first detection line and the first power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the first power line on the substrate;
the fourth metal layer comprises metal anodes, and orthographic projections of the metal anodes on the substrate and orthographic projections of the first detection lines on the substrate are alternately arranged.
2. The display panel of claim 1, wherein the first metal layer comprises a data line, and the first power line is disposed between the first sensing line and the data line in a direction perpendicular to the substrate.
3. The display panel of claim 1, wherein the second metal layer further comprises a data line, the power line further comprises a second power line, the third metal layer further comprises a second power line, the second power line is disposed on the same layer as the first detection line, and the first detection line is adjacent to the second power line.
4. The display panel according to claim 2 or 3, wherein orthographic projections of the first detection lines on the substrate are arranged alternately with orthographic projections of the data lines on the substrate.
5. The display panel of claim 1, wherein the fourth metal layer further comprises a second detection line; and
the third insulating layer is provided with a via hole penetrating through the third insulating layer, and the second detection line is electrically connected with the first detection line through the via hole.
6. The display panel according to claim 1, wherein the first metal layer is molybdenum, the second metal layer and the third metal layer are titanium-aluminum-titanium composite metal layers, and the fourth metal layer is indium tin oxide-silver-indium tin oxide composite metal layer.
7. The display panel according to claim 1, wherein the first insulating layer is an organic insulating layer having a thickness of 20 to 200 nm; the second insulating layer and the third insulating layer are inorganic insulating layers, and the thickness of the second insulating layer and the thickness of the third insulating layer are 0.5-3 micrometers.
8. A method for manufacturing a display panel, the method comprising:
providing a substrate;
disposing a thin film transistor unit on the substrate;
a first detection line connected with the display panel compensation circuit and a power line connected with the display panel power supply are arranged in the thin film transistor unit;
the first detection line and the power line are arranged on the same layer, and the first detection line is adjacent to the power line; and/or the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate; the influence of other signal lines around the first detection line on the first detection line is shielded, and the detection precision of the first detection line is improved;
wherein the disposing of the thin film transistor unit on the substrate specifically comprises:
arranging a first metal layer on the substrate;
providing a first insulating layer on the first metal layer;
arranging a second metal layer on the first insulating layer, and arranging a first power line on the second metal layer; the power line includes the first power line;
a second insulating layer is arranged on the second metal layer;
arranging a third metal layer on the second insulating layer, and forming a first detection line on the third metal layer, wherein the first detection line and the power line are arranged in different layers, and the orthographic projection of the first detection line on the substrate is at least partially overlapped with the orthographic projection of the power line on the substrate;
disposing a third insulating layer on the third metal layer;
and arranging a fourth metal layer on the third insulating layer and forming a metal anode, wherein orthographic projections of the metal anode on the substrate and orthographic projections of the first detection lines on the substrate are alternately arranged at intervals.
CN201811528424.XA 2018-12-13 2018-12-13 Display panel and manufacturing method thereof Active CN109712991B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811528424.XA CN109712991B (en) 2018-12-13 2018-12-13 Display panel and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811528424.XA CN109712991B (en) 2018-12-13 2018-12-13 Display panel and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN109712991A CN109712991A (en) 2019-05-03
CN109712991B true CN109712991B (en) 2021-03-30

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