CN109711202A - Data processing - Google Patents
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- CN109711202A CN109711202A CN201811216383.0A CN201811216383A CN109711202A CN 109711202 A CN109711202 A CN 109711202A CN 201811216383 A CN201811216383 A CN 201811216383A CN 109711202 A CN109711202 A CN 109711202A
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- 238000012545 processing Methods 0.000 title claims abstract description 151
- 230000004044 response Effects 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 9
- 230000008859 change Effects 0.000 claims description 8
- 238000013506 data mapping Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 12
- 230000006399 behavior Effects 0.000 description 4
- 238000001514 detection method Methods 0.000 description 4
- 238000013507 mapping Methods 0.000 description 4
- 230000006378 damage Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000000605 extraction Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/55—Detecting local intrusion or implementing counter-measures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
- G06F11/3062—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption
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Abstract
This disclosure relates to data processing.Data processing circuit includes: one group of two or more computing unit, is used to execute corresponding calculating operation;Instruction decoder is used to be decoded continuous data processing instructions, and for given data processing instructions, controls one or more of described computing unit to execute those required to given data processing instructions calculating operation;And control circuit, it is during executing the given data processing instructions, in response to the given data processing instructions, other computing units of one or more of described computing unit are controlled to execute the other calculating operation other than calculating operation needed for the execution given data processing instructions.
Description
Technical field
This disclosure relates to data processing field.
Background technique
Keep data safety and secret during processing so that data and to the processing of data from outside to without permission
Observer be it is sightless, this processing sensitive data system in be known problem.For example, smart card can store use
In the encryption key that the confidential data that cannot be accessed user is encrypted.
It has been found that system operation during using such as to system carry out so-called Differential Power Analysis or DPA it
The technology of class, which can provide, can allow people to determine the letter about secure data (such as the cryptographic key being stored in system)
The data of breath.Experimenter has passed through DPA and has observed that certain data processing operations (include their operand or output number sometimes
According to) be can be associated with the characteristic variations in power consumption.
Various technologies have been devised to attempt to inhibit this attack to security of system.It is handle confidential data
It will be desirable that higher safety is provided in system.
Summary of the invention
In exemplary arrangement, data processing circuit is provided, comprising:
The group of two or more computing units is used to execute corresponding calculating operation;
Instruction decoder is used to be decoded continuous data processing instructions, and for given data processing
Instruction controls one or more of described computing unit to execute given those required to the data processing instructions
Calculating operation;And
Control circuit, during executing the given data processing instructions, in response to the given data processing
Instruction controls other computing units of one or more of described computing unit to execute in addition to executing at the given data
Other calculating operation except calculating operation needed for reason instruction.
In another exemplary arrangement, data processing circuit is provided, comprising:
For executing the group of two or more computing devices of corresponding calculating operation;
For being decoded to continuous data processing instructions, and for given data processing instructions, for controlling
One or more of described computing device is to execute those required to given data processing instructions calculating operation
Device;And
Control device, during executing the given data processing instructions, in response to the given data processing
Instruction controls other computing devices of one or more of described computing device to execute in addition to executing at the given data
Other calculating operation except calculating operation needed for reason instruction.
In another exemplary arrangement, a kind of method of operation data processing circuit, the data processing circuit are provided
Group with two or more computing units for executing corresponding calculating operation, which comprises
Continuous data processing instructions are decoded;
For given data processing instructions, control one or more of described computing unit with described in executing to
Those required to fixed data processing instructions calculating operation;And
During executing the given data processing instructions, in response to the given data processing instructions, institute is controlled
Needed for other computing units of one or more of computing unit are stated to execute in addition to executing the given data processing instructions
Calculating operation except other calculating operation.
The other corresponding aspect and feature of this technology are defined by the following claims.
Detailed description of the invention
It will only by way of example, with reference to the embodiment of this technology as shown in the drawings, to further describe this skill
Art, in the accompanying drawings:
Fig. 1 schematically shows data processing circuit;
Fig. 2 provides the schematic example of configuration data;
Fig. 3 is exemplary timing diagram;
Fig. 4 schematically shows power detectors;And
Fig. 5 and Fig. 6 is the schematic flow chart for showing correlation method.
Specific embodiment
Before embodiment is discussed with reference to drawings, provides and embodiment is described below.
Exemplary embodiment provides data processing circuit, comprising:
The group of two or more computing units is used to execute corresponding calculating operation;
Instruction decoder is used to be decoded continuous data processing instructions, and for given data processing
Instruction, one or more of control computing unit calculate behaviour to execute those required to given data processing instructions
Make;And
Control circuit, during executing given data processing instructions, in response to given data processing instructions, control
Other computing units of one or more of computing unit are to execute in addition to calculating needed for the given data processing instructions of execution
Other calculating operation except operation.
Embodiment of the disclosure is by providing except (or multiple) computing unit needed for execution currently executing instruction
Except one or more computing units concurrent operations, solve above-mentioned data processing operation may vulnerable to DPA damage asking
Topic.For example, other calculating operation can be the operation for not needing to execute given data processing instructions.
This can be executed concurrently unwanted or " pseudo- (dummy) " meter by using other one or more computing units
Operation is calculated, to shield the DPA characteristic of the calculating operation actually executed.
In some instances, the circuit includes: the group of two or more data processing registers, is used for calculating
Unit provides input and receives output from computing unit to execute data processing instructions;And one or more other data
Processing register;The control circuit is configured as: selectively controlling other meters of one or more of described computing unit
Unit is calculated to store the result of other calculating operation in one or more of other data processing registers.In example
Property arrangement in, the operation of computing unit may cause output or the generation of result data and data storage operations.In exemplary reality
It applies in example, this can be handled by using other data processing register, which is configured so as not to provide for " true
The input of data processing operation in fact ", but allow to execute the operation of " puppet " data read/write, to imitate truthful data read/write operation
Power consumption characteristics.
Computing unit can have the associated execution period, such as be represented as multiple clock cycle.It is one or more
Other computing units can have the execution period longer than shielded practical operation or shorter.If it is one or more other
Computing unit has the longer execution period, then when the operation to be shielded is completed, can terminate their operation.If one
Or other multiple computing units have the shorter execution period, then their operation can be extended (or from different meters
The potential multiple pseudo-operations for calculating unit can be performed in order), to occupy the execution period of practical computing unit.Therefore,
In exemplary arrangement, it is another to execute that control circuit is configured as other computing units of one or more of control computing unit
Outer calculating operation, until completing to execute given data processing instructions.
In some instances, control circuit accesses configuration data in response to the classification to given data processing instructions,
The configuration data for one group of decoding data process instruction may classify in each class definition corresponding one group one
Or multiple computing units are to execute other calculating operation.Instruction decoder itself can be in response to referring to given data processing
It enables and is decoded and is given data processing instructions generation classification data.For example, configuration data can be indicated for executing number
According to the arrangement of the computing unit and other relevant one or more computing units for shielding its power features of process instruction
Matrix, such as provide the possible example of each of classification data one group of one or more corresponding in computing unit other
Mapping between computing unit, to execute other calculating operation.
Mapping can be for example in response to changing the detection of certain power features operated by detector, so as to preferably
Shield the operation (such as by changing or supplementing other (multiple) computing unit for the operation).Alternatively, user can be with
It is programmed to change mapping.Therefore, in some instances, circuit includes detector with the function of detection data processing circuit
Consumption;Wherein control circuit is configured to respond to detected power consumption to change configuration data.In some instances, it can be performed
One or more data processing instructions are to change configuration data.
Advantageously, the current finger to be executed can be generated in a part as the operation of instruction decoder, instruction decoder
The classification of order.In such an example, instruction decoder is configured to respond to be decoded given data processing instructions
To generate classification data for given data processing instructions.
Configuration data can advantageously provide each of classification data possible one group corresponding with computing unit of example
Mapping between other one or more computing units, to execute other calculating operation.
In exemplary arrangement, computing unit may include one or more of the following items: addition unit, multiplication list
Member, divider and logical combination unit.In exemplary arrangement, computing unit may include scalar/vector, wherein separately
Outer calculating operation includes one or both of the following terms operation: to the reserved area write operation of memory;With from depositing
Reservoir read operation.
Another exemplary embodiment provides data processing circuit, comprising:
For executing the group of two or more computing devices of corresponding calculating operation;
For being decoded to continuous data processing instructions, and for given data processing instructions, for controlling
One or more of computing device executes the device of those required to given data processing instructions calculating operation with execution;With
And
Control device, the control device is during executing given data processing instructions, in response to given data processing
Instruction, other computing devices of one or more of control computing device are to execute in addition to executing given data processing instructions institute
Other calculating operation except the calculating operation needed.
Another exemplary embodiment provides a kind of method of operation data processing circuit, which, which has, uses
In the group for two or more computing units for executing corresponding calculating operation, this method comprises:
Continuous data processing instructions are decoded;
For given data processing instructions, one or more of control computing unit is to execute given data
Those required to process instruction calculating operation;And
During executing given data processing instructions, in response to given data processing instructions, control in computing unit
Other one or more computing units with execute in addition to calculating operation needed for executing the given data processing instructions it
Outer other calculating operation.
Fig. 1 schematically shows data processing circuit 100 comprising the group of two or more computing units (is formed
Arithmetic logic unit or ALU 110), to execute corresponding calculating operation.Computing unit in the example includes: logical combination list
Member, such as AND/OR (and/or) unit 112, addition unit (ADD) 114, multiplication unit (MUL) 116 and divider (DIV)
118.Other computing units can also be provided.These indicate the example of the referred to as group of ALU 110 together.
In operation, each computing unit operates under the control of the control signal 120 from instruction decoder 130, and
And execute the calculating operation as needed for the decoded data processing instructions of instruction decoder 130.Control signal can define institute
The special properties that need to operate output and input (such as register designator) and any other parameter.Executing calculating operation
When, computing unit usually receives input data 135 from one group of processing register 140, and generates and will be written back into processing register 140
Output data 137.
Instruction decoder 130 wants decoded instruction from the reception of storage system 150, and storage system 150 may include logical
It crosses the main memory of the address access generated by scalar/vector 155 and optionally includes the high speed of one or more ranks
Buffer storage.Extraction logic 160 extracts instruction using these addresses and from storage system 150 to be used for by instruction decoding
Device is decoded.
Therefore, in short, instruction decoder is arranged to be decoded continuous data processing instructions, and for given
Data processing instructions, control one or more of computing unit 110 is to execute needed for given data processing instructions
Those of calculating operation.
During executing given data processing instructions, control circuit 170 is additionally in response to given data processing instructions, and
And other computing units of one or more of computing unit 110 are controlled to execute in addition to executing given data processing instructions institute
Other calculating operation except the calculating operation needed.
A reason for executing this other calculating operation is at least partly to shield the power consumption of data processing circuit
Characteristic.
Under the background of safety operation (such as cryptographic operation etc.), secret data item or secret behaviour are hidden to external observer
Work may be important.Secret can be a kind of algorithm, but in many instances, it is data item, such as SSH key, privately owned
PGP key etc..Technology used in external observer (such as Differential Power Analysis (DPA)) can provide pair in some cases
One in the detection of the instantaneous power consumption of data processing circuit and the algorithm that is used and the data item operated by data processing circuit
Person and correlation between the two.In the disclosure, it is noted that computing unit 110 can be intended to have distinctive power consumption special
Sign, such as indicate the feature of the cycle length of operation and/or the feature of the data value depending on being executed by operation.It is given executing
Data processing instructions during, in order to which such feature and DPA attack are shielded, control circuit 170 control other calculate it is single
One or more of member, other than executing the calculating operation needed for execute given data processing instructions in addition in terms of
Calculate operation.For example, in addition calculating operation can be the actually unwanted so-called pseudo- behaviour of the data processing instructions for executing and giving
Make.In this way it is possible to by the way that the power consumption characteristics superposition of another or multiple computing units in computing unit is shielded
The power consumption characteristics of data processing circuit during executing specific data process instruction.
Control circuit can respond the classification of current (given) data processing instructions.For example, classification 172 can
To be provided by instruction decoder 130.Classification can specify, for example, in order to execute current (given) data processing instructions, it will
Activate which of computing unit 110 or multiple.The accessible configuration data 174 of control circuit 170, the configuration data 174
Each of one group of possible classification for decoding data process instruction classification, defines corresponding one group of one or more
(other) computing unit is to execute other calculating operation.The example of configuration data is described below with reference to Fig. 2.
As described above, the circuit includes one group of two or more data processing register 140, it is defeated to be provided to computing unit
Enter and receive from computing unit to export, for executing data processing instructions.However, in order to assist power consumption screen discussed here
Operation is covered, one or more other " puppet " data processing registers 142 are provided.One or more other data processings are posted
The reason of storage be other (puppet) calculating operation that can be discussed above background under the computing unit 110 initiated extremely
Few some operations can lead to the generation of output data value.The normal function of computing unit will be constituted to the storage of the output data value
A part of characteristic is consumed, despite this, in the case where pseudo- (in addition) calculating operation, by executing such storage operation
Destruction is not generated to any " normal " data processing register 140, this mode is appropriate.The input provided to pseudo-operation
Data can be from normal register (one of register 140), because the execution of pseudo-operation will not destroy deposit
The data that device 140 is saved.But when initiating pseudo- (in addition) calculating operation and needs for storing by control circuit 170
Its export destination when, control to the control circuit property of can choose other computing units of one or more of computing unit with
The result of other calculating operation is stored in one or more other (puppet) data processing registers 142.
As described above, the example of computing unit includes addition unit 114, multiplication unit 116, divider 118 and logic
Assembled unit 112.The other example of computing unit is load/store unit (LSU) 180, in addition to being controlled by extraction unit 160
Those of except, reading and/or the write access of storage system 150 are travelled to and fro between in also control.Under the background of this operation, one or
Multiple other calculating operations may include the write operation to reserved memory area (so as not to damage storage in memory
Other " useful " data) and one or both of read operation (it may come from from anywhere in storage space).
As described above, addressing is handled by scalar/vector (AGU) 155.In this example, the fact that AGU 155 and ALU 110 is separated
Allow the operation independently of the computing unit in ALU 110 and is effectively produced (from the perspective of the masking operation of ALU) by AGU
Raw power consumption.
Fig. 2 is the schematic example for showing the configuration data 174 by control circuit access.As described above, this is for decoding
In one group of possible classification of data processing instructions each classification (such as be defined on data processing instructions it is normal execution in institute
The classification 200 for the exemplary computing operation being related to), corresponding one group of one or more computing unit 210 is defined, to execute in addition
Calculating operation.
It will be seen that, the leading diagonal of the table of Fig. 2 has hollow bar mesh, because if current data processing instructions are by table
Sign to need (for example) using adder unit 114, then adder unit therefore cannot be classified as it is pseudo- or another for executing
The other computing unit of outer calculating operation.However, the execution current data processing execution institute in computing unit is unwanted
Other computing units can be classified as other computing unit.
In the figure 2 example, hook a number instruction uses computing unit as other computing unit under current background.Cause
This, for example, computing unit in addition can be execution read/write operation during executing data processing instructions by logical combination 112
Multiplication unit 116 or LSU 180.
Classification information 172 is received accordingly, in response to from instruction decoder 130, control circuit 170 consults configuration data
174 and generate control signal 176, to control the operation of computing unit thereby executing pseudo- calculating operation.
The technology of the configuration data for establishing Fig. 2 is discussed below.
Fig. 3 is the exemplary timing diagram in terms of the timing for showing operation discussed above.
As previously mentioned, the normal operating of various computing units can spend different time spans, such as with clock signal
Periodicity be that unit measures.The normal operating that the top line of Fig. 3 schematically shows addition unit 114 (can purely be made
For schematic example) spend four clock cycle, and the second line schematically show the normal operating of divider 118 can
To spend seven clock cycle (again purely schematically).
In order to shield the power characteristic of the calculating operation carried out by computing unit, control circuit 170 is configured as controlling it
His computing unit is to execute other calculating operation, until completing to execute given (current) data processing building.Therefore, example
Such as, if the configuration data of Fig. 2 is specified during executing add operation by adder unit 114, (puppet) calculating operation in addition
It should be executed by divider 118, then this operation only maintains the duration of add operation processing in the present embodiment
300.In this background, it the other or pseudo-operation of divider 118 and does not complete.
The minimum rate of accumulation of Fig. 3 gives an example, the example by other (puppet) calculating operation of addition unit 114 come
Shielding usually requires the operation of the divider of seven clock cycle.Here, when the normal duration of add operation is four
The clock period, but in order to cover the whole operation of divider 118, it is necessary to shield seven clock cycle.To achieve it,
Control circuit 170 can control addition unit 114 to execute the first operation 310 for continuing four clock cycle, and then control
Addition unit processed or actually another unit are to execute the subsequent operations 320 of lasting three clock cycle.In this way,
In the exemplary embodiment, control circuit is configured as control one or more of computing unit other computing units to execute
Other calculating operation, until completing to execute given data processing instructions.
It is used to establish and/or modify two kinds of technologies of the configuration data of Fig. 2 referring now to Fig. 4 and Fig. 5 discussion.First
In kind technology, it can be write in a manner of being similar to and writing data into other registers 140 by one or more data processing instructions
Enter configuration data 14, one or more of data processing instructions are executable to change configuration data.Therefore, configuration data with
Under the control of family (program).For example, configuration data can be set such that data processing circuit in the especially sensitive operation phase
Between execute shielding, but can be set to not provide shielding in other times.
In alternatively possible arrangement, Fig. 4 schematically shows the expressions of data processing circuit discussed above
400, which is provided with the power supply (V) 410 relative to grounding connection 420.Detector 430 is arranged to testing number
According to the power consumption of processing circuit.Control circuit 170 receives information from detector 430, and is configured to respond to detected
Power consumption changes the configuration data of Fig. 2.
This operation mode shows by the schematic flow chart diagram of Fig. 5, wherein in step 500,430 detection circuit of detector
One or more characteristics of 400 main power consumption, and in step 510, the characteristic is compared with desired characteristic.Example
Such as, desired characteristic can be constant or " flat " power consumption or desired characteristic can be detector 430 cannot with it is a
The associated characteristic of the known features of body computing unit.In response to comparison result, detector 430 is in step 520 to control circuit
Configuration data or Fig. 2 are modified in instruction in appropriate circumstances, so as to closer desired power consumption characteristics.It is then possible to by returning
Step 500 is returned to repeat the process.
Finally, Fig. 6 is the schematic flow chart for showing the operating method of data processing circuit, the data processing circuit tool
There is the group of two or more computing units for executing corresponding calculating operation, this method comprises:
Continuous data processing instructions are decoded (in step 600);
For given data processing instructions, control (in one or more of step 610) computing unit to hold
Those required to the given data processing instructions of row calculating operation;
During executing given data processing instructions, in response to given data processing instructions, control (in step 620)
Other computing units of one or more of computing unit are to execute in addition to calculating needed for the given data processing instructions of execution
Other calculating operation except operation.
In this application, term " being configured as ... " is used to indicate that the element of device to have and is able to carry out defined behaviour
The configuration of work.In this context, " configuration " means the arrangement or mode of the interconnection of hardware or software.For example, device can have
The specialized hardware or processor that operate defined in providing or other processing equipments are (for example, processing elements as discussed above
Part) function can be programmed to execute." being configured as " is not meant to need to change in any way device element to mention
For defined operation.
Although the illustrative embodiments of this technology is described in detail herein by reference to attached drawing, it is to be appreciated that
Be that this technology is not limited to those accurate embodiments, and in the range for not departing from the technology defined such as appended claims and
In the case where spirit, various change, addition and modification can be realized wherein by those skilled in the art.For example, not departing from
In the case where the range of this technology, the feature of the feature of dependent claims and independent claims can be carried out various groups
It closes.
Claims (13)
1. a kind of data processing circuit, comprising:
The group of two or more computing units is used to execute corresponding calculating operation;
Instruction decoder is used to be decoded continuous data processing instructions, and the data processing instructions for giving,
It controls one or more of described computing unit and is calculated with executing those required to described given data processing instructions
Operation;And
Control circuit, during executing the given data processing instructions, in response to the given data processing instructions,
Other computing units of one or more of described computing unit are controlled to execute and refer in addition to executing the given data processing
The other calculating operation except calculating operation needed for enabling.
2. circuit according to claim 1, comprising:
The group of two or more data processing registers is used to provide input to the computing unit and from the calculating
Unit receives output, for executing data processing instructions;And
One or more other data processing registers;
The control circuit is configured as: selectively control other computing units of one or more of described computing unit with
The result of other calculating operation is stored in one or more of other data processing registers.
3. circuit according to claim 1, wherein the control circuit is configured as controlling one in the computing unit
Other a or multiple computing units are referred to executing the other calculating operation until completing the execution given data processing
It enables.
4. circuit according to claim 1, in which:
The control circuit accesses configuration data, the configuration number in response to the classification to the given data processing instructions
According to for one group of decoding data process instruction may classify in the corresponding one group of one or more meter of each class definition
Unit is calculated to execute the other calculating operation.
5. circuit according to claim 4, comprising:
Detector is used to detect the power consumption of the data processing circuit;
Wherein, the control circuit is configured to respond to detected power consumption to change the configuration data.
6. circuit according to claim 4, wherein one or more data processing instructions are able to carry out to match described in change
Set data.
7. circuit according to claim 4, wherein described instruction decoder is configured to respond to the given number
It is decoded according to process instruction and generates classification data for the given data processing instructions.
8. circuit according to claim 7, wherein the configuration data provides each possibility in the classification data
Mapping between one group corresponding with the computing unit of example other one or more computing units, it is described another to execute
Outer calculating operation.
9. circuit according to claim 1, wherein the other calculating operation is not need to execute the given number
According to the operation of process instruction.
10. circuit according to claim 1, wherein the computing unit includes one or more of the following items:
Addition unit;
Multiplication unit;
Division unit;And
Logical combination unit.
11. circuit according to claim 1, wherein the computing unit includes scalar/vector, and wherein, institute
Stating other calculating operation includes one or both of following operation:
To the reserved area write operation of memory;And
From memory read operations.
12. a kind of data processing circuit, comprising:
For executing the group of two or more computing devices of corresponding calculating operation;
It is described for controlling for being decoded to continuous data processing instructions, and for given data processing instructions
One or more of computing device runs the dress of those required to given data processing instructions calculating operation to execute
It sets;And
Control device, during executing the given data processing instructions, in response to the given data processing instructions,
Other computing devices of one or more of described computing device are controlled to execute and refer in addition to executing the given data processing
The other calculating operation except calculating operation needed for enabling.
13. a kind of method of operation data processing circuit, the data processing circuit has for executing corresponding calculating operation
Two or more computing units group, which comprises
Continuous data processing instructions are decoded;
For given data processing instructions, it is described given to execute operation to control one or more of described computing unit
Those required to data processing instructions calculating operation;And
During executing the given data processing instructions, in response to the given data processing instructions, the meter is controlled
Calculate other computing units of one or more of unit needed for executing in addition to executing the given data processing instructions in terms of
Calculate the other calculating operation except operation.
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Citations (4)
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US5528549A (en) * | 1993-05-28 | 1996-06-18 | Texas Instruments Incorporated | Apparatus, systems and methods for distributed signal processing |
US20120167114A1 (en) * | 2010-07-07 | 2012-06-28 | Panasonic Corporation | Processor |
CN104395876A (en) * | 2012-07-06 | 2015-03-04 | 皇家飞利浦有限公司 | Electric connection system |
US20150074159A1 (en) * | 2012-05-16 | 2015-03-12 | Axel York POSCHMANN | Methods for determining a result of applying a function to an input and evaluation devices |
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2017
- 2017-10-25 US US15/793,186 patent/US10902113B2/en active Active
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2018
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US5528549A (en) * | 1993-05-28 | 1996-06-18 | Texas Instruments Incorporated | Apparatus, systems and methods for distributed signal processing |
US20120167114A1 (en) * | 2010-07-07 | 2012-06-28 | Panasonic Corporation | Processor |
US20150074159A1 (en) * | 2012-05-16 | 2015-03-12 | Axel York POSCHMANN | Methods for determining a result of applying a function to an input and evaluation devices |
CN104395876A (en) * | 2012-07-06 | 2015-03-04 | 皇家飞利浦有限公司 | Electric connection system |
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