CN109672322B - Detection circuit and control circuit of switch converter - Google Patents
Detection circuit and control circuit of switch converter Download PDFInfo
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- CN109672322B CN109672322B CN201811501502.7A CN201811501502A CN109672322B CN 109672322 B CN109672322 B CN 109672322B CN 201811501502 A CN201811501502 A CN 201811501502A CN 109672322 B CN109672322 B CN 109672322B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention discloses a detection circuit and a control circuit of a switch converter, which can realize the detection of the output voltage of the switch converter and the output current of the switch converter by only adopting one detection output pin, reduce the number of the pins, facilitate the integration in a chip and reduce the volume and the cost.
Description
Technical Field
The present invention relates to power electronics technologies, and more particularly, to a detection circuit and a control circuit for a switching converter.
Background
Generally, to realize control of a switching converter, it is necessary to detect an output voltage and an output current thereof. In the prior art, two pins are generally required to implement voltage detection and current detection, as shown in fig. 1, for example, a boost converter is taken as an example, a resistor Rs is connected in series to a load branch to output a detected output current signal at a pin IFB, and resistors R1 and R2 are connected in series and then connected in parallel with an output terminal of the boost converter to output a detected output voltage signal at a pin UFB after voltage division. The above-mentioned detection mode needs two detection output pins for chip pin quantity increases, and area occupied is big, is unfavorable for integrating of chip.
Disclosure of Invention
In view of this, the present invention provides a detection circuit and a control circuit of a switching converter, so as to solve the problem of many pins in the conventional detection method.
In a first aspect, a detection circuit of a switching converter is provided, including:
the first detection module is provided with a first end and a second end connected with a reference ground and is used for detecting the output current of the switching converter when a power tube of the switching converter is in a conducting state; and
and the second detection module is connected with the first end of the first detection module, and when the power tube is in a turn-off state, the second detection module and the first detection module jointly detect the output voltage of the switching converter and generate a detection signal.
Preferably, the first detection module comprises a first resistor connected in series between the source of the power tube of the switching converter and the ground reference.
Preferably, the second detection module comprises:
and the second resistor and the third resistor are connected in series and then connected in parallel at two ends of the power tube, wherein a common connection point of the second resistor and the third resistor outputs a detection signal.
Preferably, the detection circuit further comprises:
and the processing module is controlled by the switching state of a power tube of the switching converter and generates a current detection signal representing the output current of the switching converter and a voltage detection signal representing the output voltage of the switching converter according to the detection signal.
Preferably, the processing module comprises a first processing module and a second processing module, wherein the first processing module comprises a first switch tube which passes the detection signal when the power tube is changed from on to off; the second processing module comprises a second switch tube which enables the detection signal to pass through when the power tube is turned off.
Preferably, the first processing module and the second processing module further comprise a calculating module to receive the detection signal and generate the current detection signal and the voltage detection signal according to the detection signal, respectively, wherein the switching converter operates in an intermittent or critical continuous mode.
Preferably, the conduction time of the power tube in one switching period and/or the time when the inductive current is zero.
Preferably, the first detection module comprises a first resistor connected in series between the load and a reference ground.
Preferably, the second detection module comprises:
and the second resistor and the third resistor are connected in series and then connected in parallel to the drain electrode of the power tube and the first end of the first resistor, wherein the common connection point of the second resistor and the third resistor outputs a detection signal.
Preferably, the processing module comprises a first processing module and a second processing module, wherein the first processing module comprises a first switch tube which passes the detection signal when the power tube is conducted; the second processing module comprises a second switch tube which enables the detection signal to pass through when the power tube is turned off.
Preferably, the second processing module generates the voltage detection signal according to the detection signal and the current detection signal generated by the first processing module.
In a second aspect, a control circuit for a switching converter is provided, comprising:
a detection circuit as claimed in any one of the above;
the voltage comparator is used for obtaining a first control signal according to the output voltage reference and the voltage detection signal;
a current comparator for obtaining a second control signal according to the output current reference and the current detection signal, wherein
And controlling the switching state of a power tube in the switching converter according to the first control signal and the second control signal.
In a third aspect, there is provided a switching converter comprising:
a main power circuit, and
the control circuit as described above, wherein the main power circuit comprises at least one power tube.
The invention discloses a sampling circuit and a control circuit for a switch converter, which can realize the detection of the output voltage of the switch converter and the detection of the output current of the switch converter by only adopting one detection output pin, reduce the number of the pins, facilitate the integration in a chip and reduce the volume and the cost.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a circuit diagram of a prior art sensing circuit for a switching converter;
FIG. 2 is a circuit diagram of first and second detection modules of a detection circuit of a switching converter according to a first embodiment of the present invention;
FIG. 3 is a waveform diagram illustrating the operation of the detection circuit according to the first embodiment of the present invention;
FIG. 4 is a circuit diagram of a processing module of the detection circuit according to the first embodiment of the present invention;
FIG. 5 is a circuit diagram of first and second detection modules of a detection circuit according to a second embodiment of the present invention;
FIG. 6 is a waveform diagram illustrating the operation of a detection circuit according to a second embodiment of the present invention;
FIG. 7 is a circuit diagram of first and second detection modules of a detection circuit according to a third embodiment of the present invention;
FIG. 8 is a waveform diagram illustrating the operation of a detection circuit according to a third embodiment of the present invention;
fig. 9 is a circuit diagram of a detection circuit of a switching converter according to a fourth embodiment of the present invention;
FIG. 10 is a circuit diagram of a processing module of a detection circuit according to a fourth embodiment of the present invention; and
fig. 11 is a block diagram of a control circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Meanwhile, it should be understood that, in the following description, a "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.
Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Fig. 2 is a circuit diagram of a first and a second detection module of the detection circuit according to the first embodiment of the present invention. As shown in fig. 2, taking the switching converter as a Buck converter as an example, the first detection module includes a first resistor Rs, and the second detection module includes a second resistor R1 and a third resistor R2. The first resistor Rs is connected between the source of the power tube Q1 and the reference ground in series, the second resistor R1 and the third resistor R2 are connected in series and then connected with two ends of the power tube Q in parallel, and the common connection point outputs a detection signal FB.
FIG. 3 is a waveform diagram of the working principle of the detection circuit according to the first embodiment of the present invention, which sequentially shows the driving signal Vg and the current I flowing through the power tube from top to bottomQAnd a drain voltage Vd of the power tube. When the driving signal Vg is at a high level, the power tube Q is conducted, the input voltage provides energy for the load, and the current I flowing through the power tube QQThe drain voltage Vd of the power transistor rises linearly, i.e. the voltage drop generated across the first resistor Rs, so the detection signal FB is now the voltage drop generated across the first resistor Rs. Before the power tube Q is turned off, the current IQA maximum value Ip is reached. Then the driving signal Vg is at low level, the power tube Q is turned off, the voltage borne by the power tube Q is the input voltage Vin, and no current flows through the power tube Q, so that the current IQDrops to zero and the drain voltage Vd is the input voltage Vin. Accordingly, the detection signal FB is a signal obtained by dividing the voltage across the second resistor R1 and the third resistor R2 and proportional to the drain voltage Vd, i.e., the input voltage Vin.
Fig. 4 is a circuit diagram of a processing module of the detection circuit according to the first embodiment of the invention. As shown in fig. 4, the processing module includes a first processing module including a first switch K1 and a calculation module VFB1, and a second processing module including a second switch K2 and a calculation module VFB 2. Wherein the first switch K1 is controlled to be turned on when the driving signal Vg changes from a high level ("1") to a low level ("0") to allow the detection signal FB to pass through. From the above analysis, it can be seen that in buckIn the converter, the detection signal FB represents the current I flowing through the power tubeQIs reduced by a voltage drop across the first resistance Rs (i.e., Ip Rs). Computing module VFB1 receives detection signal FB and generates current detection signal Vi. The second switch K2 is controlled to be turned on when the driving signal Vg is at a low level ("0") to allow the detection signal FB to pass through. From the above analysis, the detection signal FB represents a signal proportional to the input voltage Vin. The computing module VFB2 receives the detection signal FB and generates a voltage detection signal Vf.
In this embodiment, the detection signal FB is the current I flowing through the power tube when the driving signal Vg changes from high level to low levelQIs reduced by a voltage drop across the first resistance Rs (i.e., Ip Rs). If the switching converter operates in the critical continuous mode, the expression of the output current Io is:
Io＝Ip/2 (1)
therefore, the detection signal FB is proportional to the output current Io, and can directly represent the output current Io, so that the current detection signal Vi can be directly output without additional operation in the calculating module VFB 1. If the switching converter operates in the discontinuous mode, the expression of the output current Io is as follows:
Io＝Ip*(T-T0)/(2T)＝Ip*k1 (2)
where T is the switching period and T0 is the time when the inductor current is zero. Therefore, in addition to receiving the detection signal FB, the calculating module VFB1 needs to calculate the detection signal FB as above (i.e. multiplying by k 1) to obtain a current detection signal Vi proportional to the output current to characterize the output current Io.
In this embodiment, the detection signal FB represents a signal proportional to the input voltage Vin when the drive signal Vg is at a low level. If the switching converter operates in the critical continuous mode, the output voltage is expressed as:
Vo＝Ton*Vin/T (3)
therefore, the calculating module VFB2 receives the detecting signal FB, and performs the operation (i.e. multiplying by Ton/T) in the calculating module VFB2 according to equation (3) to obtain the voltage detecting signal Vf to characterize the output voltage Vo. If the switching converter operates in the discontinuous mode, the expression of the output voltage Vo is as follows:
Vo＝Vin*Ton/(T-T0) (4)
as can be seen from the above equation, the output voltage Vo is not only related to the input voltage Vin, but also related to the on-time Ton, the switching period T, and the time T0 when the inductor current is zero. Therefore, the received detection signal FB needs to be subjected to corresponding operation in the calculation module VFB2 according to equation (4), and then the voltage detection signal Vf is obtained and output.
FIG. 5 is a circuit diagram of a first and a second detecting modules of a detecting circuit according to a second embodiment of the present invention. In the present embodiment, taking the flyback converter as an example, as shown in fig. 5, the first and second detection modules are the same as the first embodiment, the first detection module includes a first resistor Rs, and the second detection module includes a second resistor R1 and a third resistor R2. The first resistor Rs is connected in series between the source of the power tube Q1 and the input end reference ground, the second resistor R1 and the third resistor R2 are connected in series and are connected in parallel with two ends of the power tube Q, and the common connection point of the two resistors outputs the detection signal FB.
Fig. 6 is a waveform diagram illustrating the operation principle of the detection circuit according to the second embodiment of the present invention. As shown in fig. 6, the driving signal Vg, the primary winding current I1, the secondary winding current I2, and the drain voltage Vd of the power transistor are sequentially arranged from top to bottom. When the driving signal Vg is at a high level, the power transistor Q is turned on, the primary winding current I1 linearly increases, and a voltage drop is generated across the first resistor Rs, which is the drain voltage Vd of the power transistor, so that the detection signal FB is the voltage drop generated across the first resistor Rs at this time. Before the power tube Q is turned off from on, the primary winding current I1 reaches a maximum value Ip. After that, the driving signal Vg is low level, the power tube Q is turned off, and the secondary winding current I2 is linearly decreased from the peak value Ip × N, where N is the turn ratio of the primary side and the secondary side of the transformer. The voltage applied to the power transistor Q is Vin + NVo,. Since no current flows through the power transistor Q, the primary winding current I1 drops to zero, and the drain voltage Vd is Vin + NVo at this stage. Therefore, the detection signal FB is a signal proportional to the drain voltage Vd, i.e., Vin + NVo, obtained by dividing the voltage across the second resistor R1 and the third resistor R2.
In this embodiment, the processing blocks of the detection circuit are the same as in the first embodiment and will not be described in detail. In contrast, when the driving signal Vg changes from high level to low level, if the flyback converter operates in the critical continuous mode, the output current Io is N × Ip (T-Ton)/2T, and therefore the computing module VFB1 calculates the received detection signal FB according to the above formula and outputs the result to generate the current detection signal Vi proportional to the output current Io to characterize the output current Io. If the flyback converter operates in the discontinuous mode, the expression of the output current Io is as follows:
Io＝N*Ip*(T-Ton-T0)/2T (5)
as can be seen from the above equation, the output current Io is related to the on-time Ton, the switching period T and the time T0 when the inductor current is 0, in addition to the current maximum value Ip. Therefore, the computing module VFB1 calculates the received detection signal FB by equation (5) to obtain a current detection signal Vi to represent the output current Io.
When the driving signal Vg is at a low level, the detection signal FB is now a value proportional to the drain voltage Vd, i.e., proportional to (Vin + NVo). When the flyback converter operates in a critical continuous state, the Ton/T is NVo/(Vin + NVo), so that the computing module VFB2 multiplies the received detection signal FB by Ton/T and outputs the product, i.e., obtains the voltage detection signal Vf representing the output voltage Vo. When the flyback converter works in the discontinuous state, the expression of the output voltage Vo is as follows:
similarly, the output voltage Vo is related to the on-time Ton, the switching period T, and the time T0 at which the inductor current is 0, in addition to the detection signal FB. Therefore, the computing module VFB2 calculates the received detection signal FB by equation (6) to obtain a voltage detection signal Vf proportional to the output voltage Vo to represent the output voltage Vo.
FIG. 7 is a circuit diagram of a first and a second detecting modules of a detecting circuit according to a third embodiment of the present invention. In this embodiment, taking the boost converter as an example, as shown in fig. 7, the first and second detection modules are the same as those of the first embodiment, the first detection module includes a first resistor Rs, and the second detection module includes a second resistor R1 and a third resistor R2. The first resistor Rs is connected in series between the source of the power tube Q1 and the reference ground, the second resistor R1 and the third resistor R2 are connected in series and are connected in parallel with two ends of the power tube Q, and the common connection point of the resistors outputs the detection signal FB.
Fig. 8 is a waveform diagram illustrating the operation principle of the detection circuit according to the third embodiment of the present invention. As shown in fig. 8, the driving signal Vg and the current I flowing through the power tube are sequentially from top to bottomQAnd the drain voltage Vd of the power tube. When the driving signal Vg is at high level, the power tube Q is conducted and the current IQThe voltage drops across the first resistor Rs, which is the drain voltage Vd of the power transistor, so the detection signal FB is now the voltage drop across the first resistor Rs. When the power tube Q is changed from on to off, the current IQA maximum value Ip is reached. Then the driving signal Vg is at low level, the power tube Q is turned off, the inductor releases energy to the load, the voltage born by the power tube Q is the output voltage Vo, and the current I flows through the power tube Q due to the fact that no current flowsQDrops to zero and the drain voltage Vd is the output voltage Vo at this stage. Accordingly, the detection signal FB is a signal proportional to the output voltage Vo after being divided by the second resistor R1 and the third resistor R2.
In this embodiment, the processing module of the detection circuit is the same as in the first embodiment. In contrast, when the drive signal Vg jumps from a high level to a low level, and the boost converter operates in the critical continuous mode, the expression of the output current is as follows:
Io＝Ip*(T-Ton)/2T (7)
therefore, the computing module VFB1 outputs the received detection signal FB after operating according to equation (7) to generate a current detection signal Vi representing the output current Io. If the boost converter operates in the discontinuous mode, the output current Io is:
Io＝Ip*(T-Ton-T0)/2T (8)
therefore, the computing module VFB1 calculates the received detection signal FB to obtain the current detection signal Vi according to equation (8) to represent the output current information.
When the driving signal is at a low level, the detection signal FB is proportional to the output voltage Vo no matter in which mode the boost converter operates. Therefore, the detection signal FB is received by the calculating module VFB2 and can be directly output without calculation, so as to generate the voltage detection signal Vf to represent the output voltage Vo.
It should be understood that the detection circuit proposed by the present invention is not limited to be used in the above embodiments, but is also applicable to other switching converters, and the connection positions and the calculation process of the calculation module are changed according to the topology and the operation principle of different switching converters.
Preferably, fig. 9 shows a circuit diagram of a detection circuit of a switching converter according to a fourth embodiment of the present invention. The boost converter is taken as an example for explanation. As shown in fig. 9, the first resistor Rs is connected in series between the load and the ground reference, and the second resistor R1 and the third resistor R2 are connected in series and then connected to the drain of the power transistor Q and the end of the first resistor Rs away from the ground reference. The common connection point of the second resistor R1 and the third resistor R2 outputs the detection signal FB.
Referring to fig. 8, when the driving signal Vg is at a high level, the power transistor Q is turned on, and the first end of the second resistor R1 is connected to the reference ground, so the detection signal FB detects a value as:
FB＝Io*Rs*R1/(R1+R2) (9)
wherein the resistors R1 and R2 are of the order of k Ω or more, and the resistor Rs is of the order of m Ω or less, so the resistors R1 and R2 are much larger than the resistor Rs, and the second resistor R1 is usually more than 10 times larger than the third resistor R2, so R1/(R1+ R2) is approximately 1, and therefore the detection signal FB is equivalent to a voltage drop across the first resistor Rs, i.e., Io Rs. When the driving signal Vg is at a low level, the power transistor Q is turned off, and at this time, the voltages at the two ends of the second resistor R1 and the third resistor R2 are Vo-Io Rs, and since the voltage drop across the first resistor Rs is small, the voltages at the two ends of the second resistor R1 and the second resistor R2 are approximately Vo, and therefore the value of the detection signal FB is:
FB＝R2/(R1+R2)*Vo+Io*Rs (10)
fig. 10 shows a circuit diagram of a processing module of a detection circuit according to a fourth embodiment of the present invention. Also, the processing block includes a first processing block including a first switch K1 controlled to be turned on to pass the detection signal FB when the driving signal Vg is at a high level ("1"), and a second processing block including a second switch K2 controlled to be turned on to pass the detection signal FB when the driving signal Vg is at a low level. The second processing module outputs the difference value between the received detection signal FB and the current detection signal Vi of the first processing module to generate a voltage detection signal Vf. Unlike the processing modules of the first embodiment, it does not require the computation modules VFB1 and VFB 2. As mentioned above, when the driving signal Vg is at a high level, the detection signal FB is proportional to the output current Io, so that the detection signal FB can be directly output without additional operation to represent the information of the output current Io. When the driving signal Vg is at a low level, since the detection signal is:
FB＝kVo+Io*Rs (11)
where k is R2/(R1+ R2), and the voltage drop Io Rs across the first resistor Rs is the current detection signal Vi output by the first processing module 1, so that the voltage detection signal Vf can be obtained from the difference between the detection signal FB and the current detection signal Vi to represent the information of the output voltage Vo.
Fig. 11 is a block diagram of a control circuit according to an embodiment of the present invention. As shown in fig. 11, the control circuit includes a detection circuit, a first comparator cmpr1, a second comparator cmpr2, and a PWM controller. The detection circuit receives the detection signal FB, wherein the application of the detection circuit in different switching converters can have different structures according to the above description of the embodiments, and generates the current detection signal Vi and the voltage detection signal Vf. The first terminals of the first comparator cmpr2 and the second comparator cmpr2 are current reference signals VISENAnd a voltage reference signal VVSENAnd the second end respectively receives the current detection signal Vi and the voltage detection signal Vf and respectively outputs a first control signal g1 and a second control signal g2 to the PWM controller to control the switching state of the power tube in the switching converter. It should be understood that the present invention only provides a control circuit, and the current detection signal Vi and the voltage detection signal Vf output by the detection circuit can have different functions and connection modes in the control loop according to the control mode of the switching converter.
In summary, the detection circuit and the control circuit of the switching converter provided by the invention only adopt one detection output pin, which can realize detection of the output voltage of the switching converter and detection of the output current of the switching converter, reduce the number of pins, and facilitate integration in a chip to reduce the volume and cost.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. A detection circuit for a switching converter, comprising:
the first detection module comprises a first resistor, a second resistor and a third resistor, wherein the first resistor is connected between a load and a reference ground in series and is used for detecting the output current of the switching converter when a power tube of the switching converter is in a conducting state; and
and the second detection module comprises a second resistor and a third resistor, is connected in series and then is connected in parallel with the drain electrode of the power tube and the first end of the first resistor, and when the power tube is in an off state, the second detection module and the first detection module jointly detect the output voltage of the switch converter and generate a detection signal at the common connection point of the second resistor and the third resistor.
2. The detection circuit of claim 1, further comprising:
and the processing module is controlled by the switching state of a power tube of the switching converter and generates a current detection signal representing the output current of the switching converter and a voltage detection signal representing the output voltage of the switching converter according to the detection signal.
3. The detection circuit according to claim 2, wherein the processing module comprises a first processing module and a second processing module, wherein the first processing module comprises a first switch tube, which passes the detection signal when the power tube is turned on; the second processing module comprises a second switch tube which enables the detection signal to pass through when the power tube is turned off.
4. The detection circuit of claim 3, wherein the second processing module generates the voltage detection signal based on the detection signal and the current detection signal generated by the first processing module.
5. A control circuit for a switching converter, comprising:
the detection circuit of any one of claims 1-4;
the voltage comparator is used for obtaining a first control signal according to the output voltage reference and the voltage detection signal;
a current comparator for obtaining a second control signal according to the output current reference and the current detection signal, wherein
And controlling the switching state of a power tube in the switching converter according to the first control signal and the second control signal.
6. A switching converter, comprising:
a main power circuit, and
the control circuit of claim 5, wherein the main power circuit comprises at least one power tube.
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| CN202110359525.4A CN113131722B (en) | 2018-12-10 | 2018-12-10 | Detection circuit and control circuit of switching converter |
| CN201811501502.7A CN109672322B (en) | 2018-12-10 | 2018-12-10 | Detection circuit and control circuit of switch converter |
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| JP3931627B2 (en) * | 2001-11-01 | 2007-06-20 | 株式会社日立製作所 | Gate driving device for semiconductor switching element |
| US6906934B2 (en) * | 2003-09-04 | 2005-06-14 | System General Corp. | Integrated start-up circuit with reduced power consumption |
| US7898823B2 (en) * | 2007-05-08 | 2011-03-01 | Leadtrend Technology Corp. | Quasi-resonant fly-back converter without auxiliary winding |
| DE102009034350A1 (en) * | 2009-07-23 | 2011-02-03 | Tridonicatco Gmbh & Co. Kg | Method and circuit for power factor correction |
| CN101867289B (en) * | 2010-05-19 | 2012-05-30 | 杭州矽力杰半导体技术有限公司 | Switch power supply with constant voltage/constant current output and control method thereof |
| CN203072221U (en) * | 2013-01-24 | 2013-07-17 | 深圳市芯飞凌半导体有限公司 | Primary side feedback constant current control circuit |
| CN104467433B (en) * | 2014-11-18 | 2017-02-22 | 西南交通大学 | Method and device for controlling critical continuous mode unit power factor flyback converter |
| CN205003262U (en) * | 2015-08-24 | 2016-01-27 | 深圳市赋安安全系统有限公司 | Fire control device power detection device |
| CN107132404B (en) * | 2017-05-15 | 2019-11-05 | 矽力杰半导体技术(杭州)有限公司 | Detection method, detection circuit, controller and Switching Power Supply |
| CN107493007B (en) * | 2017-08-21 | 2023-09-08 | 矽力杰半导体技术(杭州)有限公司 | Signal multiplexing electronic circuit, signal multiplexing method and switching regulator using same |
-
2018
- 2018-12-10 CN CN201811501502.7A patent/CN109672322B/en active Active
- 2018-12-10 CN CN202110359525.4A patent/CN113131722B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN113131722B (en) | 2023-06-30 |
| CN109672322A (en) | 2019-04-23 |
| CN113131722A (en) | 2021-07-16 |
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