CN109669770A - A kind of parallel colouring task scheduling unit system of graphics processor - Google Patents
A kind of parallel colouring task scheduling unit system of graphics processor Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
Abstract
The present invention relates to computer hardware technology fields, provide a kind of parallel colouring task scheduling unit system of graphics processor, including sequentially connected task scheduling unit JSU (10) and output control unit OCU (20)；The task scheduling unit JSU (10) includes vertex coloring task scheduling unit JSU-V (101) and pixel shader task scheduling unit JSU-P (102)；The output control unit OCU (20) includes vertex coloring task output unit OCU-V (201) and pixel shader task output unit OCU-P (202).The present invention uses Method of Scheduling Parallel, can be improved the hardware resource utilization of unified coloring treatment array, to promote vertex processing throughput and pixel generative capacity.
Description
Technical field
The present invention relates to computer hardware technology field more particularly to a kind of parallel colouring task dispatching parties of graphics processor
Method.
Background technique
As that graphically applies is continuously increased, the solution for depending merely on CPU progress graphic plotting in early days has been difficult to completely
The graphics process demand that sufficient achievement and technology increase, graphics processor (Graphic Processing Unit, GPU) meet the tendency of and
It is raw.So far from Nvidia publication first item GPU product in 1999, the development of GPU technology mainly experienced fixed function assembly line
Stage, separation stainer framework stage, unified stainer framework stage, graphics capability are constantly promoted, application field
General-purpose computations field is gradually expanded to from initial graphic plotting.GPU assembly line high speed, parallel feature and flexible programmable
Ability provides good operation platform for graphics process and universal parallel calculating.
Currently, China there is no the GPU matured product based on unified coloring framework to occur, each application field display control program
In largely using the commercial GPU chip of external import.Especially in specific application area, external import commercialization GPU chip is deposited
Temperature and environmental suitability it is poor, not can guarantee circuit itself or software kit does not have back door, leads comprising a large amount of specific applications
The unwanted redundant functional unit in domain, power consumption index are unable to satisfy requirement.Fast, the face at any time in addition, commercialization GPU chip updates
Face halt production, out of stock, safety, reliability, in terms of there are major hidden dangers.Recently, foreign countries are to the multiple necks in China
The key technology and product in domain carry out technology " block " and product " monopolization ", it is difficult to obtain the Floor layer Technology data of GPU chip, such as
Register data, detailed inner micro-architecture, kernel software source code etc., cause GPU function, performance to be unable to give full play, and transplant
Property is poor；The above problem seriously constrains the independent development and independent development capability of China's display system.
Parallel pipelining process line architecture 3D engine is the key technology for promoting and enhancing GPU graphics capability, is especially broken through
The parallel colouring task of 3D engine dispatches key technology, and it is extremely urgent to develop high performance graphics processor chips.
Summary of the invention
The purpose of the present invention:
The invention discloses a kind of parallel colouring task scheduling unit systems of graphics processor, can be improved at unified coloring
The hardware resource utilization of array is managed, to promote vertex processing throughput and pixel generative capacity.
The technical solution of the invention is as follows:
A kind of parallel colouring task scheduling unit system of graphics processor, including sequentially connected task scheduling unit
JSU10 and output control unit OCU20；
The task scheduling unit JSU10 includes vertex coloring task scheduling unit JSU-V101 and pixel shader task tune
Spend unit JSU-P102；
The vertex coloring task scheduling unit JSU-V101 includes that sequentially connected vertex warp attribute command poll is defeated
Enter unit 100, n vertex coloring inputs assembling unit VSD110；N vertex coloring inputs assembling unit VSD110 parallel practice
The VSD110 vertex warp mission bit stream exported is forwarded to fixed correlation by the assembling of n vertex warp input data
The VOC211 of SSC403 and fixed correlation；Vertex coloring task scheduling unit JSU-V101 can be concurrently by n vertex warp
Mission bit stream and input data are dispatched to the task scene of the unified coloring treatment array SSC403 of n fixed correlation；
The pixel shader task scheduling unit JSU-P102 includes that n pixel shader inputs assembling unit PSD112；N
Pixel shader inputs assembling unit PSD112 independent parallel and n pixel warp mission bit stream and input data is dispatched to n system
The task scene of one coloring treatment array SSC403, the mission bit stream output of n pixel warp of parallel practice；Pixel shader task
Scheduling unit JSU-P102 and be about to n PSD112 output pixel warp mission bit stream be forwarded to n fixed correlation
The POC212 of SSC403 and n fixed correlation；
The output control unit OCU20 includes that vertex coloring task output unit OCU-V201 and pixel shader task are defeated
Unit OCU-P202 out；
The vertex coloring task output unit OCU-V201 includes sequentially connected n vertex coloring output control unit
VOC211 and vertex warp poll output unit 200；N vertex coloring output control unit VOC211 independent implementation n parallel
It the assembling of a vertex warp output data and moves, the task of n vertex warp of parallel practice is submitted；
The pixel shader task output unit OCU-P202 includes n pixel shader output control unit POC212；N
It the parallel independent assembling for implementing n pixel warp output data of pixel shader output control unit POC212 and moves, parallel
The implementing n pixel warp of the task is submitted.
The vertex warp attribute command poll input unit 100 is assembled according to polling algorithm from n vertex coloring input
1 vertex coloring input assembling unit VSD110 is selected to implement the assembling of vertex warp in unit VSD110, by graphic plotting list
The vertex attribute data forwarding of first GDU40 input inputs assembling unit VSD110 to selected 1 vertex coloring of polling algorithm.
The vertex coloring input assembling unit VSD110 is pre- from the unified coloring treatment array SSC403 of fixed correlation
About 1 idle vertex warp task scene, it is lasting to receive the gentle input of point warp attribute command poll input unit 100 of rushing to summit
Vertex attribute data, whole vertex attribute data assemblings on m vertex are transmitted at the input data of 1 vertex warp solid
The task scene of fixed associated unified coloring treatment array SSC403, while the mission bit stream of vertex warp is transmitted to fixed pass
The vertex coloring output control unit VOC211 vertex coloring task FIFO of connection and the unified coloring treatment array of fixed correlation
The task scene of SSC403.
The pixel shader input assembling unit PSD112 is pre- from the unified coloring treatment array SSC403 of fixed correlation
The task scene of about 1 idle pixel warp receives the pixel category of the primitive rasterization unit R ST406 input of fixed correlation
The input data that whole attribute datas of m pixel are assembled into 1 pixel warp, is transmitted to the unification of fixed correlation by property data
The task of coloring treatment array SSC403 is live, while the mission bit stream of pixel warp being transmitted to the pixel shader of fixed correlation
The task of the unified coloring treatment array SSC403 of the pixel shader task FIFO and fixed correlation of output control unit POC212
Scene.
The vertex coloring output control unit VOC211 obtains the task letter of vertex coloring from the VSD110 of fixed correlation
Breath, the mission bit stream at task scene vertex coloring task FIFO head of the queue being in where the vertex warp of completion status are submitted to
The vertex coloring of fixed correlation inputs assembling unit VSD110, the task of vertex warp in the SSC403 to discharge fixed correlation
Scene；The vertex output data that vertex coloring task is completed in the unified coloring treatment array SSC403 of fixed correlation is moved
The data buffer zone of the vertex coloring o controller unit VOC211 of fixed correlation.
The vertex warp poll output unit 200 is according to polling algorithm from n vertex coloring output control unit
1 vertex coloring output control unit VOC211 is selected in VOC211, is concurrently assembled according to the data format of primitive command
The k vertex output data of the vertex vertex coloring output control unit VOC211 task FIFO head of the queue vertex warp, and k is pushed up
Point data is forwarded to unified pel assembling unit.
The pixel shader output control unit POC212 inputs assembling unit PSD112 from the pixel shader of fixed correlation
Pixel shader mission bit stream is obtained, the pixel warp mission bit stream that pixel shader task FIFO head of the queue is in completion status is submitted
Assembling unit PSD112 is inputted to the pixel shader of fixed correlation, pixel warp's appoints in the SSC403 to discharge fixed correlation
Business scene；The unified coloring treatment array SSC403 task scene of fixed correlation is in the output of the pixel warp of completion status
Data-moving to fixed correlation pixel shader o controller unit POC212 data buffer zone, to the data of pixel warp
Execute the rendering output unit ROU404 that Data Format Transform is transmitted to fixed correlation later.
The solution have the advantages that:
1. using Method of Scheduling Parallel, the hardware resource utilization of unified coloring treatment array can be improved, to be promoted
Vertex handles throughput and pixel generative capacity.
Detailed description of the invention
Fig. 1 is a kind of parallel colouring task scheduling unit system schematic of graphics processor of the present invention.
Specific embodiment
In the following with reference to the drawings and specific embodiments, technical solution of the present invention is clearly and completely stated.Obviously,
The embodiment stated is only a part of the embodiment of the present invention, instead of all the embodiments, based on the embodiments of the present invention,
Those skilled in the art are not making creative work premise all other embodiment obtained, belong to guarantor of the invention
Protect range.
As shown in Figure 1,
A kind of parallel colouring task scheduling unit system of graphics processor, including sequentially connected task scheduling unit
JSU10 and output control unit OCU20；
The task scheduling unit JSU10 includes vertex coloring task scheduling unit JSU-V101 and pixel shader task tune
Spend unit JSU-P102；
The vertex coloring task scheduling unit JSU-V101 includes that sequentially connected vertex warp attribute command poll is defeated
Enter unit 100, n vertex coloring inputs assembling unit VSD110；N vertex coloring inputs assembling unit VSD110 parallel practice
The VSD110 vertex warp mission bit stream exported is forwarded to fixed correlation by the assembling of n vertex warp input data
The VOC211 of SSC403 and fixed correlation；Vertex coloring task scheduling unit JSU-V101 can be concurrently by n vertex warp
Mission bit stream and input data are dispatched to the task scene of the unified coloring treatment array SSC403 of n fixed correlation；
The pixel shader task scheduling unit JSU-P102 includes that n pixel shader inputs assembling unit PSD112；N
Pixel shader inputs assembling unit PSD112 independent parallel and n pixel warp mission bit stream and input data is dispatched to n system
The task scene of one coloring treatment array SSC403, the mission bit stream output of n pixel warp of parallel practice；Pixel shader task
Scheduling unit JSU-P102 and be about to n PSD112 output pixel warp mission bit stream be forwarded to n fixed correlation
The POC212 of SSC403 and n fixed correlation；
The output control unit OCU20 includes that vertex coloring task output unit OCU-V201 and pixel shader task are defeated
Unit OCU-P202 out；
The vertex coloring task output unit OCU-V201 includes sequentially connected n vertex coloring output control unit
VOC211 and vertex warp poll output unit 200；N vertex coloring output control unit VOC211 independent implementation n parallel
It the assembling of a vertex warp output data and moves, the task of n vertex warp of parallel practice is submitted；
The pixel shader task output unit OCU-P202 includes n pixel shader output control unit POC212；N
It the parallel independent assembling for implementing n pixel warp output data of pixel shader output control unit POC212 and moves, parallel
The implementing n pixel warp of the task is submitted.
The vertex warp attribute command poll input unit 100 is assembled according to polling algorithm from n vertex coloring input
1 vertex coloring input assembling unit VSD110 is selected to implement the assembling of vertex warp in unit VSD110, by graphic plotting list
The vertex attribute data forwarding of first GDU40 input inputs assembling unit VSD110 to selected 1 vertex coloring of polling algorithm.
The vertex coloring input assembling unit VSD110 is pre- from the unified coloring treatment array SSC403 of fixed correlation
About 1 idle vertex warp task scene, it is lasting to receive the gentle input of point warp attribute command poll input unit 100 of rushing to summit
Vertex attribute data, whole vertex attribute data assemblings on m vertex are transmitted at the input data of 1 vertex warp solid
The task scene of fixed associated unified coloring treatment array SSC403, while the mission bit stream of vertex warp is transmitted to fixed pass
The vertex coloring output control unit VOC211 vertex coloring task FIFO of connection and the unified coloring treatment array of fixed correlation
The task scene of SSC403.
The pixel shader input assembling unit PSD112 is pre- from the unified coloring treatment array SSC403 of fixed correlation
The task scene of about 1 idle pixel warp receives the pixel category of the primitive rasterization unit R ST406 input of fixed correlation
The input data that whole attribute datas of m pixel are assembled into 1 pixel warp, is transmitted to the unification of fixed correlation by property data
The task of coloring treatment array SSC403 is live, while the mission bit stream of pixel warp being transmitted to the pixel shader of fixed correlation
The task of the unified coloring treatment array SSC403 of the pixel shader task FIFO and fixed correlation of output control unit POC212
Scene.
The vertex coloring output control unit VOC211 obtains the task letter of vertex coloring from the VSD110 of fixed correlation
Breath, the mission bit stream at task scene vertex coloring task FIFO head of the queue being in where the vertex warp of completion status are submitted to
The vertex coloring of fixed correlation inputs assembling unit VSD110, the task of vertex warp in the SSC403 to discharge fixed correlation
Scene；The vertex output data that vertex coloring task is completed in the unified coloring treatment array SSC403 of fixed correlation is moved
The data buffer zone of the vertex coloring o controller unit VOC211 of fixed correlation.
The vertex warp poll output unit 200 is according to polling algorithm from n vertex coloring output control unit
1 vertex coloring output control unit VOC211 is selected in VOC211, is concurrently assembled according to the data format of primitive command
The k vertex output data of the vertex vertex coloring output control unit VOC211 task FIFO head of the queue vertex warp, and k is pushed up
Point data is forwarded to unified pel assembling unit.
The pixel shader output control unit POC212 inputs assembling unit PSD112 from the pixel shader of fixed correlation
Pixel shader mission bit stream is obtained, the pixel warp mission bit stream that pixel shader task FIFO head of the queue is in completion status is submitted
Assembling unit PSD112 is inputted to the pixel shader of fixed correlation, pixel warp's appoints in the SSC403 to discharge fixed correlation
Business scene；The unified coloring treatment array SSC403 task scene of fixed correlation is in the output of the pixel warp of completion status
Data-moving to fixed correlation pixel shader o controller unit POC212 data buffer zone, to the data of pixel warp
Execute the rendering output unit ROU404 that Data Format Transform is transmitted to fixed correlation later.
Assuming that the vertex coloring task scheduling unit JSU- of the parallel colouring task scheduling unit of graphics processor 3D engine
The vertex warp attribute command poll input unit 100 of V101 is selected i-th from n VSD110 first, in accordance with poll rule
VSD110 is as input object.The list that vertex warp attribute command poll input unit 100 inputs chart drawing unit GDU40
A vertex attribute such as glcolor, glnormal are transmitted to i-th of VSD110 according to input sequence.I-th of VSD (110) is from admittedly
1 idle vertex warp task scene appointing as vertex warp is selected in fixed associated unified coloring treatment array SSC403
Business scene, i-th VSD110 collect whole attribute datas on enough m vertex, then start the assembling of vertex warp, and i-th
Whole attribute datas on m vertex of collection are moved the task scene of i-th of SSC403 of fixed correlation by VSD110 one by one,
After the completion of whole attributes are moved, the mission bit stream of vertex warp is transmitted to the vertex task of i-th of VOC211 of fixed correlation
FIFO.At the same time, vertex warp attribute command poll input unit 100 needs to select next VSD110 as vertex attribute
Output object.Assuming that select j-th of VSD110 from n VSD110 according to poll rule, vertex warp attribute command later
Single the vertex attribute such as glcolor, glnormal that poll input unit 100 inputs chart drawing unit GDU40 according to
Input sequence is transmitted to j-th of VSD110, and so on, it is real by functional level water operation and n VSD110 of concurrent working
The parallel composition of existing n vertex warp.
Pixel shader task scheduling unit JSU-V101 includes n pixel shader assembling unit PSD112.N pixel shader
Assembling unit PSD112 completes the assembling and forwarding capability of n pixel warp input data parallel.Firstly, i-th of PSD112 from
Select 1 idle pixel warp task scene as pixel in the unified coloring treatment array SSC403 of i-th of fixed correlation
Warp task scene, pixel property (texcoord, the color) data that then i-th of PSD112 inputs i-th of GEU by
A task scene for being forwarded to i-th of SSC403.After the completion of whole attributes of pixel warp are moved, i-th of PSD112 is by pixel
The mission bit stream of warp is transmitted to the pixel task FIFO of i-th of POC212.
Vertex output control unit OCU-V201 includes n vertex coloring output control unit VOC211 and 1 vertex
Warp poll output unit 200.N vertex coloring output control unit VOC211 completes n vertex warp output data parallel
Move function.Specifically, i-th of VOC211 will be in vertex task FIFO team head and in the vertex warp of completion status
Output attribute (texcoord, the color) data of task are forwarded to from i-th of SSC403 task scene of fixed correlation one by one
The data buffer of i VOC211.The vertex warp number of the n VOC211 of output of 200 poll of vertex warp poll output unit
According to.Assuming that the object of 200 poll of vertex warp poll output unit is i-th of VOC211, only when i-th of VOC211 is in vertex
The vertex warp of task FIFO team head is in completion status, and i-th of SSC403 output data of fixed correlation is whole
It is shifted to vertex output buffer, then vertex warp poll output unit 200 moves k from i-th of VOC211 parallel every time
Vertex attribute data are to unified pel assembly unit 405.
Pixel output control unit OCU-P202 includes n pixel shader output control unit POC212.N pixel shader
Output control unit POC212 completes the assembling and forwarding capability of n pixel warp output data parallel.Specifically, i-th
POC212 will be in pixel task FIFO team head and in the pixel warp task pixel output attribute of completion status
(fragcoord, color) data are forwarded to i-th of POC212 of fixed correlation from i-th of SSC403 of fixed correlation one by one
Data buffer.After the completion of whole attributes of pixel warp are moved, pixel data is transmitted to i-th of fixed correlation one by one
ROU404。
Claims (7)
1. a kind of parallel colouring task scheduling unit system of graphics processor, it is characterised in that:
Including sequentially connected task scheduling unit JSU (10) and output control unit OCU (20)；
The task scheduling unit JSU (10) includes vertex coloring task scheduling unit JSU-V (101) and pixel shader task tune
It spends unit JSU-P (102)；
The vertex coloring task scheduling unit JSU-V (101) inputs comprising sequentially connected vertex warp attribute command poll
Unit (100), n vertex coloring input assembling unit VSD (110)；N vertex coloring input assembling unit VSD (110) is parallel
The vertex warp mission bit stream that VSD (110) export is forwarded to fixed correlation by the assembling for implementing n vertex warp input data
SSC (403) and fixed correlation VOC (211)；Vertex coloring task scheduling unit JSU-V (101) can be concurrently by n
The task that vertex warp mission bit stream and input data are dispatched to the unified coloring treatment array SSC (403) of n fixed correlation is existing
?；
The pixel shader task scheduling unit JSU-P (102) includes that n pixel shader inputs assembling unit PSD (112)；N
Pixel shader inputs assembling unit PSD (112) independent parallel and n pixel warp mission bit stream and input data is dispatched to n
The task scene of unified coloring treatment array SSC (403), the mission bit stream output of n pixel warp of parallel practice；Pixel shader
Task scheduling unit JSU-P (102) and the pixel warp mission bit stream for being about to n PSD (112) output are forwarded to n fixed pass
The SSC (403) of the connection and POC (212) of n fixed correlation；
The output control unit OCU (20) includes that vertex coloring task output unit OCU-V (201) and pixel shader task are defeated
(202) unit OCU-P out；
The vertex coloring task output unit OCU-V (201) includes sequentially connected n vertex coloring output control unit
VOC (211) and vertex warp poll output unit (200)；N vertex coloring output control unit VOC (211) is parallel independent
Implement the assembling of n vertex warp output data and move, the task of n vertex warp of parallel practice is submitted；
The pixel shader task output unit OCU-P (202) includes n pixel shader output control unit POC (212)；N
It the parallel independent assembling for implementing n pixel warp output data of pixel shader output control unit POC (212) and moves, and
The task that row implements n pixel warp is submitted.
2. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
The vertex warp attribute command poll input unit (100) is single from n vertex coloring input assembling according to polling algorithm
1 vertex coloring input assembling unit VSD (110) of selection implements the assembling of vertex warp in first VSD (110), by graphic plotting
The vertex attribute data forwarding of unit GDU (40) input inputs assembling unit VSD to selected 1 vertex coloring of polling algorithm
(110)。
3. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
Vertex coloring input assembling unit VSD (110) is pre- from the unified coloring treatment array SSC (403) of fixed correlation
About 1 idle vertex warp task scene, the lasting gentle point warp attribute command poll input unit (100) of rushing to summit of reception are defeated
Whole vertex attribute data assemblings on m vertex are transmitted to by the vertex attribute data entered at the input data of 1 vertex warp
The task scene of the unified coloring treatment array SSC (403) of fixed correlation, while the mission bit stream of vertex warp being transmitted to admittedly
At the unified coloring of the vertex coloring task FIFO and fixed correlation of fixed associated vertex coloring output control unit VOC (211)
Manage the task scene of array SSC (403).
4. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
Pixel shader input assembling unit PSD (112) is pre- from the unified coloring treatment array SSC (403) of fixed correlation
The task scene of about 1 idle pixel warp receives the pixel of primitive rasterization unit R ST (406) input of fixed correlation
The input data that whole attribute datas of m pixel are assembled into 1 pixel warp is transmitted to the system of fixed correlation by attribute data
The task of one coloring treatment array SSC (403) is live, while the mission bit stream of pixel warp being transmitted to the pixel of fixed correlation
Colour the pixel shader task FIFO of output control unit POC (212) and the unified coloring treatment array SSC of fixed correlation
(403) task scene.
5. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
The vertex coloring output control unit VOC (211) obtains the task letter of vertex coloring from the VSD (110) of fixed correlation
Breath, the mission bit stream at task scene vertex coloring task FIFO head of the queue being in where the vertex warp of completion status are submitted to
The vertex coloring of fixed correlation inputs assembling unit VSD (110), vertex warp in the SSC (403) to discharge fixed correlation
Task scene；The vertex output data of vertex coloring task will be completed in the unified coloring treatment array SSC (403) of fixed correlation
Move the data buffer zone of the vertex coloring o controller unit VOC (211) of fixed correlation.
6. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
The vertex warp poll output unit (200) is according to polling algorithm from n vertex coloring output control unit VOC
(211) 1 vertex coloring output control unit VOC (211) is selected in, is concurrently assembled according to the data format of primitive command
The k vertex output data of vertex coloring output control unit VOC (211) vertex task FIFO head of the queue vertex warp, and by k
Vertex data is forwarded to unified pel assembling unit.
7. a kind of parallel colouring task scheduling unit system of graphics processor as described in claim 1, it is characterised in that:
The pixel shader output control unit POC (212) inputs assembling unit PSD (112) from the pixel shader of fixed correlation
Pixel shader mission bit stream is obtained, the pixel warp mission bit stream that pixel shader task FIFO head of the queue is in completion status is submitted
Assembling unit PSD (112) are inputted to the pixel shader of fixed correlation, pixel warp in the SSC (403) to discharge fixed correlation
Task scene；Unified coloring treatment array SSC (403) the task scene of fixed correlation is in the pixel warp of completion status
Output data move fixed correlation pixel shader o controller unit POC (212) data buffer zone, to pixel
The data of warp execute the rendering output unit ROU (404) that Data Format Transform is transmitted to fixed correlation later.
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| CN115509764A (en) * | 2022-11-09 | 2022-12-23 | 湖南马栏山视频先进技术研究院有限公司 | Real-time rendering multi-GPU parallel scheduling method and device and memory |
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| FARHANA SHEIKH: "A 2.05 GVertices/s 151 mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32 nm CMOS", 《 IEEE JOURNAL OF SOLID-STATE CIRCUITS ( VOLUME: 48, ISSUE: 1, JANUARY 2013)》 * |
| 邓艺等: "统一着色架构3D引擎关键技术研究", 《计算机技术与发展》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111754383A (en) * | 2020-05-13 | 2020-10-09 | 中国科学院信息工程研究所 | Detection method of strong connection graph based on warp reuse and colored partition on GPU |
| CN111754383B (en) * | 2020-05-13 | 2023-03-10 | 中国科学院信息工程研究所 | Detection method of strong connectivity graph based on warp reuse and colored partition on GPU |
| CN115509764A (en) * | 2022-11-09 | 2022-12-23 | 湖南马栏山视频先进技术研究院有限公司 | Real-time rendering multi-GPU parallel scheduling method and device and memory |
| CN115509764B (en) * | 2022-11-09 | 2023-03-07 | 湖南马栏山视频先进技术研究院有限公司 | Real-time rendering multi-GPU parallel scheduling method and device and memory |
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