CN109656513B - Composite finite field division device based on cardiac model - Google Patents
Composite finite field division device based on cardiac model Download PDFInfo
- Publication number
- CN109656513B CN109656513B CN201811497932.6A CN201811497932A CN109656513B CN 109656513 B CN109656513 B CN 109656513B CN 201811497932 A CN201811497932 A CN 201811497932A CN 109656513 B CN109656513 B CN 109656513B
- Authority
- CN
- China
- Prior art keywords
- finite field
- calculation
- result
- input
- division
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
- Complex Calculations (AREA)
Abstract
The invention discloses a composite finite field division device based on a cardiac model, which comprises a finite field GF (2) n ) Serial adders SADD1, SADD2, and SADD3, finite field GF (2) n ) Parallel adder PADD, finite field GF (2) n ) Multipliers MUL1, MUL2, MUL3, MUL4, MUL5, MUL6 and MUL7, finite field GF (2) n ) Constant multipliers CMLU 1, CMLU 2, finite field GF (2) n ) Squarer EXP, finite field GF (2) n ) And an inverter INV. The invention realizes finite field division operation through a cardiac model, and GF is calculated ((2) n ) 2 ) The division method has obvious speed advantage compared with the existing divider, and can be widely applied to various engineering fields.
Description
Technical Field
The invention relates to a device for inverting elements of a composite finite field, in particular to a composite finite field division device based on a cardiac model.
Background
A finite field, also called a galois field, is a field containing only a limited number of elements and is widely used in various engineering fields, such as communication, storage, information security, and the like. The division of the finite field is generally completed by multiplication and inversion of the finite field, and the calculation complexity is high and the calculation time is long. In order to solve algebraic problems and solve engineering problems efficiently, it is important to design an efficient finite field division algorithm.
Complex finite field As a special form of finite field, complex finite field GF ((2) n ) m ) Is a finite field GF (2) n×m ) In which GF ((2) n ) 2 ) Is one of the most widely used complex finite fields. Many known finite field division devices in the prior art, including software division devices and hardware division devices, are for GF (2) n ) The device for performing division operation has the problem of low calculation efficiency, and needs to use a specific hardware model to realize division of the composite finite field.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the composite finite field division device based on the cardiac model has high calculation efficiency.
The solution of the invention is realized by the following steps: a cardiac model-based complex finite field divider, comprising:
finite field GF (2) n ) Serial adders SADD1, SADD2, and SADD3 for serially calculating GF (2) n ) The addition of (1);
finite field GF (2) n ) Parallel adder PADD for parallel computing GF (2) n ) The addition of (2);
finite field GF (2) n ) Multipliers MUL1, MUL2, MUL3, MUL4, MUL5, MUL6 and MUL7 for calculating GF (2) n ) Multiplication of (1);
finite field GF (2) n ) Constant multipliers CMLU 1, CMLU 2 for computing GF (2) n ) Constant multiplication of (2);
finite field GF (2) n ) Squarer EXP for computing GF (2) n ) Square of (d);
finite field GF (2) n ) Inverter INV for computing GF (2) n ) Inversion of (1);
the flow of calculating division is as follows:
(1) Let the element requiring division calculation be marked as a h x+a l And b h x+b l And e is GF ((2) n ) 2 ) A constant term of the irreducible polynomial;
(2)a h and a l The calculation result is transmitted to MUL1 and is used as the input of CMUT 1 together with e;
(3)b h and b l Sent to SADD1 calculation, the calculation result and a l As input to MUL4, the result is calculated together with b h Together as an input to MUL 5;
(4)b h the calculation result is transmitted to the EXP calculation, and the calculation result and e are used as the input of the CMUT 2;
(5)b h and a l Transmitting the result to MUL2 for calculation, and using the calculation result and the result of MUL3 as the input of SADD 2;
(6)a h and b l The result is transmitted to MUL3 for calculation, and the calculation result and the result of MUL2 are used as the output of SADD2Entering;
(7) The calculation results of CMLU 1 and MUL4 are used as the input of SADD 3;
(8) The calculated results of MUL5 and CMUT 2 are used as the input of PADD;
(9) The calculation result of PADD is transmitted to INV calculation, and the calculation result and the result of SADD3 are used as the input of MUL 6; the calculation result is used as the input of MUL7 together with the result of SADD 2;
(10) The result of MUL6 calculation is c l ；
(11) The result of MUL7 calculation is c h ；
(12)c h x+c l Marked as a division result.
Another technical solution of the present invention is based on the above that the finite field GF (2) n ) Two input ports of the serial adder are used for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of (b), of the form:
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of the finite field GF (2) and takes the value of 0 or 1.
Another technical solution of the present invention is that on the basis of the above, the finite field GF (2) n ) The serial adder calculation addition is completed in n clock cycles, and includes one constant multiplication cardiac model and finite field GF (2) n ) The multiplication process of elements a (x) and e (x) is as follows:
(1)a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0 is a polynomial form of the input a (x);
e(x)＝e n-1 x n-1 +e n-2 x n-2 +...+e 0 is a polynomial form of the input e (x), e n-1 、e n-2 ...e 0 Is an element of the finite field GF (2);
(2)a n-1 、a n-2 ...a 0 input to component D from left to right in the form of a cardiac sequence, one element, a, being input every clock cycle n-1 、a n-2 ...a 0 Is an element of the finite field GF (2);
(3) Let b (x) = b n-1 x n-1 +b n-2 x n-2 +...+b 0 Is an output finite field GF (2) n ) Polynomial form of the element b (x), b n-1 、b n-2 ...b 0 Are elements of the finite field GF (2), their initial value being 0; b n-1 、b n-2 ...b 0 Left-to-right storage in component B i In, the initial values are all 0;
(4) Component D receives a every clock cycle j According to
x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is to be j Is sent to B i And calculate b i ＝b i +a j When e is k =1 and v (k+j)i =1; p (x) is GF (2) n ) Is of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n-2 ...p 1 Is an element of the finite field GF (2);
(5)a n-1 、a n-2 ...a 0 after the input calculation is finished, b n-1 、b n-2 ...b 0 I.e. the constant multiplication result.
The finite field GF (2) n ) The squarer calculates the square in n clock cycles, including a square calculation cardiac model, and calculates the finite field GF (2) n ) Element a h The squaring process of (a) is as follows:
(1) Let a (x) = a h Then a (x) = a n-1 x n-1 +a n-2 x n-2 +...+a 0 Is an input of a h Polynomial form of (a);
(2)a n-1 、a n-2 ...a 0 input to component D from left to right in the form of a cardiac sequence, each clockPeriodically input an element, a n-1 、a n-2 ...a 0 Is an element of the finite field GF (2);
(6) Let b (x) = b n-1 x n-1 +b n-2 x n-2 +...+b 0 Is an output finite field GF (2) n ) Polynomial form of the element b (x), b n-1 、b n-2 ...b 0 Are elements of the finite field GF (2), their initial value being 0; b is a mixture of n-1 、b n-2 ...b 0 From left to right in the component B i In, the initial values are all 0;
(3) Each clock cycle, component D receives a j According to
x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is to be j Is sent to b i And calculate b i ＝b i +a j When v is (2j)i =1; p (x) is GF (2) n ) Of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n- 2 ...p 1 Is an element of the finite field GF (2);
(4)a n-1 、a n-2 ...a 0 after the input calculation is finished, b n-1 、b n-2 ...b 0 I.e. the squared result.
Another technical solution of the present invention is that on the basis of the above, the finite field GF (2) n ) Two input ports of the parallel adder are used for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of the form:
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of the finite field GF (2) and takes the value of 0 or 1.
Another technical solution of the present invention is that on the basis of the above, the finite field GF (2) n ) The computation and addition of the parallel adder are completed in two clock cycles, and the method comprises a multiplication computation cardiac model and computation of a finite field GF (2) n ) The multiplication process of elements a (x) and b (x) is as follows:
(1)a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0 is a polynomial form of input a (x);
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0 is a polynomial form of the input b (x),
a n-1 、a n-2 ...a 0 、b n-1 、b n-2 ...b 0 is an element of the finite field GF (2);
(2)a 0 、a 1 ...a n-1 left-to-right storage in part A i In (b) n-1 、b n-2 ...b 0 From left to right in the form of a cardiac sequence input to component A i Once to the right every clock cycle;
(3) Component a i Connected to part D, each cycle, with part A j For example, calculate a j b k Then sent to component D;
(4) Let c (x) = c n-1 x n-1 +c n-2 x n-2 +...+c 0 Is an output finite field GF (2) n ) Polynomial form of the element c (x), c n-1 、c n-2 ...c 0 Are elements of the finite field GF (2), their initial value being 0; c. C 0 、c 1 ...c n-1 Left-to-right storage in section C i In, the initial values are all 0;
(5) Part D according to x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is mixing j b k Send to part C i When v is (j+k)i =1; p (x) is GF (2) n ) Is of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n-2 ...p 1 Is an element of the finite field GF (2);
(6) Each clock cycle, component C i Calculating c i ＝c i +a j b k 。
(7)b n-1 、b n-2 ...b 0 After the input calculation is finished, c n-1 、c n-2 ...c 0 I.e. the multiplication result.
Another technical solution of the present invention is that on the basis of the above, the finite field GF (2) n ) The inverter calculates the inversion to be completed within 2n-2 clock cycles.
According to the technical scheme, the embodiment of the invention has the following advantages:
the composite finite field division device based on the cardiac model realizes finite field division operation through the cardiac model, and GF is calculated ((2) n ) 2 ) Compared with the existing divider, the divider has obvious speed advantage and can be widely applied to various engineering fields.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the invention and not to limit the invention.
Fig. 1 is a schematic structural diagram of a division apparatus according to an embodiment of the present invention.
FIG. 2 is the finite field GF (2) shown in FIG. 1 n ) The structure of the multiplier is shown schematically.
FIG. 3 shows the finite field GF (2) shown in FIG. 1 n ) The structure of the components of the multiplier is shown schematically.
FIG. 4 shows the finite field GF (2) shown in FIG. 1 n ) The structure of the constant multiplier is shown schematically.
FIG. 5 shows the finite field GF (2) shown in FIG. 1 n ) The structural diagram of the components of the constant multiplier is shown.
FIG. 6 shows the finite field GF (2) shown in FIG. 1 n ) The structure of the squarer is shown schematically.
FIG. 7 is the view shown in FIG. 1Finite field GF (2) n ) The components of the squarer are schematically shown.
FIG. 8 shows the finite field GF (2) shown in FIG. 1 n ) The structure of the serial adder is shown schematically.
FIG. 9 shows the finite field GF (2) shown in FIG. 1 n ) The structure of the parallel adder is shown schematically.
Detailed Description
The present invention is described in detail below with reference to the attached drawings, and the description in this section is only exemplary and explanatory and should not be construed as limiting the scope of the present invention in any way. Furthermore, features from embodiments in this document and from different embodiments may be combined accordingly by a person skilled in the art from the description in this document.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In the following embodiments of the present invention, as shown in fig. 1 to 9, the composite finite field division apparatus according to the present invention includes a finite field GF (2) n ) Serial adders SADD1, SADD2, and SADD3, finite field GF (2) n ) Parallel adder PADD, finite field GF (2) n ) Multipliers MUL1, MUL2, MUL3, MUL4, MUL5, MUL6 and MUL7, finite field GF (2) n ) Constant multipliers CMLU 1, CMLU 2, finite field GF (2) n ) Squarer EXP, finite field GF (2) n ) The operation of the division apparatus of the present invention is described below with reference to the inverter INV.
(1) The elements requiring calculation of division are marked as a h x+a l And b h x+b l E is GF ((2) n ) 2 ) Constant terms of irreducible polynomials;
(2)a h and a l The calculation is transmitted to the MUL1, and the calculation result and e are used as the input of the CMUT 1;
(3)b h and b l Sending to SADD1 calculation, calculating result and a l As input to MUL4, the result is calculated together with b h Together as an input to MUL 5; (ii) a
(4)b h The calculation result is transmitted to EXP calculation, and the calculation result and e are used as the input of the CMUT 2;
(5)b h and a l Transmitting the result to MUL2 for calculation, and using the calculation result and the result of MUL3 as the input of SADD 2;
(6)a h and b l The result is transmitted to MUL3 for calculation, and the calculation result and the result of MUL2 are used as the input of SADD 2;
(7) The calculated results of CMLU 1 and MUL4 are used as the input of SADD 3;
(8) The calculation results of MUL5 and CMUT 2 are used as the input of PADD;
(9) The calculation result of PADD is transmitted to INV calculation, and the calculation result and the result of SADD3 are used as the input of MUL 6; the calculation result is used as the input of MUL7 together with the result of SADD 2;
(10) The result of MUL6 calculation is c l ；
(11) The result of MUL7 calculation is c h ；
(12)c h x+c l The label is the division result.
The finite field GF (2) n ) The multiplier is provided with two input ports and one output port;
the finite field GF (2) n ) The multiplier MUL1 calculates the multiplication to be completed in 2n clock cycles, comprises a multiplication calculation cardiac model, calculates the finite field GF (2) n ) The multiplication of elements a (x) and b (x) is as follows:
(1)a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0 is a polynomial form of the input a (x);
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0 is a polynomial form of the input b (x),
a n-1 、a n-2 ...a 0 、b n-1 、b n-2 ...b 0 is an element of the finite field GF (2);
(2)a 0 、a 1 ...a n-1 from left to right in the component A i In (b) n-1 、b n-2 ...b 0 From left to right in the form of a cardiac sequence input to component A i Once to the right every clock cycle;
(3) Component a i Connected to part D, each cycle, with part A j For example, calculate a j b k Then sent to component D;
(4) Let c (x) = c n-1 x n-1 +c n-2 x n-2 +...+c 0 Is an output finite field GF (2) n ) Polynomial form of the element c (x), c n-1 、c n-2 ...c 0 Are elements of the finite field GF (2), their initial value being 0; c. C 0 、c 1 ...c n-1 Left-to-right storage in section C i In, the initial values are all 0;
(5) Component D is according to x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is to j b k Send to part C i When v is (j+k)i =1; p (x) is GF (2) n ) Of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n-2 ...p 1 Is an element of the finite field GF (2);
(6) Each clock cycle, component C i Calculation of c i ＝c i +a j b k 。
(7)b n-1 、b n-2 ...b 0 After the input calculation is finished, c n-1 、c n-2 ...c 0 I.e. the multiplication result.
The finite field GF (2) n ) The constant multiplier is provided with two input ports and an output port;
the finite field GF (2) n ) Constant multiplier computation constant multiplication is completed in n clock cycles, comprises a constant multiplication computation cardiac model, and computes a finite field GF (2) n ) The multiplication process of elements a (x) and e (x) is as follows:
(1)a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0 is a polynomial form of input a (x);
e(x)＝e n-1 x n-1 +e n-2 x n-2 +...+e 0 is a polynomial form of the input e (x), e n-1 、e n-2 ...e 0 Is an element of the finite field GF (2);
(2)a n-1 、a n-2 ...a 0 input to component D from left to right in the form of a cardiac sequence, one element, a, being input every clock cycle n-1 、a n-2 ...a 0 Is an element of the finite field GF (2);
(3) Let b (x) = b n-1 x n-1 +b n-2 x n-2 +...+b 0 Is an output finite field GF (2) n ) Polynomial form of the element b (x), b n-1 、b n-2 ...b 0 Are elements of the finite field GF (2), their initial value being 0; b n-1 、b n-2 ...b 0 Left-to-right storage in component B i In, the initial values are all 0;
(4) Each clock cycle, component D receives a j According to
x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is to be j Is sent to B i And calculate b i ＝b i +a j When e is k =1 and v (k+j)i =1; p (x) is GF (2) n ) Is of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n-2 ...p 1 Is an element of the finite field GF (2);
(5)a n-1 、a n-2 ...a 0 after the input calculation is finished, b n-1 、b n-2 ...b 0 I.e. the constant multiplication result.
The finite field GF (2) n ) The squarer is provided with two input ports and an output port;
the finite field GF (2) n ) The squarer computation of the square is completed in n clock cycles, comprises a square computation cardiac model, and computes a finite field GF (2) n ) Element a h The squaring process of (a) is as follows:
(1) Let a (x) = a h Then a (x) = a n-1 x n-1 +a n-2 x n-2 +...+a 0 Is an input of a h Polynomial form of (a);
(2)a n-1 、a n-2 ...a 0 input to component D from left to right in the form of a cardiac sequence, one element, a, being input every clock cycle n-1 、a n-2 ...a 0 Is an element of the finite field GF (2);
let b (x) = b n-1 x n-1 +b n-2 x n-2 +...+b 0 Is an output finite field GF (2) n ) Polynomial form of element b (x), b n-1 、b n-2 ...b 0 Are elements of the finite field GF (2), their initial value being 0; b n-1 、b n-2 ...b 0 Left-to-right storage in component B i In, the initial values are all 0;
(3) Component D receives a every clock cycle j According to
x i mod p(x)＝v i0 x 0 +v i1 x 1 +...+v i(n-1) x n-1 A is to j Is sent to b i And calculate b i ＝b i +a j When v is (2j)i =1; p (x) is GF (2) n ) Is of the form p (x) = x n +p n-1 x n-1 +p n-2 x n-2 +...+1，p n-1 、p n- 2 ...p 1 Is limitedElements of the field GF (2);
(4)a n-1 、a n-2 ...a 0 after the input calculation is finished, b n-1 、b n-2 ...b 0 I.e. the squared result.
The finite field GF (2) n ) The serial adder is provided with two input ports and one output port;
the finite field GF (2) n ) Two input ports of the serial adder are used for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of the form:
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of a finite field GF (2) and takes the value of 0 or 1;
the finite field GF (2) n ) The serial adder calculates that the addition is completed in n clock cycles.
The finite field GF (2) n ) The parallel adder is provided with two input ports and one output port;
the finite field GF (2) n ) Two input ports of a parallel adder for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of the form:
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of a finite field GF (2), and takes the value of 0 or 1;
the finite field GF (2) n ) The parallel adder computation addition is completed in two clock cycles.
The finite field GF (2) n ) The inverter is provided with an input port and an output port;
the finite field GF (2) n ) The inverter calculates the inversion to be completed within 2n-2 clock cycles.
Compared with the prior art, the invention has the following advantages and technical effects:
the invention realizes finite field division operation through a cardiac model, and GF ((2) is calculated n ) 2 ) Compared with the existing divider, the divider has obvious speed advantage and can be widely applied to various engineering fields.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (4)
1. A composite finite field divider based on a cardiac model, comprising:
finite field GF (2) n ) Serial adders SADD1, SADD2, and SADD3 for serially calculating GF (2) n ) The addition of (1); the finite field GF (2) n ) Two input ports of the serial adder are used for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of the form:
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of a finite field GF (2), and takes the value of 0 or 1;
finite field GF (2) n ) Parallel adder PADD for parallel computing GF (2) n ) The addition of (1); the finite field GF (2) n ) Two input ports of the parallel adder are used for receiving GF (2) n ) The operands a (x) and GF (2) n ) Of the form：
a(x)＝a n-1 x n-1 +a n-2 x n-2 +...+a 0
b(x)＝b n-1 x n-1 +b n-2 x n-2 +...+b 0
Wherein, a n-1 、a n-2 ...a 0 And b n-1 、b n-2 ...b 0 Is an element of a finite field GF (2), and takes the value of 0 or 1;
finite field GF (2) n ) Multipliers MUL1, MUL2, MUL3, MUL4, MUL5, MUL6 and MUL7 for calculating GF (2) n ) Multiplication of (1);
finite field GF (2) n ) Constant multipliers CMLU 1, CMLU 2 for computing GF (2) n ) Constant multiplication of (2);
finite field GF (2) n ) Squarer EXP for computing GF (2) n ) Square of (d);
finite field GF (2) n ) Inverter INV for computing GF (2) n ) Inversion of (1);
the flow of the division calculation of the composite finite field divider is as follows:
(1) Let the element requiring calculation of division be marked as a h x+a l And b h x+b l E is GF ((2) n ) 2 ) Constant terms of irreducible polynomials;
(2)a h and a l The calculation result is transmitted to MUL1 and is used as the input of CMUT 1 together with e;
(3)b h and b l Sending to SADD1 calculation, calculating result and a l As input to MUL4, the result is calculated together with b h Together as an input to MUL 5;
(4)b h the calculation result is transmitted to the EXP calculation, and the calculation result and e are used as the input of the CMUT 2;
(5)b h and a l Transmitting the result to MUL2 for calculation, and using the calculation result and the result of MUL3 as the input of SADD 2;
(6)a h and b l Transmitting the result to MUL3 for calculation, and using the calculation result and the result of MUL2 as the input of SADD 2;
(7) The calculation results of CMLU 1 and MUL4 are used as the input of SADD 3;
(8) The calculation results of MUL5 and CMUT 2 are used as the input of PADD;
(9) The calculation result of PADD is transmitted to INV calculation, and the calculation result and the result of SADD3 are used as the input of MUL 6; the calculation result is used as the input of MUL7 together with the result of SADD 2;
(10) The result of MUL6 calculation is c l ；
(11) The result of MUL7 calculation is c h ；
(12)c h x+c l The label is the division result.
2. The complex finite field divider of claim 1, wherein the finite field GF (2) n ) The serial adder calculates that the addition is completed in n clock cycles.
3. The complex finite field divider of claim 1, wherein the finite field GF (2) n ) The parallel adder computation addition is completed in two clock cycles.
4. The complex finite field divider of claim 1, wherein the finite field GF (2) n ) The inverter calculates the inversion to be completed within 2n-2 clock cycles.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811497932.6A CN109656513B (en) | 2018-12-07 | 2018-12-07 | Composite finite field division device based on cardiac model |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811497932.6A CN109656513B (en) | 2018-12-07 | 2018-12-07 | Composite finite field division device based on cardiac model |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109656513A CN109656513A (en) | 2019-04-19 |
| CN109656513B true CN109656513B (en) | 2022-11-11 |
Family
ID=66113094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811497932.6A Active CN109656513B (en) | 2018-12-07 | 2018-12-07 | Composite finite field division device based on cardiac model |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109656513B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2369537A1 (en) * | 2001-12-31 | 2003-06-30 | Certicom Corp. | Method and apparatus for performing finite field calculations |
| CN101788900A (en) * | 2009-01-22 | 2010-07-28 | 北京大学 | Method and system for realizing multiplicative inverse and division mold operation on galois field GF (2n) based on DNA self-assembly technology |
| CN107885486A (en) * | 2017-12-04 | 2018-04-06 | 深圳职业技术学院 | A kind of compound finite field inversions device based on search tree |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200834411A (en) * | 2007-02-06 | 2008-08-16 | Univ Nat Chiao Tung | Method of accomplishing finite field divider structure |
-
2018
- 2018-12-07 CN CN201811497932.6A patent/CN109656513B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2369537A1 (en) * | 2001-12-31 | 2003-06-30 | Certicom Corp. | Method and apparatus for performing finite field calculations |
| CN101788900A (en) * | 2009-01-22 | 2010-07-28 | 北京大学 | Method and system for realizing multiplicative inverse and division mold operation on galois field GF (2n) based on DNA self-assembly technology |
| CN107885486A (en) * | 2017-12-04 | 2018-04-06 | 深圳职业技术学院 | A kind of compound finite field inversions device based on search tree |
Non-Patent Citations (1)
| Title |
|---|
| Small FPGA Implementations for Solving Systems of Linear Equations in Finite Fields;Haibo yi;《2015 6th IEEE International Conference on Software Engineering and Service Science(ICSESS 2015)》;20150923;第1-3页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109656513A (en) | 2019-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103427997B (en) | A kind of method generating digital signature and device | |
| CN112506469B (en) | Method and device for processing private data | |
| CN102521211B (en) | Parallel device for solving linear equation set on finite field | |
| KR101027855B1 (en) | Cyclic redundancy code error detection | |
| CN101782845A (en) | High speed arithmetic device and method of elliptic curve code | |
| EP3115887B1 (en) | Method, device and non-transitory computer-readable medium for cryptographic computation | |
| CN102314330B (en) | Composite finite field multiplier | |
| CN103701566A (en) | Check method and check device | |
| Großschädl | A bit-serial unified multiplier architecture for finite fields GF (p) and GF (2 m) | |
| Machhout et al. | Efficient hardware architecture of recursive Karatsuba-Ofman multiplier | |
| Imran et al. | Hardware design and implementation of scalar multiplication in elliptic curve cryptography (ECC) over GF (2163) on FPGA | |
| Kashif et al. | A hardware efficient elliptic curve accelerator for FPGA based cryptographic applications | |
| CN109656513B (en) | Composite finite field division device based on cardiac model | |
| US10057064B2 (en) | Computational method, computational device and computer software product for montgomery domain | |
| CN104506316A (en) | Point multiplication operation method based on SM2 base points | |
| Baktir et al. | Achieving efficient polynomial multiplication in fermat fields using the fast fourier transform | |
| CN115373629A (en) | Digital signal processing apparatus | |
| CN102546160B (en) | For the method for elliptic curve cipher defence differential power attack | |
| Batina et al. | Serial multiplier architectures over GF (2/sup n/) for elliptic curve cryptosystems | |
| Ueno et al. | Formal design of Galois-field arithmetic circuits based on polynomial ring representation | |
| CN100432922C (en) | Method and apparatus to perform squaring operation in finite field | |
| CN109710212A (en) | A kind of compound finite field inversions device based on model aroused in interest | |
| Realpe-Muñoz et al. | Design of elliptic curve cryptoprocessors over GF (2 163) on Koblitz curves | |
| JP4472808B2 (en) | Multiply-accumulate device and encryption / decryption device using the same | |
| Antao et al. | Compact and flexible microcoded elliptic curve processor for reconfigurable devices |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |