CN109632047B

CN109632047B - Radar level gauge with high-frequency amplifier

Info

Publication number: CN109632047B
Application number: CN201811167682.XA
Authority: CN
Inventors: 罗兰·韦勒; 斯特芬·瓦尔德
Original assignee: Vega Grieshaber KG
Current assignee: Vega Grieshaber KG
Priority date: 2017-10-06
Filing date: 2018-10-08
Publication date: 2022-03-08
Anticipated expiration: 2038-10-08
Also published as: HUE050480T2; US11067428B2; CN109632047A; EP3467449A1; EP3467449B1; US20190107424A1

Abstract

The invention relates to a radar level gauge having a plurality of radar chips, wherein a first radar chip provides a high-frequency signal for synchronizing the other radar chips. At least one high-frequency amplifier for amplifying a high-frequency signal is provided in a signal line between the radar chips.

Description

Radar level gauge with high-frequency amplifier

Technical Field

The present invention relates to level gauging and topology sensing of the surface of a filling material in a container. In particular, the present invention relates to radar level gauging devices for level gauging and topology detection of the surface of a filling material in a tank.

Background

Level gauging with radar level gauging devices is today state of the art. In contrast to many other fields, a breakthrough in radar technology in fill level gauging is only achieved after a very small reflected signal can be detected and processed by the electronics of the gauging equipment.

Modern fill level measuring devices and topology measuring devices which are capable of detecting the exact shape of the surface of the filling material are characterized not only by high transmission frequencies, which are typically in the gigahertz range (for example in the range of 75GHz to 85 GHz), but also by amplitude differences in the range of up to 100dB, which can reliably be handled for reflected signals.

For generating and processing high-frequency transmit signals in the range of 79GHz, Monolithic Microwave Integrated Circuits (MMICs) may be provided. The device may have a plurality of transmit and receive channels, also referred to herein as radar channels, to enable scanning of the surface of the filler material.

The more precise the scanning of the surface of the filling material, the more transmit and receive channels are required in order to achieve a high quality image, which is accompanied by correspondingly high hardware costs and energy requirements.

Disclosure of Invention

The object of the present invention is to provide a radar level gauging device for gauging the level of a medium in a tank or the topology of a medium in a tank.

A first aspect of the present invention relates to a radar level gauge apparatus intended to measure a level of a medium in a tank or for detecting a topology of a surface of a filling material in a tank. The radar level gauge device comprises a first radar chip and a second radar chip. The first and second radar chips each have one or more transmission channels for transmitting a respective transmission signal in the direction of the surface of the filling material and one or more reception channels for receiving the transmission signal reflected on the surface of the filling material. One or more of the receive channels can also be designed as a combined transmit-receive channel.

In particular, the radar chip may be an integrated microwave circuit, also referred to as a radar-on-chip system. Such a radar-on-chip system (RSoC) is a highly integrated microwave circuit (MMIC) with digital functional circuit components, which according to an embodiment is capable of integrating the complete functionality (for signal generation, signal processing and transmission of received and reflected signals) of a conventional radar system in a digitized form on a single radar chip.

Each transmit channel may be configured to generate a high frequency transmit signal having a frequency in the gigahertz range (e.g., in the range of 75GHz to 85GHz or higher).

The first radar chip has a first synchronization circuit configured to generate a high frequency signal, wherein the high frequency signal is typically a local oscillator signal of the radar chip. For example, the high frequency signal may be a frequency-divided signal, which thus has a lower frequency than the frequency of the transmission signal transmitted by the radar level gauge. This local oscillator signal forms the main signal of the entire radar chip. For example, the local oscillator signal has a frequency of 40GHz or 20 GHz.

The second radar chip has a second synchronization circuit for the slave function. In addition, a high-frequency line arrangement is provided, which is configured for transmitting the high-frequency signal from the first synchronization circuit to the second synchronization circuit and for accurately synchronizing the two radar chips. The guiding of the conducting path by frequency division of the high-frequency signal can be simplified because of the reduced power losses. It can be provided that the high-frequency signal is subjected to a frequency multiplication again, for example by means of a frequency multiplier arranged in the second synchronization circuit, before it is used for synchronizing the two radar chips.

Furthermore, a high-frequency amplifier (or a plurality of high-frequency amplifiers) is provided, which is arranged in the high-frequency line arrangement and is configured for amplifying high-frequency signals.

Thus, a first radar chip for generating a synchronization signal may be referred to as a master chip, by means of which a second radar chip, referred to as a slave chip, is synchronized.

According to another embodiment of the present invention, as described above, the high-frequency signal is a high-frequency signal divided by an integer factor with respect to the transmission signal.

It can be provided that the amplifier power of the high-frequency amplifier arranged in the high-frequency line arrangement is adjusted depending on the fill level and/or depending on the number of radar chips currently used for fill level measurement, for example.

According to another embodiment of the invention, the high frequency amplifier has a usable frequency range of 20GHz or 40 GHz.

According to another embodiment of the invention, the high frequency amplifier comprises a usable frequency range exceeding 30 GHz.

According to a further embodiment of the invention, an analog-to-digital converter for converting the received signals, which originate from one or more transmission signals reflected on the surface of the filling material, into digitized intermediate-frequency signals is integrated on both the first and/or the second radar chip.

According to another embodiment of the invention, at least two of the transmit channels each have an antenna connected thereto.

According to another embodiment of the present invention, the radar level gauging device is designed as an FMCW radar level gauging device, which uses frequency modulated continuous wave signals for gauging, wherein each gauging cycle comprises a frequency sweep having, for example, a starting frequency of 75GHz and a maximum frequency of 85 GHz.

According to another embodiment of the invention, the first radar chip and the second radar chip are both based on BiCMOS technology. According to another embodiment of the invention, the radar chip is based on silicon germanium (SiGe) technology. According to another embodiment of the invention, the radar technology is based on HF-CMOS technology and thus has a high frequency circuit portion for frequencies of 75GHz and above.

According to a further embodiment of the invention, the fill-level measuring device for detecting the topology of the medium in the tank is designed to be able to scan the filling material surface by digital beam forming.

According to another embodiment of the invention, the high frequency line arrangement is shunted by a high frequency power splitter to achieve accurate synchronization. The high-frequency amplifier can be arranged after the high-frequency power splitter.

It is also possible to provide a plurality of high-frequency amplifiers, wherein one or more of the high-frequency amplifiers are arranged before the power splitter and the other high-frequency amplifiers are arranged after the power splitter.

According to another embodiment of the invention, the high frequency amplifier is a Low Noise Amplifier (LNA) with an independent power supply.

According to another embodiment of the present invention, the radar level gauge has a signal processor configured for shutting down the low noise amplifier when transmission of the radar level gauge is discontinued, and upon discontinuation of the transmission, signal processing and calculation of the level or surface topology of the medium in the tank is performed by the signal processor. Energy can thereby be saved. The tasks of the signal processor can likewise be assumed by a processing system integrated in the FPGA.

According to another embodiment of the invention, it is ensured that each high frequency amplifier operates only in its linear region. For this purpose, optionally, a plurality of high-frequency amplifiers are provided in the high-frequency line arrangement.

According to another embodiment of the present invention, a high frequency line arrangement has a first conductive path on a circuit board, a second conductive path on the circuit board, and a waveguide arranged between the first conductive path and the second conductive path, the waveguide passing a high frequency signal from the first conductive path to the second conductive path. Thereby enabling a reduction in signal attenuation.

Embodiments of the present invention will be described hereinafter with reference to the drawings. If the same reference numbers are used in the following description of the drawings, they describe the same or similar elements. The schematic drawings in the figures are schematic and not to scale.

Drawings

FIG. 1A shows a radar level gauging apparatus mounted in a tank to detect the topology of the surface of a filling material in the tank.

FIG. 1B shows another radar level gauge apparatus.

FIG. 1C shows another radar level gauge.

FIG. 2 shows an array antenna of the radar level gauge.

FIG. 3 shows a configuration of a radar level gauge having a radar chip.

FIG. 4A shows a configuration of another radar level gauging device with two radar chips.

FIG. 4B shows a configuration of another radar level gauging apparatus.

FIG. 5 shows a configuration of another radar level gauging apparatus.

FIG. 6 shows a configuration of another radar level gauging apparatus.

FIG. 7 shows a configuration of another radar level gauging apparatus.

Fig. 8 shows a circuit board layer structure.

FIG. 9A shows a via arrangement of a radar level gauge.

Fig. 9B shows a metallization element of the via arrangement of fig. 9A.

Fig. 10A shows a part of the high-frequency wiring arrangement structure.

Fig. 10B shows a part of another high-frequency wiring arrangement.

Fig. 10C shows a part of another high-frequency line arrangement structure.

Fig. 11 shows another high-frequency line arrangement.

Fig. 12 shows another high-frequency line arrangement.

Fig. 13A shows a top view of a circuit board of another high-frequency wiring arrangement.

Fig. 13B shows the underside of the circuit board of the wiring arrangement of fig. 13A.

Detailed Description

The advantage of the multi-channel radar chip 301 is that it is capable of beamforming (strahlforming). The term radar chip may be understood as a highly integrated radar chip with a plurality of transmit and receive channels. In this case, one may also mention a radar system on chip (RSoC).

Such an RSoC 301 is used in fill level gauging. A level gauge 101 for detecting the topology of the surface of the filling material may be provided, the level gauge 101 scanning the surface of the bulk material, thereby obtaining more information about the actual level and volume of the bulk material as can be obtained by conventional level gauges.

For this reason, a small opening angle is required even at a long distance, which is accompanied by a large antenna aperture.

One way to achieve this is to mechanically pivot the single-channel radar 101 (fig. 1A) to scan the surface 103 of the filling material 108 in the container 104. Another possibility is a part of the mechanical system (fig. 1B). At this time, a combination of analog or digital beamforming is combined with mechanical pivoting.

These systems have drawbacks in terms of robustness. Mechanical components require maintenance and are costly to manufacture under harsh processing conditions. Therefore, there is a possibility of performing completely electronic beam forming (fig. 1C).

To achieve an antenna aperture comparable in size to these beamforming radar systems, a large number of transmitters and receivers should be provided. A disadvantage of fully electronic beam forming is that many antennas with a relatively small single aperture must be used. Furthermore, the transmitter and receiver, each of which is typically provided with one

antenna element

144, 303, must be arranged in two dimensions (x-direction and y-direction) (fig. 2, 3).

Therefore, level gauging techniques for detecting topology typically require more transmitters and receivers than the above-mentioned applications, which results in a chip count of more than 4.

Radar level gauging devices for detecting the topology of the surface of a filling material typically have a plurality of transmitting and receiving antennas. These systems are also referred to as multiple-input multiple-output (MIMO) systems. By means of a corresponding digital beam forming method, the directional characteristics of the transmit and receive array antennas can be influenced digitally on both the transmit side and the receive side, so that a scanning of the surface of the filling material can be achieved.

Up to now, these level gauging apparatuses use high frequency devices such as mixers, low noise amplifiers, couplers, frequency multipliers, voltage controlled oscillators, etc. as well as discrete analog to digital converters, phase locked loops, voltage regulators, filters, amplifiers and other low frequency components for each transmit and receive channel. This feature makes MIMO systems costly, large in size, and expensive.

For a highly integrated radar chip 301 (see fig. 3), many of the above-described components have been fully integrated on chip 301. The already integrated components include: PLL, VCO, mixer, ADC, filter, control unit, SPI interface, amplifier, switch, voltage regulator. Thereby, a large amount of space can be saved on the circuit board. Another advantage of these chips 301 in terms of cost is that they are less expensive than discrete constructions having a plurality of different individual components.

For example, MIMO chip 301 has three transmitter stages (Senderstufe)307 and four receiver stages each including antenna 303

308. For example, a feasible transmission frequency range may be a range between 55 and 65GHz or even between 75 and 85 GHz.

Capable of being accessed via a digital interface (SPI, I) (with associated bus 305)²C, etc.) parameterize the radar chip 301. Various parameters can be set or read out to adjust the modulation type, frequency bandwidth, frequency range, scanning frequency, IF filter characteristics (intermediate frequency signal), and the like. IF necessary, typically, an analog IF signal containing information about the distance and angle of an object in the surveillance areaAnd is also digitized on the radar chip 301 for further signal processing.

The radar method according to which these radar chips 301 are generally operated is a special frequency modulated continuous wave (fmcw) method. However, during the measurement, not only one frequency ramp (freqenzramp) but also a plurality of frequency ramps with a fixed time reference relative to one another are modulated in succession. For example, the number of possible ramps is 128 for each measurement. These 128 ramps are collectively referred to as a Frame (Frame).

By means of a clever signal processing algorithm, not only the distances of a plurality of objects but also their speeds can be determined. The ramp duration is short relative to the conventional FMCW method and is typically in the range between 10 and 500 mus for each ramp. Because the HF bandwidth of the transmitted signal is between a few hundred megahertz and four gigahertz (or more), the intermediate frequency signal must be digitized at a high scan rate.

For analog-to-digital conversion, the combination of high HF bandwidth and short ramp duration results in a high scan rate.

The interface for digitizing the output signal is typically a fast serial differential digital interface 304 such as LVDS or CSI 2. In the example of a radar chip 301 with four receive channels, the radar chip 301 has four LVDS interfaces or CSI2 interfaces on the digital interface side for transmitting digitized intermediate frequency signals. In addition, these digital interfaces use additional differential clock signals that are used to synchronize the interface at the receiver of the digitized data. Depending on the interface, additional signal lines are required to identify the start and/or end of a data packet.

These chips 301 provide the possibility of cascading, with the radar chips 301 still providing too few transmit and receive channels for the desired application. This means that a plurality of chips are grouped together to form a synchronized radar unit. Thus, although the transmitter and the receiver are physically located on different rsocs, it is also possible to have the transmitter transmit simultaneously with a synchronization signal and/or have the receiver receive synchronously. However, such an implementation requires that all transmitters and/or receivers be precisely synchronized. In particular, precise synchronization even means that all transmitters and/or receivers must oscillate phase-synchronously, and only very small deviations can be tolerated in this case. Since the radar chip supports very high frequencies, the paths taken by the high-frequency signals between the transmitting master chip and the receiving slave chip must also be identical to a high degree of accuracy, i.e. in particular have the same length and the same attenuation properties.

This can be achieved by: in addition to the various clock synchronization lines, the high-frequency signal on the high-frequency line 401 may also be distributed from one chip (master chip) to the other individual chips (slave chips). The high-frequency signal refers to a local oscillator signal (LO signal), and is a signal divided by an integer factor from a frequency range (here, for a transmission frequency range). The division factor (teierfaktoren) may be 2 or 4, but may also be other integer division factors. If the radar chip has a transmission frequency range of approximately 80GHz, for example, the LO signal may have a frequency range of approximately 20GHz or 40 GHz.

The radar chip that supplies the high frequency signal is referred to as a main chip 301 a. The chip receiving the high frequency signal is referred to as a slave chip 301 b.

For example, a cascaded radar system comprising four radar chips (fig. 5) each having four receive channels has sixteen digital interfaces for transmitting the relevant intermediate frequency signals (measurement data).

Some radar chips typically use a specially tailored signal processor to process these digital measurement data, but they have a very limited number of digital interfaces. Some units for digital signal processing are integrated on the radar chip itself, but this has only limited use or cannot be used at all for the cascade of radar chips and in the case of radar-based fill level measurement for determining the topology.

Therefore, to overcome this problem, it is suggested to use an FPGA device (field programmable gate array 310) instead of a specially-customized signal processor (fig. 3, 4A, 4B, and 5). Such commonly available devices are available from a number of manufacturers with a wide variety of designs. The FPGA receives digitized values of the intermediate frequency signal and performs arithmetic operations such as averaging, windowing or FFT (fast fourier transform) calculations.

The combination of a radar chip and an FPGA has the advantage that more than eight radar chips can be combined flexibly, which is not possible, for example, for a specially tailored signal processor used in the automotive industry. This technique is advantageous for level gauging techniques due to the cascading of such a large number of radar chips.

If a larger number of radar chips are required, it is possible to use a plurality of FPGAs identically and then synchronize them identically with one another.

Advantageously, the FPGA comprises, in addition to the programmable logic unit, an integrated Processor System (PS) which can undertake control tasks such as parameterization of the radar chip, energy management, display control or communication with a computer or process control unit via a network. Also, the processor system can inform the start of the measurement via the digit line 306.

In addition, the processor system can undertake signal processing tasks such as echo searching, interference echo suppression, etc., which are known in other fill level radar measuring devices.

Depending on the type of radar chip and FPGA, the level of the digital interface needs to be adjusted. For this purpose, specially tailored resistor networks or tuning chips can be used.

Another embodiment that may be advantageously used includes the use of one or more amplifiers with an integrated shunt for the low frequency signal from the main chip, where the low frequency signal is used to signal the start of the measurement. The master chip sends out the signal and distributes it to all slave chips. In this case, it is important that the lines have substantially the same length so that there is no time offset in the respective radar chips.

Because a larger number of radar chips can be cascaded in this manner, the output stage of the LO signal may not provide sufficient output power to drive all of the radar chips. The problem with the distribution of the LO signal on the high frequency line 401 is that the high frequency line has a non-negligible path attenuation. Since the radar chips 301 on the circuit board 904 are typically spatially separated from each other by a few centimeters (order of magnitude: 5-10cm), the high-frequency lines for carrying the LO signals must be at least as long. Conventional microstrip lines on standard high frequency substrates may have an attenuation of 0.5 to 2 dB/cm. This depends mainly on the substrate and the frequency. On the other hand, the waveguide may be constructed to have much lower path attenuation. For this reason, it makes sense that after the LO signal is decoupled on the circuit board 904 by means of microstrip lines, the signal is coupled into a waveguide to reduce the losses on the path to the adjacent chip (schematically shown in fig. 11 and 12).

Another possibility is to amplify the HF power of the LO signal on the high frequency line 401 by using one or more external high frequency amplifiers 601 (fig. 6 and 7). Advantageously, such an amplifier has a low noise figure (Rauschzahl) because this figure directly affects the system performance. Therefore, Low Noise Amplifiers (LNA, English) are proposed for this purpose. These LNAs are active devices with separate power supplies. Advantageously, these LNAs are deactivated between radar frames and/or when transmission is suspended, to save energy and avoid overheating of the device.

Furthermore, it has to be noted that the LNA operates in its linear range, which means that the input power of the high frequency signal is not too large. If too large, signal distortion may occur. Due to this technique, the conventional output power of the semiconductor device at 80GHz is between 8dBm and 15dBm, and there is no significant signal distortion.

If 15dBm of power is supplied to the high frequency amplifier 601 with 20dB of gain, an output power of 35dBm is obtained. However, since the high-frequency amplifier 601 no longer operates in its linear range, undesirable signal distortions occur. Therefore, the LO signal should first be set in the power range to enable the high frequency amplifier 601 to operate in its linear range.

It is possible to parameterize the LO output powers of the radar chip 301 and thus attenuate them. Likewise, long high frequency lines can also attenuate the output power.

For example, a high frequency amplifier may be used after the LO signal is divided and powered down by a high frequency power divider. As this is the case, a plurality of slave chips 301b are used, or depending on the radar chip 301, the LO signal must be returned again into the master chip 301 a.

Then, as shown in fig. 7, a plurality of amplifiers may be used. Since the amplifier also has a limited signal propagation time, the amplifier is advantageously arranged so as to set substantially the same signal propagation time on all lines.

Since the LO signal is a high-frequency signal, a waveguide, a microstrip line 903, and/or a SIW (substrate integrated waveguide) line 1002 (fig. 10A to 10C) are advantageously used. Likewise, power splitters 501 (e.g., Wilkinson dividers) and/or couplers 501 (e.g., ring-type (Rat-Race) couplers) may be advantageously used to shunt lines.

Advantageously, as shown in fig. 5-7 and also fig. 13A and 13B, the radar chips may be arranged on one side of the circuit board 904, and then the splitting and distribution of the LO signal is performed on the other side of the circuit board 904. The reason for this will be explained below.

Radar chips typically have nine or ten signal inputs and signal outputs with a frequency range in the two-bit gigahertz range. In cascading radar chips, the LO signal must be routed from one chip to the next, in addition to the lines to the transmit and receive antennas. Due to these large number of signal lines, signal crossovers are usually unavoidable.

However, because signal lines cannot cross over the circuit board 904, signals are typically routed through vias to other internal circuit board levels (inner layers) 803, 807, where they propagate side-by-side. Fig. 8 illustrates a conventional circuit board layer structure in which a plurality of substrates are bonded together with

adhesive layers

804, 806. However, in most cases, the inner layers of the circuit board 904 are

standard substrate materials

804, 805, 806 and are not suitable for high frequency signals. In fact, for cost and stability reasons, only one or both of the outermost circuit layers 802, 808 of the circuit board 904 are constructed of a special substrate material (e.g., Rogers RO3003) optimized for high frequency technology. The high-frequency substrates are generally soft and are generally designed to be very thin at high frequencies, for example as shown in fig. 8 at 127 μm. The

outer layers

801, 809 are metallization layers.

For these reasons, it is proposed to guide the LO signal from the chip-side circuit board level to the rear side with a special line arrangement and via arrangement in order to shunt it there, amplify it and distribute it if necessary and present it again at the chip-side circuit board level. Fig. 9A and 9B show this particular line layout and via layout (fig. 9B shows the lines and vias and the copper surface in the absence of substrate material). In this case, additional secondary vias 902 are arranged at a constant radius around the primary via 901 and thus form a kind of coaxial printed circuit board lead. The diameter and distance from the main via determine the impedance of the lead, and must match the frequency range used, such as 40 GHz.

Another alternative possibility to route the LO signal without line crossings is to couple the signal into a waveguide or coaxial cable and to configure the waveguide or coaxial cable such that the lines run alongside each other. For example, to couple a signal into a waveguide, a transition 1101 from a microstrip line to a waveguide may be used.

Another useful line type is Substrate Integrated Waveguide (SIW) (fig. 10A). This type of line is advantageous, for example, when the waveguide 1001 is located directly on the printed circuit board/circuit board 904, where the LO/HF signal has to be routed through the waveguide by means of a microstrip line. Since the waveguide is generally made of metal, it short-circuits the microstrip line, thereby disabling signal transmission. This aspect of the SIW is advantageous because it has a pure metal surface on the upper side of the circuit board and it does not matter whether the waveguide is located above it (see fig. 10C). Fig. 10B shows the transition from microstrip line technology to SIW.

The signal must then be coupled into the microstrip line again on the circuit board (904) in order to be able to route it into the radar chip.

Radar level gauging devices are characterized by robust antenna arrangements that are still operable under harsh processing conditions, such as high and low pressure, high and low temperature, contamination, dust, humidity, mist, etc. In addition, antennas must also protect the electronics from the above mentioned effects, and also be constructed such that they must also meet safety critical aspects such as explosion protection.

Therefore, these features should also be present in many radar level gauging devices for measuring topologies. Unlike radar devices, which are not very demanding for use in other respects, waveguides and horn transmitters are often used in process measurement technology.

In a beamforming system, it is advantageous if one or more of the antenna elements have a spacing less than or equal to λ/2, where λ represents the wavelength of the transmitted signal. For this case a special waveguide coupling device 302 may be used to couple the signal from the printed circuit board into the (horn) antenna 303.

Another challenge of radar level gauging devices for gauging topology with cascaded radar chips is that the above-mentioned antennas can only be arranged in a certain pattern. An advantageous pattern is a T-or L-shaped arrangement of antenna elements. In order to avoid large line lengths in the case of high-frequency signals, it is proposed to arrange the radar chip on the upper side or on the lower side of the circuit board, so that the line length from the radar chip to the waveguide coupling device is substantially the same for all HF signals.

The core concept of the present invention is to provide a radar level gauge 101 detecting the topology of a filling material surface, the radar level gauge 101 comprising or having at least one integrated radar chip 301, wherein the radar chips 301 are synchronized with each other by means of high frequency signals (local oscillator signals) generated by a synchronization circuit 402 of the radar chip 301a and supplied on a high frequency line 401 to a synchronization circuit 403 of a second radar chip 301b, and wherein one or more high frequency amplifiers 601 amplify the local oscillator signals of the radar chip 301 a.

In addition, it should be understood that the terms "comprising" and "having" do not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. Furthermore, it should be understood that features or steps which have been described with reference to the above embodiments can also be used in combination with other features or steps of other embodiments described above. Reference signs in the claims shall not be construed as limiting.

Reference to related applications

The present invention claims priority from european patent application 17195231.0 filed on 6.10.2017, the entire contents of which are incorporated herein by reference.

Claims

1. A radar level gauge apparatus (101) for level gauging or for detecting the topology of the surface of a filling material in a tank, comprising:

a first radar chip (301a) and a second radar chip (301b), wherein the first radar chip comprises a first synchronization circuit (402) configured for generating a high frequency signal, wherein the second radar chip comprises a second synchronization circuit (403);

a high frequency line arrangement (401) configured to transmit the high frequency signal from the first synchronization circuit to the second synchronization circuit to synchronize the first radar chip and the second radar chip;

a high frequency amplifier (601) arranged in the high frequency line arrangement and configured to amplify the high frequency signal.

2. The radar level gauging apparatus (101) according to claim 1, wherein said high frequency signal is a high frequency signal divided by an integer factor for a transmission signal.

3. The radar level gauging apparatus (101) according to claim 1 or 2, wherein said high frequency amplifier (601) comprises a usable frequency range exceeding 30 GHz.

4. The radar level gauging apparatus (101) according to claim 1 or 2, wherein a first analog-to-digital converter is integrated on said first radar chip (301a) and a second analog-to-digital converter is integrated on said second radar chip (301 b).

5. The radar level gauge apparatus (101) according to claim 1 or 2, wherein said high frequency line arrangement (401) is shunted by a high frequency power divider (501) and said high frequency amplifier (601) is arranged after said high frequency power divider.

6. The radar level gauging apparatus (101) according to claim 1 or 2, wherein said high frequency amplifier (601) is a low noise amplifier with an independent power supply.

7. The radar level gauge apparatus (101) according to claim 1 or 2, further comprising:

an FPGA (310) configured for shutting down the high frequency amplifier (601) when transmission of the radar level gauge is discontinued, signal processing and calculation of a level or surface topology of the filling material in the tank being performed by the FPGA when the transmission is discontinued.

8. The radar level gauge apparatus (101) according to claim 1 or 2, wherein said high frequency line arrangement (401) comprises a plurality of low noise high frequency amplifiers (601) with independent power supplies.

9. The radar level gauge device (101) according to claim 1 or 2,

wherein the high-frequency line arrangement (401) comprises a first conductive path (903) on a circuit board (904), a second conductive path (903) on the circuit board, and a waveguide (1001) arranged between the first conductive path and the second conductive path.

10. The radar level gauge arrangement (101) according to claim 1 or 2, adapted to detect a topology of said filling material in said tank.

11. The radar level gauging apparatus (101) according to claim 1 or 2, wherein said first radar chip (301a) and said second radar chip (301b) each have one or more transmit channels (307) for transmitting respective transmit signals and one or more receive channels (308) for receiving respective said transmit signals reflected on a surface of said filling material.

12. The radar level gauge (101) according to claim 1 or 2, wherein said level gauge (101) is designed as an FMCW level gauge.