CN109618186B - H264/AVC video auxiliary enhancement information packaging circuit realized by adopting FPGA - Google Patents
H264/AVC video auxiliary enhancement information packaging circuit realized by adopting FPGA Download PDFInfo
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- 238000000034 method Methods 0.000 claims abstract description 11
- 238000005429 filling process Methods 0.000 claims description 3
- 230000006870 function Effects 0.000 claims description 3
- 239000007787 solid Substances 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 abstract description 7
- 239000007784 solid electrolyte Substances 0.000 abstract description 2
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 238000005538 encapsulation Methods 0.000 description 12
- 230000006835 compression Effects 0.000 description 5
- 238000007906 compression Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
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- H—ELECTRICITY
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- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/234—Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs
- H04N21/2343—Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs involving reformatting operations of video signals for distribution or compliance with end-user requests or end-user device requirements
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
- H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
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Abstract
The invention provides an H.264/AVC video auxiliary enhancement information packaging circuit realized by adopting an FPGA (field programmable gate array), which comprises a video analysis unit, an SEI (solid electrolyte interface) generation unit, a video filling unit and a video output unit, wherein the video analysis unit analyzes an H.264 video code stream, identifies the start and the end of a frame in the H.264 code stream and identifies the frame type, the SEI generation unit receives user-defined information, generates auxiliary enhancement information and sends the auxiliary enhancement information to the video output unit, the video filling unit fills each frame in the video code stream to be integral multiple of the video frame alignment length according to the video frame alignment length required by a user and sends the auxiliary enhancement information to the video output unit, and the video output unit realizes time-sharing output; the method can ensure that each frame of data can be sent out in time in the subsequent video transmission link, and the video frame data residue caused by the limitation of single transmission length can be avoided, thereby being beneficial to reducing the video transmission delay.
Description
Technical Field
The invention relates to the technical field of airborne video compression, in particular to a video auxiliary enhancement information packaging circuit.
Background
H.264/AVC (hereinafter referred to as H.264) is one of video coding and decoding technical standards proposed by the international organization for standardization and the international telecommunication union, and has high compression ratio, low code rate and high compressed video quality. Supplemental Enhancement Information (SEI) is part of the h.264 standard and is used to assist in handling video decoding and display links, etc.
With the rapid development of video coding technology and FPGA technology, more and more H.264 video coding is realized by adopting FPGA, and the performance and the flexibility are very high.
SEI is a concept in the structure of video code stream, provides a method for adding auxiliary information into video code stream, and is one of the characteristics of h.264 video compression standard. SEI is integrated in a video bitstream, which helps the video decoding process (fault tolerance, error correction, etc.), but is not an essential item of the video decoding process. The SEI nature means that the video encoder may not provide SEI information when outputting a video stream.
In the field of h.264 video compression at present, many h.264 encoders do not generate SEI, or generate SEI by a software method, and then insert the SEI into a video code stream. The SEI encapsulation circuit realized by adopting the FPGA realizes H.264 video code stream analysis, SEI generation and encapsulation by the FPGA, and has the characteristics of rapidness, flexibility and strong universality compared with a method for generating the SEI by software.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides the H.264 video auxiliary enhancement information packaging circuit which is fast, flexible and strong in universality.
The technical scheme adopted by the invention for solving the technical problems is as follows:
the H.264/AVC video auxiliary enhancement information encapsulation circuit realized by adopting the FPGA comprises a video analysis unit, an SEI generation unit, a video filling unit and a video output unit.
The video analysis unit has the functions of analyzing the H.264 video code stream, identifying the start and the end of a frame in the H.264 code stream, identifying the frame type, wherein the frame type is an I frame and a P frame, and counting the actual length of the video frame; sending a video original code stream to a video output Unit while analyzing a video code stream, and sending a video analysis result including a frame start signal, a frame end signal, an I frame type signal and a frame length to an SEI generation Unit, a video filling Unit and a video output Unit, wherein according to the definition of a code stream structure in the H.264 standard, a basic Unit of the H.264 code stream is a Network Abstraction Layer Unit (NALU), the NALU includes a NALU start code, a NALU type and NALU load data, wherein the NALU start code is 0x00000001, the NALU type is a byte after the start code, the NALU type has 8 bits, the 1 bit is a forbidden bit, the 1 bit is always 0, the 1 bit indicates a code stream error, the 2 th to 3 bits are reference levels, the 4 th to 8 th bits are the NALU Unit type, video frames in the H.264 code stream are divided by an Access Unit Delimiter (AUD), and the AUD is a type, the NALU unit type is 0x09, the video analysis unit receives the video code stream, searches for the NALU start code, then judges whether the NALU is AUD according to the NALU type, namely, the start and the end of a frame can be identified, the NALU type represents whether the NALU is I frame data, the NALU unit type is 0x5, which indicates that the NALU is I frame data, the video analysis unit receives the original video code stream, searches for the NALU start code, and then identifies whether the NALU is I frame according to the NALU type.
The SEI generation unit is used for receiving user-defined information, generating auxiliary enhancement information conforming to the H.264 video standard and sending the auxiliary enhancement information to the video output unit, wherein the SEI is a NALU, the type of the NALU unit is 0x06, and the load length is defined by a user; after receiving a frame start signal of a video parsing unit, an SEI generation unit starts to generate SEI of the frame, wherein the SEI comprises a start code of 0x00000001, an NALU unit type of 0x06, SEI load length, an I frame mark, user-defined information and an end code of 0x80, the SEI load length comprises unit bytes, the start code, the NALU unit type and the end code length are subtracted from the SEI total length of the frame, and the user-defined information comprises time, frame length and a special frame mark;
the video filling unit fills each frame in the H.264 video code stream to integral multiple of the video frame alignment length according to the video frame alignment length required by a user and sends the video frame alignment length to the video output unit, after the video filling unit receives a frame end signal sent by the video analysis unit, the video filling unit calculates the data length required to be filled according to the video frame alignment length, SEI length and current video frame length required by the user, if the user requires alignment according to A bytes, the SEI length is B bytes, the current video frame length is C bytes, the filling length D is A- (B + C)% A, wherein%, the% represents the remainder, and the filling data is output to the video output unit according to the filling length D.
The video output unit realizes the time-sharing output of the auxiliary enhancement information, the original video code stream and the filling content, starts to output data after receiving the frame starting signal, firstly receives and outputs the SEI of the current frame, then receives and outputs the data of the current frame, and receives and outputs the filling data after receiving the frame ending signal.
The SEI packaging original video Code stream comprises AUD, SPS (Sequence Parameter Set), PPS (Picture Parameter Set) and CU (Code block), wherein the SPS and the PPS are only I frames;
when SEI is packaged, adding SEI before each AUD of a video frame; and a video filling process, wherein data filling is carried out after a CU, data filling is carried out according to the alignment length defined by a user, and the structure of a finally output video code stream is [ Fn _ block0, Fn _ block1, … Fn _ block (m-1), Fn _ block M with Padding _ data ], wherein the Fn _ block (m-1) represents the (m-1) th block of the nth frame video, the length of each block is the alignment length, the Fn _ block M with Padding _ data represents the last block of the nth frame, and the last block contains filling data.
The invention has the advantages that the H.264 video auxiliary enhancement information encapsulation circuit realized by adopting the FPGA provides an effective solution for H.264 video auxiliary enhancement information encapsulation, and has the following advantages:
1) the method has the advantages that the FPGA is adopted to realize SEI encapsulation and data filling, and compared with a software implementation method, the method is high in speed, good in stability and high in reliability;
2) by adopting the SEI encapsulation circuit, video frames are aligned according to the length required by a user, so that each frame of data in a subsequent video transmission link can be sent out in time, video frame data residue caused by the limitation of single transmission length can be avoided, and the video transmission delay can be reduced;
3) in the SEI packaging circuit, both SEI content and filling length can be defined by users, and the flexibility is strong:
4) the SEI packaging circuit is realized by adopting a general verilog HDL language, is easy to transplant among different FPGAs and has strong universality.
Drawings
Fig. 1 is a schematic diagram of a h.264 video auxiliary enhancement information packaging circuit according to the present invention.
Fig. 2 shows video frame structures before and after SEI encapsulation according to the present invention.
Fig. 3 is a flow chart of SEI encapsulation and video filling states according to the present invention.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
The h.264 video auxiliary enhancement information packaging circuit comprises a video parsing unit, an SEI generating unit, a video filling unit and a video output unit, as shown in fig. 1.
The video analysis unit has the functions of analyzing the H.264 video code stream, identifying the start and the end of a frame in the H.264 code stream, identifying the frame type, wherein the frame type is an I frame and a P frame, and counting the actual length of the video frame; sending a video original code stream to a video output Unit while analyzing a video code stream, and sending a video analysis result including a frame start signal, a frame end signal, an I frame type signal and a frame length to an SEI generation Unit, a video filling Unit and a video output Unit, wherein according to the definition of a code stream structure in the H.264 standard, a basic Unit of the H.264 code stream is a Network Abstraction Layer Unit (NALU), the NALU includes a NALU start code, a NALU type and NALU load data, wherein the NALU start code is 0x00000001, the NALU type is a byte after the start code, the NALU type has 8 bits, the 1 bit is a forbidden bit, the 1 bit is always 0, the 1 bit indicates a code stream error, the 2 th to 3 bits are reference levels, the 4 th to 8 th bits are the NALU Unit type, video frames in the H.264 code stream are divided by an Access Unit Delimiter (AUD), and the AUD is a type, the NALU unit type is 0x09, the video analysis unit receives the video code stream, searches for the NALU start code, then judges whether the NALU is AUD according to the NALU type, namely, the start and the end of a frame can be identified, the NALU type represents whether the NALU is I frame data, the NALU unit type is 0x5, which indicates that the NALU is I frame data, the video analysis unit receives the original video code stream, searches for the NALU start code, and then identifies whether the NALU is I frame according to the NALU type.
The SEI generation unit is used for receiving user-defined information, generating auxiliary enhancement information conforming to the H.264 video standard and sending the auxiliary enhancement information to the video output unit, wherein the SEI is a NALU, the type of the NALU unit is 0x06, and the load length is defined by a user; after receiving a frame start signal of a video parsing unit, an SEI generation unit starts to generate SEI of the frame, wherein the SEI comprises a start code of 0x00000001, an NALU unit type of 0x06, SEI load length, an I frame mark, user-defined information and an end code of 0x80, the SEI load length comprises unit bytes, the start code, the NALU unit type and the end code length are subtracted from the SEI total length of the frame, and the user-defined information comprises time, frame length and a special frame mark;
the video filling unit fills each frame in the H.264 video code stream to integral multiple of the video frame alignment length according to the video frame alignment length required by a user and sends the video frame alignment length to the video output unit, after the video filling unit receives a frame end signal sent by the video analysis unit, the video filling unit calculates the data length required to be filled according to the video frame alignment length, SEI length and current video frame length required by the user, if the user requires alignment according to A bytes, the SEI length is B bytes, the current video frame length is C bytes, the filling length D is A- (B + C)% A, wherein%, the% represents the remainder, and the filling data is output to the video output unit according to the filling length D.
The video output unit realizes the time-sharing output of the auxiliary enhancement information, the original video code stream and the filling content, starts to output data after receiving the frame starting signal, firstly receives and outputs the SEI of the current frame, then receives and outputs the data of the current frame, and receives and outputs the filling data after receiving the frame ending signal.
The structure of the video frames before and after SEI encapsulation is shown in fig. 2, where an original video Code stream includes an AUD, an SPS (Sequence Parameter Set), a PPS (Picture Parameter Set), and a CU (Code block), where the SPS and the PPS are only I frames;
when SEI is packaged, adding SEI before each AUD of a video frame; the video filling process comprises the steps of carrying out data filling after a CU, carrying out data filling according to the alignment length defined by a user, and finally outputting a video code stream structure as shown in the rightmost side of a graph 2, namely [ Fn _ block0, Fn _ block1, … Fn _ block (m-1), Fn _ block M with Padding _ data ], wherein the Fn _ block (m-1) represents the (m-1) th block of an nth frame video, the length of each block is the alignment length, the Fn _ block M with Padding _ data represents the last block of the nth frame, and the last block contains filling data.
The invention designs an H.264 video auxiliary enhancement information encapsulation circuit realized in an FPGA (field programmable gate array). As shown in figure 1, after H.264 coding IP in the FPGA finishes video compression, the H.264 video code stream is analyzed, SEI (solid electrolyte interphase) information is added, and the video is filled into integral multiples of the alignment length required by a user. The whole SEI encapsulation link does not need software participation in the traditional implementation mode any more, is favorable for reducing the transmission delay of video code streams, and provides help for video decoding and display of a video receiving end.
The h.264 video auxiliary enhancement information packaging process is shown in fig. 3, and the specific process is as follows.
1. The video analysis unit receives and analyzes an H.264 original video code stream, identifies the START of a FRAME in a video and sends a FRAME _ START (FRAME START) signal to the SEI generation unit;
2. after receiving the FRAME _ START signal, the SEI generation unit generates auxiliary enhancement information conforming to the AVC standard according to the user-defined information and sends the auxiliary enhancement information to the video output unit; after the auxiliary enhancement information is sent, an SEI _ DONE (SEI sending completion) signal is generated and sent to a video analysis unit;
3. after receiving the SEI _ DONE signal, the video analysis unit sends an original video code stream to the video output unit, and sends a FRAME _ DONE (FRAME end) signal to the video filling unit after identifying that the video FRAME is ended;
4. the video filling unit calculates the length of data to be filled when the video analysis unit and the SEI generation unit send data according to the video FRAME alignment length required by a user, and sends filling content to the selector after receiving a FRAME _ DONE signal; and after the filling content is sent, sending a PADDING _ DONE (filling completion) signal to the video analysis unit.
5. The video output unit is responsible for sending out the auxiliary enhancement information, the original video information and the filling content.
Claims (2)
1. A H.264/AVC video auxiliary enhancement information packaging circuit realized by adopting FPGA is characterized in that:
the H.264 video auxiliary enhancement information packaging circuit comprises a video analysis unit, an SEI generation unit, a video filling unit and a video output unit;
the method comprises the steps that after an SEI (solid information interface) generating unit receives user-defined information, auxiliary enhancement information is sent to a video output unit, an H.264 video code stream is analyzed in a video analyzing unit, a video analyzing result is sent to the SEI generating unit, a video filling unit and a video output unit, the video filling unit fills each frame in the H.264 video code stream to be integral multiple of the video frame alignment length according to the video frame alignment length required by a user and sends the video frame alignment length to the video output unit, and the video output unit realizes time-sharing output of the auxiliary enhancement information, an original video code stream and filling content;
the video analysis unit has the functions of analyzing the H.264 video code stream, identifying the start and the end of a frame in the H.264 code stream, identifying the frame type, wherein the frame type is an I frame and a P frame, and counting the actual length of the video frame; sending a video original code stream to a video output Unit while analyzing a video code stream, and sending a video analysis result including a frame start signal, a frame end signal, an I frame type signal and a frame length to an SEI generation Unit, a video filling Unit and a video output Unit, wherein according to the definition of a code stream structure in the H.264 standard, a basic Unit of the H.264 code stream is a Network Abstraction Layer Unit (NALU), the NALU includes a NALU start code, a NALU type and NALU load data, wherein the NALU start code is 0x00000001, the NALU type is a byte after the start code, the NALU type has 8 bits, the 1 bit is a forbidden bit, the 1 bit is always 0, the 1 bit indicates a code stream error, the 2 th to 3 bits are reference levels, the 4 th to 8 th bits are the NALU Unit type, video frames in the H.264 code stream are divided by an Access Unit Delimiter (AUD), and the AUD is a type, the NALU unit type is 0x09, the video analysis unit receives the video code stream, searches for the NALU start code, then judges whether the NALU is AUD according to the NALU type, namely, the start and the end of a frame can be identified, the NALU type represents whether the NALU is I frame data, the NALU unit type is 0x5, which indicates that the NALU is I frame data, the video analysis unit receives the original video code stream, searches for the NALU start code, and then identifies whether the NALU is I frame according to the NALU type;
the SEI generation unit is used for receiving user-defined information, generating auxiliary enhancement information conforming to the H.264 video standard and sending the auxiliary enhancement information to the video output unit, wherein the SEI is a NALU, the type of the NALU unit is 0x06, and the load length is defined by a user; after receiving a frame start signal of a video parsing unit, an SEI generation unit starts to generate SEI of the frame, wherein the SEI comprises a start code of 0x00000001, an NALU unit type of 0x06, SEI load length, an I frame mark, user-defined information and an end code of 0x80, the SEI load length comprises unit bytes, the start code, the NALU unit type and the end code length are subtracted from the SEI total length of the frame, and the user-defined information comprises time, frame length and a special frame mark;
the video filling unit fills each frame in the H.264 video code stream to integral multiple of the video frame alignment length according to the video frame alignment length required by a user and sends the video frame alignment length to the video output unit, after the video filling unit receives a frame end signal sent by the video analysis unit, the video filling unit calculates the data length required to be filled according to the video frame alignment length, SEI length and current video frame length required by the user, if the user requires alignment according to A bytes, the SEI length is B bytes, and the current video frame length is C bytes, the filling length D is A- (B + C)% A, wherein%, the% represents the remainder, and the filling data is output to the video output unit according to the filling length D;
the video output unit realizes the time-sharing output of the auxiliary enhancement information, the original video code stream and the filling content, starts to output data after receiving the frame starting signal, firstly receives and outputs the SEI of the current frame, then receives and outputs the data of the current frame, and receives and outputs the filling data after receiving the frame ending signal.
2. The H.264/AVC video auxiliary enhancement information packaging circuit implemented by FPGA according to claim 1,
the method is characterized in that:
the SEI packaging original video code stream comprises AUD, SPS, PPS and CU, wherein the SPS and the PPS are only I frames;
when SEI is packaged, adding SEI before each AUD of a video frame; and a video filling process, wherein data filling is carried out after a CU, data filling is carried out according to the alignment length defined by a user, and the structure of a finally output video code stream is [ Fn _ block0, Fn _ block1, … Fn _ block (m-1), Fn _ block M with Padding _ data ], wherein the Fn _ block (m-1) represents the (m-1) th block of the nth frame video, the length of each block is the alignment length, the Fn _ block M with Padding _ data represents the last block of the nth frame, and the last block contains filling data.
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| KR20230165249A (en) * | 2021-04-08 | 2023-12-05 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | Scalability Dimension Information Additional Enhancement Information Message |
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